CN117707825A

CN117707825A - Efficient and accurate timing method, system, electronic equipment and storage medium

Info

Publication number: CN117707825A
Application number: CN202311797230.0A
Authority: CN
Inventors: 郭昌盛; 武玉强; 李华生; 王磊; 邱斌; 姜昱西
Original assignee: Beijing Jiangmin Xinke Technology Co ltd
Current assignee: Beijing Jiangmin Xinke Technology Co ltd
Priority date: 2023-12-25
Filing date: 2023-12-25
Publication date: 2024-03-15

Abstract

The invention discloses a high-efficiency accurate timing method, a system, electronic equipment and a storage medium. The method comprises the following steps: creating and starting a timer calculation thread, initializing a counter value to be 0, taking millisecond time as sleep time, continuously polling and calculating, accumulating the counter value until the counter value reaches a specified threshold value, and sending out a notification of executing a specified task. The method also comprises a clock monitoring step, a calibration detection step and a query updating step. The invention counts threads through the timer in the increment counting mode, sleeps at millisecond time each time, and ensures the quick response of updating or exiting. And by combining a clock monitoring thread, the monitoring of system time tampering and dormancy restoration is increased, the problem of inaccurate timer caused by system time tampering or dormancy is effectively avoided, and the accuracy of timer task execution under any condition is ensured. The timing method is also mutually separated from the execution task, so that the timing function and the execution task function are independent, and the method is reusable and good in expandability.

Description

Efficient and accurate timing method, system, electronic equipment and storage medium

Technical Field

The present invention relates to the field of network security technologies, and in particular, to a high-efficiency and precise timing method, system, electronic device, and storage medium.

Background

Timers are a conventional means of timing the triggering or execution of certain tasks in software development, similar to our life alarm clock, by setting a time or period to execute our designated tasks. Similar application scenarios are often involved in software development, for example, broadcast notification and early warning information are sent at set designated time; or periodically detecting, patch upgrading and maintaining, etc. daily, weekly, monthly, etc. to complete the logic processing related to polling fixed interval fast and effectively. Therefore, setting the timer task is an indispensable application mode for most application software and hardware devices at present. Once the timer calculation is in error, or the time tampering can not work normally, some important virus library updates of enterprise and government software or emergency notices can not be sent normally, and irreparable losses are brought to the enterprise and government.

Currently, for the implementation of timer algorithms, common schemes include: (1) And detecting the time interval through s sleep control, and simultaneously detecting whether the system time reaches a set threshold value. The disadvantage of this solution is: the setting of the sleep time length often directly influences the detection efficiency, and the timer can be updated or exited after the sleep time is reached every time, so that the efficiency is low. (2) The detection time interval is controlled by the semaphore wait for while detecting whether the system time reaches a threshold. The disadvantage of this solution is: if the system is resumed after long sleep or the system time is tampered, the waiting time of the semaphore will generate errors, which causes the failure to trigger the timing task in time.

It can be seen that the current timing algorithms still have significant shortcomings and drawbacks. Therefore, a new efficient and accurate timing method, system, electronic device and storage medium are needed to be created, so that optimization of timing calculation is realized by adopting an increment counting mode, and quick response of updating or exiting can be ensured by dormancy millisecond time each time. And the accuracy of timer task execution under any condition is ensured by adding monitoring steps of system time tampering and dormancy restoration.

Disclosure of Invention

In view of this, embodiments of the present invention provide a high-efficiency and accurate timing method, which at least partially solves the problems existing in the prior art.

In a first aspect, an embodiment of the present invention provides a high-efficiency and accurate timing method, where the method is: creating and starting a timer calculation thread, initializing a counter value to be 0, taking millisecond time as sleep time, continuously polling and calculating, accumulating the counter value until the counter value reaches a specified threshold value, and sending a notification of executing a specified task.

According to a specific implementation manner of the embodiment of the present invention, the method further includes a clock monitoring step, where the clock monitoring step is:

creating and starting a system clock monitoring thread, firstly acquiring a current system time value t1, acquiring a system time value t2 again after dormancy for a certain time t, calculating a difference value delta t of the system time values of two times, if t2 is less than or equal to t1 or the difference value delta t is greater than t, indicating that the system time is tampered or the system is dormant for a long time, and sending a notification of system time correction and verification to a timer calculation thread.

According to a specific implementation manner of the embodiment of the present invention, the method further includes a calibration detection step, where the calibration detection step is:

and after receiving the system time correction verification notification sent by the system clock monitoring thread, carrying out parameter calibration and detection on the counter value of the timer calculation thread.

According to a specific implementation manner of the embodiment of the present invention, the method further includes a query update step, where the query update step is:

and after receiving the notification of the task list change, inquiring and updating the timer calculation thread.

In a second aspect, embodiments of the present invention provide a high efficiency, accurate timing system, the system comprising:

and the timer module is configured for creating and starting a timer calculation thread, initializing a counter value to be 0, taking millisecond time as sleep time, continuously polling and calculating, accumulating the counter value until the counter value reaches a specified threshold value, and sending out a notification for executing a specified task.

According to a specific implementation manner of the embodiment of the invention, the system further comprises:

the clock monitoring module is configured to create and start a system clock monitoring thread, firstly acquire a current system time value t1, acquire a system time value t2 again after sleeping for a certain time t, calculate a difference value delta t of the system time values of two times, indicate that the system time is tampered or the system is sleeping for a long time if t2 is less than or equal to t1 or the difference value delta t is more than t, and send a notification of system time correction and verification to the timer calculation thread.

and the calibration detection module is configured to perform parameter calibration and detection on the counter value of the timer calculation thread after receiving the system time correction verification notification sent by the system clock monitoring thread.

and the query updating module is configured to query and update the timer calculation thread after receiving the notification of the task list change.

In a third aspect, an embodiment of the present invention further provides an electronic device, including:

at least one processor; the method comprises the steps of,

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor, which when executed by the at least one processor, cause the at least one processor to perform the efficient and accurate timing method of any of the foregoing first aspect or any implementation of the first aspect.

In a fourth aspect, embodiments of the present invention also provide a non-transitory computer-readable storage medium storing computer instructions that, when executed by at least one processor, cause the at least one processor to perform the efficient accurate timing method of the first aspect or any implementation of the first aspect.

In a fifth aspect, embodiments of the present invention also provide a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the efficient accurate timing method of the first aspect or any implementation manner of the first aspect.

The high-efficiency accurate timing method of the invention can ensure the quick response of updating or exiting by creating the timer counting thread in the increment counting mode and sleeping in millisecond time each time, thereby meeting the quick and high efficiency of task exiting while ensuring the timing accuracy. And by combining a clock monitoring thread, the monitoring of system time tampering and dormancy restoration is increased, the problem of inaccurate timer caused by system time tampering or dormancy is effectively avoided, and the accuracy of timer task execution under any condition is ensured. In addition, the efficient and accurate timing method is mutually separated from the execution task, so that the timing function and the execution task function are independent, and the method is reusable and good in expandability.

Drawings

The foregoing is merely an overview of the present invention, and the present invention is further described in detail below with reference to the accompanying drawings and detailed description.

FIG. 1 is a schematic overall flow chart of a high-efficiency accurate timing method according to an embodiment of the invention;

FIG. 2 is a logic flow diagram of a clock monitoring thread in a high-efficiency and accurate timing method according to an embodiment of the present invention;

FIG. 3 is a logic flow diagram of a timer calculation thread in an efficient and precise timing method according to an embodiment of the present invention;

FIG. 4 is a flow chart of the working principle of the task executing module in the efficient and accurate timing method according to the embodiment of the invention;

FIG. 5 is a block diagram of a high efficiency and accurate timing system according to an embodiment of the present invention; and

fig. 6 is a schematic diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

Embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

Other advantages and effects of the present disclosure will become readily apparent to those skilled in the art from the following disclosure, which describes embodiments of the present disclosure by way of specific examples. It will be apparent that the described embodiments are merely some, but not all embodiments of the present disclosure. The disclosure may be embodied or practiced in other different specific embodiments, and details within the subject specification may be modified or changed from various points of view and applications without departing from the spirit of the disclosure. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, based on the embodiments in this disclosure are intended to be within the scope of this disclosure.

Fig. 1 shows an overall flow diagram of the efficient and accurate timing method of the present embodiment. As shown in fig. 1, the embodiment of the invention provides a high-efficiency accurate timing method, which comprises the following steps:

s1, creating and starting a timer calculation thread, and starting timer calculation.

Specifically, referring to fig. 3, the value of the initialized counter is set to 0, the millisecond time is used as the sleep time, the polling calculation is continuously carried out, the value of the counter is accumulated, the current value n of the counter is circularly compared to reach a specified threshold value m, if the current value n of the counter does not reach the specified threshold value m, the short sleep is carried out, and meanwhile, the value of the counter is updated; if so, querying an executable task list and sending a notification of executing the specified task. And simultaneously resetting the counter value to 0, and entering the next polling count.

In the step, sleep is adopted for a short time, and each sleep millisecond time is calculated in an incremental time comparison mode, so that the waiting time can be effectively reduced, and the updated quick response and the quick and high efficiency after the task exits are met.

Meanwhile, the method also comprises a clock monitoring step S2 for detecting the local time of the system and solving the problem of inaccurate clock acquisition caused by falsification or dormancy of the system clock.

Specifically, referring to fig. 2, the clock monitoring step S2 is: creating and starting a system clock monitoring thread, firstly judging whether exit detection is needed, if yes, exiting, and ending the thread; if not, then continue. Then, the current system time value t1 is obtained and stored and recorded for subsequent comparison. After waiting for a certain time t, the system time value t2 is acquired again. Then, calculating the difference delta t of the two system time values, if t2 is less than or equal to t1 or the difference delta t is more than t, indicating that the system time is tampered or the system is dormant for a long time, and sending a notification of system time correction and verification to the timer calculation thread.

Next, the calibration detection step S3 is continued.

Referring to fig. 3 again, after it is determined that the detection does not need to be exited, it is further determined whether a notification of the verification is received, that is, whether a notification of the correction and verification of the system time sent by the system clock monitoring thread is received, and if yes, parameter calibration and detection are performed according to a predetermined policy. Otherwise, continuing to detect and judge.

The method further comprises a query updating step S4, wherein the query updating step S4 is as follows:

and after judging that the detection does not need to be exited, continuing to judge whether the notification of the task list change is received, namely judging whether the task list is changed such as adding, deleting, changing and the like, if so, combining the task list, and inquiring and updating the timer calculation thread. Otherwise, continuing to detect and judge.

The timing method in the embodiment of the disclosure optimizes the timing calculation mode by an increment counting mode, polls and calculates by millisecond sleep time, can ensure quick response of updating or exiting, and also avoids the problem that the timer cannot work normally after the sleep of the system is restored or the system time is tampered by adding clock monitoring, thereby really achieving the efficient and accurate timing function.

Fig. 5 shows a high-efficiency and accurate timing system provided in this embodiment, which includes a timer module, a clock monitoring module, a calibration detection module, and a query update module.

The timer module is used for creating and starting a timer calculation thread, initializing the counter value to be 0, taking millisecond time as sleep time, continuously polling and calculating, accumulating the counter value until the counter value reaches a specified threshold value, and sending out a notification for executing a specified task.

The clock monitoring module is used for creating and starting a system clock monitoring thread, firstly acquiring a current system time value t1, acquiring a system time value t2 again after dormancy for a certain time t, calculating a difference value delta t of the system time values of two times, indicating that the system time is tampered or the system is dormant for a long time if t2 is less than or equal to t1 or the difference value delta t is more than t, and sending a notification of system time correction and verification to the timer calculation thread.

And the calibration detection module is used for carrying out parameter calibration and detection on the counter value of the timer calculation thread after receiving the system time correction verification notification sent by the system clock monitoring thread.

And the query updating module is used for carrying out query updating on the timer calculation thread after receiving the notification of the task list change.

It should be noted that, in this embodiment, the efficient and accurate timing system and the task execution module are separated from each other, as shown in fig. 4 and 5, after the task execution module receives the notification of executing the specified task sent by the timer module, the task execution module is combined with the task list module to complete the execution step of the corresponding task, and the query update module can be notified according to the change of the task list module, and the query update module is combined with the task list module to implement the query update of the timer module.

Referring to fig. 6, the present embodiment also provides an electronic device 40, which includes:

at least one processor; the method comprises the steps of,

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the efficient and precise timing method of the foregoing method embodiments.

The disclosed embodiments also provide a non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the efficient and accurate timing method of the foregoing method embodiments.

The disclosed embodiments also provide a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the efficient and accurate timing method of the foregoing method embodiments.

Referring now to fig. 6, a schematic diagram of an electronic device 40 suitable for use in implementing embodiments of the present disclosure is shown. The electronic devices in the embodiments of the present disclosure may include, but are not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and the like, and stationary terminals such as digital TVs, desktop computers, and the like. The electronic device shown in fig. 6 is merely an example and should not be construed to limit the functionality and scope of use of the disclosed embodiments.

As shown in fig. 6, the electronic device 40 may include a processing means (e.g., a central processing unit, a graphics processor, etc.) 401, which may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) 402 or a program loaded from a storage means 408 into a Random Access Memory (RAM) 403. In the RAM 403, various programs and data required for the operation of the electronic device 40 are also stored. The processing device 401, the ROM 402, and the RAM 403 are connected to each other by a bus 404. An input/output (I/O) interface 405 is also connected to bus 404.

In general, the following devices may be connected to the I/O interface 405: input devices 406 including, for example, a touch screen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; an output device 407 including, for example, a Liquid Crystal Display (LCD), a speaker, a vibrator, and the like; storage 408 including, for example, magnetic tape, hard disk, etc.; and a communication device 409. The communication means 409 may allow the electronic device 40 to communicate with other devices wirelessly or by wire to exchange data. While an electronic device 40 having various means is shown in the figures, it should be understood that not all of the illustrated means are required to be implemented or provided. More or fewer devices may be implemented or provided instead.

In particular, according to embodiments of the present disclosure, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising program code for performing the method shown in the flowcharts. In such an embodiment, the computer program may be downloaded and installed from a network via communications device 409, or from storage 408, or from ROM 402. The above-described functions defined in the methods of the embodiments of the present disclosure are performed when the computer program is executed by the processing device 401.

It should be noted that the computer readable medium described in the present disclosure may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this disclosure, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present disclosure, however, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with the computer-readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, fiber optic cables, RF (radio frequency), and the like, or any suitable combination of the foregoing.

The computer readable medium may be contained in the electronic device; or may exist alone without being incorporated into the electronic device.

The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: acquiring at least two internet protocol addresses; sending a node evaluation request comprising the at least two internet protocol addresses to node evaluation equipment, wherein the node evaluation equipment selects an internet protocol address from the at least two internet protocol addresses and returns the internet protocol address; receiving an Internet protocol address returned by the node evaluation equipment; wherein the acquired internet protocol address indicates an edge node in the content distribution network.

Alternatively, the computer-readable medium carries one or more programs that, when executed by the electronic device, cause the electronic device to: receiving a node evaluation request comprising at least two internet protocol addresses; selecting an internet protocol address from the at least two internet protocol addresses; returning the selected internet protocol address; wherein the received internet protocol address indicates an edge node in the content distribution network.

Computer program code for carrying out operations of the present disclosure may be written in one or more programming languages, including an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

The units involved in the embodiments of the present disclosure may be implemented by means of software, or may be implemented by means of hardware. The name of the unit does not in any way constitute a limitation of the unit itself, for example the first acquisition unit may also be described as "unit acquiring at least two internet protocol addresses".

It should be understood that portions of the present disclosure may be implemented in hardware, software, firmware, or a combination thereof.

The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the disclosure are intended to be covered by the protection scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. The efficient and accurate timing method is characterized by comprising the following steps of: creating and starting a timer calculation thread, initializing a counter value to be 0, taking millisecond time as sleep time, continuously polling and calculating, accumulating the counter value until the counter value reaches a specified threshold value, and sending a notification of executing a specified task.

2. The efficient accurate timing method of claim 1 further comprising a clock monitoring step of: creating and starting a system clock monitoring thread, firstly acquiring a current system time value t1, acquiring a system time value t2 again after dormancy for a certain time t, calculating a difference value delta t of the system time values of two times, if t2 is less than or equal to t1 or the difference value delta t is greater than t, indicating that the system time is tampered or the system is dormant for a long time, and sending a notification of system time correction and verification to a timer calculation thread.

3. The efficient accurate timing method of claim 2 further comprising a calibration detection step of: and after receiving the system time correction verification notification sent by the system clock monitoring thread, carrying out parameter calibration and detection on the counter value of the timer calculation thread.

4. A high efficiency, accurate timing method according to claim 3 further comprising a query update step of: and after receiving the notification of the task list change, inquiring and updating the timer calculation thread.

5. An efficient and accurate timing system, the system comprising:

6. The high efficiency, precise timing system of claim 5 further comprising:

7. The high efficiency, precise timing system of claim 6 further comprising:

8. The high efficiency, precise timing system of claim 7 further comprising:

9. An electronic device, comprising:

at least one processor; the method comprises the steps of,

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor, which when executed by the at least one processor, cause the at least one processor to perform the efficient and accurate timing method of any of claims 1 to 4.

10. A non-transitory computer-readable storage medium storing computer instructions that, when executed by at least one processor, cause the at least one processor to perform the efficient precision timing method of any of claims 1-4.