CN117707720A - Process scheduling method and device and electronic equipment - Google Patents

Process scheduling method and device and electronic equipment Download PDF

Info

Publication number
CN117707720A
CN117707720A CN202310991089.1A CN202310991089A CN117707720A CN 117707720 A CN117707720 A CN 117707720A CN 202310991089 A CN202310991089 A CN 202310991089A CN 117707720 A CN117707720 A CN 117707720A
Authority
CN
China
Prior art keywords
value
scheduling
memory
lock
vruntime
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310991089.1A
Other languages
Chinese (zh)
Inventor
鲁超
韩风
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honor Device Co Ltd
Original Assignee
Honor Device Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honor Device Co Ltd filed Critical Honor Device Co Ltd
Priority to CN202310991089.1A priority Critical patent/CN117707720A/en
Publication of CN117707720A publication Critical patent/CN117707720A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The application discloses a process scheduling method, a process scheduling device and electronic equipment, which belong to the technical field of scheduling, and the method comprises the following steps: under the condition that the memory pressure value of the electronic equipment is larger than the pressure threshold value, acquiring a scheduling weight value of each process in the scheduling queue; determining the lock holding state of each process in the scheduling queue; setting the virtual running time vruntime of the target process as a first time value under the condition that the scheduling queue comprises a scheduling weight value as a first numerical value and the lock holding state is a process holding a memory lock; and scheduling each process in the scheduling queue based on the size of the vruntime of each process in the scheduling queue. In the method, if the schedule queue is determined to comprise a process which holds the memory lock and belongs to the target process group, the target process is scheduled preferentially, so that the target process releases the memory lock as soon as possible, and the problem of process blocking caused by the fact that processes of other process groups cannot hold the memory lock for a long time is solved.

Description

Process scheduling method and device and electronic equipment
Technical Field
The application belongs to the technical field of scheduling, and particularly relates to a process scheduling method and device and electronic equipment.
Background
In computer science, memory locks are a concurrent access mechanism used to secure shared memory resources. The memory lock can only be held by one process at the same time, when one process obtains the memory lock, the memory lock can safely access the shared resource, and other processes need to wait for the release of the memory lock. Therefore, the memory lock can solve the problem of memory resource competition in the concurrent environment, ensure the exclusive access of the shared memory resource and avoid inconsistent or wrong results caused by the simultaneous modification of shared data by a plurality of processes.
However, in the case of an electronic device in a high load state, the lock-holding process may not be able to allocate processor resources, which may result in other processes being in a blocked state because the other processes are not able to hold the memory lock.
Disclosure of Invention
The application provides a process scheduling method, a process scheduling device and electronic equipment, which can reduce the probability that other processes are in a blocking state because the other processes cannot hold a memory lock due to the fact that a lock holding process is in a runnable state for a long time.
In a first aspect, the present application provides a process scheduling method, where the method is applied to an electronic device, and the method includes: under the condition that the memory pressure value of the electronic equipment is larger than a pressure threshold value, acquiring a scheduling weight value of each process in a scheduling queue; the scheduling queue comprises M processes in an executable state, wherein M is a positive integer greater than or equal to 1; determining the locking states of the M processes; setting virtual running time vruntime of a target process as a first time value under the condition that the target process is included in the scheduling queue; the target process is a process with a scheduling weight value of a first value and a lock holding state of a memory lock; scheduling weight values corresponding to other processes except a drawing process and a rendering process in a foreground application program of the electronic device are first numerical values, scheduling weight values corresponding to the drawing process and the rendering process in the foreground application program are second numerical values, and the first numerical values and the second numerical values are different; the first time value is the minimum value of vruntime of all processes in the scheduling queue; and scheduling each process in the scheduling queue based on the size of the vruntime of each process in the scheduling queue.
In this way, since the scheduling weight values corresponding to the processes of the top-app process group (i.e., the processes other than the drawing process and the rendering process in the foreground application program) and the processes of the other process group (i.e., the drawing process and the rendering process in the foreground application program) are different, it is possible to determine whether the processes belonging to the top-app process group are included in the scheduling queue based on the scheduling weight values of the processes when the memory pressure value of the electronic device is greater than the pressure threshold.
The fair scheduling algorithm schedules the processes according to the sequence from small to large of the vruntime of each process in the scheduling queue, namely, when each scheduling is performed, the fair scheduling algorithm selects the process with the smallest vruntime in all the processes to schedule. Thus, since the vruntime of the target process is set to the minimum value of vruntime of all processes in the case that the target process is included in the schedule queue, the target process having the minimum vruntime is scheduled first. Thus, the target processes belonging to the top-app process group and holding the lock can be preferentially scheduled to release the memory lock as soon as possible, so that the blocking caused by the fact that other process groups cannot hold the memory lock for a long time is avoided.
In one implementation, the method further comprises: monitoring the memory pressure value of the electronic equipment; determining a scheduling weight value of the target process group as a first numerical value under the condition that the memory pressure value is larger than the pressure threshold value; the target process group comprises other processes except a drawing process and a rendering process in the foreground application program; determining a scheduling weight value of the target process group as a second numerical value under the condition that the memory pressure value is smaller than or equal to the pressure threshold value; wherein the first value is different from the second value.
In this way, the scheduling module may distinguish the target process group from other process groups based on the shares value of each process in a manner of dynamically adjusting the scheduling weight value (shares value) of the target process group based on the memory pressure state of the electronic device. On the other hand, the scheduling module may also determine whether the electronic device is in a high load state through the shares value. For example, if the schedule queue includes a process with a shares value of a first value, indicating that the electronic device is in a high load state; and if the schedule queue does not comprise the process with the shares value of the first value, indicating that the electronic equipment is in a low-load state.
In addition, because the shares value parameter is the same in different electronic devices, the method can be compatible with different electronic devices by adjusting the shares value of the target process group and distinguishing the target process group from other process groups, and is more beneficial to code maintenance.
In one implementation manner, the second value is a default value of the scheduling weight value of the target process group, and an absolute value of a difference value between the first value and the second value is smaller than a preset value.
Thus, the runtime of a process is related to the shares value of the process, and thus, to avoid affecting the runtime of the process, the smaller the modification of the shares value is, the better. Based on this consideration, a modified range of the shares value may be set, i.e., an absolute value of the difference between the first value and the second value is set to be smaller than a preset value. For example, the preset value is 1. Thus, the first value may be 1023 or 1025 and the second value may be a default value of 1024.
In one implementation, the first value is 1023 or 1025 and the second value is 1024.
In one implementation manner, when the memory pressure value of the electronic device is greater than the pressure threshold value, obtaining the scheduling weight value of each process in the scheduling queue includes: and under the condition that the memory pressure value of the electronic equipment is larger than the pressure threshold value and the foreground application program of the electronic equipment comprises a drawing process and a rendering process, acquiring a scheduling weight value of each process in a scheduling queue.
In the case where a drawing process and a rendering process are included in a foreground application of an electronic device, user interface display is generally involved, and if the drawing process and the rendering process in the foreground application are in a blocking state for a long time, the display of the user interface is affected, and a user may perceive a click, thereby affecting user experience. Therefore, in order to avoid that the drawing process and the rendering process are in a blocking state for a long time, under the condition that the foreground application program of the electronic device is identified to include the drawing process and the rendering process, the process scheduling method provided by the first aspect of the application is executed, so that the target processes belonging to the top-app process group and holding the lock can be scheduled preferentially, the memory lock can be released as soon as possible, and blocking caused by the fact that other process groups cannot hold the memory lock for a long time is avoided.
In one implementation manner, before setting the virtual running time vruntime of the target process to the first time value, the method further includes: determining virtual running time vruntime of the target process under the condition that the target process is included in the scheduling queue; and setting the virtual running time vruntime of the target process as a first time value under the condition that the virtual running time vruntime of the target process is not the minimum value of the vruntime of all processes in the scheduling queue.
In this way, before setting the virtual running time vruntime of the target process to the first time value, it may be determined whether the vruntime of the target process is the minimum value of vruntime of all processes in the scheduling queue. If the vruntime of the target process is the minimum of the vruntimes of all processes in the dispatch queue, the vruntime of the target process may not be modified. If the vruntime of the target process is not the minimum of the vruntimes of all processes in the dispatch queue, then the vruntime of the target process is modified to the first time value.
In one implementation, the first time value is a difference between a second time value and a round robin period, the second time value is a vruntime before the target process is modified, and the round robin period is a time required for all processes in the scheduling queue to run for one round.
Thus, subtracting the round-robin period from the original vruntime (i.e., the second time value) of the target process corresponds to the scheduling module decreasing the vruntime of the target process by one round-robin period. Thus, the modified vruntime value of the target process must be the minimum value of vruntime for all processes in the dispatch queue. In addition, the modification mode does not need to introduce other parameters into the fair scheduling algorithm, can directly call the original round-robin period parameters, and modifies the vruntime of the target process based on the round-robin period.
In one implementation, the method further comprises: setting a lock holding mark of the process as a first mark under the condition that the process holds the memory lock, wherein the first mark is used for representing that the lock holding state of the process is the memory lock holding state; and setting a lock holding mark of the process as a second mark under the condition that the process releases the memory lock, wherein the second mark is used for representing that the lock holding state of the process is to release the memory lock.
In this way, the lock-holding mark is added in the structure of the process, so that the dispatch module can conveniently identify the lock-holding state of the process.
In one implementation, the determining the lock-holding states of the M processes includes: acquiring locking marks of the M processes; determining the lock holding state of the process with the lock holding mark being the first mark as a memory lock; and determining the lock holding state of the process with the lock holding mark being the second mark as the memory lock release.
In one implementation manner, the setting the lock holding flag of the process as the first flag in the case that the process holds the memory lock includes: and setting the value of the lock holding mark of the process as a third value under the condition that the process holds the memory lock.
In one implementation manner, the setting the lock holding flag of the process to be the second flag in the case that the process has released the memory lock includes: and setting the value of the lock holding mark of the process to be a fourth value under the condition that the process releases the memory lock, wherein the fourth value is different from the third value.
In a second aspect, the present application provides a process scheduling apparatus, the apparatus comprising:
the acquisition module is used for acquiring the scheduling weight value of each process in the scheduling queue under the condition that the memory pressure value of the electronic equipment is larger than the pressure threshold value; the scheduling queue comprises M processes in an executable state, wherein M is a positive integer greater than or equal to 1;
the lock holding state determining module is used for determining the lock holding states of the M processes;
the virtual running time setting module is used for setting virtual running time vruntime of the target process to be a first time value under the condition that the target process is included in the scheduling queue; the target process is a process with a scheduling weight value of a first value and a lock holding state of a memory lock; scheduling weight values corresponding to other processes except a drawing process and a rendering process in a foreground application program of the electronic device are first numerical values, scheduling weight values corresponding to the drawing process and the rendering process in the foreground application program are second numerical values, and the first numerical values and the second numerical values are different; the first time value is the minimum value of vruntime of all processes in the scheduling queue;
And the scheduling module is used for scheduling each process in the scheduling queue based on the size of the vruntime of each process in the scheduling queue.
In a third aspect, the present application provides an electronic device comprising a memory and a processor; the memory is coupled to the processor; the memory is for storing computer program code comprising computer instructions which, when executed by the processor, cause the electronic device to perform the method of any of the first aspects.
In a fourth aspect, the present application provides a computer readable storage medium having stored therein a computer program or instructions which, when run on a computer, cause the computer to perform the method according to any of the first aspects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic process state diagram of an application according to an embodiment of the present application;
fig. 2 is a schematic hardware structure of an electronic device according to an embodiment of the present application;
fig. 3 is a schematic software framework of an electronic device according to an embodiment of the present application;
fig. 4 is a schematic diagram of a framework for implementing a process scheduling method according to an embodiment of the present application;
FIG. 5 is a flowchart of a process scheduling method according to an embodiment of the present application;
FIG. 6 is a flowchart of a method for determining a target process group according to an embodiment of the present application;
FIG. 7 is a block diagram illustrating a process scheduling method according to an embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of a process scheduling apparatus according to an embodiment of the present application.
Detailed Description
In computer science, memory locks are a concurrent access mechanism used to secure shared memory resources. A memory lock is a mutually exclusive object that can only be held by one process at a time. When one process acquires a memory lock, it can safely access the shared resource, and the other process needs to wait for the release of the memory lock. Therefore, the memory lock can solve the problem of memory resource competition in the concurrent environment, ensure the exclusive access of the shared memory resource and avoid inconsistent or wrong results caused by the simultaneous modification of shared data by a plurality of processes.
The basic operations of a memory lock generally include two types: locking and unlocking.
Locking (Lock): when one process tries to acquire the memory lock, if the memory lock is not currently held, the memory lock can be successfully acquired and becomes a holder of the memory lock, and other processes need to wait for the release of the memory lock at the moment. In this case, the lock-holding state of the process that successfully acquires the memory lock is the holding memory lock.
Unlocking (Unlock): after the holder of the memory lock uses up the shared resource, the memory lock is released, so that other processes can acquire the memory lock and access the shared resource. In this case, the lock-holding state of the process that has released the memory lock is to release the memory lock.
The running of a process requires the reliance on memory resources and processor (e.g., central processing unit, CPU) resources. When a process holds a memory lock, the process queues in a dispatch queue waiting for a dispatch module to allocate processor resources to run the process. At this point, the process is in a runnable state, i.e., indicating that the process is ready and can run on the CPU.
However, the inventor finds that in some cases, the process of which the application main process is a vip process group is in a blocking state for a long time, so that the response of the application main process is delayed, a blocking phenomenon occurs, and the user experience is affected.
Further, by analyzing the cause of the process blockage of the vip process group, it is found that: as shown in fig. 1, the process 1 is a process of a vip process group, and the process 2, the process 3 and the process 4 are all processes of a top-app process group. Process 1 is in a blocked state most of the time because memory locks cannot be acquired within a period of 0.0s-6.0 s. For example, process 1 is in a blocking state for time periods T1, T2, and T3. Further tracking lock-holding process discovery: during the time period of 0.0s-6.0s, the memory lock is mainly held by the process of the top-app process group in time intervals. Specifically, during time period T1, the memory lock is held by process 2; during time period T2, the memory lock is held by process 3; during time period T3, the memory lock is held by process 4.
However, since the electronic device is in a high load state, after the process 2, the process 3 and the process 4 are locked, the locked process 2, the process 3 and the process 4 are in a runnable state for a long time and cannot obtain the running opportunity because the processor resources cannot be allocated. Because the lock-holding process is in a runnable state for a long time, the memory lock cannot be released, so that the process 1 is in a blocking state because the memory lock cannot be acquired.
It can be seen that, in the case that the electronic device is in a high load state, the lock-holding process of the top-app process group may not be able to obtain an opportunity to run because the lock-holding process is not allocated to the processor resource, and is in a runnable state for a long time. This results in the processes of the vip process group being blocked because they cannot hold the memory lock.
Wherein the vip process set includes a drawing (UI) thread and a rendering (Render) thread in a foreground application. the top-app process group includes threads other than the UI thread and the Render thread in the foreground application. UI threads and Render threads are typically used to handle user interface related tasks such as creating and displaying forms, handling user input, updating UIs, and the like. Therefore, if the process of the vip process group is in a blocking state for a long time, the display of the user interface is affected, and the user can perceive the click, so that the user experience is affected.
In order to solve the above-mentioned problems, an embodiment of the present application provides a process scheduling method, in which if it is determined that a schedule queue includes a process that holds a memory lock and belongs to a target process group (e.g., top-app process group), the process is preferentially scheduled, so that the process releases the memory lock as soon as possible, thereby solving the problem that the process of the vip process group is in a blocking state due to the fact that the process of the vip process group cannot hold the memory lock for a long time.
The process scheduling method provided by the embodiment of the application can be applied to electronic equipment, and optionally, the electronic equipment comprises, but is not limited to, a mobile phone, a tablet personal computer, a personal computer, workstation equipment, large-screen equipment (such as a smart screen, a smart television and the like), a palm game machine, a household game machine, virtual reality equipment, augmented reality equipment, mixed reality equipment, a vehicle-mounted intelligent terminal and the like.
Fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 2, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a charge management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, keys 190, a motor 191, an indicator 192, a camera 193, a display 194, a user identification module (subscriber identification module, SIM) card interface 195, and the like. The sensor module 180 may include a pressure sensor 180A, a gyro sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.
It should be understood that the illustrated structure of the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, electronic device 100 may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
The processor 110 may include one or more processing units, such as: the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.
The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution.
A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Repeated accesses are avoided and the latency of the processor 110 is reduced, thereby improving the efficiency of the system.
In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, and/or a universal serial bus (universal serial bus, USB) interface, among others.
The I2C interface is a bi-directional synchronous serial bus comprising a serial data line (SDA) and a serial clock line (derail clock line, SCL). In some embodiments, the processor 110 may contain multiple sets of I2C buses. The processor 110 may be coupled to the touch sensor 180K, charger, flash, camera 193, etc., respectively, through different I2C bus interfaces. For example: the processor 110 may be coupled to the touch sensor 180K through an I2C interface, such that the processor 110 communicates with the touch sensor 180K through an I2C bus interface to implement a touch function of the electronic device 100.
The I2S interface may be used for audio communication. In some embodiments, the processor 110 may contain multiple sets of I2S buses. The processor 110 may be coupled to the audio module 170 via an I2S bus to enable communication between the processor 110 and the audio module 170. In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through the I2S interface, to implement a function of answering a call through the bluetooth headset.
PCM interfaces may also be used for audio communication to sample, quantize and encode analog signals. In some embodiments, the audio module 170 and the wireless communication module 160 may be coupled through a PCM bus interface. In some embodiments, the audio module 170 may also transmit audio signals to the wireless communication module 160 through the PCM interface to implement a function of answering a call through the bluetooth headset. Both the I2S interface and the PCM interface may be used for audio communication.
The UART interface is a universal serial data bus for asynchronous communications. The bus may be a bi-directional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, a UART interface is typically used to connect the processor 110 with the wireless communication module 160. For example: the processor 110 communicates with a bluetooth module in the wireless communication module 160 through a UART interface to implement a bluetooth function. In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through a UART interface, to implement a function of playing music through a bluetooth headset.
The MIPI interface may be used to connect the processor 110 to peripheral devices such as a display 194, a camera 193, and the like. The MIPI interfaces include camera serial interfaces (camera serial interface, CSI), display serial interfaces (display serial interface, DSI), and the like. In some embodiments, processor 110 and camera 193 communicate through a CSI interface to implement the photographing functions of electronic device 100. The processor 110 and the display 194 communicate via a DSI interface to implement the display functionality of the electronic device 100.
The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal or as a data signal. In some embodiments, a GPIO interface may be used to connect the processor 110 with the camera 193, the display 194, the wireless communication module 160, the audio module 170, the sensor module 180, and the like. The GPIO interface may also be configured as an I2C interface, an I2S interface, a UART interface, an MIPI interface, etc.
The USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the electronic device 100, and may also be used to transfer data between the electronic device 100 and a peripheral device. And can also be used for connecting with a headset, and playing audio through the headset. The interface may also be used to connect other electronic devices, such as AR devices, etc.
It should be understood that the interfacing relationship between the modules illustrated in the embodiments of the present invention is only illustrative, and is not meant to limit the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may also use different interfacing manners, or a combination of multiple interfacing manners in the foregoing embodiments.
The charge management module 140 is configured to receive a charge input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charge management module 140 may receive a charging input of a wired charger through the USB interface 130. In some wireless charging embodiments, the charge management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. The charging management module 140 may also supply power to the electronic device through the power management module 141 while charging the battery 142.
The power management module 141 is used for connecting the battery 142, and the charge management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charge management module 140 to power the processor 110, the internal memory 121, the display 194, the camera 193, the wireless communication module 160, and the like. The power management module 141 may also be configured to monitor battery capacity, battery cycle number, battery health (leakage, impedance) and other parameters. In other embodiments, the power management module 141 may also be provided in the processor 110. In other embodiments, the power management module 141 and the charge management module 140 may be disposed in the same device.
The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.
The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 may be used to cover a single or multiple communication bands. Different antennas may also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed into a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.
The mobile communication module 150 may provide a solution for wireless communication including 2G/3G/4G/5G, etc., applied to the electronic device 100. The mobile communication module 150 may include at least one filter, switch, power amplifier, low noise amplifier (low noise amplifier, LNA), etc. The mobile communication module 150 may receive electromagnetic waves from the antenna 1, perform processes such as filtering, amplifying, and the like on the received electromagnetic waves, and transmit the processed electromagnetic waves to the modem processor for demodulation. The mobile communication module 150 can amplify the signal modulated by the modem processor, and convert the signal into electromagnetic waves through the antenna 1 to radiate. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be disposed in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be provided in the same device as at least some of the modules of the processor 110.
The modem processor may include a modulator and a demodulator. The modulator is used for modulating the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low frequency baseband signal to the baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs sound signals through an audio device (not limited to the speaker 170A, the receiver 170B, etc.), or displays images or video through the display screen 194. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be provided in the same device as the mobile communication module 150 or other functional module, independent of the processor 110.
The wireless communication module 160 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc., as applied to the electronic device 100. The wireless communication module 160 may be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the electromagnetic wave signals, filters the electromagnetic wave signals, and transmits the processed signals to the processor 110. The wireless communication module 160 may also receive a signal to be transmitted from the processor 110, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via the antenna 2.
In some embodiments, antenna 1 and mobile communication module 150 of electronic device 100 are coupled, and antenna 2 and wireless communication module 160 are coupled, such that electronic device 100 may communicate with a network and other devices through wireless communication techniques. The wireless communication techniques may include the Global System for Mobile communications (global system for mobile communications, GSM), general packet radio service (general packet radio service, GPRS), code division multiple access (code division multiple access, CDMA), wideband code division multiple access (wideband code division multiple access, WCDMA), time division code division multiple access (time-division code division multiple access, TD-SCDMA), long term evolution (long term evolution, LTE), BT, GNSS, WLAN, NFC, FM, and/or IR techniques, among others. The GNSS may include a global satellite positioning system (global positioning system, GPS), a global navigation satellite system (global navigation satellite system, GLONASS), a beidou satellite navigation system (beidou navigation satellite system, BDS), a quasi zenith satellite system (quasi-zenith satellite system, QZSS) and/or a satellite based augmentation system (satellite based augmentation systems, SBAS).
The electronic device 100 implements display functions through a GPU, a display screen 194, an application processor, and the like. The GPU is a microprocessor for image processing, and is connected to the display 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or change display information.
The display screen 194 is used to display images, videos, and the like. The display 194 includes a display panel. The display panel may employ a liquid crystal display (liquid crystal display, LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED) or an active-matrix organic light-emitting diode (matrix organic light emitting diode), a flexible light-emitting diode (flex), a mini, a Micro led, a Micro-OLED, a quantum dot light-emitting diode (quantum dot light emitting diodes, QLED), or the like. In some embodiments, the electronic device 100 may include 1 or N display screens 194, N being a positive integer greater than 1.
The electronic device 100 may implement photographing functions through an ISP, a camera 193, a video codec, a GPU, a display screen 194, an application processor, and the like.
The ISP is used to process data fed back by the camera 193. For example, when photographing, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electric signal, and the camera photosensitive element transmits the electric signal to the ISP for processing and is converted into an image visible to naked eyes. ISP can also optimize the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in the camera 193.
The camera 193 is used to capture still images or video. The object generates an optical image through the lens and projects the optical image onto the photosensitive element. The photosensitive element may be a charge coupled device (charge coupled device, CCD) or a Complementary Metal Oxide Semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, which is then transferred to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV, or the like format. In some embodiments, electronic device 100 may include 1 or N cameras 193, N being a positive integer greater than 1.
The digital signal processor is used for processing digital signals, and can process other digital signals besides digital image signals. For example, when the electronic device 100 selects a frequency bin, the digital signal processor is used to fourier transform the frequency bin energy, or the like.
Video codecs are used to compress or decompress digital video. The electronic device 100 may support one or more video codecs. In this way, the electronic device 100 may play or record video in a variety of encoding formats, such as: dynamic picture experts group (moving picture experts group, MPEG) 1, MPEG2, MPEG3, MPEG4, etc.
The NPU is a neural-network (NN) computing processor, and can rapidly process input information by referencing a biological neural network structure, for example, referencing a transmission mode between human brain neurons, and can also continuously perform self-learning. Applications such as intelligent awareness of the electronic device 100 may be implemented through the NPU, for example: image recognition, face recognition, speech recognition, text understanding, etc.
The external memory interface 120 may be used to connect an external memory card, such as a Micro SD card, to enable expansion of the memory capabilities of the electronic device 100. The external memory card communicates with the processor 110 through an external memory interface 120 to implement data storage functions. For example, files such as music, video, etc. are stored in an external memory card.
The internal memory 121 may be used to store computer executable program code including instructions. The internal memory 121 may include a storage program area and a storage data area. The storage program area may store an application program (such as a sound playing function, an image playing function, etc.) required for at least one function of the operating system, etc. The storage data area may store data created during use of the electronic device 100 (e.g., audio data, phonebook, etc.), and so on. In addition, the internal memory 121 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like. The processor 110 performs various functional applications of the electronic device 100 and data processing by executing instructions stored in the internal memory 121 and/or instructions stored in a memory provided in the processor.
The electronic device 100 may implement audio functions through an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, an application processor, and the like. Such as music playing, recording, etc.
The audio module 170 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. The audio module 170 may also be used to encode and decode audio signals. In some embodiments, the audio module 170 may be disposed in the processor 110, or a portion of the functional modules of the audio module 170 may be disposed in the processor 110.
The speaker 170A, also referred to as a "horn," is used to convert audio electrical signals into sound signals. The electronic device 100 may listen to music, or to hands-free conversations, through the speaker 170A. A plurality of speakers 170A may be provided in the electronic apparatus 100, for example, one speaker 170A may be provided at the top of the electronic apparatus 100, one speaker 170A may be provided at the bottom, or the like.
A receiver 170B, also referred to as a "earpiece", is used to convert the audio electrical signal into a sound signal. When electronic device 100 is answering a telephone call or voice message, voice may be received by placing receiver 170B in close proximity to the human ear. In some embodiments, speaker 170A and receiver 170B may also be provided as one component, which is not limiting in this application.
Microphone 170C, also referred to as a "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or transmitting voice information, the user can sound near the microphone 170C through the mouth, inputting a sound signal to the microphone 170C. The electronic device 100 may be provided with at least one microphone 170C. In other embodiments, the electronic device 100 may be provided with two microphones 170C, and may implement a noise reduction function in addition to collecting sound signals. In other embodiments, the electronic device 100 may also be provided with three, four, or more microphones 170C to enable collection of sound signals, noise reduction, identification of sound sources, directional recording functions, etc.
The earphone interface 170D is used to connect a wired earphone. The headset interface 170D may be a USB interface 130 or a 3.5mm open mobile electronic device platform (open mobile terminal platform, OMTP) standard interface, a american cellular telecommunications industry association (cellular telecommunications industry association of the USA, CTIA) standard interface.
The pressure sensor 180A is used to sense a pressure signal, and may convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display screen 194. The pressure sensor 180A is of various types, such as a resistive pressure sensor, an inductive pressure sensor, a capacitive pressure sensor, and the like. The capacitive pressure sensor may be a capacitive pressure sensor comprising at least two parallel plates with conductive material. The capacitance between the electrodes changes when a force is applied to the pressure sensor 180A. The electronic device 100 determines the strength of the pressure from the change in capacitance. When a touch operation is applied to the display screen 194, the electronic apparatus 100 detects the touch operation intensity according to the pressure sensor 180A. The electronic device 100 may also calculate the location of the touch based on the detection signal of the pressure sensor 180A. In some embodiments, touch operations that act on the same touch location, but at different touch operation strengths, may correspond to different operation instructions. For example: and executing an instruction for checking the short message when the touch operation with the touch operation intensity smaller than the first pressure threshold acts on the short message application icon. And executing an instruction for newly creating the short message when the touch operation with the touch operation intensity being greater than or equal to the first pressure threshold acts on the short message application icon.
The gyro sensor 180B may be used to determine a motion gesture of the electronic device 100. In some embodiments, the angular velocity of electronic device 100 about three axes (i.e., x, y, and z axes) may be determined by gyro sensor 180B. The gyro sensor 180B may be used for photographing anti-shake. For example, when the shutter is pressed, the gyro sensor 180B detects the shake angle of the electronic device 100, calculates the distance to be compensated by the lens module according to the angle, and makes the lens counteract the shake of the electronic device 100 through the reverse motion, so as to realize anti-shake. The gyro sensor 180B may also be used for navigating, somatosensory game scenes.
The air pressure sensor 180C is used to measure air pressure. In some embodiments, electronic device 100 calculates altitude from barometric pressure values measured by barometric pressure sensor 180C, aiding in positioning and navigation.
The magnetic sensor 180D includes a hall sensor. The electronic device 100 may detect the opening and closing of the flip cover using the magnetic sensor 180D. In some embodiments, when the electronic device 100 is a flip machine, the electronic device 100 may detect the opening and closing of the flip according to the magnetic sensor 180D. And then according to the detected opening and closing state of the leather sheath or the opening and closing state of the flip, the characteristics of automatic unlocking of the flip and the like are set.
The acceleration sensor 180E may detect the magnitude of acceleration of the electronic device 100 in various directions (typically three axes). The magnitude and direction of gravity may be detected when the electronic device 100 is stationary. The electronic equipment gesture recognition method can also be used for recognizing the gesture of the electronic equipment, and is applied to horizontal and vertical screen switching, pedometers and other applications.
A distance sensor 180F for measuring a distance. The electronic device 100 may measure the distance by infrared or laser. In some embodiments, the electronic device 100 may range using the distance sensor 180F to achieve quick focus.
The proximity light sensor 180G may include, for example, a Light Emitting Diode (LED) and a light detector, such as a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device 100 emits infrared light outward through the light emitting diode. The electronic device 100 detects infrared reflected light from nearby objects using a photodiode. When sufficient reflected light is detected, it may be determined that there is an object in the vicinity of the electronic device 100. When insufficient reflected light is detected, the electronic device 100 may determine that there is no object in the vicinity of the electronic device 100. The electronic device 100 can detect that the user holds the electronic device 100 close to the ear by using the proximity light sensor 180G, so as to automatically extinguish the screen for the purpose of saving power. The proximity light sensor 180G may also be used in holster mode, pocket mode to automatically unlock and lock the screen.
The ambient light sensor 180L is used to sense ambient light level. The electronic device 100 may adaptively adjust the brightness of the display 194 based on the perceived ambient light level. The ambient light sensor 180L may also be used to automatically adjust white balance when taking a photograph. Ambient light sensor 180L may also cooperate with proximity light sensor 180G to detect whether electronic device 100 is in a pocket to prevent false touches.
The fingerprint sensor 180H is used to collect a fingerprint. The electronic device 100 may utilize the collected fingerprint feature to unlock the fingerprint, access the application lock, photograph the fingerprint, answer the incoming call, etc.
The temperature sensor 180J is for detecting temperature. In some embodiments, the electronic device 100 performs a temperature processing strategy using the temperature detected by the temperature sensor 180J. For example, when the temperature reported by temperature sensor 180J exceeds a threshold, electronic device 100 performs a reduction in the performance of a processor located in the vicinity of temperature sensor 180J in order to reduce power consumption to implement thermal protection. In other embodiments, when the temperature is below another threshold, the electronic device 100 heats the battery 142 to avoid the low temperature causing the electronic device 100 to be abnormally shut down. In other embodiments, when the temperature is below a further threshold, the electronic device 100 performs boosting of the output voltage of the battery 142 to avoid abnormal shutdown caused by low temperatures.
The touch sensor 180K, also referred to as a "touch device". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The touch sensor 180K is for detecting a touch operation acting thereon or thereabout. The touch sensor may communicate the detected touch operation to the application processor to determine the touch event type. Visual output related to touch operations may be provided through the display 194. In other embodiments, the touch sensor 180K may also be disposed on the surface of the electronic device 100 at a different location than the display 194.
The bone conduction sensor 180M may acquire a vibration signal. In some embodiments, bone conduction sensor 180M may acquire a vibration signal of a human vocal tract vibrating bone pieces. The bone conduction sensor 180M may also contact the pulse of the human body to receive the blood pressure pulsation signal. In some embodiments, bone conduction sensor 180M may also be provided in a headset, in combination with an osteoinductive headset. The audio module 170 may analyze the voice signal based on the vibration signal of the sound portion vibration bone block obtained by the bone conduction sensor 180M, so as to implement a voice function. The application processor may analyze the heart rate information based on the blood pressure beat signal acquired by the bone conduction sensor 180M, so as to implement a heart rate detection function.
The keys 190 include a power-on key, a volume key, etc. The keys 190 may be mechanical keys. Or may be a touch key. The electronic device 100 may receive key inputs, generating key signal inputs related to user settings and function controls of the electronic device 100.
The motor 191 may generate a vibration cue. The motor 191 may be used for incoming call vibration alerting as well as for touch vibration feedback. For example, touch operations acting on different applications (e.g., photographing, audio playing, etc.) may correspond to different vibration feedback effects. The motor 191 may also correspond to different vibration feedback effects by touching different areas of the display screen 194. Different application scenarios (such as time reminding, receiving information, alarm clock, game, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect may also support customization.
The indicator 192 may be an indicator light, may be used to indicate a state of charge, a change in charge, a message indicating a missed call, a notification, etc.
The SIM card interface 195 is used to connect a SIM card. The SIM card may be inserted into the SIM card interface 195, or removed from the SIM card interface 195 to enable contact and separation with the electronic device 100. The electronic device 100 may support 1 or N SIM card interfaces, N being a positive integer greater than 1. The SIM card interface 195 may support Nano SIM cards, micro SIM cards, and the like. The same SIM card interface 195 may be used to insert multiple cards simultaneously. The types of the plurality of cards may be the same or different. The SIM card interface 195 may also be compatible with different types of SIM cards. The SIM card interface 195 may also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to realize functions such as communication and data communication. In some embodiments, the electronic device 100 employs esims, i.e.: an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.
The software system of the electronic device 100 may employ a layered architecture, an event driven architecture, a microkernel architecture, a microservice architecture, or a cloud architecture. In the embodiment of the invention, taking an Android system with a layered architecture as an example, a software structure of the electronic device 100 is illustrated.
Fig. 3 is a software configuration block diagram of the electronic device 100 according to the embodiment of the present application.
The layered architecture divides the software into several layers, each with distinct roles and branches. The layers communicate with each other through a software interface. In some embodiments, the Android system is divided into four layers, from top to bottom, an application layer, an application framework layer, an Zhuoyun row (Android run) and system libraries, and a kernel layer, respectively.
The application layer may include a series of application packages.
As shown in FIG. 3, the application package may include applications for games, cameras, gallery, calendar, talk, map, navigation, WLAN, bluetooth, music, video, short message, etc.
The application framework layer provides an application programming interface (application programming interface, API) and programming framework for application programs of the application layer. The application framework layer includes a number of predefined functions.
As shown in fig. 3, the application framework layer may include a window manager, a content provider, a view system, a telephony manager, a resource manager, a notification manager, a system resource pressure listening module, and the like.
In the embodiment of the application, the system resource pressure monitoring module may be configured to monitor the pressure of the system resource. Specifically, the system resource pressure monitoring module may monitor the memory pressure of the system through the memory pressure monitoring module disposed in the kernel layer, so as to determine the load state of the electronic device.
The window manager is used for managing window programs. The window manager can acquire the size of the display screen, judge whether a status bar exists, lock the screen, intercept the screen and the like.
The content provider is used to store and retrieve data and make such data accessible to applications. The data may include video, images, audio, calls made and received, browsing history and bookmarks, phonebooks, etc.
The view system includes visual controls, such as controls to display text, controls to display pictures, and the like. The view system may be used to build applications. The display interface may be composed of one or more views. For example, a display interface including a text message notification icon may include a view displaying text and a view displaying a picture.
The telephony manager is used to provide the communication functions of the electronic device 100. Such as the management of call status (including on, hung-up, etc.).
The resource manager provides various resources for the application program, such as localization strings, icons, pictures, layout files, video files, and the like.
The notification manager allows the application to display notification information in a status bar, can be used to communicate notification type messages, can automatically disappear after a short dwell, and does not require user interaction. Such as notification manager is used to inform that the download is complete, message alerts, etc. The notification manager may also be a notification in the form of a chart or scroll bar text that appears on the system top status bar, such as a notification of a background running application, or a notification that appears on the screen in the form of a dialog window. For example, a text message is prompted in a status bar, a prompt tone is emitted, the electronic device vibrates, and an indicator light blinks, etc.
Android run time includes a core library and virtual machines. Android run time is responsible for scheduling and management of the Android system.
The core library consists of two parts: one part is a function which needs to be called by java language, and the other part is a core library of android.
The application layer and the application framework layer run in a virtual machine. The virtual machine executes java files of the application program layer and the application program framework layer as binary files. The virtual machine is used for executing the functions of object life cycle management, stack management, thread management, security and exception management, garbage collection and the like.
The system library may include a plurality of functional modules. For example: surface manager (surface manager), media Libraries (Media Libraries), three-dimensional graphics processing Libraries (e.g., openGL ES), 2D graphics engines (e.g., SGL), etc.
The surface manager is used to manage the display subsystem and provides a fusion of 2D and 3D layers for multiple applications.
Media libraries support a variety of commonly used audio, video format playback and recording, still image files, and the like. The media library may support a variety of audio and video encoding formats, such as MPEG4, h.264, MP3, AAC, AMR, JPG, PNG, etc.
The three-dimensional graphic processing library is used for realizing three-dimensional graphic drawing, image rendering, synthesis, layer processing and the like.
The 2D graphics engine is a drawing engine for 2D drawing.
The kernel layer is a layer between hardware and software. The inner core layer at least comprises a display driver, a camera driver, an audio driver and a sensor driver.
As shown in fig. 4, the kernel layer in the embodiment of the present application further includes a memory lock, a pressure monitor module, a process structure body, a shares value modifying node, and a scheduling module. Wherein the memory lock can only be held by one process at a time. When one process acquires a memory lock, it can safely access the shared resource, and the other process needs to wait for the release of the memory lock. The pressure monitoring module may be configured to monitor a memory pressure of the electronic device. At different memory pressures, the nodes may be modified by the shares value to modify or maintain the shares value of the top-app process group. The process structure may include information of each proceeding process, for example, modify the shares value of the top-app process group to a first value, and update the shares value corresponding to each process in the top-app process group to the first value. The scheduling module may be used to manage processor resources, allocate processor resources for each process, and decide the process to run next when scheduling. In this embodiment of the present application, the scheduling queue may obtain, from the process structure body, a lock-holding flag and a shares value of each process in the scheduling queue, and if the scheduling queue includes a process that holds a memory lock and belongs to a top-app process group, the scheduling module preferentially schedules the process.
In the following, an electronic device is taken as a mobile phone, and the mobile phone may include a configuration memory lock, a pressure monitoring module, a process structure body, a shares value modification node, a scheduling module and the like, which are taken as examples, and the process scheduling method provided by the embodiment of the present application is described in detail with reference to fig. 4 and fig. 5. Fig. 5 is a flow chart of a process scheduling method according to an embodiment of the present application. As shown in fig. 5, the process scheduling method may include the following steps S201 to S204.
S201, under the condition that the memory pressure value of the electronic equipment is larger than the pressure threshold value, the scheduling weight value of each process in the scheduling queue is obtained.
Taking the application program currently running by the electronic device as a video application for example, the video application comprises a vip process group and a top-app process group. The method and the device mainly aim at a target process group (such as a top-app process group) causing process blocking of the vip process group, so that the probability of blocking the process of the vip process group is reduced. Therefore, the scheduling module first identifies the process group to which each process in the scheduling queue belongs, so as to determine whether the scheduling queue includes a process belonging to the target process group.
In some embodiments, as shown in fig. 6, the method of determining, by the scheduling module, a process group to which each process in the scheduling queue belongs may be implemented by the following steps S2011 to S2015.
And S2011, the pressure monitoring module monitors the memory pressure value of the electronic equipment.
In the embodiment of the application, the pressure monitoring module can be arranged in the kernel layer of the electronic equipment, so that the pressure monitoring module can poll and read the memory pressure value of the electronic equipment.
S2012, the pressure monitoring module judges whether the memory pressure value is greater than a pressure threshold.
S2013, determining the shares value of the target process group as a first value under the condition that the memory pressure value is larger than the pressure threshold value.
S2014, under the condition that the memory pressure value is smaller than or equal to the pressure threshold value, taking the shares value of the target process group as a second numerical value; wherein the first value is different from the second value.
A memory pressure value of the electronic device greater than the pressure threshold indicates that the electronic device is in a high load state, and a memory pressure value of the electronic device less than or equal to the pressure threshold indicates that the electronic device is in a low load state. In the embodiment of the application, when the electronic equipment is in a high-load state, the scheme of process optimization of the target process group is executed. In the low-load state of the electronic device, the process optimization scheme for the target process group may not be executed.
A control group (Cgroup) is a mechanism used in Linux operating systems to limit, control, and isolate groups of processes. It allows system administrators to allocate resources to processes and monitor and limit their use of resources. The shares value is a scheduling weight value allocated to each process group by Cgroup, and in the scheduling algorithm, the scheduler allocates CPU time to each process according to the shares value. A process with a higher shares value will get more CPU time slices, i.e. be allocated more run time.
In the terminal system, the shares value of each process group is the same by default, and is generally 1024 by default.
In this way, in the embodiment of the present application, by modifying the shares value of the target process group, the modified shares value is different from the default value, and the shares values of other process groups are kept unchanged. Thus, the scheduling module may distinguish the target process group from other process groups by the shares value.
For example, taking a target process group as a top-app process group as an example, the shares value of the top-app process group may be determined as the first value when the memory pressure value is greater than the pressure threshold. And under the condition that the memory pressure value is smaller than or equal to the pressure threshold value, the shares value of the top-app process group is a second numerical value. Thus, the scheduling module may distinguish the top-app process group from other process groups by the shares value.
In this embodiment of the present application, the pressure monitoring module may poll and monitor a memory pressure value of the electronic device, for example, the pressure monitoring module may poll a memory pressure node/proc/pressure/memory under the proc file system to perform memory pressure sampling. In this way, when the memory pressure value of the current polling period is greater than the pressure threshold and the memory pressure value of the previous polling period is also greater than the pressure threshold, the shares value of the target process group is maintained at a first value, and the shares values of the other process groups are maintained at a second value. And under the condition that the memory pressure value of the current polling period is larger than the pressure threshold value and the memory pressure value of the previous polling period is smaller than or equal to the pressure threshold value, modifying the shares value of the target process group from the second value to the first value, and keeping the shares values of other process groups to be the second value. Taking the target process group as a top-app process group as an example, the pressure monitoring module may modify the value of shares to modify the value of nodes/dev/cpu/top-app/cpu.
Similarly, when the memory pressure value of the current polling period is less than or equal to the pressure threshold value, and the memory pressure value of the previous polling period is also less than or equal to the pressure threshold value, the shares value of the target process group and the other process groups is kept to be the second value. And under the condition that the memory pressure value of the current polling period is smaller than or equal to the pressure threshold value and the memory pressure value of the previous polling period is larger than the pressure threshold value, modifying the shares value of the target process group from the first value to the second value, and keeping the shares values of other process groups to be the second value.
Therefore, the shares values of the other process groups except the target process group are always kept unchanged, and the shares values of the target process group are correspondingly modified according to the memory pressure of the electronic equipment.
It should be noted that, in the embodiment of the present application, the main function of modifying the shares value of the target process group is to distinguish the target process group from other process groups. Thus, the modified first value is based on not affecting the competition of each process for CPU resources and the performance of each process.
Wherein the run time of each process on the CPU satisfies the following relation (1):
Run time of process = scheduling period x Shares value of process/Shares value of all processes sum relation (1)
Wherein the scheduling period is constant.
It can be seen that the runtime of a process is related to the shares value of the process, and therefore, to avoid affecting the runtime of the process, the smaller the modification of the shares value is, the better. Based on this consideration, a modified range of the shares value may be set, i.e., an absolute value of the difference between the first value and the second value is set to be smaller than a preset value. For example, the preset value is 1. Thus, the first value may be 1023 or 1025 and the second value may be a default value of 1024.
S2015, the scheduling module acquires the shares value of each process in the scheduling queue.
In this embodiment of the present application, the scheduling queue refers to a queuing queue of a process in an executable state, where each process in the scheduling queue waits for a scheduling module to allocate a processor resource to run on a processor. The scheduling queue may include M processes in an executable state, where M is a positive integer greater than or equal to 1. The process groups to which the M processes belong may be different, e.g., the dispatch queue may include a process of the top-app process group, a process of the vip process group, and so on.
In this embodiment of the present application, each process group may include one or more processes, where the shares values of the processes in the same process group are the same. For example, when the shares value of the top-app process group is the first value, the shares value of each process in the top-app process group is the first value. For another example, when the shares value of the top-app process group is the second value, the shares value of each process in the top-app process group is the second value. The shares value of the vip process group is always a second value, and the shares value of each process in the corresponding vip process group is always a second value.
In this way, the scheduling module may obtain the shares value of each process in the scheduling queue, and determine, based on the shares value of each process in the scheduling queue, whether the scheduling queue includes a process in the target process group. Specifically, the process group described by the process with the shares value of the first value is a top-app process group, and the process group described by the process with the shares value of the second value is not a top-app process group.
In one implementation, the structure of the process includes a structure pointer, where the structure pointer is used to indicate a process group corresponding to the process, and each process group corresponds to a share value. Thus, the scheduling module may determine a value of shares for each process based on the structure pointer for each process in the scheduling queue.
The embodiment of the application mainly aims at scheduling optimization of a target process group (such as a top-app process group) causing the blocking of the application main process so as to reduce the probability of blocking the application main process. Therefore, in the embodiment of the present application, the scheduling module can only area the target process group and other process groups, without identifying which process group the other processes specifically belong to.
Specifically, the scheduling module may determine that a process group to which a process with a shares value of a first value belongs is a target process group, and a process group to which a process with a shares value of a second value belongs is a non-target process group. Wherein, the non-target process group refers to any process group except the target process group. The non-target process group may include one or more process groups.
In the above manner of dynamically adjusting the shares value of the target process group based on the memory pressure value of the electronic device, on one hand, the scheduling module may identify the process of the target process group based on the shares value of each process. On the other hand, the scheduling module may also determine whether the electronic device is in a high load state through the shares value. For example, if the schedule queue includes a process with a shares value of a first value, indicating that the electronic device is in a high load state; and if the schedule queue does not comprise the process with the shares value of the first value, indicating that the electronic equipment is in a low-load state. In addition, because the shares value is the same in different electronic devices, the method for distinguishing the target process group from other process groups can be compatible with different electronic devices by adjusting the shares value of the target process group, and is more beneficial to code maintenance.
In other embodiments, the method for determining the process group to which each process in the scheduling queue belongs by the scheduling module may be further implemented by the following manner: the pressure monitoring module monitors the memory pressure value of the electronic equipment and judges whether the memory pressure value is larger than a pressure threshold value or not. Under the condition that the memory pressure value is larger than the pressure threshold value, the scheduling module firstly acquires the process ID of each process in the scheduling queue. Then, the scheduling module determines a process group to which each process belongs based on the process ID of each process.
In this embodiment, the Cgroup may configure, for each process group, a unique ID for characterizing each process group. Thus, each process in the process group may carry a process group ID to which the process belongs, so as to indicate the process group to which the process belongs. That is, the process group and the process group ID are in one-to-one correspondence. In this way, the scheduling module can obtain the ID of each process in the scheduling queue, and determine the process group to which each process belongs based on the correspondence between the ID and the process group.
S202, determining the locking states of M processes in a scheduling queue.
The lock holding state of the process comprises two states of holding the memory lock and releasing the memory lock.
In some embodiments, to facilitate the determination of the lock-holding state of the process by the scheduling module, a lock-holding flag may be added to the structure of the process, and the lock-holding state of the process is characterized by the lock-holding flag. Correspondingly, under the condition that the process holds the memory lock, setting a lock holding mark of the process as a first mark, wherein the first mark is used for representing that the lock holding state of the process is the memory lock holding state. And setting a lock holding mark of the process as a second mark under the condition that the process releases the memory lock, wherein the second mark is used for representing that the lock holding state of the process is the memory lock release. The first mark and the second mark are different marks, so that the scheduling module can identify the lock-holding state of the process through the first mark and the second mark.
Correspondingly, the scheduling module can acquire the lock holding mark of each process in the scheduling queue, and if the lock holding mark of the process is the first mark, the scheduling module determines that the lock holding state of the process is the lock holding memory. If the lock holding mark of the process is the second mark, the scheduling module determines that the lock holding state of the process is the memory lock release.
For example, a lock-holding flag field, such as in_mmap_lock, may be added to the fabric of each process. Thus, when a process holds a memory lock, the value of the lock holding flag in_mmap_lock of the current process is set to 1 in the lock holding interface. After a process accesses a memory region, the value of the current process lock holding flag in_mmap_lock is set to 0 in the lock releasing native interface. In this way, the scheduling module can identify whether each process in the scheduling queue holds a memory lock by marking the lock holding of each process as 0 or 1.
It should be noted that the above embodiments are only exemplified with the lock holding flag being 0 or 1, and do not represent limitation of the lock holding flag. For example, in the case where the process holds a memory lock, the value of the lock holding flag of the process may be set to a third value. And under the condition that the process releases the memory lock, setting the value of the lock holding mark of the process as a fourth value, wherein the fourth value is different from the third value.
S203, setting virtual running time vruntime of the target process as a first time value in the case that the target process is included in the scheduling queue.
The target process is a process with a first value of a scheduling weight value in a scheduling queue and a lock holding state of a memory lock. That is, the target process refers to a process that holds a memory lock in the dispatch queue and belongs to the top-app process group.
Virtual run time (vruntime) is a parameter used in fair scheduling algorithms to measure process run time. vruntime is a concept of relative time, representing the time a process has run on a CPU. A smaller value of vruntime indicates a shorter time that the process has run on the CPU.
The fairness scheduling algorithm may be adjusted according to the vruntime value of the process so that each process has an opportunity to get a fair CPU time slice. When a process gets a CPU running, its vruntime value will gradually increase, indicating that it has consumed some run time. While processes with smaller vruntime values will be more likely to be selected for execution in the next schedule to balance the runtime between the various processes. The mechanism is helpful to ensure fairness among different processes and avoid the situation that some processes occupy the CPU for a long time and other processes cannot be operated.
That is, the fair scheduling algorithm selects the next process to run by continually comparing the vruntimes of the processes. Each time scheduling, the fair scheduling algorithm will select the process with the smallest vruntime value to get the CPU time slice running. This way, a fair distribution of all processes over the run-time is ensured.
In this embodiment of the present application, in the case where it is determined that the scheduling queue includes the target process, the scheduling module may set a vruntime value of the target process, so that the vruntime after setting is the minimum value of vruntime of all processes in the scheduling queue. Thus, when the scheduling module schedules, the fair scheduling algorithm in the scheduling module selects the target process with the minimum vruntime value to obtain the CPU time slice running, i.e. selects the target process as the next process to be run. Therefore, the target process releases the memory lock as soon as possible, and the blocking probability of other processes due to the fact that the other processes cannot hold the lock is reduced.
In some embodiments, setting the virtual run time vruntime of the target process to the first time value may be implemented in the following manner: the scheduling module may calculate a vruntime value for each process in the scheduling queue. The scheduling module then calculates the minimum of vruntime for all processes. If the vruntime of the target process is the minimum of the vruntime of all processes, then the vruntime of the target process is maintained. If the vruntime of the target process is not the minimum of the vruntimes of all processes, the scheduling module modifies the vruntime of the target process to a value less than the minimum of the vruntimes of all processes such that the modified vruntime of the target process is the minimum of the vruntimes of all processes in the scheduling queue.
Illustratively, the dispatch queue includes five processes, where the vruntimes corresponding to the five processes are T1, T2, T3, T4, and T5, respectively, where T1 > T2 > T3 > T4 > T5. Assuming that the vruntime corresponding to the target process is T3, modifying the vruntime corresponding to the target process to be T3 'before scheduling, wherein T1 > T2 > T4 > T5 > T3'.
In other embodiments, setting the virtual run time vruntime of the target process to the first time value may be implemented as follows: the scheduling module may calculate a vruntime value for each process in the scheduling queue. Then, the scheduling module subtracts the round robin period from the calculated vruntime value of the target process, so that the modified vruntime of the target process is the difference between the pre-modified vruntime (i.e., the second time value) of the target process and the round robin period.
The round-robin period is the time required for running one round for all tasks in the runnable state in the fair scheduling algorithm. Therefore, subtracting the round-robin period from the calculated vruntime value of the target process corresponds to the scheduling module reducing the target process by one round-robin period. Thus, the modified vruntime value must be the minimum value of vruntime for all processes in the dispatch queue.
This implementation, on the one hand, does not require calculation of the minimum value of vruntime for all processes to reduce the computational effort. On the other hand, other parameters are not required to be introduced into the fair scheduling algorithm, the original round-robin period parameter can be directly called, and the vruntime of the target process can be modified based on the round-robin period.
In the fair scheduling algorithm, information of a process to be run, including a vruntime value of the process and other scheduling related attribute information, can be stored by using a red-black tree. By using the red-black tree as a data structure, the fairness scheduling algorithm can efficiently find and select the next process to be run, so that the scheduling module can realize fairness and efficient process scheduling.
The red-black tree includes a plurality of nodes, each node representing a process, the value of a node representing the vruntime value of the process, such that the red-black tree can be ordered and managed according to the vruntime value of the process. In the red-black tree, the leftmost node always represents the smallest process of vruntime.
Step 204, scheduling each process in the scheduling queue based on the size of vruntime of each process in the scheduling queue.
When the scheduling module schedules, the fair scheduling algorithm in the scheduling module selects the target process with the minimum vruntime value to obtain the CPU time slice running, i.e. selects the target process as the next process to be run. Therefore, the target process releases the memory lock as soon as possible, and the blocking probability of other processes due to the fact that the other processes cannot hold the lock is reduced.
After the vruntime of the target process is modified, the modified vruntime can be interpolated to the leftmost node of the red-black tree. In this way, the scheduling module may schedule the target process preferentially based on the principle of scheduling the process corresponding to the leftmost node in the red-black tree preferentially.
In the embodiment of the application, the vruntime of the target process is modified each time, so that the scheduling module preferentially schedules the operation of the target process, and the operation only acts on the current scheduling adjustment strategy and does not influence the scheduling strategies at other moments. Therefore, by modifying the vruntime value, the scheduling module can schedule the target process preferentially, other negative effects can not be caused to the overall scheduling strategy of the scheduling module, and the stable operation of the system is ensured.
It should be noted that, if the currently running application main process is a process that is not perceived by the user, the process of the target process group may be subjected to the scheduling optimization processing, that is, the execution of the above steps S201 to S204 is not triggered. If the currently running application main process is a process that will be perceived by the user (for example, in the case where the drawing process and the rendering process are included in the foreground application), the process of the target process group may be subjected to scheduling optimization processing, that is, the execution of the above steps S201 to S204 is triggered.
For example, the current application scenario of the electronic device is determined first, and the execution of steps S201 to S204 is triggered only when the current application scenario is at least one of a cold start scenario, a hot start scenario, and an in-application sliding scenario, and the memory pressure value of the electronic device is greater than the pressure threshold. Otherwise, the execution of the above steps S201 to S204 is not triggered.
When an application is started, the background does not have a process of the application, and at the moment, the system can recreate a new process to be allocated to the application, and the starting mode is called cold starting. At cold start, application processes typically need to load and initialize various resources, including files, databases, network connections, and the like.
A hot start refers to a process of an application that is already in the background when the application is started (for example, the application is returned to the desktop by pressing a home key, but the process of the application still remains in the background and can enter a task list for viewing), so that in the case of the existing process, the application is started from the existing process by the starting mode, which is called hot start. At warm start, the application process is already in operation, but may need to reload certain resources or perform certain operations.
The intra-application sliding scene refers to a scene in which a sliding operation is performed at an application interface. Such as pull-down refresh, scrolling list, page switching, etc. Sliding the scene within the application may involve reading or display updating of the data.
As can be seen, in general, both a drawing process and a rendering process are included in a cold start, hot start, and in-application sliding scene. The response of the electronic device to the cold start, hot start and application inner slide scene can be perceived by the user, and if the response time of the cold start, hot start and application inner slide scene is long, the user can perceive that the electronic device is stuck.
In addition, in the cold start, hot start and application inner sliding scenarios, since some resources may need to be loaded or reading or updating of data is involved, an application host process corresponding to the cold start, hot start and application inner sliding scenarios generally needs to access the shared memory resources to perform read and write operations on the shared memory resource region. Thus, an application host process corresponding to a cold start, hot start, or intra-application sliding scenario needs to compete with multiple processes for memory locks of the same shared memory resource.
That is, in a cold start, hot start, and in-application sliding scenario, if the application host process is blocked, the user may perceive that the electronic device is stuck. In the scene, the cause of the blocking of the application main process is that the lock holding process of the top-app process group holds the memory lock for a long time, so that the application main process cannot acquire the memory lock and is in a blocking state. Therefore, in the cold start, hot start and application inner sliding scenes, the progress scheduling method provided by the embodiment of the application can reduce the blocking probability of the application main process, so that the user experience is improved.
In order to facilitate understanding of the solution of the embodiment of the present application, a process scheduling method provided in the embodiment of the present application is exemplified by taking a target process group as a top-app process group in conjunction with fig. 7. As shown in fig. 7, the method may include the steps of:
s301, a process of a top-app process group holds a memory lock.
S302, setting a lock holding mark of a process holding a memory lock as a first mark.
S303, the process of the top-app process group releases the memory lock.
S304, setting a lock holding mark of the process which releases the memory lock as a second mark.
In this way, by adding the lock holding mark in the structure of the process, each process has different lock holding marks according to different lock holding states. For example, when a process of the top-app process group holds a memory lock, the lock of the process is marked 1. When the process of the top-app process group releases the memory lock, the lock holding mark of the process is 0.
In this way, the scheduling module can obtain the lock-holding mark of each process from the process structure body, and determine the lock-holding state of each process based on the lock-holding mark of each process.
S305, the pressure monitoring module polls and reads the memory pressure value of the electronic device.
S306, the pressure monitoring module judges whether the memory pressure value is larger than a pressure threshold value.
S307, if the memory pressure value is greater than the pressure threshold, the pressure monitoring module determines the shares value of the top-app process group as a first value.
S308, if the memory pressure value is smaller than or equal to the pressure threshold value, the pressure monitoring module keeps the shares value of the top-app process group to be a default value.
Wherein the first value is different from the default value.
In this way, the shares value of the top-app process group is dynamically adjusted according to the memory pressure state, so that the shares value of the top-app process group is different from the shares value of other process groups under the condition that the memory pressure is large. For example, in the case of a large memory pressure, the shares value of the top-app process group is 1025, and the shares values of the other process groups are 1024.
In this way, the scheduling module may distinguish the top-app process group from other process groups based on the shares value of the process. In addition, the scheduling module may also determine a current memory pressure state of the electronic device based on the shares value of the process.
S309, updating the shares value of the top-app process group.
The process structure body comprises a structure body pointer, the structure body pointer is used for indicating a process corresponding to a process group, and the process group comprises shares values corresponding to the process group. Therefore, after the shares value of the top-app process group is modified, the shares value corresponding to the structure pointer of the process of the top-app process group in the process structure is updated. Thus, the scheduler module may determine the shares value corresponding to a process by the structure pointer in the process structure.
S310, the scheduling module acquires the shares value and the lock holding mark of each process in the scheduling queue.
S311, when the target process with the shares value being the first value and the lock holding mark being the first mark is included in the dispatch queue, the vruntime of the target process is set to be the first time value.
The scheduling module can obtain shares values and lock holding marks corresponding to all processes through the structure bodies corresponding to all processes in the scheduling queue. If the schedule queue does not include a process with the shares value of the first value, that is, the shares value of each process of the schedule queue is a default value, the schedule queue does not include a process of the top-app process group. If the schedule queue does not include the process with the lock holding mark as the first mark, the schedule queue is indicated to not include the process with the lock holding state as the memory lock.
The modified first time value is the minimum value of vruntime for all processes in the dispatch queue.
S312, scheduling each process in the scheduling queue based on the size of vruntime of each process in the scheduling queue.
In this way, in the scheduling optimization scheme for the process of the top-app process group provided by the embodiment of the application, under the condition that the scheduling queue includes the process which holds the memory lock and belongs to the top-app process group, the process is preferentially scheduled, so that the process releases the memory lock as soon as possible, and the problem that the process of the vip process group is in a blocking state because the process of the vip process group cannot hold the memory lock for a long time is solved.
It should be noted that, the above embodiment is only exemplified by taking the target process group as a top-app process group, determining the top-app process group based on the shares value, determining the lock-holding state based on the lock-holding flag, and preferentially scheduling the process meeting the condition by modifying vruntime, which is not meant to limit the above specific implementation manner. For example, if other process groups than the top-app process group cause the vip process group to block, the target process group may be determined to be the other process group that caused the vip process group to block. For another example, the top-app process group may also be determined based on the IDs of the processes, and the description of step 201 may be referred to, which is not described herein.
The method embodiments described herein may be independent schemes or may be combined according to internal logic, and these schemes fall within the protection scope of the present application.
It will be appreciated that in the various method embodiments described above, the methods and operations performed by the electronic device may also be performed by components (e.g., chips or circuits) that may be used in an electronic device.
The above embodiment describes a process scheduling method provided by the present application. It will be appreciated that the electronic device, in order to achieve the above-described functions, includes corresponding hardware structures and/or software modules that perform each of the functions. Those of skill in the art will readily appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
Fig. 8 is a schematic structural diagram of a process scheduling apparatus according to an embodiment of the present application. In one embodiment, the electronic device may implement the corresponding functionality through the software means shown in fig. 8. As shown in fig. 8, the process scheduling apparatus 400 may include: an acquisition module 401, a lock status determination module 402, a vruntime setting module 403, and a scheduling module 404.
An obtaining module 401, configured to obtain a scheduling weight value of each process in the scheduling queue when the memory pressure value of the electronic device is greater than the pressure threshold; the scheduling queue comprises M processes in an executable state, wherein M is a positive integer greater than or equal to 1;
a lock-holding state determining module 402, configured to determine lock-holding states of the M processes;
a vruntime setting module 403, configured to set a virtual running time vruntime of a target process to a first time value when the target process is included in the scheduling queue; the target process is a process with a first scheduling weight value in the scheduling queue and a lock holding state of holding a memory lock; scheduling weight values corresponding to other processes except a drawing process and a rendering process in a foreground application program of the electronic device are first numerical values, scheduling weight values corresponding to the drawing process and the rendering process in the foreground application program are second numerical values, and the first numerical values and the second numerical values are different; the first time value is the minimum value of vruntime of all processes in the scheduling queue;
And the scheduling module 404 is configured to schedule each process in the scheduling queue based on the size of vruntime of each process in the scheduling queue.
In one implementation, the process scheduling apparatus 400 further includes a memory pressure monitor module. The memory pressure monitoring module is used for monitoring the memory pressure value of the electronic equipment; determining a scheduling weight value of the target process group as a first numerical value under the condition that the memory pressure value is larger than the pressure threshold value; determining a scheduling weight value of the target process group as a second numerical value under the condition that the memory pressure value is smaller than or equal to the pressure threshold value; wherein the first value is different from the second value.
In one implementation manner, the second value is a default value of the scheduling weight value of the target process group, and an absolute value of a difference value between the first value and the second value is smaller than a preset value.
In one implementation, the first value is 1023 or 1025 and the default value is 1024.
In one implementation manner, the obtaining module 401 is specifically configured to obtain, when the memory pressure value of the electronic device is greater than the pressure threshold and the foreground application of the electronic device includes a drawing process and a rendering process, a scheduling weight value of each process in the scheduling queue.
In one implementation, the vruntime setting module 403 is specifically configured to determine, in a case where the target process is included in the scheduling queue, a virtual run time vruntime of the target process; and setting the virtual running time vruntime of the target process as a first time value under the condition that the virtual running time vruntime of the target process is not the minimum value of the vruntime of all processes in the scheduling queue.
In one implementation, the first time value is a difference between a second time value and a round robin period, the second time value is a vruntime before the target process is modified, and the round robin period is a time required for all processes in the scheduling queue to run for one round.
In one implementation manner, the process scheduling apparatus 400 further includes a lock-holding marking device module, configured to set a lock-holding mark of the process as a first mark, where the first mark is used to characterize a lock-holding state of the process as a lock-holding memory lock when the process holds a memory lock; and setting a lock holding mark of the process as a second mark under the condition that the process releases the memory lock, wherein the second mark is used for representing that the lock holding state of the process is to release the memory lock.
In one implementation, the lock-holding state determining module 402 is specifically configured to obtain lock-holding marks of the M processes; determining the lock holding state of the process with the lock holding mark being the first mark as a memory lock; and determining the lock holding state of the process with the lock holding mark being the second mark as the memory lock release.
That is, the apparatus 400 may implement steps or processes performed corresponding to the method embodiments shown in fig. 1 to 7, and the apparatus 400 may include modules for performing the methods performed in the method embodiments shown in fig. 1 to 7. It should be understood that the specific process of each module to perform the corresponding steps is described in detail in the above method embodiments, and is not described herein for brevity.
In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in a processor or by instructions in the form of software. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in a hardware processor for execution, or in a combination of hardware and software modules in the processor for execution. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory, and the processor reads the information in the memory and, in combination with its hardware, performs the steps of the above method. To avoid repetition, a detailed description is not provided herein.
It should be noted that the processor in the embodiments of the present application may be an integrated circuit chip with signal processing capability. In implementation, the steps of the above method embodiments may be implemented by integrated logic circuits of hardware in a processor or instructions in software form. The processor may be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, or discrete hardware components. The disclosed methods, steps, and logic blocks in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in hardware, in a decoded processor, or in a combination of hardware and software modules in a decoded processor. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in a memory, and the processor reads the information in the memory and, in combination with its hardware, performs the steps of the above method.
It will be appreciated that the memory in embodiments of the present application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. The volatile memory may be random access memory (random access memory, RAM) which acts as an external cache. By way of example, and not limitation, many forms of RAM are available, such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous DRAM (SLDRAM), and direct memory bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.
According to the method provided by the embodiment of the application, the embodiment of the application also provides a computer program product, which comprises: computer program or instructions which, when run on a computer, cause the computer to perform the method of any of the method embodiments.
According to the method provided in the embodiments of the present application, there is further provided a computer storage medium storing a computer program or instructions that, when executed on a computer, cause the computer to perform the method of any one of the method embodiments.
According to the method provided by the embodiment of the application, the embodiment of the application also provides electronic equipment, which comprises a memory and a processor; the memory is coupled to the processor; the memory is used to store computer program code comprising computer instructions that, when executed by the processor, cause the electronic device to perform the method of any of the method embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative logical blocks (illustrative logical block) and steps (steps) described in connection with the embodiments disclosed herein can be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working process of the apparatus and modules described above may refer to the corresponding process in the foregoing method embodiment, which is not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physical units, may be located in one place, or may be distributed over multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional module in each embodiment of the present application may be integrated in one processing unit, or each module may exist alone physically, or two or more modules may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The apparatus, the computer storage medium, the computer program product, and the electronic device provided in the embodiments of the present application are used to perform the methods provided above, so that the beneficial effects achieved by the apparatus, the computer storage medium, the computer program product, and the electronic device can refer to the beneficial effects corresponding to the methods provided above, and are not described herein again.
It should be understood that, in the embodiments of the present application, the execution sequence of each step should be determined by the function and the internal logic, and the size of the sequence number of each step does not mean that the execution sequence is sequential, and does not limit the implementation process of the embodiments.
All parts of the specification are described in a progressive manner, and all parts of the embodiments which are the same and similar to each other are referred to each other, and each embodiment is mainly described as being different from other embodiments. In particular, for embodiments of the apparatus, computer storage medium, computer program product, electronic device, the description is relatively simple, as it is substantially similar to the method embodiments, as relevant point is referred to in the description of the method embodiments.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application.
The above-described embodiments of the present application are not intended to limit the scope of the present application.

Claims (12)

1. A process scheduling method, wherein the method is applied to an electronic device, the method comprising:
under the condition that the memory pressure value of the electronic equipment is larger than a pressure threshold value, acquiring a scheduling weight value of each process in a scheduling queue; the scheduling queue comprises M processes in an executable state, wherein M is a positive integer greater than or equal to 1;
determining the lock holding states of the M processes in the scheduling queue;
setting virtual running time vruntime of a target process as a first time value under the condition that the target process is included in the scheduling queue; the target process is a process with a first scheduling weight value in the scheduling queue and a lock holding state of holding a memory lock; scheduling weight values corresponding to other processes except a drawing process and a rendering process in a foreground application program of the electronic device are first numerical values, scheduling weight values corresponding to the drawing process and the rendering process in the foreground application program are second numerical values, and the first numerical values and the second numerical values are different; the first time value is the minimum value of vruntime of all processes in the scheduling queue;
and scheduling each process in the scheduling queue based on the size of the vruntime of each process in the scheduling queue.
2. The method according to claim 1, wherein the method further comprises:
monitoring the memory pressure value of the electronic equipment;
determining a scheduling weight value of a target process group as the first value under the condition that the memory pressure value is larger than the pressure threshold value; the target process group comprises other processes except a drawing process and a rendering process in the foreground application program;
determining a scheduling weight value of the target process group as the second numerical value under the condition that the memory pressure value is smaller than or equal to the pressure threshold value; wherein the first value is different from the second value.
3. The method of claim 2, wherein the second value is a default value of a scheduling weight value of the target process group, and an absolute value of a difference between the first value and the second value is less than a preset value.
4. A method according to claim 3, wherein the first value is 1023 or 1025 and the default value is 1024.
5. The method of claim 1, wherein, when the memory pressure value of the electronic device is greater than the pressure threshold value, the obtaining the scheduling weight value of each process in the scheduling queue comprises:
And under the condition that the memory pressure value of the electronic equipment is larger than the pressure threshold value and the foreground application program of the electronic equipment comprises a drawing process and a rendering process, acquiring a scheduling weight value of each process in a scheduling queue.
6. The method of claim 1, wherein before setting the vruntime of the target process to the first time value, further comprising:
determining a vruntime of the target process in the case that the target process is included in the dispatch queue;
and setting the virtual running time vruntime of the target process as a first time value under the condition that the vruntime of the target process is not the minimum value of the vruntime of all processes in the scheduling queue.
7. The method of any of claims 1 or 6, wherein the first time value is a difference between a second time value and a round robin period, the second time value being a vruntime before modification of the target process, the round robin period being a time required for all processes in the dispatch queue to run one round.
8. The method according to claim 1, wherein the method further comprises:
setting a lock holding mark of the process as a first mark under the condition that the process holds the memory lock, wherein the first mark is used for representing that the lock holding state of the process is the memory lock holding state;
And setting a lock holding mark of the process as a second mark under the condition that the process releases the memory lock, wherein the second mark is used for representing that the lock holding state of the process is to release the memory lock.
9. The method of claim 8, wherein the determining the lock-holding status of the M processes comprises:
acquiring locking marks of the M processes;
determining the lock holding state of the process with the lock holding mark being the first mark as a memory lock;
and determining the lock holding state of the process with the lock holding mark being the second mark as the memory lock release.
10. A process scheduling apparatus, the apparatus comprising:
the acquisition module is used for acquiring the scheduling weight value of each process in the scheduling queue under the condition that the memory pressure value of the electronic equipment is larger than the pressure threshold value; the scheduling queue comprises M processes in an executable state, wherein M is a positive integer greater than or equal to 1;
the lock holding state determining module is used for determining the lock holding states of the M processes;
the virtual running time setting module is used for setting virtual running time vruntime of the target process to be a first time value under the condition that the target process is included in the scheduling queue; the target process is a process with a first scheduling weight value in the scheduling queue and a lock holding state of holding a memory lock; scheduling weight values corresponding to other processes except a drawing process and a rendering process in a foreground application program of the electronic device are first numerical values, scheduling weight values corresponding to the drawing process and the rendering process in the foreground application program are second numerical values, and the first numerical values and the second numerical values are different; the first time value is the minimum value of vruntime of all processes in the scheduling queue;
And the scheduling module is used for scheduling each process in the scheduling queue based on the size of the vruntime of each process in the scheduling queue.
11. An electronic device comprising a memory and a processor; the memory is coupled to the processor; the memory is for storing computer program code comprising computer instructions which, when executed by the processor, cause the electronic device to perform the method of any of claims 1-9.
12. A computer readable storage medium, characterized in that the computer readable storage medium has stored therein a computer program or instructions, which when run on a computer, cause the computer to perform the method according to any of claims 1-9.
CN202310991089.1A 2023-08-07 2023-08-07 Process scheduling method and device and electronic equipment Pending CN117707720A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310991089.1A CN117707720A (en) 2023-08-07 2023-08-07 Process scheduling method and device and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310991089.1A CN117707720A (en) 2023-08-07 2023-08-07 Process scheduling method and device and electronic equipment

Publications (1)

Publication Number Publication Date
CN117707720A true CN117707720A (en) 2024-03-15

Family

ID=90159424

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310991089.1A Pending CN117707720A (en) 2023-08-07 2023-08-07 Process scheduling method and device and electronic equipment

Country Status (1)

Country Link
CN (1) CN117707720A (en)

Similar Documents

Publication Publication Date Title
CN113542485B (en) Notification processing method, electronic equipment and computer readable storage medium
CN111543042B (en) Notification message processing method and electronic equipment
CN112527476B (en) Resource scheduling method and electronic equipment
CN114461588B (en) Method for adjusting pre-reading window and electronic equipment
WO2021052070A1 (en) Frame rate identification method and electronic device
WO2022037726A1 (en) Split-screen display method and electronic device
CN112181616B (en) Task processing method and related device
CN113254409A (en) File sharing method, system and related equipment
CN116560771A (en) Method for executing drawing operation by application and electronic equipment
WO2022078105A1 (en) Memory management method, electronic device, and computer-readable storage medium
WO2021218429A1 (en) Method for managing application window, and terminal device and computer-readable storage medium
CN117130773A (en) Resource allocation method, device and equipment
WO2022095906A1 (en) Key mapping method, electronic device, and system
WO2022166435A1 (en) Picture sharing method and electronic device
CN115729684B (en) Input/output request processing method and electronic equipment
CN116700913A (en) Scheduling method, equipment and storage medium of embedded file system
CN114828098B (en) Data transmission method and electronic equipment
CN114546511A (en) Plug-in management method, system and device
CN117707720A (en) Process scheduling method and device and electronic equipment
CN116048831B (en) Target signal processing method and electronic equipment
CN116089057B (en) Resource scheduling method, device, storage medium and program product
CN114826636B (en) Access control system and related methods and apparatus
CN116703689B (en) Method and device for generating shader program and electronic equipment
CN116703741B (en) Image contrast generation method and device and electronic equipment
CN116795476B (en) Wallpaper deleting method and electronic equipment

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination