CN117707273A - Nonlinear current generation circuit, chip and electronic equipment - Google Patents

Nonlinear current generation circuit, chip and electronic equipment Download PDF

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Publication number
CN117707273A
CN117707273A CN202311602763.9A CN202311602763A CN117707273A CN 117707273 A CN117707273 A CN 117707273A CN 202311602763 A CN202311602763 A CN 202311602763A CN 117707273 A CN117707273 A CN 117707273A
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transistor
nonlinear
current generating
circuit
bias voltage
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刘汉鹏
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Chipsea Technologies Shenzhen Co Ltd
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Chipsea Technologies Shenzhen Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The application provides a nonlinear current generating circuit, chip and electronic equipment, this nonlinear current generating circuit includes: the direct current module is used for outputting initial direct current; an impedance enhancement module; the high-voltage power supply comprises a transconductance linear module of a first transistor, wherein an impedance enhancement module is connected with the first transistor and is used for equivalently increasing the output resistance of the first transistor, and the transconductance linear module is used for carrying out nonlinear transformation on initial direct current and outputting nonlinear current under the power supply effect of power supply voltage. The nonlinear current generation circuit provided by the application is provided with the impedance enhancement module, and the impedance enhancement module can equivalently increase the output resistance of the first transistor in the transconductance linear module, so that the influence of the fluctuation of the power supply voltage on the nonlinear current is reduced, and the nonlinear power supply circuit is suitable for a wider power supply voltage scene, is little in influence of the parameters of the transistor device, and has a larger adjustment range.

Description

Nonlinear current generation circuit, chip and electronic equipment
Technical Field
The present disclosure relates to the field of circuit technologies, and in particular, to a nonlinear current generating circuit, a nonlinear current generating chip, and an electronic device.
Background
The core circuit of the bandgap reference circuit is generally implemented by a bipolar transistor (Bipolar Junction Transistor, simply called BJT), and the voltage between the base and emitter of the BJT is called V BE ,V BE Has the temperature characteristics of strong predictability and stability, and V of two BJTs BE Difference DeltaV BE And V is equal to BE Since the two have opposite and almost linear temperature characteristics, the temperature coefficient obtained after the addition is almostZero reference voltage, V BG And (3) representing. However, the temperature characteristics of the semiconductor material may cause V BE Has inherent nonlinear error, also called curvature error, in the temperature characteristic of (a), so the reference voltage V BG There is a certain lower limit on the temperature coefficient of (c).
In the prior art, a high-order curvature compensation type band gap reference circuit is utilized to introduce nonlinear voltage to compensate V BE Generates a nonlinear current by a nonlinear current generating circuit, generates a nonlinear voltage by flowing through a resistor, and superimposes the nonlinear voltage on V BG Above, thereby eliminating V BE Is a curvature error of (a).
However, in the prior art, the nonlinear current generated by the nonlinear current generating circuit is easily affected by the power supply voltage, and the curvature error is a tiny voltage, so that the fluctuation of the power supply voltage can have a larger influence on the curvature compensation effect, thereby affecting the stable operation of the band gap reference circuit.
Disclosure of Invention
The application provides a nonlinear current generating circuit, a nonlinear current generating chip and an electronic device, and aims to reduce the influence of power supply voltage fluctuation on curvature compensation.
In a first aspect, embodiments of the present application provide a nonlinear current generating circuit, including:
the direct current module is used for outputting initial direct current;
an impedance enhancement module;
the output stage transistor of the transconductance linear module comprises a first transistor, wherein the first transistor is an output stage transistor of the transconductance linear module, the impedance enhancement module is connected with the first transistor and is used for equivalently increasing the output resistance of the first transistor, and the transconductance linear module is used for carrying out nonlinear transformation on the initial direct current and outputting nonlinear current under the power supply effect of power supply voltage.
Further, the transconductance linear module comprises a second transistor, the second transistor is connected with the control end of the first transistor, and the impedance enhancement module comprises a first impedance enhancement circuit and a second impedance enhancement circuit, wherein:
the first impedance enhancement circuit is connected with the first transistor and is used for equivalently increasing the output resistance of the first transistor;
the second impedance enhancement circuit is connected with the second transistor and is used for equivalently increasing the output resistance of the second transistor.
Further, the first impedance boosting circuit includes a third transistor and a first bias voltage unit, wherein:
a first end of the third transistor is used for being connected with a target circuit, a control end of the third transistor is connected with the first bias voltage unit, and a second end of the third transistor is connected with a first end of the first transistor;
the first bias voltage unit is used for providing bias voltage for the third transistor.
Further, the first bias voltage unit includes a first current generating device, one end of the first current generating device is used for being connected with the power supply voltage, and the other end of the first current generating device is connected with the control end of the third transistor.
Further, the first bias voltage unit further comprises a first unidirectional conduction device, one end of the first unidirectional conduction device is connected with the other end of the first current generation device, and the other end of the first unidirectional conduction device is grounded.
Further, the second impedance boosting circuit includes a fourth transistor and a second bias voltage unit, wherein:
the first end of the fourth transistor is used for being connected with the power supply voltage, the control end of the fourth transistor is connected with the second bias voltage unit, and the second end of the fourth transistor is connected with the first end of the second transistor;
the second bias voltage unit is used for providing bias voltage for the fourth transistor.
Further, the second bias voltage unit includes a second current generating device, one end of the second current generating device is used for being connected with the power supply voltage, and the other end of the second current generating device is connected with the control end of the fourth transistor.
Further, the second bias voltage unit further comprises a second unidirectional conduction device, one end of the second unidirectional conduction device is connected with the other end of the second current generation device, and the other end of the second unidirectional conduction device is grounded.
Further, the first unidirectional conduction device comprises a diode and/or a field effect transistor.
Further, the nonlinear current generating circuit further includes:
and the current mirror module is used for amplifying the nonlinear current according to the proportion.
In a second aspect, embodiments of the present application provide a chip comprising a nonlinear current generating circuit as provided in the first aspect.
In a third aspect, embodiments of the present application provide an electronic device comprising a nonlinear current generating circuit as provided in the first aspect, or comprising a chip as provided in the second aspect.
The nonlinear current generation circuit comprises a direct current module, an impedance enhancement module and a transconductance linear module comprising a first transistor, wherein when the nonlinear current generation circuit works, the direct current module outputs initial direct current first, and the transconductance linear module carries out nonlinear transformation on the initial direct current under the power supply effect of a power supply voltage, so that nonlinear current is output. Compared with the existing nonlinear current generation circuit, the nonlinear current generation circuit provided by the application is added with the impedance enhancement module, and the impedance enhancement module can equivalently increase the output resistance of the first transistor in the transconductance linear module, so that the influence of the fluctuation of the power supply voltage on the nonlinear current is reduced, and the nonlinear power supply circuit is suitable for a wider power supply voltage scene, is little influenced by the parameters of the transistor device, and has a larger adjustment range.
Drawings
FIG. 1 is a circuit diagram of a nonlinear current generating circuit provided in the prior art;
fig. 2 is a schematic diagram of an application scenario of a nonlinear current generating circuit according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a nonlinear current generating circuit according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of an impedance enhancement module according to an embodiment of the present application;
FIG. 5 is a circuit diagram of a nonlinear current generating circuit according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of a first bias voltage unit according to an embodiment of the present application;
FIG. 7 is a circuit diagram of a nonlinear current generating circuit according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a second bias voltage unit according to an embodiment of the present application;
FIG. 9 is a circuit diagram of a current limiting unit according to an embodiment of the present disclosure;
fig. 10 is a circuit diagram of a current limiting unit according to another embodiment of the present application;
FIG. 11 is a circuit diagram of a current limiting unit according to another embodiment of the present application;
fig. 12 is a circuit diagram of a current limiting unit according to still another embodiment of the present application;
fig. 13 is a circuit diagram of a current limiting unit according to still another embodiment of the present application;
FIG. 14 is a circuit diagram of a nonlinear current generating circuit according to another embodiment of the present application;
FIG. 15 is a circuit diagram of a nonlinear current generating circuit according to another embodiment of the present application;
FIG. 16 is a circuit diagram of a nonlinear current generating circuit according to yet another embodiment of the present application;
FIG. 17 is a circuit diagram of a nonlinear current generating circuit according to yet another embodiment of the present application;
fig. 18 is a schematic structural diagram of a nonlinear current generating circuit according to an embodiment of the present application.
Reference numerals:
100, a nonlinear current generating circuit; 200, a target circuit;
110, a direct current module; 120, an impedance enhancement module;
130, a transconductance linear module; 121, a first impedance boosting circuit;
122, a second impedance boosting circuit; 123, a first bias voltage unit;
124, a second bias voltage unit; 125, a first current generating device;
126, a second current generating device; 127, a first unidirectional conductive device;
128, a second unidirectional conductive device; 140, a current mirror module.
The realization, functional characteristics and advantages of the present application will be further described with reference to the embodiments, referring to the attached drawings.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In order to better understand the solution of the present application, the following description will make clear and complete descriptions of the technical solution of the embodiment of the present application with reference to the accompanying drawings in the embodiment of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
In the embodiment of the application, at least one refers to one or more; plural means two or more. In the description of the present application, the words "first," "second," "third," and the like are used solely for the purpose of distinguishing between descriptions and not necessarily for the purpose of indicating or implying a relative importance or order. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, the terms "comprising," "including," "having," and variations thereof herein mean "including but not limited to," unless expressly specified otherwise.
It should be noted that in the embodiments of the present application, "connected" is understood to mean electrically connected, and two electrical components may be connected directly or indirectly between two electrical components. For example, a may be directly connected to B, or indirectly connected to B via one or more other electrical components.
In order to analyze the cause of the supply voltage fluctuation affecting the nonlinear current, as shown in FIG. 1, VDD represents the supply voltage, GND represents the ground, I 1 And I 2 All represent current sources for providing direct current to the transconductance linear circuit; q1, Q2, Q3 and Q4 each represent a triode, and the four triodes form a transconductance linear circuit for performing nonlinear transformation on input direct current and outputting nonlinear current I out The base bias circuit 1 provides bias voltage for the base electrode of the Q1, and the base bias circuit 2 provides bias voltage for the base electrode of the Q2; due to non-linear current I out Affected by the previous transconductance linear circuit, which may not be of a size that meets the target electricalThe need for circuitry has thus increased the current mirror circuitry which has a current mirror circuit for I out Proportional amplification is carried out to ensure that the nonlinear current I after amplification out1 And I out With a specific ratio B that can be set according to the requirements of the target circuit.
By the processing of the nonlinear current generating circuit, I out 、I out1 Is a current source I 1 And I 2 The principle is as follows: in the case of neglecting the base current of the BJT, there is the following Kirchhofflaw (KVL) equation:
V BE1 +V BE2 =V BE3 +V BE4 , (1)
according to BJT V BE The relation with collector current, the above formula is rewritten as:
ln(I 1 /I S1 )+ln(I 1 /I S2 )=ln(I 2 /I S3 )+ln(I out /I S4 ), (2)
I S1 ~I S4 saturated currents of Q1 to Q4 respectively, let I S3 *I S4 /I S1 *I S2 =a, found based on the above equation:
it can be seen that I out Is I 1 And I 2 And amplified nonlinear current I out1 The following are provided:
amplified nonlinear current I out1 Will be used for curvature compensation.
The nonlinear current generated by the conventional nonlinear current generating circuit is susceptible to the power supply voltage. If the variation of the power supply voltage is expressed by DeltaVDD, I out 、I out1 Will produce a larger variation ΔI out 、ΔI out1 Whereas the curvature error is its tiny voltage, typically on the order of a few millivolts, thus I out 、I out1 Variation ΔI with ΔVDD out 、ΔI out1 Will have a large impact on the curvature compensation effect.
This makes the existing nonlinear current generating circuit unsuitable for a wide supply voltage scenario, because the variation of the supply voltage will directly affect the temperature characteristics of the reference voltage. Of course, VDD can also be provided by a voltage regulator module inside the chip, limiting VDD to a small range, making Δvd small, but this will increase the cost and complexity of the circuit.
The equivalent small signal impedances of the partial devices are schematically shown in FIG. 1, which are the output resistance r of Q3 o3 Output resistor r of Q4 o4 Input resistor r of Q4 pi Small signal resistance r between n6 and VDD m
Research has shown that VDD affects I primarily by affecting the voltages at nodes n5 and n6 out 、I out1 Is approximately, deltaVDD and DeltaI out 、ΔI out1 The following relationship is followed:
from ΔVDD and ΔI above out 、ΔI out1 As can be seen from the relation of (1), increasing r of Q3 and Q4 o3 、r o4 Is capable of reducing delta I out /ΔVDD、ΔI out1 /DeltaVDD. However, r o3 、r o4 The base width and collector current of the BJT device are related, and the adjustment range is limited.
In view of the above, the embodiments of the present application provide a nonlinear current generating circuit 100 to solve the problem that the power voltage fluctuation has a larger influence on the nonlinear current in the prior art. As shown in fig. 2, the output terminal of the nonlinear current generating circuit 100 is connected to the input terminal of the target circuit 200. When the nonlinear current generating circuit 100 works, the dc module 110 outputs an initial dc current, the transconductance linear module 130 performs nonlinear transformation on the initial dc current under the power supply effect of the power supply voltage, so as to output a nonlinear current, and the impedance enhancing module 120 is added, and the impedance enhancing module 120 can equivalently increase the output resistance of the first transistor in the transconductance linear module 130, so as to reduce the influence of the fluctuation of the power supply voltage on the nonlinear current.
In this embodiment of the present application, the target circuit 200 may be any circuit that needs a nonlinear current, including an analog circuit, a digital circuit, etc., and may be specifically determined according to practical situations, which is not specifically limited in this embodiment of the present application. The target circuit 200 may be, for example, a bandgap reference circuit.
In the embodiment of the present application, the control terminal of the NPN transistor is a base, the first terminal of the NPN transistor is a collector, and the second terminal of the NPN transistor is an emitter, when the transistor is a triode, by taking the NPN transistor as an example; when the transistor is a MOS transistor, taking an NMOS transistor as an example, the control end of the transistor is the grid electrode of the MOS transistor, the first end of the transistor is the drain electrode of the MOS transistor, and the second end of the transistor is the source electrode of the MOS transistor.
And carrying out adaptive conversion on the PNP triode or the PMOS tube based on the connection relation.
The embodiment of the present application proposes a schematic structural diagram of a nonlinear current generating circuit 100, as shown in fig. 3, the nonlinear current generating module includes a dc module 110, an impedance enhancement module 120, and a transconductance linear module 130, where an output end of the dc module 110 is connected to a first input end of the transconductance linear module 130; the output of the impedance enhancement module 120 is connected to a second input of the transconductance linear module 130, which is also connected to a first transistor in the transconductance linear module 130; a third input terminal of the transconductance linear module 130 is configured to be connected to a supply voltage, and an output terminal of the transconductance linear module 130 outputs a nonlinear current.
The power supply voltage may be provided inside the nonlinear current generating circuit 100, or may be obtained by connecting an external power supply, and may be specifically determined according to actual situations, which is not specifically limited in the embodiment of the present application.
In the operation process of the nonlinear current generating circuit 100, the dc module 110 outputs an initial dc current, and the dc module 110 may be any circuit capable of outputting a dc current, which may be specifically determined according to practical situations, which is not specifically limited in the embodiment of the present application. After receiving the initial dc current, the transconductance linear module 130 performs nonlinear transformation on the initial dc current under the power supply effect of the power supply voltage, and outputs nonlinear current. The transconductance linear module 130 is often used in the nonlinear current generating circuit 100, which forms a closed loop with forward biased emitter junctions or diodes, the number of forward biased junctions in the clockwise direction being equal to the number of forward biased junctions in the counterclockwise direction, and there must be an even number of forward biased emitter junctions in the transconductance linear closed loop. The transconductance linear module 130 may be any circuit with a nonlinear transformation function, and the specific structure thereof may be determined according to practical situations, which is not particularly limited in the embodiments of the present application.
It should be noted that, in the embodiment of the present application, the first transistor refers to a transistor located at an output stage of the transconductance linear module 130, that is, after the transconductance linear module 130 performs nonlinear transformation on the initial dc current, the branch where the first transistor is located outputs the nonlinear current. For example, in the circuit shown in fig. 1, the first transistor is Q4, and the output resistance of the first transistor is equivalently increased, which corresponds to r o4 Amplified several times.
The nonlinear current generating circuit 100 in the embodiment of the present application further includes an impedance enhancement module 120, where the impedance enhancement module 120 is mainly used for equivalently increasing the output resistance of the first transistor, for example, the output resistance of the first transistor can be increased by several times, and as can be seen from equation (5), when the output resistance of the first transistor is increased by several times, the output resistance is equal to r o4 Amplified several times, the denominator in equation (5) becomes larger, so that ΔI out /DeltaVDDThe ratio is reduced, so that the influence of the nonlinear current along with the change of the power supply voltage can be reduced, and the nonlinear power supply circuit is suitable for a wider power supply voltage scene.
It should be noted that, the first transistor may be a triode or a MOS transistor, and may be specifically determined according to actual situations, which is not specifically limited in the embodiment of the present application.
It should be further noted that the impedance enhancing circuit may be any circuit capable of increasing the output resistance of the first transistor, and may be specifically selected according to practical situations, which is not specifically limited in the embodiment of the present application.
The nonlinear current generating circuit 100 provided by the present application includes a dc module 110, an impedance enhancement module 120, and a transconductance linear module 130 including a first transistor, when the nonlinear current generating circuit 100 works, the dc module 110 outputs an initial dc current, and the transconductance linear module 130 performs nonlinear transformation on the initial dc current under the action of a voltage provided by a power supply voltage, so as to output a nonlinear current. Compared with the existing nonlinear current generation circuit 100, the impedance enhancement module 120 is added in the nonlinear current generation circuit 100, and the impedance enhancement module 120 can equivalently increase the output resistance of the first transistor in the transconductance linear module 130, so that the influence of the fluctuation of the power supply voltage on the nonlinear current is reduced, the nonlinear power supply circuit is suitable for a wider power supply voltage scene, the influence of the parameters of the transistor device is small, and the adjustment range is larger.
In some embodiments, as shown in fig. 4, the transconductance linear module 130 includes a second transistor connected to the control terminal of the first transistor, and the impedance boosting module 120 includes a first impedance boosting circuit 121 and a second impedance boosting circuit 122, where:
the first impedance enhancement circuit 121 is connected to the first transistor, and is configured to equivalently increase an output resistance of the first transistor;
the second impedance boosting circuit 122 is connected to the second transistor, and is configured to equivalently increase an output resistance of the second transistor.
The transconductor block 130 in this embodiment further comprises a second transistor, the second terminal of which is connected to the control terminal of the first transistor, so that the position of the second transistor in the transconductor block 130 can be determined. For example, in the transconductance linear circuit shown in fig. 1, the second transistor is referred to as Q3.
Correspondingly, the impedance enhancement module 120 includes a first impedance enhancement circuit 121 and a second impedance enhancement circuit 122, the first impedance enhancement circuit 121 is connected with the first transistor, and the function of the first impedance enhancement circuit 121 is to equivalently increase the output resistance of the first transistor, which is equivalent to r o4 Amplified several times, the denominator in equation (5) becomes larger, so that ΔI out The ratio of/DeltaVDD becomes smaller, so that the influence of the nonlinear current along with the change of the power supply voltage can be reduced. The second impedance boosting circuit 122 is connected with the second transistor, and the second impedance boosting circuit 122 has the function of equivalently increasing the output resistance of the second transistor, which is equivalent to r o3 Amplified several times, the denominator in equation (5) becomes larger, so that ΔI out The ratio of/DeltaVDD becomes smaller, which further reduces the effect of the nonlinear current on the change of the supply voltage.
It should be noted that, the first impedance boosting circuit 121 and the second impedance boosting circuit 122 may be any circuits with equivalent increase of the output resistance, and may be specifically determined according to practical situations, which is not specifically limited in the embodiments of the present application. The first impedance boosting circuit 121 may have the same structure as the second impedance boosting circuit 122 or may be different from the second impedance boosting circuit.
In some embodiments, as shown in fig. 5, the first impedance boosting circuit 121 includes a third transistor and a first bias voltage unit 123, wherein:
a first terminal of the third transistor is connected to the target circuit 200, a control terminal of the third transistor is connected to the first bias voltage unit 123, and a second terminal of the third transistor is connected to the first terminal of the first transistor;
the first bias voltage unit 123 is configured to provide a bias voltage to the third transistor.
The first impedance boosting circuit 121 in this embodiment of the present application includes a third transistor and a first bias voltage unit 123, where a first end of the third transistor is used to be connected to the target circuit 200, a control end of the third transistor is connected to the first bias voltage unit 123, and a second end of the third transistor is connected to the first end of the first transistor; the first bias voltage unit 123 functions to provide a base bias voltage for the third transistor.
As shown in fig. 5, the dc module 110 in the embodiment of the present application includes two current sources, denoted by I1 and I2, respectively; the transconductance linear module 130 includes 4N-type transistors, denoted by Q1-Q4, where the first transistor refers to Q4 and the second transistor refers to Q3; the third transistor in the first impedance boosting circuit 121 is illustrated by taking an N-type triode as an example, and denoted by Q5, and the first impedance boosting circuit 121 is used for equivalently amplifying the output resistance of the first transistor; output non-linear current I out And (3) representing.
In the operation process of the first impedance enhancement circuit 121, the first bias voltage unit 123 provides the base bias voltage for the third transistor, so that the third transistor is in a conducting state, and the effect of equivalently increasing the output resistance of the first transistor is achieved.
The output resistance r of the first transistor can be equivalently increased by the first impedance boosting circuit 121 o4 Thereby reducing the fluctuation of the power supply voltage to I out The first impedance boosting circuit 121 is embedded between the collector of the first transistor and the target circuit 200, and by introducing the first impedance boosting circuit 121, the fluctuation of the power supply voltage and Δi will be made out The relationship of (2) becomes:
as can be seen from the above formula (7), r o4 Equivalently increase G 1 Multiple of G 1 Is the intrinsic gain of the third transistor, if G 1 >>1, then I out The influence of the supply voltage fluctuation is greatly reduced, so that the nonlinear current output by the nonlinear current generating circuit 100 in the embodiment of the present application is suitable for a wider supply voltage scenario.
As an embodiment, as shown in fig. 6, the first bias voltage unit 123 includes a first current generating device 125, one end of the first current generating device 125 is used for being connected to the power supply voltage, and the other end of the first current generating device 125 is connected to the control end of the third transistor.
In this embodiment, the first bias voltage unit 123 includes a first current generating device 125, two ends of the first current generating device 125 are respectively connected to the power supply voltage and the control end of the third transistor, and the first current generating device 125 may be any device capable of providing a stable current, which is not limited in this embodiment. For example, the first current generating device 125 is a current source.
As an embodiment, as shown in fig. 6, the first bias voltage unit 123 further includes a first unidirectional conduction device 127, one end of the first unidirectional conduction device 127 is connected to the other end of the first current generation device 125, and the other end of the first unidirectional conduction device 127 is grounded.
In this embodiment, the first bias voltage unit 123 further includes a first unidirectional current-conducting device 127, and the first current-generating device 125 is grounded through the first unidirectional current-conducting device 127, and the first single-phase current-conducting device may be any device capable of achieving a single-phase current-conducting function, which is not specifically limited in this embodiment of the present application. For example, the first unidirectional current conducting device 127 in the embodiment of the present application may be a plurality of diodes connected end to end.
In some embodiments, as shown in fig. 7, the second impedance boosting circuit 122 includes a fourth transistor and a second bias voltage unit 124, wherein:
a first terminal of the fourth transistor is configured to be connected to the power supply voltage, a control terminal of the fourth transistor is connected to the second bias voltage unit 124, and a second terminal of the fourth transistor is connected to the first terminal of the second transistor;
the second bias voltage unit 124 is configured to provide a bias voltage for the fourth transistor.
The second impedance boosting circuit 122 in this embodiment of the present application includes a fourth transistor and a second bias voltage unit 124, where a first end of the fourth transistor is used for being connected to a power supply voltage, a control end of the fourth transistor is connected to the second bias voltage unit 124, and a second end of the fourth transistor is connected to a first end of the second transistor; the second bias voltage unit 124 functions to provide a base bias voltage for the fourth transistor.
As shown in fig. 7, the dc module 110 in the embodiment of the present application includes two current sources, denoted by I1 and I2, respectively; the transconductance linear module 130 comprises 4 NPN triodes, denoted by Q1-Q4, respectively, wherein the first transistor is Q4 and the second transistor is Q3; the third transistor in the first impedance boosting circuit 121 is illustrated by taking an N-type triode as an example, and denoted by Q5, and the first impedance boosting circuit 121 is used for equivalently amplifying the output resistance of the first transistor; the fourth transistor in the second impedance enhancement circuit 122 is illustrated by taking an NPN transistor as an example, denoted by Q6, and the second impedance enhancement circuit 122 is configured to equivalently amplify an output resistance of the fourth transistor; output non-linear current I out And (3) representing.
In the operation process of the first impedance enhancement circuit 121, the first bias voltage unit 123 provides the base bias voltage for the third transistor, so that the third transistor is in a conducting state, and the effect of equivalently increasing the output resistance of the first transistor is achieved.
In the operation process of the second impedance enhancement circuit 122, the second bias voltage unit 124 provides the base bias voltage for the fourth transistor, so that the fourth transistor is in a conducting state, and the effect of equivalently increasing the output resistance of the second transistor is achieved.
The output resistance r of the first transistor can be equivalently increased by the first impedance boosting circuit 121 o4 Thereby reducing the fluctuation of the power supply voltage to I out The first impedance boosting circuit 121 is embedded in the collector and target of the first transistorBetween the circuits 200. The output resistance r of the second transistor can be equivalently increased by the second impedance enhancement circuit 122 o3 Thereby reducing the fluctuation of the power supply voltage to I out The second impedance boosting circuit 122 is embedded between the collector of the second transistor and the power supply voltage, and by introducing the first impedance boosting circuit 121 and the second impedance boosting circuit 122, the fluctuation of the power supply voltage and Δi will be made out The relationship of (2) becomes:
as can be seen from the above formula (8), r o3 Equivalently increase G 2 Multiple of G 2 Is the intrinsic gain of the fourth transistor Q6, if G 2 >>1, then I out The influence of the supply voltage fluctuation is further reduced, so that the nonlinear current generating circuit 100 output by the nonlinear current generating circuit 100 in the embodiment of the present application is suitable for a wider supply voltage scenario.
As an embodiment, as shown in fig. 8, the second bias voltage unit 124 includes a second current generating device 126, one end of the second current generating device 126 is used for being connected to the power supply voltage, and the other end of the second current generating device 126 is connected to the control terminal of the fourth transistor.
In this embodiment, the second bias voltage unit 124 includes a second current generating device 126, two ends of the second current generating device 126 are respectively connected to the power supply voltage and the control terminal of the fourth transistor, and the second current generating device 126 may be any device capable of providing a stable current, which is not limited in this embodiment. The second current generating device 126 is, for example, a current source.
As an embodiment, the second bias voltage unit 124 further includes a second unidirectional conduction device 128, one end of the second unidirectional conduction device 128 is connected to the other end of the second current generation device 126, and the other end of the second unidirectional conduction device 128 is grounded.
In this embodiment, the second bias voltage unit 124 further includes a second unidirectional current-conducting device 128, and the second current-generating device 126 is grounded through the second unidirectional current-conducting device 128, and the second single-phase current-conducting device may be any device capable of achieving a single-phase current-conducting function, which is not specifically limited in this embodiment of the present application. For example, the second unidirectional conducting device 128 in the present embodiment may be a plurality of diodes connected end to end.
As an example, the first unidirectional current conducting device 127 in the embodiments of the present application includes a diode and/or a field effect transistor. In this embodiment of the present application, the first unidirectional conducting device 127 may be a diode, or may be a field effect transistor, which may be specifically determined according to practical situations, and this embodiment of the present application is not limited in particular.
It should be noted that, the second unidirectional conducting device 128 is a diode, may be a field effect transistor, and may be specifically determined according to practical situations, which is not specifically limited in the embodiment of the present application.
The first unidirectional conductive device 127 and the second unidirectional conductive device 128 may be any one of the following cases: a plurality of diodes connected end to end, a plurality of triodes connected in sequence and a plurality of MOS tubes connected in sequence.
The first unidirectional conductive device 127 is described below as an example.
For example, as shown in fig. 9, the first unidirectional current generating device 127 may be a plurality of diodes connected end to end in sequence, and one end of the first current generating device 125 is grounded through the diodes connected end to end in sequence. The number of diodes may be determined according to practical situations, and the embodiment of the present application is not limited thereto, and in fig. 9, the first unidirectional current conducting device 127 is illustrated as including 3 diodes.
For example, as shown in fig. 10, the first unidirectional conduction device 127 may be a plurality of PNP transistors, and the connection manner thereof may refer to fig. 10. The number of the transistors may be determined according to practical situations, and the embodiment of the present application is not limited thereto, and in fig. 10, the first unidirectional conduction device 127 includes 2 PNP transistors as an example.
For example, as shown in fig. 11, the first unidirectional conduction device 127 may be a plurality of NPN transistors, and the connection manner thereof may refer to fig. 11. The number of the transistors may be determined according to practical situations, and the embodiment of the present application is not limited thereto, and in fig. 11, the first unidirectional current conducting device 127 includes 2 NPN transistors as an example.
For example, as shown in fig. 12, the first unidirectional conducting device 127 may be a plurality of PMOS transistors, and the connection manner thereof may refer to fig. 12. The number of PMOS transistors may be determined according to practical situations, which is not limited in this embodiment, and fig. 12 illustrates that the first unidirectional conductive device 127 includes 2 PMOS transistors.
For example, as shown in fig. 13, the first unidirectional conducting device 127 may be a plurality of NMOS transistors, and the connection manner may refer to fig. 13. The number of NMOS transistors may be determined according to practical situations, which is not limited in this embodiment, and fig. 13 illustrates that the first unidirectional conductive device 127 includes 2 NMOS transistors.
In this embodiment, the first impedance boosting circuit 121 and the second impedance boosting circuit 122 are both included, as shown in fig. 14, the first impedance boosting circuit 121 includes 3 diodes connected in sequence in an end-to-end manner as a current limiting power supply, and the second impedance boosting circuit 122 includes 2 diodes connected in sequence in an end-to-end manner as a current limiting unit 123. The first impedance boosting circuit 121 is embedded between the collector of the Q4 and the power supply voltage, the second impedance boosting circuit 122 is embedded between the collector of the Q3 and the ground, and the DeltaVDD and DeltaI are caused by introducing the first impedance boosting circuit 121 and the second impedance boosting circuit 122 out The relationship of (2) becomes:
from the above, r can be seen o3 、r o4 Respectively equivalently increase G 1 、G 2 Multiple of G 1 、G 2 >>1, then I out The influence of the fluctuation of the VDD is greatly reduced, and the improved nonlinear electricityThe flow generating circuit 100 is suitable for a wide supply voltage scenario.
The embodiments of the present application provide various implementation manners of the impedance enhancement module 120, and may adopt corresponding schemes for different application scenarios, when I is needed out When the influence of VDD is not influenced to the greatest extent, the scheme shown in FIG. 14 can be adopted, and the equivalent r is increased o3 And r o4 The method comprises the steps of carrying out a first treatment on the surface of the When pair I out When the influence degree of VDD is not strictly required, the scheme shown in FIG. 5 can be adopted, and only r is as follows o3 Or r o4 An equivalent increase is made.
It should be noted that, in the embodiment of the present application, the first transistor, the second transistor, the third transistor and the fourth transistor may be any one of a P-type triode, an N-type triode, a PMOS transistor and an NMOS transistor.
As an example, in fig. 14, Q1 to Q6 are P-type transistors, and the connection relationship of the P-type transistors is shown in fig. 14, and the transconductance linear module 130 may be a loop composed of 4P-type transistors, where the first transistor and the second transistor are P-type transistors; the third transistor and the fourth transistor are also P-type transistors.
As yet another example, in fig. 15, Q1 to Q6 are N-type transistors, and the connection relationship thereof is shown with reference to fig. 15, and the transconductance linear module 130 may be a loop composed of 4N-type transistors, where the first transistor and the second transistor are N-type transistors; the third transistor and the fourth transistor are also N-type triodes.
As another example, in fig. 16, Q1 to Q6 are PMOS transistors, and the connection relationship thereof is shown with reference to fig. 16, and the transconductance linear module 130 may be a loop circuit composed of 4 PMOS, where the first transistor and the second transistor are PMOS transistors; the third transistor and the fourth transistor are also PMOS.
As yet another example, in fig. 17, Q1 to Q6 are NMOS transistors, and the connection relationship thereof is shown with reference to fig. 17, the transconductance linear module 130 may be a loop composed of 4 NMOS, in which case, the first transistor and the second transistor are both NMOS; the third transistor and the fourth transistor are also NMOS.
In some embodiments, as shown in fig. 18, the nonlinear current generating circuit 100 further includes:
and a current mirror module 140 for scaling up the nonlinear current.
In the embodiment of the application, due to the nonlinear current I out The current mirror module 140 is also added, as affected by the previous transconductance linear circuit, which may not be sized to meet the requirements of the target circuit 200. The nonlinear current generating circuit 100 further includes a current mirror module 140, an input end of the current mirror module 140 is connected to an output end of the transconductance linear module 130, the current mirror module 140 receives the nonlinear current output by the transconductance linear module 130, and the current mirror module 140 amplifies the nonlinear current in equal proportion to obtain an amplified nonlinear current, which in the embodiment of the present application is I out1 Representing the amplified nonlinear current with an amplification ratio of B, so that the amplified nonlinear current I out1 And I out Having a specific ratio B that can be set according to the requirements of the target circuit 200.
The impedance gain G described above can be found by analysis by adding the current mirror module 140 to the circuit configuration shown in fig. 15 1 、G 2 The method comprises the following steps of: VA5/VT, VA6/VT, wherein VA5, VA6 are the early voltages of Q5, Q6, respectively (typically on the order of 50V), VT is the thermal voltage (about 26mV at ambient temperature), G1, G2 are typically on the order of 2000, i.e., I out1 The influence of VDD fluctuation is reduced by 2000 times. Thus, even if VDD fluctuates over a wide range, I out1 Can remain substantially unchanged.
The chip provided in the embodiment of the present application includes the nonlinear current generating circuit 100 described above. The Chip (Integrated Circuit, IC) may be, but is not limited to, a SOC (System on Chip) Chip, a SIP (System in Package ) Chip.
An electronic device provided in an embodiment of the present application includes a device main body and a nonlinear current generating circuit 100 or a chip as described above disposed in the device main body. The electronic device may be, but is not limited to, a weight scale, a body fat scale, a nutritional scale, an infrared electronic thermometer, a pulse oximeter, a body composition analyzer, a mobile power supply, a wireless charger, a quick charger, an on-board charger, an adapter, a display, a USB (Universal Serial Bus ) docking station, a stylus, a real wireless headset, an automotive center control screen, an automobile, an intelligent wearable device, a mobile terminal, an intelligent home device. The intelligent wearing equipment comprises, but is not limited to, an intelligent watch, an intelligent bracelet and a cervical vertebra massage instrument. Mobile terminals include, but are not limited to, smartphones, notebook computers, tablet computers, POS (Point of Sales Terminal, point of sale terminal) machines. The intelligent household equipment comprises, but is not limited to, an intelligent socket, an intelligent electric cooker, an intelligent sweeper and an intelligent lamp.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims (12)

1. A nonlinear current generating circuit, comprising:
the direct current module is used for outputting initial direct current;
an impedance enhancement module;
the output stage transistor of the transconductance linear module comprises a first transistor, wherein the first transistor is an output stage transistor of the transconductance linear module, the impedance enhancement module is connected with the first transistor and is used for equivalently increasing the output resistance of the first transistor, and the transconductance linear module is used for carrying out nonlinear transformation on the initial direct current and outputting nonlinear current under the power supply effect of power supply voltage.
2. The nonlinear current generating circuit according to claim 1, wherein the transconductance linear module comprises a second transistor connected to a control terminal of the first transistor, the impedance boosting module comprising a first impedance boosting circuit and a second impedance boosting circuit, wherein:
the first impedance enhancement circuit is connected with the first transistor and is used for equivalently increasing the output resistance of the first transistor;
the second impedance enhancement circuit is connected with the second transistor and is used for equivalently increasing the output resistance of the second transistor.
3. The nonlinear current generating circuit in accordance with claim 2, wherein the first impedance boosting circuit comprises a third transistor and a first bias voltage unit, wherein:
a first end of the third transistor is used for being connected with a target circuit, a control end of the third transistor is connected with the first bias voltage unit, and a second end of the third transistor is connected with a first end of the first transistor;
the first bias voltage unit is used for providing bias voltage for the third transistor.
4. A nonlinear current generating circuit according to claim 3, wherein the first bias voltage unit comprises a first current generating device having one end for connection to the power supply voltage and the other end connected to the control end of the third transistor.
5. The nonlinear current generating circuit according to claim 3, wherein said first bias voltage unit further comprises a first unidirectional conduction device, one end of said first unidirectional conduction device being connected to the other end of said first current generating device, the other end of said first unidirectional conduction device being grounded.
6. The nonlinear current generating circuit in accordance with claim 2, wherein the second impedance boosting circuit comprises a fourth transistor and a second bias voltage unit, wherein:
the first end of the fourth transistor is used for being connected with the power supply voltage, the control end of the fourth transistor is connected with the second bias voltage unit, and the second end of the fourth transistor is connected with the first end of the second transistor;
the second bias voltage unit is used for providing bias voltage for the fourth transistor.
7. The nonlinear current generating circuit according to claim 6, wherein the second bias voltage unit includes a second current generating device having one end for connection to the power supply voltage and the other end connected to the control terminal of the fourth transistor.
8. The nonlinear current generating circuit according to claim 7, wherein the second bias voltage unit further comprises a second unidirectional conduction device, one end of the second unidirectional conduction device is connected to the other end of the second current generating device, and the other end of the second unidirectional conduction device is grounded.
9. The nonlinear current generating circuit in accordance with claim 5, wherein the first unidirectional current generating device comprises a diode and/or a field effect transistor.
10. The nonlinear current generating circuit according to any one of claims 1 to 9, wherein the nonlinear current generating circuit further comprises:
and the current mirror module is used for amplifying the nonlinear current according to the proportion.
11. A chip comprising a nonlinear current generating circuit as recited in any one of claims 1 to 10.
12. An electronic device comprising a nonlinear current generating circuit as claimed in any one of claims 1 to 10, or a chip as claimed in claim 11.
CN202311602763.9A 2023-11-28 2023-11-28 Nonlinear current generation circuit, chip and electronic equipment Pending CN117707273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311602763.9A CN117707273A (en) 2023-11-28 2023-11-28 Nonlinear current generation circuit, chip and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311602763.9A CN117707273A (en) 2023-11-28 2023-11-28 Nonlinear current generation circuit, chip and electronic equipment

Publications (1)

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CN117707273A true CN117707273A (en) 2024-03-15

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