CN117706504A - Fault detection method and circuit protection device for active phased array surface - Google Patents
Fault detection method and circuit protection device for active phased array surface Download PDFInfo
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Abstract
The application relates to the technical field of electronic circuits, and provides a fault detection method and a circuit protection device for an active phased array surface, wherein the method comprises the following steps: initializing an active phased array surface; acquiring a first level output by a comparator in each power amplifier of an active phased array surface, a second level output by a current monitor and an array surface temperature value output by a temperature sensor; detecting a fault condition of each power amplifier based on the first level, the second level, and/or the array temperature value of each power amplifier; and according to the fault condition of each power amplifier, opening the drain voltage switch of the corresponding power amplifier. According to the method, the power amplifier of the core device of each antenna unit is monitored in real time, a protection mechanism is started when an alarm fault occurs in a certain unit, the drain electrode of the power amplifier is disconnected to supply power, a single antenna unit fails, normal operation of other units is not affected, and the influence of the fault of the single antenna unit on the overall performance of the phased array antenna is reduced.
Description
Technical Field
The application relates to the technical field of electronic circuits, in particular to a fault detection method and a circuit protection device for an active phased array surface.
Background
In the prior art, a phased array antenna is generally required to have high reliability and high stability, and can keep working in a fault-free state all day long, however, as the working environment of the phased array antenna is increasingly deteriorated and the number of radiating elements is increased, the phased array antenna inevitably generates faults. The number of phased array antenna elements on a large scale is numerous, up to hundreds of thousands, even tens of thousands. The failure of a few units cannot affect the overall performance of the phased array antenna, so when an individual unit fails, it is important that the system can detect the failure in real time and immediately start the protection device without affecting the overall performance of the phased array antenna. The strategy of shutdown maintenance when few units fail is not applicable, and the shutdown maintenance meets the economic benefit only when the failed units reach a certain scale.
Disclosure of Invention
The embodiment of the application provides a fault detection method and a circuit protection device for an active phased array surface, which aim to monitor a core device power amplifier of each antenna unit in real time, do not influence the normal operation of other units, and reduce the influence of single antenna unit faults on the overall performance of a phased array antenna.
In a first aspect, an embodiment of the present application provides a method for detecting a fault of an active phased array surface, where the method for detecting a fault of an active phased array surface is applied to a phased array antenna, where the phased array antenna includes a plurality of antenna units, each of the antenna units includes a power amplifier, and each of the power amplifiers includes a comparator, a current monitor, and a temperature sensor, and includes:
initializing an active phased array surface;
acquiring a first level output by a comparator in each power amplifier of an active phased array surface, a second level output by a current monitor and an array surface temperature value output by a temperature sensor;
detecting a fault condition of each power amplifier based on the first level, the second level and/or the array temperature value of each power amplifier;
and according to the fault condition of each power amplifier, disconnecting the drain voltage switch of the corresponding power amplifier.
In an embodiment, detecting a fault condition of each power amplifier based on the first level, the second level, and/or the array temperature value of each power amplifier comprises:
if the target power amplifier with the first level being the low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the target power amplifier with the second level being the low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if target power amplifiers with array temperature values higher than a preset temperature value exist in all the power amplifiers, determining the target power amplifiers as fault power amplifiers; or (b)
If the target power amplifier with the first level being low level and the second level being low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the first level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the second level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, determining that the target power amplifier is a fault power amplifier; or (b)
And if the target power amplifiers with the first level being low and the second level being low and the array temperature value being higher than the preset temperature value exist in all the power amplifiers, determining that the target power amplifiers are fault power amplifiers.
In an embodiment, each power amplifier further comprises a first operational amplifier and a digital-to-analog converter; the comparator comprises a first comparator and a second comparator;
the step of obtaining a first level of the comparator output in each power amplifier comprises:
inverting and integrating the output voltage of the digital-to-analog converter through the first operational amplifier to obtain the gate voltage of each power amplifier;
inputting the grid voltage of each power amplifier and a preset reference voltage into the first comparator to obtain a first comparison level output by the first comparator;
inputting the gate voltage and the gate source voltage of each power amplifier into the second comparator to obtain a second comparison level output by the second comparator;
and determining the first comparison level and the second comparison level as a first level.
In an embodiment, if the first comparison level is a low level, it is determined that the failure of the power amplifier is a gate voltage upper limit failure.
In an embodiment, if the second comparison level is a low level, it is determined that the failure of the power amplifier is a gate voltage offline failure.
In one embodiment, obtaining a second level of current monitor output in each power amplifier includes:
and acquiring the voltage difference between two ends of the current detection resistor through the current monitor to obtain a second level output by the current monitor based on an acquisition result.
In one embodiment, if the second level is low, the fault of the power amplifier is determined to be a drain current overcurrent fault.
In a second aspect, embodiments of the present application provide a circuit protection device for an active phased array plane, where the circuit protection device for an active phased array plane is applied to a phased array antenna, and the phased array antenna includes a plurality of antenna units, each of the antenna units includes a power amplifier, and each of the power amplifiers includes a comparator, a current monitor, and a temperature sensor, and includes:
the initialization unit is used for initializing the active phased array surface;
the acquisition unit is used for acquiring a first level output by the comparator in each power amplifier of the active phased array surface, a second level output by the current monitor and an array surface temperature value output by the temperature sensor;
a detection unit, configured to detect a fault condition of each power amplifier based on a first level, a second level and/or a temperature value of an array plane of each power amplifier;
and the circuit protection unit is used for switching off the drain voltage switch of the corresponding power amplifier according to the fault condition of each power amplifier.
In a third aspect, an embodiment of the present application provides an electronic device, where the electronic device includes a memory, a processor, and a computer program stored on the memory and capable of running on the processor, and when the processor executes the computer program, the processor implements the method for detecting a fault of an active phased array plane according to the first aspect.
In a fourth aspect, embodiments of the present application provide a non-transitory computer readable storage medium, including a computer program, which when executed by a processor, implements the method for detecting a fault of an active phased array surface according to the first aspect.
In a fifth aspect, embodiments of the present application provide a computer product, where the computer product includes a computer program, where the computer program when executed by a processor implements the method for detecting a fault on an active phased array surface according to the first aspect.
According to the embodiment of the application, the power amplifier of the core device of each antenna unit is monitored in real time, when an alarm fault occurs in a certain unit, a protection mechanism is started immediately, the power supply of the drain electrode of the power amplifier is disconnected, a single antenna unit fails, normal operation of other units is not affected, and therefore the influence of the fault of the single antenna unit on the overall performance of the phased array antenna is reduced.
Drawings
For a clearer description of the present application or of the prior art, the drawings that are used in the description of the embodiments or of the prior art will be briefly described, it being apparent that the drawings in the description below are some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a fault detection method of an active phased array surface provided in an embodiment of the present application;
fig. 2 is a control schematic diagram of an antenna array power amplifier according to an embodiment of the present application;
FIG. 3 is a single power amplifier state monitoring block diagram provided by an embodiment of the present application;
FIG. 4 is a block diagram of a digital-to-analog conversion output voltage conversion circuit provided by an embodiment of the present application;
FIG. 5 is a block diagram of a gate voltage alarm output circuit provided by an embodiment of the present application;
FIG. 6 is a block diagram of a drain current monitoring and protection circuit provided in an embodiment of the present application;
FIG. 7 is a block diagram of temperature monitoring provided by an embodiment of the present application;
FIG. 8 is a flow chart of query information and control of a power amplifier according to an embodiment of the present application;
FIG. 9 is a flowchart of alarm query and start protection control provided by an embodiment of the present application;
fig. 10 is a block diagram of a circuit protection device for an active phased array plane according to an embodiment of the present application;
fig. 11 is a block diagram of an electronic device provided in an embodiment of the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the present application more apparent, the technical solutions in the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
Optionally, as shown in fig. 1, fig. 1 is a flowchart of a method for detecting a fault of an active phased array surface according to an embodiment of the present application. Optionally, the embodiment of the present application uses the control unit as an execution body for illustration.
Optionally, an embodiment of the present application provides a method for detecting a fault of an active phased array plane, including:
step 101, initializing an active phased array surface.
Step 102, obtaining a first level output by a comparator in each power amplifier of the active phased array surface, a second level output by a current monitor and an array surface temperature value output by a temperature sensor.
Step 103, detecting a fault condition of each power amplifier based on the first level, the second level and/or the array temperature value of each power amplifier.
Step 104, according to the fault condition of each power amplifier, turning off the drain voltage switch of the corresponding power amplifier.
It should be noted that the embodiments of the present application may be applied to a phased array antenna, where the phased array antenna includes a plurality of antenna units, and each antenna unit includes a power amplifier, and referring specifically to fig. 2. Embodiments of the present application may therefore be understood as controlling multiple power amplifiers in a phased array antenna. Optionally, each power amplifier includes a comparator, a current monitor, and a temperature sensor, wherein a user of the comparator outputs a first level of the power amplifier, the current monitor is configured to output a second level of the power amplifier, and the temperature sensor is configured to output an array plane temperature value of the active phased array plane. It will thus be appreciated that embodiments of the present application monitor the status of a power amplifier in real time via a comparator, a current monitor and a temperature sensor, as particularly shown in fig. 3.
Specifically, the control unit initializes the active phased array surface.
Further, the control unit obtains a first level output by a comparator in each power amplifier of the active phased array surface, a second level output by the current monitor and an array surface temperature value output by the temperature sensor.
Optionally, referring to fig. 4 and 5, each power amplifier further includes a first operational amplifier and a digital-to-analog converter, and the comparator includes a first comparator and a second comparator, and thus, the step of obtaining the first level of the comparator output in each power amplifier includes:
inverting and integrating the output voltage of the digital-to-analog converter through the first operational amplifier to obtain the gate voltage of each power amplifier;
inputting the grid voltage of each power amplifier and a preset reference voltage into the first comparator to obtain a first comparison level output by the first comparator;
inputting the gate voltage and the gate source voltage of each power amplifier into the second comparator to obtain a second comparison level output by the second comparator;
and determining the first comparison level and the second comparison level as a first level.
Specifically, the control unit performs inverse integral amplification on the Output voltage (dac_output_1) of the digital-to-analog converter by the operational amplifier U1B, adjusts the Output voltage to be negative (pa_vg_1), and supplies power as the gate voltage of the power amplifier.
Further, the control unit inputs the gate voltage (pa_vg_1) and the preset reference voltage (vg_ref) to both ends of the first comparator U3C, so as to obtain a first comparison level output by the first comparator. When the gate voltage (pa_vg_1) is greater than the reference voltage (vg_ref), the first comparison level (vg_cpr_1) output by the first comparator U3C is a low level, and at this time, the control unit detects a gate voltage upper limit fault. When the gate voltage (pa_vg_1) is equal to or less than the reference voltage (vg_ref), the first comparison level (vg_cpr_1) output by the comparator is a high level, and at this time, the control unit determines that the gate voltage is normal.
Further, a 330 Ω resistor R6 is connected in parallel at the gate supply of the power amplifier as a matching load, and the control unit inputs the gate voltage (pa_vg_1) and the gate source voltage (vg_c_1) to two ends of the second comparator U2B, so as to obtain a second comparison level output by the second comparator U2B. When the gate voltage (pa_vg_1) of the matching load R6 is disconnected, the second comparison level (vg_cpr_1) output by the second comparator U2B is low, and the control unit detects a gate voltage disconnection fault.
Therefore, in the embodiment of the present application, the control unit determines the first comparison level (vg_cpr_1) output by the first comparator U3C and the second comparison level (vg_cpr_1) output by the second comparator U2B as the first level.
It should be noted that, each final power amplifier has a set of gate voltage Alarm mechanism, where the gate voltage Alarm mechanism includes a plurality of Alarm flags, each Alarm flag vg_alarm_1, vg_alarm_2,. Vg_alarm_n and an input serial-output shift register (SN 74HC 165), and the control unit determines which power amplifier generates the gate voltage Alarm by traversing the query shift register to Alarm the flag bit.
Optionally, the specific step of obtaining the second level of the current monitor output in each power amplifier includes:
and acquiring the voltage difference between two ends of the current detection resistor through the current monitor to obtain a second level output by the current monitor based on an acquisition result.
Specifically, referring to fig. 6, a 10mΩ current detection resistor R12 is connected in series to a drain voltage supply (pa_vdd_1), and the current monitor U3 collects the voltage difference across the current detection resistor, so as to obtain a second level output by the current monitor U3 based on the collection result. If the acquisition CURRENT exceeds the limit CURRENT, the second level (over_current_1) output by the CURRENT monitor U3 is low, and the control unit detects a drain CURRENT overcurrent fault through the I2C bus (i_sda/i_scl).
It should be noted that, each final power amplifier has a set of drain CURRENT alarm mechanism, where the drain CURRENT alarm mechanism includes a plurality of alarm flags, each alarm flag over_current_1, over_current_2.
Alternatively, referring specifically to fig. 7, the control unit detects the temperature of the array surface in real time through the temperature sensor, and when detecting that the sensor temperature exceeds the set temperature, the control unit starts an over-temperature fault.
Step 103, detecting a fault condition of each power amplifier based on the first level, the second level and/or the array temperature value of each power amplifier.
Step 104, according to the fault condition of each power amplifier, turning off the drain voltage switch of the corresponding power amplifier.
Optionally, the control unit detects a fault condition of each power amplifier according to the first level, the second level and/or the array temperature value of each power amplifier, and turns off a drain voltage switch of the corresponding power amplifier according to the fault condition of each power amplifier, specifically referring to fig. 8, the specific steps include: if the target power amplifier with the first level being the low level exists in all the power amplifiers, the control unit determines that the target power amplifier is a fault power amplifier, namely, the power amplifier has a gate voltage (gate voltage) alarm.
Optionally, if there is a target power amplifier with the second level being a low level in all the power amplifiers, the control unit determines that the target power amplifier is a faulty power amplifier, i.e. that the power amplifier has a drain current alarm.
Optionally, if there are target power amplifiers with array temperature values higher than the preset temperature value in all the power amplifiers, the control unit determines that the target power amplifier is a fault power amplifier, that is, that the power amplifier has a temperature alarm.
Optionally, if the first level is low level and the second level is low level in all the power amplifiers, the control unit determines that the target power amplifier is a fault power amplifier, that is, the power amplifier has a gate voltage alarm and a drain current alarm.
Optionally, if the first level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, the control unit determines that the target power amplifier is a fault power amplifier, that is, the power amplifier has gate voltage alarm and temperature alarm.
Optionally, if the second level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, the control unit determines that the target power amplifier is a fault power amplifier, that is, the drain current alarm and the temperature alarm exist in the power amplifier.
Optionally, if the first level is low level and the second level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, the control unit determines that the target power amplifier is a fault power amplifier, that is, the power amplifier has gate voltage alarm, drain current alarm and temperature alarm.
It should be noted that, the circuit protection device in the embodiment of the present application is implemented by turning off the drain voltage switch of the power amplifier. When the gate voltage of the power amplifier has alarm information, the output (Vg_CPR_1) of the comparator is in a low level; when the overcurrent alarm information appears in the drain CURRENT of the power amplifier, the CURRENT monitor output (OVER_CURRENT_1) is at a low level; when the temperature detected by the temperature sensor exceeds the set temperature, the control unit output (HPA_MUTE) is low level; the three are input into the three AND gate logic circuits at the same time, so long as an alarm message appears, the drain voltage switch of the power amplifier is disconnected, the circuit protection is started, and when the three are at high level, the three AND gate logic circuits output at high level, and the drain voltage switch of the power amplifier works normally.
It can be understood that, in the embodiment of the present application, with reference to fig. 9, the gate voltage and the drain current of the corresponding power amplifier of the single antenna unit are monitored, and the antenna array surface temperature is monitored in real time, when an alarm fault occurs in a certain unit, the control unit immediately starts the protection device, and the drain power supply of the power amplifier is disconnected. The method has the advantages that the alarm inquiry is carried out in a traversal round inspection mode, so that the whole active phased array is monitored, when a single antenna unit fails, the corresponding power amplifier stops working, the normal working of other units is not affected, and the influence of the single antenna unit fault on the overall performance of the active phased array antenna is reduced.
Thus, in the embodiment of the present application, for the gate voltage warning portion: the system consists of a grid voltage upper limit alarm and an off-line alarm, a hardware protection mechanism is started and reported to a control unit when the alarm is generated, the hardware protection speed can reach ns level, and the protection function can be well started; the gate voltage of each power amplifier is monitored, and the leakage voltage corresponding to each power amplifier can be protected. For the drain current alert section: when overcurrent occurs, the current detection chip can generate an alarm, and simultaneously starts a hardware protection mechanism and reports the hardware protection mechanism to the control unit, wherein the hardware protection speed can reach ns level, and the protection effect can be well started; the drain current of each power amplifier is monitored and the drain voltage of each power amplifier is protected. The active phased array face real-time fault detection and circuit protection device has great advantages in application scenes of a plurality of power amplifiers in an active phased array; the state of each power amplifier can be monitored in real time, and each power amplifier can be protected. When an abnormal alarm of a certain power amplifier occurs, only a single antenna unit is invalid, normal operation of other units is not affected, and the influence on the whole active phased array surface is small. Thereby providing stability and reliability of operation of the overall active phased array surface system. By fault monitoring of each power amplifier, effective assistance is provided for fault diagnosis of the source phased array surface system.
According to the embodiment of the application, the power amplifier of the core device of each antenna unit is monitored in real time, when an alarm fault occurs in a certain unit, a protection mechanism is started immediately, the power supply of the drain electrode of the power amplifier is disconnected, a single antenna unit fails, normal operation of other units is not affected, and therefore the influence of the fault of the single antenna unit on the overall performance of the phased array antenna is reduced.
The circuit protection device for an active phased array plane provided in the embodiments of the present application is described below, and the circuit protection device for an active phased array plane described below and the fault detection method for an active phased array plane described above may be referred to correspondingly with each other. Referring to fig. 10, fig. 10 is a block diagram of a circuit protection device for an active phased array surface provided in an embodiment of the present application, where the circuit protection device for an active phased array surface provided in the embodiment of the present application includes:
an initialization unit 1001, configured to initialize an active phased array plane;
an obtaining unit 1002, configured to obtain a first level output by a comparator in each power amplifier of the active phased array surface, a second level output by a current monitor, and an array surface temperature value output by a temperature sensor;
a detection unit 1003, configured to detect a fault condition of each power amplifier based on the first level, the second level, and/or the array temperature value of each power amplifier;
and the circuit protection unit 1004 is configured to disconnect the drain voltage switch of each power amplifier according to the fault condition of the corresponding power amplifier.
In an embodiment, the detection unit 1003 is further configured to:
if the target power amplifier with the second level being the low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if target power amplifiers with array temperature values higher than a preset temperature value exist in all the power amplifiers, determining the target power amplifiers as fault power amplifiers; or (b)
If the target power amplifier with the first level being low level and the second level being low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the first level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the second level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, determining that the target power amplifier is a fault power amplifier; or (b)
And if the target power amplifiers with the first level being low and the second level being low and the array temperature value being higher than the preset temperature value exist in all the power amplifiers, determining that the target power amplifiers are fault power amplifiers.
In an embodiment, the obtaining unit 1002 is further configured to:
inverting and integrating the output voltage of the digital-to-analog converter through the first operational amplifier to obtain the gate voltage of each power amplifier;
inputting the grid voltage of each power amplifier and a preset reference voltage into the first comparator to obtain a first comparison level output by the first comparator;
inputting the gate voltage and the gate source voltage of each power amplifier into the second comparator to obtain a second comparison level output by the second comparator;
and determining the first comparison level and the second comparison level as a first level.
In an embodiment, the obtaining unit 1002 is further configured to:
and acquiring the voltage difference between two ends of the current detection resistor through the current monitor to obtain a second level output by the current monitor based on an acquisition result.
According to the embodiment of the application, the power amplifier of the core device of each antenna unit is monitored in real time, when an alarm fault occurs in a certain unit, a protection mechanism is started immediately, the power supply of the drain electrode of the power amplifier is disconnected, a single antenna unit fails, normal operation of other units is not affected, and therefore the influence of the fault of the single antenna unit on the overall performance of the phased array antenna is reduced.
The specific embodiments of the circuit protection device for the active phased array surface provided by the application are basically the same as the embodiments of the fault detection method for the active phased array surface, and are not described herein.
Fig. 11 illustrates a physical structure diagram of an electronic device, which may include, as shown in fig. 11: processor 1110, communication interface Communication Interface 1120, memory 1130 and communication bus 1140, wherein processor 1110, communication interface 1120 and memory 1130 communicate with each other via communication bus 1140. Processor 1110 may call a computer program in memory 1130 to perform the steps of the active phased array face fault detection method, including, for example:
initializing an active phased array surface;
acquiring a first level output by a comparator in each power amplifier of an active phased array surface, a second level output by a current monitor and an array surface temperature value output by a temperature sensor;
detecting a fault condition of each power amplifier based on the first level, the second level and/or the array temperature value of each power amplifier;
and according to the fault condition of each power amplifier, disconnecting the drain voltage switch of the corresponding power amplifier.
Further, the logic instructions in the memory 1130 described above may be implemented in the form of software functional units and sold or used as a stand-alone product, stored on a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, embodiments of the present application further provide a non-transitory computer readable storage medium, where the non-transitory computer readable storage medium includes a computer program, where the computer program may be stored on the non-transitory computer readable storage medium, and when the computer program is executed by a processor, the computer program may be capable of executing the steps of the fault detection method of the active phased array surface provided in the foregoing embodiments, for example, including:
initializing an active phased array surface;
acquiring a first level output by a comparator in each power amplifier of an active phased array surface, a second level output by a current monitor and an array surface temperature value output by a temperature sensor;
detecting a fault condition of each power amplifier based on the first level, the second level and/or the array temperature value of each power amplifier;
and according to the fault condition of each power amplifier, disconnecting the drain voltage switch of the corresponding power amplifier.
In yet another aspect, embodiments of the present application further provide a computer product, where the computer product includes a computer program, where the computer program can be stored on the computer product, where the computer program when executed by a processor can perform the steps of the method for detecting a fault of an active phased array surface provided in the foregoing embodiments, for example, including:
initializing an active phased array surface;
acquiring a first level output by a comparator in each power amplifier of an active phased array surface, a second level output by a current monitor and an array surface temperature value output by a temperature sensor;
detecting a fault condition of each power amplifier based on the first level, the second level and/or the array temperature value of each power amplifier;
and according to the fault condition of each power amplifier, disconnecting the drain voltage switch of the corresponding power amplifier.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions.
Claims (10)
1. A method of fault detection for an active phased array surface, the method of fault detection for an active phased array surface being applied to a phased array antenna, the phased array antenna comprising a plurality of antenna elements, each of the antenna elements comprising a power amplifier, each of the power amplifiers comprising a comparator, a current monitor and a temperature sensor, comprising:
initializing an active phased array surface;
acquiring a first level output by a comparator in each power amplifier of an active phased array surface, a second level output by a current monitor and an array surface temperature value output by a temperature sensor;
detecting a fault condition of each power amplifier based on the first level, the second level and/or the array temperature value of each power amplifier;
and according to the fault condition of each power amplifier, disconnecting the drain voltage switch of the corresponding power amplifier.
2. The method for detecting a fault in an active phased array as claimed in claim 1, wherein said detecting a fault condition for each of said power amplifiers based on the first level, the second level and/or the array temperature value of each of said power amplifiers comprises:
if the target power amplifier with the first level being the low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the target power amplifier with the second level being the low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if target power amplifiers with array temperature values higher than a preset temperature value exist in all the power amplifiers, determining the target power amplifiers as fault power amplifiers; or (b)
If the target power amplifier with the first level being low level and the second level being low level exists in all the power amplifiers, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the first level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, determining that the target power amplifier is a fault power amplifier; or alternatively, the first and second heat exchangers may be,
if the second level is low level in all the power amplifiers and the array temperature value is higher than the target power amplifier with the preset temperature value, determining that the target power amplifier is a fault power amplifier; or (b)
And if the target power amplifiers with the first level being low and the second level being low and the array temperature value being higher than the preset temperature value exist in all the power amplifiers, determining that the target power amplifiers are fault power amplifiers.
3. The method of claim 1, wherein each power amplifier further comprises a first operational amplifier and a digital-to-analog converter; the comparator comprises a first comparator and a second comparator;
the step of obtaining a first level of the comparator output in each power amplifier comprises:
inverting and integrating the output voltage of the digital-to-analog converter through the first operational amplifier to obtain the gate voltage of each power amplifier;
inputting the grid voltage of each power amplifier and a preset reference voltage into the first comparator to obtain a first comparison level output by the first comparator;
inputting the gate voltage and the gate source voltage of each power amplifier into the second comparator to obtain a second comparison level output by the second comparator;
and determining the first comparison level and the second comparison level as a first level.
4. A method of active phased array face fault detection as claimed in claim 3, wherein if the first comparison level is low, then determining that the power amplifier fault is a gate voltage upper limit fault.
5. A method of active phased array face fault detection as claimed in claim 3, wherein if the second comparison level is low, then determining that the power amplifier fault is a gate voltage out of line fault.
6. The method of claim 1, wherein obtaining the second level of current monitor output in each power amplifier comprises:
and acquiring the voltage difference between two ends of the current detection resistor through the current monitor to obtain a second level output by the current monitor based on an acquisition result.
7. The method of claim 6, wherein if the second level is a low level, determining that the fault of the power amplifier is a drain current overcurrent fault.
8. A circuit protection device for an active phased array surface, the circuit protection device for an active phased array surface being applied to a phased array antenna, the phased array antenna comprising a plurality of antenna elements, each of the antenna elements comprising a power amplifier, each of the power amplifiers comprising a comparator, a current monitor and a temperature sensor, comprising:
the initialization unit is used for initializing the active phased array surface;
the acquisition unit is used for acquiring a first level output by the comparator in each power amplifier of the active phased array surface, a second level output by the current monitor and an array surface temperature value output by the temperature sensor;
a detection unit, configured to detect a fault condition of each power amplifier based on a first level, a second level and/or a temperature value of an array plane of each power amplifier;
and the circuit protection unit is used for switching off the drain voltage switch of the corresponding power amplifier according to the fault condition of each power amplifier.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of fault detection of an active phased array surface of any of claims 1 to 7 when the computer program is executed by the processor.
10. A non-transitory computer readable storage medium comprising a computer program, characterized in that the computer program when executed by a processor implements the method of fault detection of an active phased array face of any of claims 1 to 7.
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| CN202794386U (en) * | 2012-08-21 | 2013-03-13 | 成都金本华电子有限公司 | Fault detection system for phased array antenna |
| CN111969968A (en) * | 2020-08-27 | 2020-11-20 | 无锡华测电子系统有限公司 | Novel X-waveband all-solid-state transmitter |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202794386U (en) * | 2012-08-21 | 2013-03-13 | 成都金本华电子有限公司 | Fault detection system for phased array antenna |
| CN111969968A (en) * | 2020-08-27 | 2020-11-20 | 无锡华测电子系统有限公司 | Novel X-waveband all-solid-state transmitter |
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