CN117692406A - Processing method for rapidly distributing exchange chip protocol package - Google Patents

Abstract

The invention is applicable to the technical field of switch data processing, and provides a processing method for rapidly distributing a protocol packet of a switch chip, which comprises the following steps: a step of receiving and transmitting packets; when receiving or sending packets, the messages with different functions are classified and then different processing modes are used for rapidly distributing the messages with different types, so that the working efficiency is greatly improved; the method comprises a packet receiving step, a packet sending step and a packet receiving step, wherein the packet receiving step realizes one conversion from DSA Tag to VLAN Tag, the packet sending step realizes one conversion from VLAN Tag to DSA Tag, and the two aspects of packet receiving and packet sending are used for realizing the rapid classification processing of application type messages and business type messages of business data packets aiming at management protocol packets, thereby improving the processing efficiency of a CPU, greatly reducing the delay of data processing and further improving the user experience.

Description

Processing method for rapidly distributing exchange chip protocol package

Technical Field

The invention belongs to the technical field of switch data processing, and particularly relates to a processing method for rapidly distributing a protocol packet of a switch chip.

Background

In the switch device, some special data messages and protocol messages need to be processed correspondingly from the switch chip to the CPU. For some two-layer protocols, such as a protocol of STP, before a message of a type represented by STP protocol is sent to a CPU, the message needs to be added to enter an inlet port of a switching chip; and the ERPS protocol needs to add the information of the input port and VLAN of the message entering the exchange chip before the message is sent to the CPU. And the data message represented by the in-band network management message needs to be processed by the network management module without any modification, if the routing function such as NAT protocol function needs to be realized at the same time, the VLAN information of the message needs to be received and transmitted through the corresponding VLAN interface.

The two-layer exchange chip takes a Marvell chip as an example to provide a distributed switch architecture (Distributed Switch Architecture, DSA for short) based on ports; for the design of the management-type switch, the CPU connected to the management needs to be configured into a DSA Tag mode (abbreviated as DSA Tag) and configured into a DSA Tag function, as shown in fig. 3, after the DSA Tag function is enabled on a port Prot 10 connected to the CPU, all messages sent from the port 10 to the CPU are marked with the DSA Tag of 4 bytes (including information such as a message type, a source port ID, a message VLAN and the like so as to meet the protocol processing flow requirement of acquiring the information of the source port and the VLAN of the message).

Because the message with the DSA Tag cannot be identified and processed in the protocol stack of the Linux kernel, the DSA Tag needs to be processed before being sent to the protocol stack in the packet receiving flow of the Linux kernel, so that the kernel protocol and the application protocol stack are independently processed; meanwhile, in the Linux kernel packet sending flow, DSA Tag is processed before being sent through a physical interface, so that an application management protocol packet can be forwarded through a fixed port and a VLAN, and a common in-band message is forwarded normally through all ports.

The current common processing flow needs two parts of protocol stack preprocessing and application layer packet receiving processing comprising Linux kernel:

the protocol stack preprocessing of the conventional Linux kernel comprises the following steps (as shown in fig. 1):

1. after receiving the message sent by the exchange chip, the CPU firstly needs to analyze the message and judges whether the message is a protocol message or a service message through the key words;

2. for a common data message, 4 bytes of DSATag can be directly removed as the message source port information is not required to be acquired, and then the DSATag is uploaded to a network module for processing through a Linux kernel protocol stack;

3. for protocol messages such as ERPS, the message source port information and VLAN information in the DSA Tag are needed to be analyzed;

4. attaching source port information and VLAN information to a specific field of a protocol message Payload;

5. removing DSA Tag, and then uploading to an application protocol (ERPS) for processing through a Linux kernel protocol stack;

the conventional application layer packet reception process comprises the following steps:

1. the application layer needs to analyze the message for the second time, judges whether the message is a common service data message or a protocol message through the key words, and sends the message to the protocol processing module and the network module respectively;

2. after receiving the network management data message, the network module analyzes and processes according to the network flow;

3. after receiving the protocol message, the application protocol analyzes the protocol message Payload, and obtains the message source port information and VLAN information from the specific field.

4. Continuing the protocol processing flow.

The conventional Linux packet issuing process comprises the following steps (as shown in fig. 2):

1. after the packet is sent and started and the protocol stack message is received, judging whether the message is an application protocol packet or not, and if the message is the application protocol packet, not processing the message.

2. And adding DSA Tag forwarding information to the common in-band management packet.

However, the core can influence the efficiency of receiving and transmitting packets by removing DSA Tag, the influence on the number of management packets received and transmitted by applying a two-layer slow protocol is small, the response time of the management packets is influenced by the fast protocol, and the influence on service data is great for NAT or routing protocols, so that the mode can not meet the use requirements of people.

Disclosure of Invention

In view of the above-mentioned shortcomings of the prior art, the present invention aims to provide a processing method for rapidly distributing a switch chip protocol packet, so as to solve the problems of low data processing efficiency and poor user experience caused by the fact that the prior art cannot provide an effective processing method for rapidly distributing a switch chip protocol packet.

The invention provides a processing method for rapidly distributing exchange chip protocol package, which comprises a package receiving step and a package sending step, wherein,

the package collecting step comprises a first step, a second step, a third step, a fourth step and a fifth step:

step one: analyzing whether the received message is an application message, if so, executing the second step, and if not, executing the fifth step;

step two: packaging the message into a network link message and sending the network link message to an application layer;

step three: the application layer receives the network link message and unpacks the message, analyzes a DSA Tag from the message, and acquires port and VLAN information from the DSA Tag;

step four: replacing the first two bytes of the DSA Tag with 0x8100 and converting the first two bytes into VLAN Tag;

step five: resolving DSA Tag from the message, replacing the first two bytes of the DSA Tag with 0x8100, and converting the DSA Tag into VLAN Tag;

the step of packing comprises a step six and a step seven, and a step eight:

step six: analyzing whether the message to be sent is an application message, if so, executing a step seven, and if not, executing a step eight:

step seven: adding DSA Tag to the application message and then sending the application message;

step eight: and directly replacing 0x8100 with the front two bytes of the DSA Tag of the Forward flag bit for the message, converting the DSA Tag into the DSA Tag and then transmitting the DSA Tag.

Further, directly replacing 0x8100 with the first two bytes of DSA Tag of Forward flag bit for the message includes:

converting the 0x8100 of the message into the first two bytes of the DSA Tag of the application class message.

On the other hand, the invention also provides a processing device for rapidly distributing the exchange chip protocol package, which comprises at least one processor; the method comprises the steps of,

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the processing method for fast distribution of switch chip protocol packets described above.

In another aspect, the present invention also provides a non-volatile computer readable storage medium, where computer executable instructions are stored, where the computer executable instructions, when executed by one or more processors, cause the one or more processors to perform the processing method for fast distribution of the exchange chip protocol package described above.

In another aspect, the present invention also provides a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a processor, cause the processor to perform the above-described processing method for fast distribution of a switch chip protocol package.

The invention has the beneficial effects that: by converting DSA Tag into VLAN Tag based on two aspects of packet receiving and packet sending, the quick classification processing of application type message aiming at management protocol packet and service type message of service data packet is realized, and under the condition that port information and VLAN information are required by application protocol, the efficiency of in-band management protocol is not influenced, thereby greatly reducing the delay of data processing and further improving user experience.

Drawings

FIG. 1 is a flow chart of a protocol stack packet receiving process of a conventional Linux kernel in the background art of a processing method for rapidly distributing a protocol packet of a switching chip;

FIG. 2 is a block diagram of a conventional Linux packet forwarding process in the background of a processing method for fast distributing a switch chip protocol packet according to the present invention;

fig. 3 is a flowchart illustrating a packet receiving step of a processing method for fast distributing a protocol packet of a switch chip according to an embodiment of the present invention;

fig. 4 is a flowchart of a packet sending step of a processing method for fast distributing a protocol packet of a switch chip according to an embodiment of the present invention;

fig. 5 is a DSA Tag port block diagram of a Marvell chip of a processing method for fast distributing a protocol packet of a switch chip according to a second embodiment of the present invention;

fig. 6 is a schematic diagram of a DSA Tag format of a processing method for fast distribution of a switch chip protocol packet according to a second embodiment of the present invention;

fig. 7 is a flow chart of a protocol stack packet receiving process of a Linux kernel of a processing method for rapidly distributing a protocol packet of a switch chip according to a second embodiment of the present invention;

fig. 8 is a flow chart of Linux packet sending processing in a processing method for fast distributing a protocol packet of a switch chip according to the second embodiment of the present invention;

fig. 9 is a schematic diagram of a message sending process flow of a processing method for fast distributing a protocol packet of a switch chip according to a second embodiment of the present invention;

fig. 10 is a schematic diagram of a message receiving process flow of a processing method for fast distributing a protocol packet of a switch chip according to a second embodiment of the present invention;

fig. 11 is a schematic structural diagram of a processing device for fast distributing a switch chip protocol packet according to the third embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.

The following describes in detail the implementation of the present invention in connection with specific embodiments:

embodiment one:

fig. 3 and fig. 4 respectively show the implementation flow of the packet receiving step and the packet sending step of the processing method for quickly distributing the exchange chip protocol packet according to the first embodiment of the present invention, and for convenience of explanation, only the relevant parts of the embodiments of the present invention are shown, which are described in detail below:

the step of wrapping includes step S301, step S302, step S303, step S304, and step S305:

step S301: analyzing whether the received message is an application message, if yes, executing step S302, and if not, executing step S305;

step S302: packaging the message into a network link message and sending the network link message to an application layer;

step S303: the application layer receives the network link message and unpacks the message, analyzes the DSA Tag from the message, and acquires port and VLAN information from the DSA Tag;

step S304: the first two bytes of the DSA Tag are replaced by 0x8100 to be converted into VLAN Tag;

step S305: resolving DSA Tag from the message, replacing the first two bytes of the DSA Tag with 0x8100 and converting the DSA Tag into VLAN Tag;

the step of issuing the package includes step S401 and step S402, and step S403:

step S401: analyzing whether the message to be sent is an application message, if so, executing a step seven, and if not, executing a step eight:

step S402: adding DSA Tag to the application message and then sending the application message;

step S403: the front two bytes of DSA Tag of Forward flag bit are directly used for replacing 0x8100 of the message, and the message is converted into DSA Tag and then sent.

In the embodiment of the method, directly replacing 0x8100 with the first two bytes of the DSA Tag of the Forward flag bit for the message includes:

the 0x8100 of the message is converted into the first two bytes of the DSA Tag of the application class message.

In the embodiment of the invention, the messages with different functions are classified and then the messages with different types are rapidly distributed by using different processing modes when the packets are received or sent, so that the working efficiency is greatly improved; the method comprises a packet receiving step, a packet sending step and a packet sending step, wherein the packet receiving step realizes one conversion from DSA Tag to VLAN Tag, and the packet sending step realizes one conversion from VLAN Tag to DSA Tag; by converting DSA Tag into VLAN Tag based on two aspects of packet receiving and packet sending, the quick classification processing of application type message aiming at management protocol packet and service type message of service data packet is realized, and under the condition that port information and VLAN information are required by application protocol, the efficiency of in-band management protocol is not influenced, thereby greatly reducing the delay of data processing and further improving user experience.

Embodiment two:

the processing method for fast distributing the exchange chip protocol packet according to the preferred embodiment of the present invention is shown in fig. 5, and referring to fig. 6 to fig. 10, the following details are described below:

firstly, supporting an 802.1q protocol module is opened when the kernel is compiled, and the kernel is compiled;

as shown in fig. 10, for the packet receiving flow, the packet enters through the normal switch port and is forwarded to the CPU through the DSA port carrying the DSA Tag.

In step R101, linux receives a message through a physical interface driving receiving function, and parses the protocol type. Further, it is determined by R102 whether a protocol packet required for the application protocol is received, for example, STP packet is determined according to the destination MAC address (01:80:c2:00:00:00) of the packet.

And if yes, packaging the message into a pre-created netlink message of a self-defined type and sending the pre-created netlink message to an application module for processing through the step R103.

Further, the application module receives the transmitted netlink message, analyzes the DSA Tag to obtain port and VLAN information, and simultaneously replaces the previous byte of the DSA Tag with 0x8100 and converts the previous byte into the VLAN Tag. To a particular application protocol module as shown in step R104.

If the packet judged in the step R101 is not an application protocol packet but is a normal service packet, processing is performed in the step R105, specifically, the front two directly replaced 0x8100 (hexadecimal) DSA tags are converted into VLAN tags, and the core sends the VLAN tags to the corresponding VLAN interface protocol stack for processing, and then forwards the VLAN interface protocol stack to the application network module.

The received message can be rapidly unpacked according to different types through the steps, so that a CPU can efficiently process protocol and service messages.

On the other hand, as shown in fig. 9, for the packet sending flow, the packet is divided into two parts, one part is From the management application protocol, the protocol packet is constructed in the application protocol layer, when constructing, according to the use of the protocol packet, a corresponding DSA Tag is added, and for such a packet, a from_cpu DSA Tag is added. The service message will not add DSA tags.

Step S101 performs two kinds of processing on the two kinds of messages before the driver function sends a packet.

The specific step S102 is to directly send the message containing from_cpu DSA Tag without processing, so as to implement forwarding of the DSA Tag to the designated port and VLAN, as shown in step S103.

The front two DSA tags of the message which does not contain the DSA Tag are directly replaced by 0x8100, so that the quick conversion from VLAN Tag to DSA Tag is realized, and as shown in step S103, the two-layer forwarding from the DSA Tag to other ports of the common message is realized.

Through one conversion processing of DSA Tag to VLAN Tag based on two aspects of receiving and transmitting, the packet rapid distribution processing aiming at the application type message and the service type message is realized, the CPU processing efficiency is improved, and the protocol rapid distribution processing of the two-layer exchange chip is realized.

Embodiment two:

fig. 11 shows a processing apparatus for fast distributing a switch chip protocol packet according to a second embodiment of the present invention, where, as shown in fig. 11, the apparatus 10 includes:

one or more processors 110 and a memory 120, one processor 110 being illustrated in fig. 11, the processors 110 and the memory 120 being connected by a bus or other means, the connection being illustrated in fig. 11 by a bus.

Processor 110 is used to implement various control logic for apparatus 10, which may be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a single-chip microcomputer, ARM (Acorn RISC Machine) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Also, the processor 110 may be any conventional processor, microprocessor, or state machine. The processor 110 may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

The memory 120 is used as a non-volatile computer readable storage medium, and can be used to store non-volatile software programs, non-volatile computer executable programs, and modules, such as program instructions corresponding to the processing method for fast distribution of the switch chip protocol package in the embodiment of the present invention. The processor 110 executes various functional applications of the apparatus 10 and data processing, i.e., a processing method for realizing the rapid distribution of the switch chip protocol package in the above-described method embodiment, by running the nonvolatile software programs, instructions, and units stored in the memory 120.

The memory 120 may include a storage program area that may store an operating device, an application program required for at least one function, and a storage data area; the storage data area may store data created from the use of the device 10, etc. In addition, memory 120 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 120 may optionally include memory located remotely from processor 110, which may be connected to device 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

One or more units are stored in memory 120 that, when executed by one or more processors 110, perform the processing method of the fast distribution of switch chip protocol packages in any of the method embodiments described above, e.g., perform the method steps described above in fig. 1 and 2.

Embodiment four:

a fourth embodiment of the present invention provides a non-transitory computer-readable storage medium storing computer-executable instructions which are executed by one or more processors, for example, to perform the method steps of fig. 1 and 2 described above.

By way of example, nonvolatile storage media can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically erasable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which acts as external cache memory. By way of illustration and not limitation, RAM is available in many forms such as Synchronous RAM (SRAM), dynamic RAM, (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The disclosed memory components or memories of the operating environments described herein are intended to comprise one or more of these and/or any other suitable types of memory.

Fifth embodiment:

a fifth embodiment of the present invention provides a computer program product, where the computer program product includes a computer program stored on a non-volatile computer readable storage medium, where the computer program includes program instructions, when the program instructions are executed by a processor, cause the processor to execute a processing method for quickly distributing a switch chip protocol packet according to the foregoing method embodiment. For example, the method steps in fig. 1 and 2 described above are performed.

The embodiments described above are merely illustrative, wherein elements illustrated as separate elements may or may not be physically separate, and elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

From the above description of embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus a general purpose hardware platform, or may be implemented by hardware. Based on such understanding, the foregoing technical solutions may be embodied essentially or in part in a form of a software product, which may exist in a computer-readable storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer electronic device (which may be a personal computer, a server, or a network electronic device, etc.) to perform the various embodiments or methods of some parts of the embodiments.

Conditional language such as "capable," "energy," "possible," or "may," among others, is generally intended to convey that a particular embodiment can include (but other embodiments do not include) particular features, elements, and/or operations unless specifically stated otherwise or otherwise understood within the context as used. Thus, such conditional language is not generally intended to imply that features, elements and/or operations are in any way required for one or more embodiments or that one or more embodiments must include logic for deciding, with or without student input or prompting, whether these features, elements and/or operations are included or are to be performed in any particular embodiment.

What has been described herein in this specification and the accompanying drawings includes examples of processing methods that can provide for the fast distribution of switch chip protocol packages. It is, of course, not possible to describe every conceivable combination of components and/or methodologies for purposes of describing the various features of the present disclosure, but it may be appreciated that many further combinations and permutations of the disclosed features are possible. It is therefore evident that various modifications may be made thereto without departing from the scope or spirit of the disclosure. Further, or in the alternative, other embodiments of the disclosure may be apparent from consideration of the specification and drawings, and practice of the disclosure as presented herein. It is intended that the examples set forth in this specification and figures be considered illustrative in all respects as illustrative and not limiting. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims (5)

1. A processing method for rapidly distributing exchange chip protocol package comprises a package receiving step and a package sending step, and is characterized in that,

the package collecting step comprises a first step, a second step, a third step, a fourth step and a fifth step:

step one: analyzing whether the received message is an application message, if so, executing the second step, and if not, executing the fifth step;

step two: packaging the message into a network link message and sending the network link message to an application layer;

step three: the application layer receives the network link message and unpacks the message, analyzes a DSA Tag from the message, and acquires port and VLAN information from the DSA Tag;

step four: replacing the first two bytes of the DSA Tag with 0x8100 and converting the first two bytes into VLAN Tag;

step five: resolving DSA Tag from the message, replacing the first two bytes of the DSA Tag with 0x8100, and converting the DSA Tag into VLAN Tag;

the step of packing comprises a step six and a step seven, and a step eight:

step six: analyzing whether the message to be sent is an application message, if so, executing a step seven, and if not, executing a step eight:

step seven: adding DSA Tag to the application message and then sending the application message;

step eight: and directly replacing 0x8100 with the front two bytes of the DSA Tag of the Forward flag bit for the message, converting the DSA Tag into the DSA Tag and then transmitting the DSA Tag.

2. The method for processing rapid distribution of a switch chip protocol packet according to claim 1, wherein directly replacing the message with the first two bytes of DSA Tag of Forward flag bit by 0x8100 comprises:

converting the 0x8100 of the message into the first two bytes of the DSA Tag of the application class message.

3. A process for fast distribution of a switched chip protocol packet, said apparatus comprising at least one processor; the method comprises the steps of,

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of processing for fast distribution of switch chip protocol packets according to any one of claims 1-2.

4. A non-transitory computer readable storage medium storing computer executable instructions which, when executed by one or more processors, cause the one or more processors to perform the method of fast distribution of the switch chip protocol package of any of claims 1-2.

5. A computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a processor, cause the processor to perform the method of processing for fast distribution of switch chip protocol packages according to any of claims 1-2.