CN117691993A - A voltage-controlled oscillator circuit and adjustment method with synchronous and adaptive frequency and amplitude - Google Patents

Abstract

The invention relates to a voltage-controlled oscillator circuit with synchronous adaptive frequency and amplitude and an adjustment method, belonging to the field of radio frequency integrated circuit design. The circuit includes a frequency detector, charge pump, voltage controlled oscillator, loop filter, frequency divider, counting unit, comparison unit and digital state machine. The frequency detector, charge pump, loop filter, voltage controlled oscillator and frequency divider are connected in sequence. The output end of the frequency divider is connected to the input end of the frequency detector, and the output end of the loop filter is connected to the voltage controlled oscillator. There is a switch T2 between the input terminals of the filter; the input terminal of the comparison unit is connected to the output terminal of the loop filter through switch T1, and the output terminal of the comparison unit is connected to the input terminal of the digital state machine; the input terminal of the counting unit is connected to the reference frequency and frequency division respectively. The output of the counting unit is connected to the input of the digital state machine through switch T3; the output of the digital state machine is connected to the input of the voltage controlled oscillator and simultaneously controls the capacitor array and current array of the voltage controlled oscillator.

Description

A voltage-controlled oscillator circuit and adjustment method with synchronous and adaptive frequency and amplitude

Technical field

The invention belongs to the field of radio frequency integrated circuit design, and relates to a voltage-controlled oscillator circuit with synchronous adaptive frequency and amplitude and an adjustment method.

Background technique

Phase-Locked Loop (PLL) is a frequency synthesizer, which is mainly a negative feedback control system that can generate a target frequency. The phase-locked loop has many functions. It can be mainly used in frequency synthesis and exchange of frequency multiplication and frequency division; it can generate some high-frequency output signals as a frequency synthesizer. In recent years, it has even been widely used in biophysics, fluid mechanics, meteorology, atomic physics, oceanography, etc. Phase-locked loop, as a very important module inside the current SoC chip, is also developing towards higher accuracy and performance.

With the development of integrated circuits and the demand for higher clock frequency accuracy and higher performance within the chip, the application of phase-locked loops has gradually increased. The phase-locked loop has high-frequency phase-locked synthesis and good noise characteristics, so it has become a market Mainstream technical means of high-frequency synthesis. The voltage controlled oscillator (VCO) is the core device of the phase-locked loop. It determines the output frequency range of the phase-locked loop. The output frequency of the phase-locked loop is adjusted by changing the parameters of the VCO itself. In the case of different sub-bands, because As its own coefficient changes, its amplitude will change with frequency. Secondly, as the environment changes during operation, the output of the VCO may change to a certain extent, such as temperature changes, device aging and a series of non-ideal factors. When the change is small, the phase-locked loop can still work in the current sub-band. However, when the environment changes greatly, the phase-locked loop may need to change the sub-band, especially when low phase noise is required nowadays. As the value of Kvco gets lower and lower, the number of sub-bands increases, and band skipping is more likely to occur when the external environment changes. Therefore, how to reasonably adjust the output frequency of the voltage-controlled oscillator is also a problem.

Contents of the invention

In view of this, the object of the present invention is to provide a voltage-controlled oscillator circuit and an adjustment method with synchronous adaptive frequency and amplitude, in which the amplitude can adaptively change with the frequency, so that the frequency and amplitude can maintain synchronous adaptive changes; and this The circuit uses the same set of digital state machines to reasonably adjust the output frequency of the voltage-controlled oscillator in two states: the open-loop coarse adjustment state and the closed-loop fine adjustment state.

In order to achieve the above objects, the present invention provides the following technical solutions:

Scheme 1, a frequency and amplitude synchronous adaptive voltage-controlled oscillator circuit, which includes a frequency phase detector, a charge pump, a voltage-controlled oscillator, a loop filter, a frequency divider, a counting unit, a comparison unit and Digital state machine. Among them, the frequency and phase detector, charge pump, loop filter, voltage controlled oscillator and frequency divider are connected in sequence. The output of the frequency divider is also connected to the input of the frequency and phase detector, and in the loop filter There is a switch T2 between the output end of the voltage controlled oscillator and the input end of the voltage controlled oscillator; the input end of the comparison unit is connected to the output end of the loop filter through a single pole double throw switch T1, and the output end of the comparison unit is connected to the digital state machine The input terminal is connected; the input terminal of the counting unit is connected to the reference frequency and the feedback frequency of the frequency divider output respectively. The output terminal of the counting unit is connected to the input terminal of the digital state machine through switch T3; the output terminal of the digital state machine is connected to the voltage controlled oscillation Connect the input terminal of the transmitter.

Among them, the voltage controlled oscillator includes VCO core circuit, capacitor array unit and current array unit. The output end of the digital state machine is connected to the capacitor array unit and the current array unit respectively, and the capacitor array unit and the current array unit are connected to the VCO core circuit respectively.

The sub-band of the voltage-controlled oscillator is controlled by selecting the capacitor array unit, and the output amplitude of the voltage-controlled oscillator is changed by selecting the current array unit to control the tail current of the voltage-controlled oscillator. The capacitor array unit and the current array unit use the same set of digital states. The control signal output by the machine is controlled simultaneously to achieve synchronous adaptation of frequency and amplitude.

Optionally, the comparison unit includes adjustable resistors R1 and R2, resistor R3, and comparators COMP1 and COMP2; the adjustable resistor R1, the resistor R3, and the adjustable resistor R2 are connected in sequence, and the adjustable resistor R1 is connected to the power supply V _DD . The adjustable resistor R2 is connected to ground; the non-inverting input terminal of the comparator COMP1 is connected between the adjustable resistor R2 and the resistor R3; the inverting input terminal of the comparator COMP2 is connected between the adjustable resistor R1 and the resistor R3; the inverting input terminal of COMP1 terminal and the positive input terminal of COMP2 are both connected to the voltage signal Vctrl output by the loop filter. The reference voltage values of the two comparators can be changed by adjusting the resistance values of the adjustable resistors R1 and R2. Specifically, R1 can change the voltage value VH of the inverting input terminal of comparator COMP2, and R2 can change the voltage value of the forward input terminal of comparator COMP1. VL.

Optionally, the counting unit includes two counters, the first counter input end of which is connected to the reference frequency Fref, the second counter input end is connected to the feedback frequency Ffb of the frequency divider, and the output ends of the first counter and the second counter both pass Switch T3 is connected to the digital state machine. Both counters have CRL clear bits. When one of the counters is full, it automatically returns to the initial counting value, and outputs a signal to clear the other counter back to the initial counting value.

Optionally, the fixed end of the single-pole double-throw switch T1 is connected to the input end of the voltage-controlled oscillator, and the active end is connected to the power supply VDD and the input end of the comparison unit respectively.

Option 2: A frequency and amplitude synchronous adaptive adjustment method. This method first makes the frequency output by the VCO core circuit in the voltage controlled oscillator enter the target frequency sub-band range through open-loop coarse adjustment, and then selects the target frequency through closed-loop fine adjustment. The most suitable sub-band in the sub-band range; both the open-loop coarse adjustment and the closed-loop fine adjustment stages use the same digital state machine, and the state changes of the digital state machine can act on the two adjustment stages.

In the open-loop coarse adjustment stage, the feedback frequency Ffb of the frequency divider is compared with the reference frequency Fref through the counting unit. If Fref>Ffb, the output signal makes the digital state machine state -1, thereby making the capacitor array unit in the voltage controlled oscillator and The current array unit reduces the capacitance and current source connected to the VCO core circuit; if Fref<Ffb, it enters the closed-loop fine-tuning stage;

In the closed-loop fine-tuning stage, the comparison unit compares the voltage signal Vctrl output by the loop filter with the preset voltage values VH and VL. If Vctrl>VH, the output signal will make the digital state machine state -1, thereby increasing Ffb. ; If Vctrl<VL, the output signal will make the digital state machine state +1, thereby reducing Ffb; if VL<Vctrl<VH, the adjustment process will end.

Among them, at the beginning of the open-loop coarse adjustment phase, the single-pole double-throw switch T1 is connected to the power supply VDD, the switch T2 is opened, the switch T3 is closed, and the initial digits of the digital state machine are all 1; when entering the closed-loop fine-tuning phase, the single-pole double-throw switch is T1 causes the loop filter to output the voltage signal Vctrl to the comparison unit, switch T2 is closed, and switch T3 is opened.

The initial digits of the digital state machine are all 1, which can be expressed as 11...11. It performs +1 and -1 according to the input. When the input signal -1 is detected, it changes from 11...11 to 11...10; when the input signal + is detected After 1, it changes from 11...11 to 00...00, and so on. The capacitor array and the current array are controlled by the same set of control signals K<N:0> from the digital state machine. The switches of the capacitor array and the current array correspond to the signals of the digital state machine, and the corresponding switches are turned on and off at the same time. For example, 11...11 of the digital state machine corresponds to all switches of the capacitor array and current array being closed, and all capacitors and current sources in the capacitor array and current array are connected to the VCO core circuit; 00...00 of the digital state machine corresponds to the capacitor array and current array switches are all open; 10...01 of the digital state machine corresponds to K1 and Kn of the capacitor array and current array being closed, and all others are open.

The beneficial effects of the present invention are: the frequency and amplitude synchronous adaptive voltage-controlled oscillator circuit proposed by the present invention performs a rough selection of appropriate sub-bands through the open-loop coarse adjustment stage; the closed-loop fine adjustment stage performs more detailed adjustments, and Always detect whether the output frequency is in the appropriate sub-band, and the two states share a digital state machine. Closed-loop fine tuning can automatically adjust sub-bands according to changes in non-ideal factors, which means it has frequency adaptability; at the same time, the output amplitude changes synchronously with the adaptive changes as the sub-bands change, so that the output amplitude can be ensured to be appropriate. Reduce the power consumption of the voltage controlled oscillator.

Other advantages, objects, and features of the present invention will, to the extent that they are set forth in the description that follows, and to the extent that they will become apparent to those skilled in the art upon examination of the following, or may be derived from This invention is taught by practicing it. The objects and other advantages of the invention may be realized and obtained by the following description.

Description of the drawings

In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be described in detail below in conjunction with the accompanying drawings, in which:

Figure 1 is a voltage-controlled oscillator circuit with frequency and amplitude synchronization and adaptive adaptation proposed by an embodiment of the present invention;

Figure 2 is a schematic diagram of sub-bands;

Figure 3 is a digital state machine flow chart;

Figure 4 is the VCO core circuit structure diagram;

Figure 5 is a simplified diagram of the capacitor array structure;

Figure 6 is a schematic diagram of the capacitor array structure;

Figure 7 is a schematic diagram of the current array structure;

Figure 8 is a schematic structural diagram of the counting unit;

Figure 9 is a schematic diagram of the structure of the comparison unit;

Figure 10 is a schematic diagram of the circuit operation flow.

Detailed ways

The following describes the embodiments of the present invention through specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments only illustrate the basic concept of the present invention in a schematic manner. The following embodiments and the features in the embodiments can be combined with each other as long as there is no conflict.

The drawings are only for illustrative purposes, and represent only schematic diagrams rather than actual drawings, which cannot be understood as limitations of the present invention. In order to better illustrate the embodiments of the present invention, some components of the drawings will be omitted. The enlargement or reduction does not represent the size of the actual product; it is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

In the drawings of the embodiments of the present invention, the same or similar numbers correspond to the same or similar components; in the description of the present invention, it should be understood that if there are terms "upper", "lower", "left" and "right" The orientation or positional relationship indicated by "front", "rear", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must be It has a specific orientation and is constructed and operated in a specific orientation. Therefore, the terms describing the positional relationships in the drawings are only for illustrative purposes and cannot be understood as limitations of the present invention. For those of ordinary skill in the art, they can determine the specific position according to the specific orientation. Understand the specific meaning of the above terms.

As shown in Figure 1, an embodiment of the present invention provides a frequency and amplitude synchronous adaptive voltage controlled oscillator circuit. The circuit includes a phase frequency detector (PFD), a charge pump (CP), and a voltage controlled oscillator. (VCO), loop filter (LPF), frequency divider, counting unit, comparison unit and digital state machine. The voltage controlled oscillator is composed of a capacitor array unit, a current array unit and a VCO core circuit. The sub-band of the voltage controlled oscillator is controlled by selecting the capacitor array unit, and the tail current of the voltage controlled oscillator is controlled by selecting the current array unit. The entire circuit works in two stages: open-loop coarse adjustment and closed-loop fine adjustment. In the open-loop stage, the voltage-controlled oscillator, frequency divider, counting unit and digital state machine are the main circuits to allow the target frequency to enter the sub-band range; in the closed-loop stage The frequency detector, charge pump, voltage controlled oscillator, loop filter, frequency divider, comparison unit and digital state machine are the main circuits, and the phase locked loop enters the working stage for fine adjustment.

Among them, the comparison unit is shown in Figure 9, which includes adjustable resistors R1 and R2, resistor R3, and comparators 1 and 2; wherein the adjustable resistor R1, the resistor R3, and the adjustable resistor R2 are connected in sequence, and the adjustable resistor R1 The power supply V _DD is connected, and the adjustable resistor R2 is connected to ground; the non-inverting input end of comparator 1 is connected between the adjustable resistor R2 and the resistor R3; the inverting input end of the comparator 2 is connected between the adjustable resistor R1 and the resistor R3. time; the inverting input terminal of comparator 1 and the positive input terminal of comparator 2 are both connected to the voltage signal Vctrl output by the loop filter. The reference voltage values of the two comparators can be changed by adjusting the resistance values of the adjustable resistors R1 and R2. Specifically, R1 can change the voltage value VH of the inverting input terminal of comparator 2, and R2 can change the voltage value of the forward input terminal of comparator 1. VL.

The counting unit is shown in Figure 8. It includes two counters. The input terminal of counter 1 is connected to the reference frequency Fref, and the input terminal of counter 2 is connected to the feedback frequency Ffb of the frequency divider. The output terminals of counter 1 and counter 2 are both connected through switches. T3 is connected to the digital state machine. Both counters have CRL clear bits. When one of the counters is full, it automatically returns to the initial counting value, and outputs a signal to clear the other counter back to the initial counting value.

The voltage controlled oscillator includes the VCO core circuit (shown in Figure 4), capacitor array unit (shown in Figures 5 and 6) and current array unit (shown in Figure 7). The capacitor array unit and the current array unit are respectively connected to the VCO core circuit. The sub-band of the voltage controlled oscillator is controlled by selecting the capacitor array unit, and the tail current of the voltage controlled oscillator is controlled by selecting the current array unit.

Closed-loop fine-tuning requires the phase-locked loop to stabilize each time before changing. This process takes more time and the frequency control time is longer. T _afc is the adaptive frequency control time, T _lock is the lock time of the PLL loop after each sub-band adjustment, and N is the number of sub-band adjustments. Every time the digital state machine generates a new output, the sub-band must be changed, and the PLL must undergo a locking process. The total time spent is:

T _afc =T _lock ·N

Considering that the digital state machine is used not only in the open-loop coarse adjustment stage, but also in the closed-loop fine adjustment stage, the dichotomous digital state machine cannot directly jump to adjacent sub-bands at some positions, which is not consistent with the closed-loop fine adjustment circuit. The operation changes, so the present invention does not use the dichotomy method to speed up the open-loop coarse adjustment stage.

The output amplitude of the voltage controlled oscillator is proportional to the bias tail current and equivalent parallel resistance and can be expressed as:

V _OUT =I _SS · _RP

Among them, I _SS represents the tail current of the voltage-controlled oscillator, and its value is mirrored by the current array. R _P is the equivalent parallel resistance size of the VCO, and R _P ∝QwL, where Q is the quality factor of the resonant circuit, w is the output angular frequency, and L is the size of the inductor. The inductor L generally cannot be changed after the circuit is manufactured. w is the corresponding output angular vibration frequency. Q is determined by the inductor and capacitor together and increases with the increase of w, so R _P increases with the increase of the oscillation frequency. At the VCO output As the frequency increases, the output amplitude also continues to increase, causing the output voltage V _OUT to continuously decrease at a fixed _ISS or even causing the circuit to fail to oscillate. However, you can choose to adjust the tail current to compensate for the output amplitude as the output frequency continues to decrease.

The voltage controlled oscillator circuit proposed in this embodiment has two working states, an open-loop coarse adjustment stage and a closed-loop fine adjustment stage.

The open-loop coarse adjustment is to allow the VCO output frequency to enter the target frequency sub-band range, paving the way for subsequent fine adjustments and saving time for fine adjustments. The output frequency of the voltage controlled oscillator can be adjusted by changing the size of the inductor, the size of the capacitor, or changing the number of connections in the capacitor array. However, usually the inductor cannot be changed after it is made during the manufacturing process, so it can only be changed by changing the number of connections in the capacitor array. to make rough adjustments. When the feedback frequency is greater than the reference frequency, the coarse adjustment is completed. At this time, counter 2 completes counting before counter 1. In order to ensure that the target frequency is in the corresponding sub-band, counter 2 and counter 1 count simultaneously. Counter 2 reflects the size of the feedback frequency, and counter 1 reflects the size of the reference frequency. When the feedback frequency is greater than the reference frequency, the target frequency can be considered Located in the sub-band at this time, the target frequency generally has corresponding points in multiple sub-bands, so it is necessary to enter the fine-tuning stage to select the most appropriate sub-band. After selecting a suitable sub-band, due to the addition of the capacitor array, the overall Q value of the voltage controlled oscillator changes. The more capacitor arrays are opened, the more serious the Q value decreases, which will cause the voltage controlled oscillator to fail. If the vibration or amplitude is too small, you can change the Q value of the inductor, increase the gm value of the cross-coupling tube, and increase the size of the tail current. However, the cross-coupling tube and inductor are generally fixed and cannot be changed during the manufacturing process. The magnitude of the tail current can only be adjusted to change the amplitude of the VCO output.

After the coarse adjustment, the fine adjustment stage is entered. In the fine adjustment stage, the most appropriate frequency band is selected from a series of sub-bands including the target frequency. The size of Vctrl can be used to determine whether the selected sub-band is the most appropriate sub-band. In the most suitable sub-band, Vctrl is in the middle part of this sub-band. When it is in the middle, even if the frequency changes, it will not jump to the upper and lower frequency bands, causing a large change in the output. If Vctrl is at the boundary, it will cause the phase-locked loop to fluctuate under some non-ideal factors, causing the selected frequency band to no longer include the target frequency, resulting in loss of lock.

The specific adjustment process is shown in Figure 10, including:

First ensure that the target frequency is somewhere between the maximum and minimum output frequencies of the designed VCO.

Open loop coarse adjustment stage:

First, the T1 switch in Figure 1 is turned to 0 and connected to VDD, T3 is in the closed state, and T2 is in the open state. The digital state machine is in the 11...11 state. The digital state machine 11...11 control capacitor arrays are all connected to the VCO circuit, and the current arrays are all turned on. At this time, the circuit Q is the minimum condition, the VCO tail current is in the maximum state, and the VCO output frequency is at sub The maximum value corresponding to frequency band 11...11, the output amplitude V _OUT =I _SS · _RP , _ISS is at the maximum value, R _P is at the minimum value, and the output amplitude tends to remain unchanged.

If Fref>Ffb in the counting unit, it means that the output frequency of the voltage-controlled oscillator is less than the target frequency and the target frequency is not within this sub-band. Fref represents the reference frequency and Ffb represents the feedback frequency from the frequency divider. In the same period of time, counter 1 is full before counter 2, and outputs a potential signal to clear counter 2 and return to the initial state. At the same time, this potential signal is input to the -1 terminal of the digital state machine. At this time, the digital state machine changes from 11...11 To 11...10, the lowest bit of the output control capacitor array is not connected to the voltage controlled oscillator, the smallest branch of the control current array is disconnected, and the counter 1 automatically returns to the initial state after it is full. The digital changes of the digital state machine are shown in Figure 3.

If Fref<Ffb in the counting unit, it means that the output frequency of the voltage-controlled oscillator is greater than the target frequency, and the target frequency is within this sub-band. In the same period of time, counter 2 is full before counter 1, and outputs a potential signal to clear counter 1 and return to the initial state. After counter 2 is full, it automatically returns to the initial state. At this time, the T1 switch is turned to 1 to allow the comparison unit to To collect the loop filter, T2 is closed and T3 is opened. At this time, the phase-locked loop enters the closed-loop fine-tuning stage.

If Fref=Ffb, it means that the output frequency at this time is equal to the target frequency, and the target frequency is at the edge of this sub-band. In the same period of time, counter 2 and counter 1 should theoretically be filled up together, but due to the phase difference problem, there is still the problem of being filled up one after another. At this time, the circuit returns to the above two situations, so there will be no impact. At this time, Vctrl is at the edge of this sub-band. When Fref>Ffb, the corresponding position is also found in the next sub-band; when Fref<Ffb, the phase-locked loop enters the closed-loop fine-tuning stage. During the fine-tuning Stages also have changes in adjacent sub-bands.

Closed-loop fine-tuning stage:

The T1 switch is turned to end 1, and the loop filter is collected through the comparison unit. T2 is closed, T3 is opened, and the sub-band is temporarily fixed at a certain frequency band. The phase-locked loop works in a closed loop. The phase frequency detector controls the charge pump switch under the influence of the reference frequency and the target frequency. The current output by the charge pump passes through the loop filter to generate Vctrl. Vctrl is compared with the VH and VL of the comparison unit. VH and VL can be adjusted with an adjustable voltage reference, keeping VH > VL.

If Vctrl>VH, it means that Vctrl is relatively close to the upper edge of this sub-band. As shown at point A in Figure 2. At this time, the output of comparator 1 is low level, and the output level of comparator 2 is high level. The output level of comparator 2 controls the digital state machine-1. By changing the access situation of the capacitor array, the sub-band is changed, and the current array is changed at the same time. to keep the output amplitude constant. At this time, Vctrl is at point A2, the VCO output frequency is greater than the target frequency, and the charge pump begins to discharge until Vctrl reaches the A3 lock state.

If Vctrl<VL, it means that Vctrl is relatively close to the lower edge of this sub-band. As shown at point B in Figure 2. At this time, the output of comparator 1 is high level, and the output level of comparator 2 is low level. The output level of comparator 1 controls the digital state machine +1. By changing the access situation of the capacitor array, the sub-band is changed, and at the same time, the The size of the current array is used to keep the output amplitude constant. At this time, Vctrl is at point B2, the VCO output frequency is less than the target frequency, and the charge pump starts charging until Vctrl reaches the B2 lock state.

If VL<Vctrl<VH, it means that Vctrl is in the middle part of this sub-band at this time, as shown at point C in Figure 2. At this time, the output of comparator 1 is low level, the output of comparator 2 is low level, the digital state machine remains unchanged, and Vctrl is in a suitable state, indicating that this sub-band is the most suitable sub-band, and there is no need to change the sub-band, capacitance The array and current array remain unchanged and the phase locked loop is locked.

During the locking process, even if there is a drastic change in non-ideal factors that results in no corresponding output frequency in the current sub-band, due to the adaptability of this circuit, the circuit will re-lock to the target after a period of self-adjustment. frequency position and keep the output amplitude stable.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified. Modifications or equivalent substitutions without departing from the purpose and scope of the technical solution shall be included in the scope of the claims of the present invention.

Claims (6)

1. A frequency and amplitude synchronous adaptive voltage controlled oscillator circuit characterized by: the circuit comprises a phase frequency detector, a charge pump, a voltage controlled oscillator, a loop filter, a frequency divider, a counting unit, a comparing unit and a digital state machine; the phase frequency detector, the charge pump, the loop filter, the voltage-controlled oscillator and the frequency divider are sequentially connected, wherein the output end of the frequency divider is also connected with the input end of the phase frequency detector, and a switch T2 is arranged between the output end of the loop filter and the input end of the voltage-controlled oscillator; the input end of the comparison unit is connected with the output end of the loop filter through a single-pole double-throw switch T1, and the output end of the comparison unit is connected with the input end of the digital state machine; the input end of the counting unit is respectively connected with the reference frequency and the feedback frequency output by the frequency divider, and the output end of the counting unit is connected with the input end of the digital state machine through a switch T3;

the voltage-controlled oscillator comprises a VCO core circuit, a capacitor array unit and a current array unit; the output end of the digital state machine is respectively connected with the capacitor array unit and the current array unit, and the capacitor array unit and the current array unit are respectively connected with the VCO core circuit; the sub-band of the voltage-controlled oscillator is controlled by selecting the capacitor array unit, and the output amplitude of the voltage-controlled oscillator is changed by selecting the tail current of the voltage-controlled oscillator controlled by the current array unit; the capacitor array unit and the current array unit are controlled simultaneously by adopting control signals output by the same group of digital state machines, so that synchronous self-adaption of frequency and amplitude is realized.

2. The voltage controlled oscillator circuit of claim 1, wherein: the comparison unit comprises adjustable resistors R1 and R2, a resistor R3 and comparators COMP1 and COMP2; wherein the adjustable resistor R1, the resistor R3 and the adjustable resistor R2 are connected in sequence, and the adjustable resistor R1 is connected with a power supply V _DD The adjustable resistor R2 is grounded; the non-inverting input end of the comparator COMP1 is connected between the adjustable resistor R2 and the resistor R3; the inverting input end of the comparator COMP2 is connected between the adjustable resistor R1 and the resistor R3; both the inverting input terminal of COMP1 and the non-inverting input terminal of COMP2 are connected to the voltage signal Vctrl output by the loop filter.

3. The voltage controlled oscillator circuit of claim 1, wherein: the counting unit comprises two counters, wherein the input end of a first counter is connected with reference frequency Fref, the input end of a second counter is connected with feedback frequency Ffb of the frequency divider, and the output ends of the first counter and the second counter are connected with the digital state machine through a switch T3.

4. The voltage controlled oscillator circuit of claim 1, wherein: the fixed end of the single-pole double-throw switch T1 is connected with the input end of the voltage-controlled oscillator, and the movable end of the single-pole double-throw switch T1 is respectively connected with the power supply VDD and the input end of the comparison unit.

5. The frequency and amplitude synchronous self-adaptive adjustment method based on the voltage-controlled oscillator circuit as claimed in any one of claims 1 to 4, characterized in that: the method comprises the steps of enabling the frequency output by a VCO core circuit in a voltage-controlled oscillator to enter a target frequency sub-band range through open-loop coarse adjustment, and selecting the most suitable sub-band in the target frequency sub-band range through closed-loop fine adjustment; the same digital state machine is used in both the open-loop coarse adjustment phase and the closed-loop fine adjustment phase, and the state change of the digital state machine can be applied to the two adjustment phases;

in the open-loop rough adjustment stage, comparing the feedback frequency Ffb of the frequency divider with the reference frequency Fref through the counting unit, and outputting a signal to enable the digital state machine to be in a state of-1 if Fref > Ffb, so that the capacitance array unit and the current array unit in the voltage-controlled oscillator reduce the capacitance and the current source connected into the VCO core circuit; if Fref < Ffb, entering a closed loop fine tuning stage;

in the closed loop fine tuning stage, comparing the magnitude of the voltage signal Vctrl output by the loop filter with the magnitude of the reference voltages VH and VL by a comparison unit, and outputting a signal to enable a digital state machine to be in a state of-1 if Vctrl > VH so as to increase Ffb; if Vctrl < VL, then the output signal causes the digital state machine state +1, thereby causing Ffb to decrease; if VL < Vctrl < VH, the adjustment process ends.

6. The adjustment method according to claim 5, characterized in that: when the open-loop rough adjustment stage starts, a single-pole double-throw switch T1 is connected to a power supply VDD, a switch T2 is opened, a switch T3 is closed, the initial digits of a digital state machine are all 1, and a capacitor array unit and a current array unit in a voltage-controlled oscillator are connected to a VCO circuit; when the closed loop fine tuning stage is entered, the loop filter outputs a voltage signal Vctrl to the comparing unit through a single pole double throw switch T1, the switch T2 is closed, and the switch T3 is opened.