CN117672158A - DP output circuit and device for charging interface - Google Patents
DP output circuit and device for charging interface Download PDFInfo
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Abstract
The invention relates to the technical field of intelligent hardware, in particular to a DP output circuit and a device for realizing a charging interface, wherein the circuit comprises: the DP marker bit detection module, the controller and the DP change-over switch; the DP zone bit detection module is used for transmitting signals corresponding to the DP zone bit of the charging interface to the controller when the charging interface is connected to the DP display; the controller is used for transmitting a DP switching signal to the DP switching switch according to the signal corresponding to the DP flag bit; the DP change-over switch is used for conducting a passage between the CPU and the corresponding charging interface according to the DP change-over signal, so that the CPU outputs DP data to the corresponding charging interface through a single interface, and the CPU outputs DP data to the corresponding charging interface through the single interface, thereby reducing the occupancy rate of the CPU in the aspect of realizing multi-interface DP output and further reducing the overall cost performance.
Description
Technical Field
The invention relates to the technical field of intelligent hardware, in particular to a DP output circuit and a device for realizing a charging interface.
Background
Currently, with the increasing popularity and demand of multi-display configurations in the marketplace, ARM architecture CPUs face some challenges in dual DP output. Traditionally, the CPU design of the ARM architecture typically only contains one DP output interface, which no longer meets the market demand for connecting two displays simultaneously.
To meet the consumer multi-display demand, one common solution is to use a conversion IC to convert to DP output through DSIMIPI (Display Serial Interface Mobile Industry Processor Interface). However, this solution increases the hardware cost and increases the CPU occupancy due to the need for signal conversion, thus reducing the overall cost performance.
Disclosure of Invention
The invention mainly aims to provide a circuit and a device for realizing DP output by a charging interface, which aim to solve the technical problems that the CPU of an ARM architecture has high hardware cost in the aspect of realizing multi-DP output in the prior art, and the occupancy rate of the CPU is increased due to the need of signal conversion, so that the overall cost performance is reduced.
To achieve the above object, the present invention provides a charging interface implementing DP output circuit, the circuit comprising: the DP marker bit detection module, the controller and the DP change-over switch;
the DP zone bit detection module is respectively connected with a charging interface and a controller, the controller is connected with the DP change-over switch, the DP change-over switch is respectively connected with the CPU and the charging interface, and the number of the charging interfaces is at least two;
the DP zone bit detection module is used for transmitting signals corresponding to the DP zone bit of the charging interface to the controller when the charging interface is connected to the DP display;
the controller is used for transmitting a DP switching signal to the DP switching switch according to the signal corresponding to the DP flag bit;
the DP switching switch is used for conducting a passage between the CPU and the corresponding charging interface according to the DP switching signal so that the CPU outputs DP data to the corresponding charging interface through a single interface.
Optionally, the circuit further comprises: a channel selection module;
the channel selection module is respectively connected with the charging interface, the DP zone bit detection module and the DP change-over switch;
the DP zone bit detection module is further used for sending a DP channel switching signal to the channel selection module when the charging interface is connected to a DP display;
and the channel selection module is used for switching to a DP channel to transmit the DP data output by the CPU to the charging interface when the DP channel switching signal is received.
Optionally, the channel selection module is further connected with the CPU;
the DP zone bit detection module is further used for sending a USB channel switching signal to the channel selection module when the charging interface is connected with a USB device;
the channel selection module is further configured to switch to a USB channel to transmit USB data output by the CPU to the charging interface when the USB channel switching signal is received.
Optionally, the controller is further connected with the DP switch;
the controller is further configured to send a default channel signal to the DP switch when the charging interface is not connected to the DP display;
and the DP change-over switch is also used for selecting a default channel and outputting a low-level signal to the CPU when the default channel signal is received, so that the CPU stops outputting DP data to the DP change-over switch.
Optionally, the DP switch is further configured to output a high level signal to the CPU when the default channel detects that the DP display is connected, so that the CPU outputs DP data to the DP switch.
Optionally, the controller is further configured to output a path switching signal to the DP switch according to the DP flag bit when the non-default channel detects that the DP display is accessed;
the DP switch is further configured to switch to the non-default channel and output a high-level signal to the CPU when the channel switching signal is received, so that the CPU outputs DP data to the DP switch.
Optionally, the controller is further configured to, when the charging interface accesses the multiple DP displays sequentially, select, according to the DP flag bit, a channel corresponding to the DP display that is preferentially accessed to conduct the channel.
Optionally, the controller is further configured to switch to a path corresponding to another DP display according to the existing DP flag bit when the charging interface has two DP displays at the same time and pulls out the DP display currently displayed.
Optionally, the DP flag bit detection module is further configured to send a signal corresponding to a USB device type to the controller when the charging interface is connected to the USB device.
In addition, in order to achieve the above purpose, the invention also provides a device for realizing the DP output by the charging interface, wherein the device for realizing the DP output by the charging interface comprises the circuit for realizing the DP output by the charging interface.
The DP output circuit realized by the charging interface in the invention comprises: the DP marker bit detection module, the controller and the DP change-over switch; the DP zone bit detection module is respectively connected with a charging interface and a controller, the controller is connected with the DP change-over switch, the DP change-over switch is respectively connected with the CPU and the charging interface, and the number of the charging interfaces is at least two; the DP zone bit detection module is used for transmitting signals corresponding to the DP zone bit of the charging interface to the controller when the charging interface is connected to the DP display; the controller is used for transmitting a DP switching signal to the DP switching switch according to the signal corresponding to the DP flag bit; the DP switching switch is used for conducting a passage between the CPU and the corresponding charging interface according to the DP switching signal so that the CPU outputs DP data to the corresponding charging interface through a single interface. According to the invention, the signal corresponding to the DP zone bit of the charging interface is transmitted to the controller through the DP zone bit detection module, so that the controller controls the DP change-over switch to conduct the passage between the CPU and the corresponding charging interface, and the CPU outputs DP data to the corresponding charging interface through a single interface, so that the occupancy rate of the CPU is reduced in the aspect of realizing multi-interface DP output, and the overall cost performance is reduced.
Drawings
FIG. 1 is a schematic diagram of a first embodiment of a DP output circuit implemented by a charging interface according to the present invention;
FIG. 2 is a schematic diagram of a second embodiment of a DP output circuit implemented by a charging interface according to the present invention;
reference numerals illustrate:
the achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that, if directional indications (such as up, down, left, right, front, and rear … …) are included in the embodiments of the present invention, the directional indications are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.
In addition, if there is a description of "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present invention.
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the invention.
The embodiment of the invention provides a DP output circuit realized by a charging interface, and referring to FIG. 1, FIG. 1 is a block diagram of a first embodiment of the DP output circuit realized by the charging interface. The invention discloses a DP output circuit realized by a charging interface, which comprises the following components: the DP marker bit detection module 10, the controller 20 and the DP change-over switch 30;
the DP flag bit detection module 10 is connected with a charging interface and the controller 20, the controller 20 is connected with the DP switch 30, the DP switch 30 is connected with the CPU and the charging interface, and the number of the charging interfaces is at least two;
the DP flag bit detecting module 10 is configured to transmit a signal corresponding to a DP flag bit of the charging interface to the controller 20 when the charging interface is connected to a DP display;
the controller 20 is configured to send a DP switching signal to the DP switch 30 according to the signal corresponding to the DP flag bit;
the DP switch 30 is configured to switch on a path between the CPU and the corresponding charging interface according to the DP switch signal, so that the CPU outputs DP data to the corresponding charging interface through a single interface.
It should be noted that, the DP flag bit detecting module 10 is configured to transmit a signal of the DP flag bit corresponding to the charging interface to the controller 20 when the charging interface is connected to the DP display. The controller 20 sends a DP switching signal to the DP switch 30 according to the received DP flag bit signal. The DP switch 30 turns on the path between the CPU and the corresponding charging interface according to the DP switching signal, so that the CPU outputs DP data to the corresponding charging interface through the single interface.
It should be understood that by detecting the DP flag bit signal of the charging interface and by the cooperation of the controller 20 and the DP switch 30, the CPU outputs DP data to the corresponding charging interface through a single interface. Thus, a user can be connected with a plurality of DP displays through a plurality of charging interfaces, and the DP output function is realized by using the charging interfaces. The charge interface realizes the DP output circuit scheme and is characterized in that the charge interface simply and efficiently realizes the dual functions, so that a user can conveniently utilize the charge interface to realize the DP data output to the DP display without increasing the cost of additional hardware.
It should be understood that there are at least two charging interfaces, and accordingly, the number of the DP flag bit detecting modules 10 may correspond to the number of the charging interfaces, and each of the DP flag bits is used to detect the DP flag bit of each charging interface, and send an electrical signal corresponding to the DP flag bit to the controller 20. Referring to fig. 1, fig. 1 includes two charging interfaces and two corresponding DP flag bit detection modules 10, it should be understood that the two charging interfaces and the two corresponding DP flag bit detection modules 10 in fig. 1 are not limited to this embodiment, and a plurality of charging interfaces and a plurality of corresponding DP flag bit detection modules 10 may also be included in this embodiment, and the two charging interfaces and the two corresponding DP flag bit detection modules 10 are used to describe this embodiment.
It should be noted that, the corresponding relationship of the circuit between the CPU and the corresponding charging interface by the controller 20 controlling the DP switch 30 to turn on according to the signal corresponding to the DP flag bit may be referred to the following table 1.
TABLE 1
The first charging interface and the second charging interface in table 1 may correspond to the two charging interfaces in fig. 1, respectively, in table 1, the DP flag bit "1" represents that the DP display is connected, the DP flag bit "0" represents that the DP display is not connected, the DP flag bit "0-1" represents that the DP display is connected from the DP display to the DP display, the DP flag bit "1-0" represents that the DP display is connected to the DP display, the loop "C1" between the CPU and the charging interface represents the loop between the CPU and the first charging interface, the loop "C2" between the CPU and the charging interface represents the loop between the CPU and the second charging interface, for example, the DP flag bit detection module 10 indicates that the DP display is connected to the first charging interface when the DP flag bit of the first charging interface is detected as "0-1", and the DP flag bit of the second charging interface is detected as "0", the DP display is not connected to the DP display, and the controller 20 controls the switch 30 to switch on the loop between the CPU and the first charging interface to enable the first charging interface to output the DP data to the first charging interface. For example, the DP flag detection module 10 indicates that the DP display is connected to the first charging interface when detecting that the DP flag of the first charging interface is "1", and indicates that the DP display is connected to the second charging interface when detecting that the DP flag of the second charging interface is "0-1", and the controller 20 preferably controls the DP switch 30 to switch on the loop between the CPU and the first charging interface and to switch off the loop between the CPU and the second charging interface, so that the CPU outputs DP data to the DP display connected to the first charging interface.
The controller 20 controls the DP change-over switch 30 to conduct a loop between the CPU and the corresponding charging interface according to the DP flag bit, so that the CPU outputs DP data to the corresponding charging interface, the CPU outputs the DP data to the corresponding charging interface through a single interface, the occupancy rate of an output port of the CPU is reduced, the DP data is output through the charging interface, the hardware cost is saved, and the multifunctional use of the charging interface is realized.
It should be understood that the charging interface may be a TYPE C interface, which may be connected to the charging adapter for charging, or may be connected to the DP display for DP data display. The DP flag bit detection module 10 may be a chip with a model PD ANX7411, which may be used to detect a DP flag bit of a TYPE C interface, for example. The controller 20 may be an electronic control chip of the type KB 9028Q. The DP switch 30 may be a DP switch chip of the type ASW 3642.
The DP output circuit implemented by the charging interface in this embodiment includes: the DP marker bit detection module 10, the controller 20 and the DP change-over switch 30; the DP flag bit detection module 10 is connected with a charging interface and the controller 20, the controller 20 is connected with the DP switch 30, the DP switch 30 is connected with the CPU and the charging interface, and the number of the charging interfaces is at least two; the DP flag bit detecting module 10 is configured to transmit a signal corresponding to a DP flag bit of the charging interface to the controller 20 when the charging interface is connected to a DP display; the controller 20 is configured to send a DP switching signal to the DP switch 30 according to the signal corresponding to the DP flag bit; the DP switch 30 is configured to switch on a path between the CPU and the corresponding charging interface according to the DP switch signal, so that the CPU outputs DP data to the corresponding charging interface through a single interface. In this embodiment, the DP flag bit detection module 10 transmits the signal corresponding to the DP flag bit of the charging interface to the controller 20, so that the controller 20 controls the DP switch 30 to conduct the path between the CPU and the corresponding charging interface, thereby enabling the CPU to output DP data to the corresponding charging interface through a single interface, reducing the occupancy rate of the CPU in the aspect of implementing multi-interface DP output, and reducing the overall cost performance.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a second embodiment of a DP output circuit implemented by the charging interface according to the present invention; based on the first embodiment described above, a second embodiment of the present invention is proposed in which the charging interface implements a DP output circuit.
In this embodiment, the circuit further includes: a channel selection module 40;
the channel selection module 40 is respectively connected with the charging interface, the DP flag bit detection module 10 and the DP switch 30;
the DP flag bit detecting module 10 is further configured to send a DP channel switching signal to the channel selecting module 40 when the charging interface is connected to a DP display;
the channel selection module 40 is configured to switch to a DP channel to transmit DP data output by the CPU to the charging interface when the DP channel switching signal is received.
It should be noted that, the number of the channel selection modules 40 may correspond to the number of the charging interfaces, and the channel selection modules 40 are respectively connected to the charging interfaces, the DP flag bit detection module 10 and the DP switch 30. Meanwhile, the DP flag bit detection module 10 also sends a DP channel switching signal to the channel selection module 40 when the charging interface is connected to the DP display. The channel selection module 40 switches to the DP channel according to the received DP channel switching signal, so as to transmit the DP data outputted by the CPU to the charging interface.
It can be appreciated that the channel selection module 40 can automatically switch to the DP channel when the charging interface is connected to the DP display, so as to ensure that the DP data output by the CPU can be transmitted to the charging interface through the correct channel.
It should be understood that, the channel selection module 40 may be a chip with a model number of ANX 7413, and when the DP flag bit detection module 10 is a chip with a model number of PD ANX7411, the DP channel switching signal may be sent to the ANX7443 chip through the I2C pin, so that the ANX7443 chip switches to the DP channel.
Further, in the present embodiment, the channel selection module 40 is also connected to the CPU;
the DP flag bit detection module 10 is further configured to send a USB channel switching signal to the channel selection module 40 when the charging interface is connected to a USB device;
the channel selection module 40 is further configured to switch to a USB channel to transmit the USB data output by the CPU to the charging interface when the USB channel switching signal is received.
It should be noted that, the channel selection module 40 can implement the switching of the USB channel in addition to the switching of the DP channel. This means that the channel selection module 40 is provided with the capability of selecting and switching different signal channels to ensure correct signal transmission. By matching with the CPU and the DP flag bit detection module 10, the channel selection module 40 may automatically switch to a corresponding channel according to the type of the accessed device, and transmit corresponding data to the charging interface.
It should be understood that the channel selection module 40 is designed such that the charging interface can implement a DP output function, and also can be connected to a USB device for data transmission. The user can enjoy the connection of the DP output of a plurality of displays and the USB equipment, and realize the charging function through the charging interface. The design ensures that the charging interface has more functions and flexibility, and meets the requirements of users on the multifunctional interface.
Further, in the present embodiment, the controller 20 is further connected to the DP switching switch 30;
the controller 20 is further configured to send a default channel signal to the DP switch 30 when the charging interface is not connected to the DP display;
the DP switch 30 is further configured to select a default channel and output a low level signal to the CPU when the default channel signal is received, so that the CPU stops outputting DP data to the DP switch 30.
It should be noted that, referring to fig. 2, the controller 20 may be connected to the DP switch 30 through the EC SEL pin, and when the charging interface is not connected to the DP display, the controller 20 may send a default channel signal to the DP switch 30, so as to ensure that the default channel is selected and prevent the CPU from outputting DP data. This can prevent unnecessary DP data output and interference without connecting the DP display. By this mechanism, the controller 20 acts as an active control node for the system, managing DP switching and selection of default channels. It can ensure that the appropriate channel is selected and the corresponding signal is transmitted according to the system state and the change of the access equipment. This allows the system to automatically detect and adapt to changes in the charging interface and device to provide a better user experience and functional flexibility.
Further, in this embodiment, the DP switch 30 is further configured to output a high level signal to the CPU when the default channel detects that the DP display is connected, so that the CPU outputs DP data to the DP switch 30.
It should be noted that, in order to ensure that the CPU can correctly transmit DP data to the DP switch 30 when the DP display access is detected. By outputting a high level signal, the DP switch 30 notifies the CPU to start DP data output and ensures that data is transmitted on the correct channel. At the same time, the design can provide an automatic mechanism, and when the DP display is connected or disconnected, the system can automatically switch corresponding channels and process the transmission of DP data. Therefore, a user does not need to manually operate the change-over switch, the system can automatically adapt to different connection conditions, and more convenient use experience is provided.
It should be understood that the path does not change when the default channel DP display is inserted, and the HPD signal output from the DP switch 30 changes from low level to high level. Therefore, the paths are consistent, information such as external display identification data (AUX EDID) is not lost, and the DP display displays normally.
Further, in this embodiment, the controller 20 is further configured to output a path switching signal to the DP switch 30 according to the DP flag bit when the non-default channel detects that the DP display is connected;
the DP switch 30 is further configured to switch to the non-default channel and output a high level signal to the CPU when the path switch signal is received, so that the CPU outputs DP data to the DP switch 30.
It should be noted that, when the DP display on the non-default channel is detected to be accessed, the corresponding channel is automatically switched and the transmission of DP data is started. By the signal of the controller 20 and the response of the DP switch 30, the system is able to achieve automated switching and data transmission, providing a more convenient user experience.
It will be appreciated that in order to optimise the stability and compatibility of the DP display, the controller 20 may introduce a delay in switching the DP switch 30 to another path to ensure that operation is performed correctly. The delay is introduced in the switching process, so that the occurrence of potential signal interference and instability can be avoided. This ensures that the newly connected DP path can be correctly identified and initialized after the handover is completed, so as to achieve stable display.
Further, in this embodiment, the controller 20 is further configured to, when the charging interface is connected to the DP displays in sequence, select, according to the DP flag bit, a channel corresponding to the DP display that is connected in priority to be turned on.
It should be noted that, when multiple DP displays are sequentially connected to the charging interface, the controller 20 may detect the DP flag bit of each DP display. The DP flag bit may indicate a priority or other particular attribute of the display. Based on these flag bit information, the controller 20 may determine the DP display to access preferentially and turn on the corresponding channel accordingly.
It will be appreciated that this design ensures that when multiple DP displays are connected to the charging interface, the system is able to automatically select the priority display and correctly configure the channel to conduct to achieve the corresponding display setting. Priority control and corresponding path switching between the multiple DP displays may be achieved through judgment and selection by the controller 20.
Further, in this embodiment, the controller 20 is further configured to switch to a path corresponding to another DP display according to the existing DP flag bit when the charging interface has two DP displays at the same time and pulls out the currently displayed DP display.
It should be noted that, when the currently displayed DP display is pulled out, the controller 20 detects and reads the DP flag bit of the other DP display. The DP flag bit may indicate a priority or other particular attribute of the display. Based on these flag information, the controller 20 may decide to switch to another DP display and configure the path on accordingly. With this design, the system can automatically switch to another DP display to maintain display continuity and stability. The controller 20 makes decisions based on the DP flag bits and adjusts the channel conduction accordingly to ensure proper display output.
It will be appreciated that when two DP displays are present at the same time, the DP flag bit may be lost by the DP display being pulled out when the DP display that is not currently being displayed is pulled out, while the DP display being displayed is unaffected.
Further, in this embodiment, the DP flag bit detection module 10 is further configured to send a signal corresponding to a USB device type to the controller 20 when the charging interface is connected to the USB device.
It should be noted that, when the charging interface is connected to the USB device, the DP flag bit detection module 10 may detect the connection of the USB device and identify the type thereof. Depending on the type of USB device, such as a keyboard, mouse, memory device, etc., the DP flag bit detection module 10 may send a corresponding signal to the controller 20. By sending a signal corresponding to the USB device type to the controller 20, the controller 20 may perform corresponding configuration and operation according to the accessed USB device type. This enables different control strategies to be adopted according to different USB device types to provide display settings and functions appropriate for the device.
In order to achieve the above purpose, the present invention further provides a device for implementing DP output by using a charging interface, where the device for implementing DP output by using a charging interface includes a circuit for implementing DP output by using the charging interface as described above. The specific structure of the DP output circuit implemented by the charging interface refers to the above embodiment, and since the DP output device implemented by the charging interface adopts all the technical solutions of all the above embodiments, the DP output circuit at least has all the beneficial effects brought by the technical solutions of the above embodiments, which are not described in detail herein.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.
Claims (10)
1. A charging interface implementation DP output circuit, the circuit comprising: the DP marker bit detection module, the controller and the DP change-over switch;
the DP zone bit detection module is respectively connected with a charging interface and a controller, the controller is connected with the DP change-over switch, the DP change-over switch is respectively connected with the CPU and the charging interface, and the number of the charging interfaces is at least two;
the DP zone bit detection module is used for transmitting signals corresponding to the DP zone bit of the charging interface to the controller when the charging interface is connected to the DP display;
the controller is used for transmitting a DP switching signal to the DP switching switch according to the signal corresponding to the DP flag bit;
the DP switching switch is used for conducting a passage between the CPU and the corresponding charging interface according to the DP switching signal so that the CPU outputs DP data to the corresponding charging interface through a single interface.
2. The charging interface implementation DP output circuit of claim 1, wherein the circuit further comprises: a channel selection module;
the channel selection module is respectively connected with the charging interface, the DP zone bit detection module and the DP change-over switch;
the DP zone bit detection module is further used for sending a DP channel switching signal to the channel selection module when the charging interface is connected to a DP display;
and the channel selection module is used for switching to a DP channel to transmit the DP data output by the CPU to the charging interface when the DP channel switching signal is received.
3. The charging interface implementation DP output circuit of claim 2, wherein said channel selection module is further coupled to said CPU;
the DP zone bit detection module is further used for sending a USB channel switching signal to the channel selection module when the charging interface is connected with a USB device;
the channel selection module is further configured to switch to a USB channel to transmit USB data output by the CPU to the charging interface when the USB channel switching signal is received.
4. The charging interface implementation DP output circuit of claim 3 wherein said controller is further coupled to said DP switch;
the controller is further configured to send a default channel signal to the DP switch when the charging interface is not connected to the DP display;
and the DP change-over switch is also used for selecting a default channel and outputting a low-level signal to the CPU when the default channel signal is received, so that the CPU stops outputting DP data to the DP change-over switch.
5. The charging interface implementation DP output circuit of claim 4 wherein said DP switch is further configured to output a high signal to said CPU to cause said CPU to output DP data to said DP switch when said default channel detects DP display access.
6. The charging interface implementation DP output circuit of claim 5 wherein said controller is further configured to output a path switch signal to said DP switch based on said DP flag bit when a non-default channel detects a DP display access;
the DP switch is further configured to switch to the non-default channel and output a high-level signal to the CPU when the channel switching signal is received, so that the CPU outputs DP data to the DP switch.
7. The charging interface implementation DP output circuit of claim 6, wherein the controller is further configured to select a corresponding channel of a DP display to be preferentially accessed to be turned on according to the DP flag bit when the charging interface is sequentially accessed to a plurality of DP displays.
8. The charging interface implementation DP output circuit of claim 7, wherein the controller is further configured to switch to a corresponding path of another DP display according to the existing DP flag bit when the charging interface simultaneously has two DP displays and pulls out the currently displayed DP display.
9. The charging interface implementation DP output circuit of claim 3, wherein the DP flag bit detection module is further configured to send a signal corresponding to a USB device type to the controller when the charging interface is connected to the USB device.
10. A charging interface implementing DP output device, characterized in that the charging interface implementing DP output device includes the charging interface implementing DP output circuit according to any one of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311734818.1A CN117672158A (en) | 2023-12-15 | 2023-12-15 | DP output circuit and device for charging interface |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311734818.1A CN117672158A (en) | 2023-12-15 | 2023-12-15 | DP output circuit and device for charging interface |
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| CN117672158A true CN117672158A (en) | 2024-03-08 |
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| CN202311734818.1A Pending CN117672158A (en) | 2023-12-15 | 2023-12-15 | DP output circuit and device for charging interface |
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