CN117666921A

CN117666921A - Data processing method, accelerator and computing device

Info

Publication number: CN117666921A
Application number: CN202211017087.4A
Authority: CN
Inventors: 毛修斌; 何泽耀
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2022-08-23
Filing date: 2022-08-23
Publication date: 2024-03-08
Also published as: WO2024041140A1

Abstract

A data processing method, an accelerator and a computing device relate to the technical field of computers. The method is applied to a computing device supporting key-value KV service, wherein the computing device comprises an accelerator and a processor, and comprises the following steps: the accelerator acquires a KV operation request, determines an execution mode according to the KV operation request, wherein the execution mode comprises an unloading mode and a non-unloading mode, and then executes the processing of the KV operation request according to the execution mode. Thus, the KV operation request is unloaded to the accelerator to finish, and the data surface processing within the unloading capacity range completely bypasses the CPU, so that the throughput of the system can be improved, and the occupation of the CPU can be reduced.

Description

Data processing method, accelerator and computing device

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to a data processing method, an accelerator, and a computing device.

Background

With the continuous development of the distributed storage technology, the distributed storage technology is widely used for storing data in the scenes of databases, big data, high-performance computing (high performance computing, HPC), artificial intelligence (artificial intelligence) and the like so as to support better expansibility and improve resource utilization.

In distributed storage, data is stored scattered to multiple nodes and cross-node access to the data is achieved through a high-performance network. In addition to using a more general tree structure, the management and indexing of data/metadata may organize local key data, such as hot spot data, using a Key Value (KV) data structure, thereby achieving lower query latency and higher concurrency. The application mode of the nonvolatile storage medium as the memory makes it possible to construct a larger memory pool. Based on the above, the management or indexing efficiency can be effectively improved by storing all data/metadata in the memory pool in a KV data structure.

However, in the distributed storage system, the KV storage process is often implemented based on a central processing unit (central processing unit, CPU), the CPU needs to calculate and determine the KV data structure, which occupies the calculation resources and network bandwidth of the CPU, and when multiple data need to be stored concurrently, the throughput which can be provided by the KV service implemented by the CPU is limited, so that the requirement of high concurrent KV operation performance cannot be met.

Disclosure of Invention

The application provides a data processing method, which is completed by unloading KV operation requests to an accelerator, and the data surface processing within the unloading capacity range completely bypasses a CPU, so that the throughput of a system can be improved, the occupation of the CPU can be reduced, and the requirement of high concurrent KV operation performance is met. The application also provides a corresponding data processing apparatus, accelerator, computing device, computer readable storage medium and computer program product.

In a first aspect, the present application provides a data processing method. The method is applied to a computing device supporting key-value KV service. The computing device includes an accelerator and a processor. Specifically, the accelerator may obtain a KV operation request, and then determine an execution manner according to the KV operation request. The execution modes include an uninstall mode for indicating an operation of executing the KV operation request by the accelerator and a non-uninstall mode for indicating an operation of executing the KV operation request by the processor. The accelerator then performs the processing of the KV operation request according to the execution mode.

The method is characterized in that the basic operation of the distributed KV data is unloaded to the accelerator through the programmable capacity and the along-path processing capacity of the acceleration processor, and the CPU is completely bypassed by the data surface processing within the unloading capacity range, so that the throughput of the system can be improved, and the occupation of the CPU can be reduced. In addition, the method reserves all the functions of KV on the CPU side, and forwards a small amount of KV operation exceeding the unloading specification to the CPU for processing, so that hierarchical KV service is formed, and both performance and universality are considered.

In some possible implementations, the accelerator may obtain operation metadata in the KV operation request, and determine an execution manner of the KV operation request using the operation metadata. Specifically, when the operation metadata meets a preset condition, determining that the execution mode is an unloading mode, otherwise, determining that the execution mode is the non-unloading mode.

According to the method, KV operation requests are screened through operation metadata, the execution mode of KV operation requests within the unloading capacity range of the accelerator is determined to be a cooperative mode, the execution mode of KV operation requests outside the unloading capacity range of the accelerator is determined to be a non-cooperative mode, hierarchical KV services are formed, performance of the KV services is improved through the accelerator, occupation of a CPU is reduced, the CPU can process complex operations, and universality is guaranteed.

In some possible implementations, the operation metadata includes an operation type and a key length. The operation metadata meets a preset condition, and the operation type can be one or more of addition, deletion, inquiry, modification or batch addition, batch deletion, batch inquiry or batch modification, and the key length is smaller than a preset length.

According to the method, the operation type of KV operation which can be processed by the accelerator and the maximum key length trigger of KV data which can be operated by KV operation are used for setting conditions for screening KV operation requests within the unloading capacity range of the accelerator, so that the KV operation requests meeting the conditions can be accurately screened for unloading, and the problem that additional resources and time are consumed due to low screening progress are avoided and forwarded to a CPU side for processing.

In some possible implementations, when the execution mode determined according to the KV operation request is an unloading mode, the accelerator may execute the target KV operation on the memory of the computing device according to the KV operation request. For example, the accelerator may perform an add operation, a delete operation, a modify operation, a query operation, or a bulk add operation, a bulk delete operation, a bulk modify operation, a bulk query operation on the memory of the computing device.

In the method, the accelerator can effectively reduce the lateral pressure of the CPU, reduce the occupation of the CPU and improve the KV operation performance by executing the basic operation on the memory.

In some possible implementations, the memory may store KV data using KV blocks. The KV block includes a key content field and a value content field. Based on the above, when the accelerator executes the target KV operation, the target KV block can be written into the memory of the computing device or inquired from the memory of the computing device according to the KV operation request.

In the method, the accelerator can write the target KV block into the memory or inquire the target KV block from the memory according to the related information in the KV operation request so as to finish KV operation, and the performance of KV operation is improved because the KV operation request is unloaded to the accelerator.

In some possible implementations, the memory uses a hash table to store metadata of the KV data. The hash table comprises a plurality of hash buckets, each hash bucket in the plurality of hash buckets comprises a plurality of hash slots, and the plurality of hash slots belonging to the same hash bucket are used for storing fingerprints, key lengths and corresponding block addresses of a plurality of keys with the same hash value. Thus, the method is beneficial to quickly searching the target KV block or quickly writing the target KV block, and improves the efficiency of KV operation.

In some possible implementations, the KV operation request is a KV modification request, and the accelerator may determine a hash value and a fingerprint according to key contents of the target KV block, for example, hash operations are performed on the key contents of the target KV block according to different hash algorithms, so as to determine the hash value and the fingerprint, then determine a hash bucket corresponding to the target KV block according to the hash value, and update a hash slot in which the fingerprint in the hash bucket matches with the fingerprint determined by the key contents in the target KV block.

According to the method, KV data and metadata thereof are stored by designing a data structure suitable for accelerator processing, so that KV operation performance is further improved.

In some possible implementations, the KV block further includes a lower KV block identification field and a lower KV block address field. The KV operation request is a KV increment request. The accelerator can determine a hash value and a fingerprint according to key content of a target KV block, and then determine a hash bucket corresponding to the target KV block according to the hash value. When the fingerprint stored in the target hash slot in the hash bucket is matched with the fingerprint determined by key content in the target KV block, reading a lower KV block identification field and a lower KV block address field in the target hash slot, determining KV blocks at the tail part of the linked list according to field values of the lower KV block identification field and the lower KV block address field, writing the block address of the target KV block into the lower KV block address field in the KV blocks at the tail part of the linked list, and marking the field value of the lower KV block identification field in the KV blocks at the tail part of the linked list as effective.

The method manages KV data with the same fingerprint by setting the linked list, and solves the conflict problem of adding (inserting) operation.

In some possible implementations, the KV operation request is a KV increment request. Specifically, the accelerator may determine a hash value and a fingerprint according to key contents of the target KV block, then determine a hash bucket corresponding to the target KV block according to the hash value, and then write a block address of the target KV block and the fingerprint determined by key contents in the target KV block into a blank hash slot in the hash bucket.

The method writes the block address of the target KV block and the fingerprint determined by the key content in the target KV block into a blank hash slot in the hash bucket, so that the follow-up data query and modification can be conveniently performed based on the block address and the fingerprint.

In some possible implementations, the KV operation request is a KV query request. The KV operation request comprises the block address and key content of the target KV block to be queried. Correspondingly, the accelerator can determine a hash value according to the key content of the target KV block, determine a corresponding hash bucket according to the hash value, then perform address translation according to the block address of the target KV block to obtain a physical address, read the hash bucket according to the physical address, determine a fingerprint according to the key content of the target KV block, and query the hash bucket according to the fingerprint determined by the key content of the target KV block to obtain the value content corresponding to the key content.

In the method, the accelerator can quickly inquire the target KV block based on the data structure designed for the accelerator, so that the operation performance is improved. Moreover, the data structure of the accelerator design fully considers the conflict situation, and even if the conflict exists, the target KV block to be searched can be accurately found, so that the service requirement is met.

In a second aspect, the present application provides a data processing apparatus. The data processing apparatus comprises respective means for performing the data processing method of the first aspect or any of the possible implementations of the first aspect.

In a third aspect, the present application provides an accelerator. The accelerator includes a processing module and a communication interface. Wherein the communication interface is for providing network communication for the processing module and the accelerator is for performing the data processing method of the first aspect or any one of the possible implementations of the first aspect.

In a fourth aspect, the present application provides a computing device including an accelerator. Wherein the computing device includes an accelerator and a processor. The processor may be a central processor, which may also provide KV services. The accelerator is for performing the data processing method of the first aspect or any of the possible implementations of the first aspect to accelerate KV services.

In a fifth aspect, the present application provides a computer readable storage medium having stored therein instructions for instructing a computing device to execute the data processing method according to the first aspect or any implementation manner of the first aspect.

In a sixth aspect, the present application provides a computer program product comprising instructions which, when run on a computing device, cause the computing device to perform the data processing method of the first aspect or any implementation of the first aspect.

Further combinations of the present application may be made to provide further implementations based on the implementations provided in the above aspects.

Drawings

FIG. 1 is a schematic diagram of a data processing system according to the present application;

FIG. 2 is a flow chart of a data processing method provided in the present application;

fig. 3 is a schematic structural diagram of a KV server node provided in the present application;

FIG. 4 is a schematic flow chart of a data processing method provided in the present application;

FIG. 5 is a schematic diagram of a data processing system according to the present application;

fig. 6 is a schematic structural diagram of KV data provided in the present application;

FIG. 7 is a schematic flow chart of a data processing method provided in the present application;

FIG. 8 is a flow chart of a data processing method provided in the present application;

FIG. 9 is a schematic flow chart of a data processing method provided in the present application;

FIG. 10 is a schematic diagram of a data processing apparatus according to the present application;

fig. 11 is a schematic structural diagram of a computing device provided in the present application.

Detailed Description

For ease of understanding, some technical terms referred to in the embodiments of the present application will be first described.

Distributed storage refers to the decentralized storage of data on multiple independent devices (e.g., storage devices such as storage servers). The distributed storage system refers to a storage system that performs data storage in a distributed storage manner. Distributed storage systems typically have a scalable system architecture that can utilize multiple storage servers to share storage load and location servers to locate stored information. Thus, not only the reliability, availability and access efficiency of the storage system are improved, but also the expansion is easy.

The data or metadata in the distributed storage may be organized in a tree structure or Key Value (KV). Local critical data (e.g., hot spot data) can often be organized using a key-value data structure to achieve lower query latency and higher concurrency, taking into account query performance and query cost.

Key KV is a method for describing the mapping relation between elements associated with each other. Each pair of elements contains a key (value) and a value, and the corresponding value can be retrieved by combining the data structure used by the particular key.

In order to meet the high concurrent KV operation performance requirement, the application provides a data processing method. The method can be applied to a computing device supporting KV service, wherein the KV service comprises KV data addition, deletion, query or modification, or KV data batch increment, batch deletion, batch query or batch modification. The computing device includes an accelerator and a processor. The processor may be a CPU, which may also support KV services. An accelerator refers to a device that cooperates with a processor to achieve acceleration of services. The accelerator may be a data processor (data processing unit, DPU) or an infrastructure processor (infrastructure processing units, IPU). For ease of description, the following will be exemplified with the accelerator as the DPU.

The DPU is specifically a system-on-chip that focuses on performing channel associated processing and computation on data, where channel associated processing refers to channel associated signaling processing, and channel associated signaling is signaling that is transmitted by various signaling needed in call connection through a relay circuit occupied by the connection. Besides the acceleration capability for network forwarding, virtualization, storage and other scenes, the DPU generally has a certain programmable capability, and can perform customized unloading acceleration according to application scenes. The DPU may deploy an operating system (also referred to as a small system) alone to provide KV services, where the computing device in which the DPU resides includes two operating systems, namely a general-purpose operating system running in the CPU, and a small system running in the DPU. In addition, the DPU may exist as an external device to the CPU, and may form a heterogeneous system together with a processor such as a graphics processor (graphics processing unit, GPU).

Specifically, the DPU may acquire the KV operation request, and then the DPU may determine an execution manner according to the KV operation request, where the execution manner includes an unloading manner for indicating an operation of executing the KV operation request by an accelerator such as the DPU, and a non-unloading manner for indicating an operation of executing the KV operation request by a processor such as the CPU, and the DPU may perform processing of the KV operation request according to the execution manner.

According to the method, the basic operation of the distributed KV data is unloaded to the DPU through the programmable capacity and the path following processing capacity of the data processors such as the DPU, and the CPU is completely bypassed through the data surface processing within the unloading capacity range, so that the throughput of the system can be improved, and the occupation of the CPU can be reduced. In addition, the method reserves all the functions of KV on the CPU side, and forwards a small amount of KV operation exceeding the unloading specification to the CPU for processing, so that hierarchical KV service is formed, and both performance and universality are considered.

Next, the system architecture of the embodiments of the present application will be described with reference to the accompanying drawings.

Referring to the schematic architecture of the data processing system shown in FIG. 1, the data processing system 10 includes a KV server node 100 and a KV client node 200. Wherein, the KV service end node 100 is a computing device supporting KV service, for example, a server supporting KV service. The KV client node 200 is a device that supports access to the KV server node 100, and the KV client node 200 may be a lightweight device, including but not limited to a notebook, tablet, or smart phone. The KV server node 100 and KV client node 200 may be interconnected by a network, for example, a high-performance network. It should be noted that, depending on the networking scale of different traffic scenarios, one or more KV server nodes 100 may be included in data processing system 10, and similarly, one or more KV client nodes 200 may be included in data processing system 10.

Wherein KV server node 100 includes DPU102 and CPU104. In the example of fig. 1, CPU104 resides within the host and DPU102 acts as an external device to the host. The KV server node 100 further includes a memory (memory) 106, where the memory 106 is configured to store KV data, so as to accelerate access efficiency of the KV data. Memory 106 may be external to the host, based on which memory 106 may also be referred to as host memory. Each host may be externally connected to a plurality of memories 106, and the plurality of memories 106 may be used to form a memory pool.

KV client node 200 is deployed with applications. The application runtime may spawn an application process. The application process may call the KV service interface to initiate KV operation, and accordingly, a KV client (e.g., a KV client process) on the KV client node 200 may generate a KV operation request according to the KV operation, where the KV operation request may be in a (remote direct memory access Remote Direct Memory Access, RDMA) message format. The KV client node 200 then sends a KV operation request to the KV server node 100. DPU102 of KV server-side node 100 is responsible for receiving and processing various types of KV operation requests.

Specifically, DPU102 may determine an execution manner according to the KV operation request, and then perform processing of the KV operation request according to the execution manner. For example, DPU102 may obtain operation metadata in the KV operation request, including operation type and key length (Klen). When the operation metadata satisfies a preset condition, for example, the operation type is one or more of adding, deleting, querying, modifying or adding in batch, deleting in batch, querying in batch or modifying in batch, and the key length is smaller than the preset length, the execution mode is determined to be an unloading mode, and the DPU102 can execute the target KV operation on the memory 106 according to the KV operation request. When the operation metadata does not meet the preset condition, the execution mode is determined to be a non-unloading mode, the DPU102 forwards a KV operation request to the CPU104, and the CPU104 executes the target KV operation on the memory 106 according to the KV operation request. That is, KV operation requests that are within the processing capabilities of DPU102 are processed by DPU102, and KV operation requests that exceed the processing capabilities of DPU102 may be forwarded to CPU104 for processing by CPU104.

Based on the data processing system 100 shown in fig. 1, the embodiment of the present application further provides a data processing method, and the data processing method of the embodiment of the present application is described below with reference to the accompanying drawings.

Referring to the flow chart of the data processing method shown in fig. 2, the method comprises:

s202: DPU102 receives KV operation requests sent by KV client node 200.

The KV operation request includes operation metadata. The operation metadata may include, among other things, operation type and key length. The operation types may include basic operations such as one or more of add (create), delete (delete), query (read), and modify (update). The addition, deletion, query, and modification may be collectively referred to as adding, deleting, and modifying, and may be referred to as CRUD. In some embodiments, multiple KV operations may be encapsulated in a KV operation request, based on which the operation type may include a bulk base operation, such as one or more of a bulk add, a bulk delete, a bulk query, or a bulk modify. The key length refers to the length of the key, i.e., the length of the key content.

S204: DPU102 obtains the operational metadata in the KV operation request. When the operation metadata satisfies the preset condition, S206 is performed, and when the operation metadata does not satisfy the preset condition, S208 is performed.

S206: DPU102 determines that the execution mode is an offload mode. And then S210 is performed.

S208: DPU102 determines that the execution mode is a non-offload mode. And then S214 is performed.

Specifically, DPU102 may parse the KV operation request to obtain operation metadata in the KV operation request. The operation metadata includes an operation type and a key length. In general, the DPU102 has a capability of processing basic operations, while the CPU104 has a capability of processing complex operations, and the DPU102 is limited to hardware capability, and is generally used for processing KV data with a key length within a preset length (the key length is smaller than the preset length), based on which, the DPU102 can determine, according to an operation type and the key length, whether the DPU102 has a capability of processing KV operations in the KV operation request, thereby determining an execution manner of the KV operations.

For example, DPU102 may compare the operation type in the KV operation request to the operation type of the underlying operation (e.g., add, delete, query, modify, or bulk add, bulk delete, bulk query, bulk modify), and compare the key length in the KV operation request to a preset length.

When the operation type is matched with the operation type of the basic operation, and the key length is smaller than the preset length, the DPU102 is characterized by having the capability of processing the KV operation in the KV operation request, and the execution mode can be determined to be the unloading mode. Wherein the offload mode is used to indicate the operation requested by DPU102 to perform the KV operation.

When the operation type does not match the operation type of the base operation and/or the key length is not less than the preset length, the performance mode may be determined to be a non-offloading mode if the DPU102 is characterized by not having the capability to process the KV operation in the KV operation request. Wherein the non-offload mode is used to indicate the operation requested by the CPU104 to perform KV operations.

The preset length may be set according to the hardware type of the DPU102, and the hardware type of the DPU102 may be different. For example, the preset length may be set to 128 bytes (B), or to 1 Kilobyte (KB).

It should be noted that, S204 to S208 are a specific implementation manner in the embodiment of the present application in which the DPU102 determines the execution manner according to the KV operation request, and in other possible implementation manners in the embodiment of the present application, the DPU may not execute the steps or use other implementation manners to execute the steps. For example, DPU102 may directly attempt to perform a target KV operation, return a result when the execution is successful, and forward a KV operation request to the CPU for processing by the CPU when the execution is unsuccessful.

S210: DPU102 performs a target KV operation on memory 106 according to the KV operation request.

Memory 106 stores KV data using KV blocks (KV blocks), based on which DPU102 may write target KV blocks into memory 106 or query target KV blocks from memory 106 according to KV operation requests. When the operation type in the KV operation request is addition, modification, or batch addition, or batch modification, the DPU102 performs an operation of writing the target KV block into the memory 106. DPU102 performs an operation to query a target KV block from memory 106 when the type of operation in the KV operation request is a query or a batch query. DPU102 may perform operations to delete target KV blocks from memory 106 when the type of operation in the KV operation request is delete or bulk delete.

When the KV operation is addition, modification or batch addition or batch modification, the KV operation request may further include the value content in the KV data to be added or modified. For example, the KV operation request may include key content "name" and value content "Zhang San", for requesting to add KV data of "name", zhang Sano ".

S212: DPU102 returns KV operation results to KV client node 200.

The KV operation result may include different information according to the operation type. For example, where the type of operation is addition, modification, deletion or batch addition, batch modification, batch deletion, KV operation results may include operation success or operation failure. For another example, where the type of operation is a query or batch query, the KV operation result may include the queried KV data.

For ease of understanding, the present application is specifically described in connection with an example. For query or bulk query operations, DPU102 may encapsulate the queried KV data and the operation success field value in the same response message and then return the response message to client node 200. In some embodiments, DPU102 may also encapsulate the queried KV data and operation success field values in different response messages and then return to client node 200 separately.

S214: DPU102 forwards the KV operation request to CPU 104.

S216, the CPU104 executes target KV operation on the memory 106 according to KV operation request.

S218, the CPU104 returns KV operation results to the KV client node 200.

The CPU104 performs the target KV operation on the memory 106 according to the KV operation request, and the specific implementation of returning the KV operation result to the KV client node 200 may refer to the DPU102 to perform the target KV operation and return the relevant content description of the KV operation result, which is not described herein again.

The above S210 to S212 and S214 to S218 are some specific implementations of the processing of the KV operation request by the DPU102 according to the implementation manner, and in other possible implementations of the embodiment of the present application, the processing of the KV operation request may also be performed in other manners.

The method can completely bypass the host CPU104 through the data surface processing within the unloading capacity range by unloading the basic operation of the distributed KV data to the DPU102 through the programmable capacity and the along-path processing capacity of the DPU102, thereby not only improving the throughput of the system, but also reducing the occupation of the host CPU 104. In addition, the method reserves all KV functions on the CPU104 side, and forwards a small amount of KV operation exceeding the unloading specification to the host CPU104 for processing to form hierarchical KV service, and both performance and universality are considered.

As a possible implementation, DPU102 may be logically divided into a data plane and a control plane, and the embodiment shown in fig. 2 mainly describes the data processing method from the perspective of the data plane. The method of the embodiments of the present application will be described in detail from the control plane and the data plane.

Referring first to the schematic structural diagram of the KV server node 100 shown in fig. 3, as shown in fig. 3, the DPU102 is logically divided into two parts, namely a data plane and a control plane, where the data plane is responsible for network IO communication and path-following processing of KV transactions, and the control plane is responsible for managing context information of communication and transactions and managing the status of transactions. The CPU104 runs the KV server and generates KV server processes. The KV server process can be responsible for connection management with the KV client process, and KV resources in the memory 106 are managed and scheduled, and meanwhile, the KV server process has complete KV operation processing capability, and can complete processing for a small amount of KV operation requests which cannot be accelerated by the DPU 102.

Memory 106 resides in KV data structures. The KV data structure is used for describing the organization form of KV data. KV data may be organized in KV blocks (KV blocks). To improve lookup efficiency, memory 106 also resides with a hash table. The embodiments of the present application enable corresponding KV data structures to be more efficiently processed by DPU102 by designing them in a manner suitable for acceleration of DPU 102.

Next, referring to a flow chart of the data processing method shown in fig. 4, the method specifically includes the following steps:

step 1: the KV operation request from KV client node 200 arrives at the network port of DPU102 in KV server node 100 in the form of RDMA message through the switching network, and the packet is parsed by the channel associated processing unit located in the data processing plane in DPU102, so as to obtain the operation metadata.

The switching network may also be called a connection network, specifically, a network that establishes a communication channel between a source and a destination of communication to realize information transmission. The switching network is typically implemented by switching devices, which may include switches, routers, etc. that implement information exchange.

The operation metadata may include one or more of an operation type or a key length. Further, key content may be included in the KV operation request. For add, modify, bulk add, bulk modify operations, the KV operation request may also include value content. The operation metadata may also include a version number, considering that there may be multiple versions of the data. Similarly, the operation metadata may also include a sequence number.

Step 2: the associated processing unit checks whether the current KV operation can complete the unloading acceleration on the DPU102, and if the unloading capability of the DPU102 is exceeded, the current KV operation is forwarded to the host CPU104 to be processed by the KV server process.

Step 3: the associated processing unit writes the context into the control plane to record the network connection state and the state of the current KV operation.

The context includes processing information necessary to perform the current KV operation, the state of the current KV operation. Wherein the processing information may include key content, and further, the processing information may further include value content. The state of the current KV operation comprises an execution node and an execution result of the current KV operation.

Step 4: the channel associated processing unit drags necessary operation data from the memory 106 through the high-speed bus by the IO processing module for processing according to the data requirement of KV operation.

The high speed bus may be a standard bus such as a peripheral component interconnect express (Peripheral Component Interconnect Express, PCIe), a computing fast link (Compute Express Link, CXL), or a proprietary bus type. The operation of pulling data may use direct memory access (Direct Memory Access, DMA) or other memory access semantics, such as load store. Depending on the complexity of the different KV operations, the along-path processing unit may need to complete several data drags and processes.

Step 5: the associated processing unit writes the intermediate result and the final result of the processing into the context and updates the operation state.

When the KV operation is an addition operation, a query operation, or a batch addition operation, or a batch query operation, a conflict situation may exist, for example, the characteristic value of the key content in the KV data used for addition in the addition operation is the same as the characteristic value of the key content of other KV data in Ha Xicao, or the characteristic value of the key content in the KV data to be queried in the query operation is the same as the characteristic value of the key content of other KV data in Ha Xicao, and the token is in conflict. The channel associated processing unit may perform a conflict resolution operation, and the result generated during the operation may be an intermediate result. For example, the intermediate result may include a linked list of record conflict information.

When KV is performed as an add operation, a delete operation, or the like, the intermediate result may not be included, and the path processing unit may write the final result into the context.

Step 6: the channel associated processing unit encapsulates the final result of KV operation into RDMA message and sends back to KV client node 100 to complete one KV operation.

In the whole process, the processing of KV operation can be completed by a path processing unit on DPU102, and data communication with the memory 106 is completed through a high-speed bus, and the CPU104 is not required to participate in calculation.

In comparison with fig. 2, fig. 4 describes not only the flow of the data processing method from the data plane, but also the data processing method from the control plane. It should be further noted that, fig. 4 illustrates interaction between one KV client node 200 and one KV server node 100, and in practical application, KV data may be stored in a distributed manner by a plurality of KV server nodes 200, and one or more KV client nodes 200 may be served.

Referring to the schematic diagram of the data processing system 10 shown in fig. 5, a number of KV client nodes 200 may be interconnected with a number of KV end service nodes 100 through an RDMA network. The full KV data may be divided into different field segments and stored in the memories 106 of different KV server nodes 100. Wherein, the KV data can be divided into different domain segments according to the key range, or divided into different domain segments according to other modes, and stored in different KV server nodes 100 in a scattered manner, so as to realize load balancing.

The KV server process in KV server node 100 may include multiple execution threads to support certain concurrency. Each KV server node 100 establishes at least one RDMA connection with each KV client node 200 to complete the message transfer. For example, in fig. 5, there are N KV client nodes 200 and M KV server nodes 100, and, correspondingly, there are at least N and M RDMA connections on the KV server nodes and KV client nodes 200, respectively.

When an application triggers KV operation, a KV client process may initiate a KV operation request on a corresponding RDMA Queue Pair (QP) according to the partitioning of the data field segment. QP is a virtual interface between hardware and software. QP is a queue structure that stores in order the tasks that the software issues to the hardware, i.e., work queue element (Work QueueEllement, WQE), and WQE contains information about where to fetch how long data from and to which destination. Each QP is independent and isolated from each other by a protection domain (Protection Domain, PD), so that one QP can be considered an exclusive resource for a user, and a user can use multiple QP simultaneously. There are many types of services for QPs, including reliable connections (reliable connection, RC), reliable datagrams (reliable datagram, RD), unreliable connections (unreliable connection, UC), unreliable datagrams (unreliable datagram, UD), etc., and all source QPs and destination QPs are of the same type for data interaction.

In this example, the DPU102 at the KV server node 100 side receives a KV operation request, checks whether information such as an operation type, a Key length, and the like of the KV operation is within an acceleration range supported by the DPU102, if so, the DPU102 completes a corresponding request processing, and otherwise, forwards the request processing to the host CPU104 to complete the processing.

The KV data structure residing in the memory 106 may be referred to in fig. 6. As shown in fig. 6, the hash table includes a plurality of hash buckets, such as the columns of the hash table of fig. 6, denoted Entry 0 … … Entry M, each of the plurality of hash buckets including a plurality of hash slots, corresponding to the plurality of rows in one column, denoted Slot 0 … … Slot N. The hash slots belonging to the same hash bucket are used for storing fingerprints (finger), key lengths (Klen) and corresponding Block addresses (KV Block addresses) of the keys with the same hash value.

In some possible implementations, for keys of KV data, the result of calculation by the hash algorithm 1 (i.e., the hash value described above) may be used to index the hash bucket entries, each hash bucket contains multiple slots, and the same key calculated by the hash algorithm 1 may be placed in different slots of the same hash bucket. The header of each Slot includes a finger field that stores the result of the key calculation by hash algorithm 2 (i.e., the Fingerprint described above). In particular implementations, DPU102 or CPU104 may differentiate and find multiple keys stored in the same hash bucket through a Fingerpint field. Further, virtual address and Key length (Klen) information of KV Block and check keys required for address translation are stored in the Slot, and corresponding KV Block can be read and written through the virtual address.

The header field in KV Block includes the complete Key content, value's length information (Vlen). Further, the header field of KV Block may further include a lower KV Block identification field, such as a flags field in fig. 6. Under the serious collision condition, the finger points calculated by different keys in the same hash bucket can be the same, and the keys share the same Slot, and the KV blocks corresponding to the keys are managed in a linked list mode. Specifically, the Flags field identifies whether a Next-level KV Block exists, and stores the virtual address and check key of the Next-level KV Block in a previous-level KV Block (e.g., a Next field segment of the KV Block). If no next level KV Block exists, the corresponding address and check key fields are not valid, but the corresponding space may be reserved, e.g., the field value may be set to rsvd for use in a subsequent possible insert operation.

Under the design of the data structure, when the DPU102 performs KV Block search, only the header field and the Next field in the figure 6 of the load are needed to be loaded from the memory 106, the whole KV Block is not needed, after key Value verification and confirmation search are completed, value content is directly dragged from the memory 106 to assemble an RDMA message, and then the RDMA message is sent to return KV operation results. Because most scene Key values are relatively short in length, e.g., within 1KB, they can be loaded to DPU102 for processing, while Value may reach the MB level, with the load Value to DPU102 impacting the on-chip buffers very much. This data structure design reduces the specification requirements for DPU102 and is more suitable for off-load acceleration.

In order to make the technical solution of the present application clearer and easier to understand, the following description is given by way of example with the operations of addition (also called insertion), modification (also called update), query and batch (batch).

First, referring to the flow chart of the data processing method shown in fig. 7, the method mainly describes the insertion or update flow from the perspective of interaction of the KV client node 200 and the KV server node 100, and specifically includes the following steps:

step 1: the KV client node 200 transmits a KV operation request to the KV server node 100.

Specifically, KV client node 200 may send KV insert requests or KV update requests to KV server node 100 via RDMA write operations. The KV insert request or KV update request carries necessary information for generating KV Block and a corresponding write address (virtual address).

The necessary information for generating the KV Block may include key content and value content of the target KV Block to be added or modified, and the write address may be a Block address of the target KV Block. Further, the KV insertion request or the KV update request may further include a verification key, i.e., a verification key.

It should be noted that if the message length of the KV insert request or the KV update request exceeds the size of one maximum transmission unit (Maximum Transmission Unit, MTU), the KV client node 200 may complete transmission through a plurality of messages.

Step 2: DPU102 receives the KV operation request, writes the value content to memory 106 according to the KV operation request, and determines the hash value and fingerprint according to the key content and the hash algorithm.

Specifically, the DPU102 directly writes the Value content (Value part) of the target KV block into the memory 106 in a DMA mode according to the block address of the target KV block in the KV insertion request or the KV update request, then determines a hash Value according to the key content (key part) and the hash algorithm 1, determines a hash bucket corresponding to the target KV block according to the hash Value, and then determines a fingerprint of the target KV block according to the hash algorithm 2.

Step 3: the DPU102 reads the hash bucket corresponding to the target KV block, and sequentially compares whether the fingerprint in each hash Slot of the hash bucket is the same as the fingerprint of the target KV block calculated in step 2. If the operation is the updating operation at present, refreshing the Slot successfully matched with the fingerprint; if it is currently an insert operation, DPU102 may attempt to find a blank Slot to write the Block address and fingerprint of KV Block.

If fingerprint conflicts occur, conflict resolution may be performed. The DPU102 may read the KV Block header information in the conflict Slot, check whether the next-stage KV Block address is valid through the field value of the next-stage KV Block identification field, if so, read the next-stage KV Block address field to read the Block address of the next-stage KV Block until the KV Block located at the tail of the linked list is found, and then write the address and the check key in the KV insert request into the next-stage KV Block address and the check key field, and modify the flag field to identify that the current KV Block next-hop address is valid.

Step 4: the KV server node 100 returns a KV operation result to the KV client node 200.

Specifically, KV server node 100 may notify KV client node 200 that the current KV insert/update operation is complete through RDMA Send.

When the KV client node 100 sends a KV operation request through the RDMA Write, the DPU102 may return an acknowledgement message ACK to the KV client node 100 when receiving the KV operation request. Similarly, when KV server node 100 (e.g., DPU 102) completes the RDMA Send notification operation, KV client node 200 may also return an acknowledgement message ACK to KV server node 100.

In the above scenario, KV write operations (insert or update) involve more than 3 (more times are needed when a conflict occurs) read/write operations to the memory 106 and corresponding logic processing operations, where both data read/write may be directly completed on the DPU102 by DMA, and KV logic processing may also be completed by a core on the DPU. Compared with the way that single-side RDMA processes data from a far end to the KV client node 200 through multiple RDMA operations, the processing route from the memory 106DMA data to the DPU102 is shorter, the efficiency is higher, and the operation time delay can be greatly shortened. Compared with the RPC scheme based on the CPU, the method and the device are based on the path processing of the DPU102, finish KV operation while processing RDMA protocol forwarding, bypass and release host CPU resources, and obtain higher throughput and time delay performance.

Referring further to the flow chart of the data processing method shown in fig. 8, the method mainly describes the query flow from the perspective of KV client node 200 and KV server node 100 interaction, and specifically includes the following steps:

step 1: KV client node 200 generates a KV operation request to KV server node 100.

Specifically, KV client node 200 may send KV query requests to KV server node 100 via RDMA write operations. The key content (specifically, key part in KV data) is carried in the KV query request, so as to request to query the value content (specifically, value part in KV data) corresponding to the key content.

Note that RDMA read operations typically do not have a payload, so KV client node 200 carries key content and operation type in the payload of the RDMA write operation to enable KV query requests to be sent over the RDMA write operation.

Step 2: DPU102 in KV service node 100 receives the KV operation request and hashes the bucket according to the load in the KV operation request.

Specifically, the operation type in the KV operation request is a query, and the query is used for requesting to query the value content corresponding to the key content. Based on this, DPU102 may calculate a corresponding hash bucket based on the key content in the KV query request and hash algorithm 1, complete the translation of the virtual address to the physical address based on the virtual address and the check key in the KV query request, and then load the hash bucket from memory 106 based on the physical address.

Step 3: after the hash bucket returns, the DPU102 may calculate a fingerprint according to the Key content and the hash algorithm 2, and find a Slot in the hash bucket, where the fingerprint is the same as the calculated fingerprint, to obtain a virtual address and a check Key of the KV Block in the Slot.

Step 4: DPU102 may complete the translation of the virtual address to the physical address of the corresponding KV Block according to the virtual address and the check key, and read the Header field and the Next field.

Step 5: after the Header field and the Next field of KV Block are returned, the DPU102 may compare whether the key content in the Header and the key content of the KV query request are the same. If the two are the same, executing a step 6; if not, the virtual address and the check key of the Next KV Block in the linked list are obtained from the Next field, and the step 4 is returned.

Step 6: DPU102 may load value content, generate KV operation results, and return KV operation results to KV client node 200.

Specifically, DPU102 may assemble RDMA messages from the value content, send the value content back to KV client node 200 via RDMA Send operations, and complete KV query operations.

When the KV client node 100 sends a KV operation request for querying data through the RDMA Write, the DPU102 may return an acknowledgement message ACK to the KV client node 100 when receiving the KV operation request. Similarly, when DPU102 of KV server node 100 completes the operation by RDMA Send notification, KV client node 200 may also return an acknowledgement message ACK to KV server node 100.

In the above scenario, KV read operations involve more than 2 (more times are needed when conflicts occur) read and write operations to memory 106 and corresponding logic processing operations. Similar to KV write operations, in this application, data read-write can be directly performed on the DPU102 by DMA, and KV logic processing can also be performed by a core on the DPU 102. Compared with a single-side RDMA implementation scheme, the method and the device can transfer data from: server memory- > client memory, shorten to: and the memory of the server-side is greater than the DPU cache of the server-side, so that the data transmission delay is greatly shortened. Compared with the RPC scheme based on the CPU, the method and the device can realize CPU bypass, save CPU resources, and improve the overall throughput and time delay performance of the system through the multi-core and channel associated processing capacity of the DPU 102.

As another possible implementation manner, the present application further proposes a design supporting transaction batch processing, which allows the KV client node 200 to encapsulate a plurality of KV operations, for example, operation metadata carrying the plurality of operations, in a single KV operation request, and the DPU102 generates a plurality of transactions according to the KV operation request, where each transaction in the plurality of transactions is used to execute one KV operation in the plurality of KV operations, and accordingly, the DPU102 may execute the plurality of transactions in parallel through a plurality of cores, thereby improving overall efficiency.

Referring to the flow chart of the data processing method shown in fig. 9, the method mainly describes a batch operation flow from the perspective of interaction of KV client node 200 and KV server node 100, and specifically includes the following steps:

step 1: after the KV operation request is received by DPU102, it is handled by one thread of DPU 102.

In fig. 9, the KV operation request may be processed by Thread 0. Specifically, thread 0 obtains the operation type and the operation number of the current Batch operation by analyzing the message header.

Step 2: DPU102 sequentially parses the operation domain segments through dispatch and state management logic on Thread 0 and initializes state information for each operation in the state table, then generates new operation transaction enqueues to the transaction queue and generates operation notifications enqueues to the notification queue.

The notification queue may be implemented in the form of a doorbell (doorbell) queue in the figure.

Step 3: the scheduler on DPU102 may schedule the generated operation notifications to different threads, which may perform the corresponding KV operations, respectively.

In fig. 9, the scheduler on DPU102 schedules doorbell to Thread 1 through Thread N, and accordingly, thread 1 through Thread N reads information needed to complete an operation from a transaction queue by parsing doorbell, and then performs a corresponding operation, such as KV insert operation.

Step 4: after the operation is completed, each thread writes back the corresponding state table.

In the process of writing back the state table, each thread ensures the atomicity of the state update by a queue or an order-preserving resource in the DPU102, and the last completed thread generates a Doorbell of the reply request and is merged into the Doorbell queue.

Step 5: the scheduler on DPU102 schedules the Doorbell of the reply request to a thread for execution, the thread gathers status information, and when the status information characterizes the completion of the operation, generates a completion message and sends back to KV client node 200.

In this scenario, the request end may encapsulate multiple KV operations into one message, and utilize DPU102 to distribute multiple transactions in the message to different processing cores for parallelization processing, and implement batch processing operations through flow combination and arrangement, so as to improve overall transaction processing efficiency.

It is noted that other reasonable combinations of steps can be envisaged by the person skilled in the art from the above description, and are also within the scope of protection of the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are alternative embodiments and that the actions involved are not necessarily required for the present application.

The data processing method provided in the embodiment of the present application is described above with reference to fig. 1 to 9, and the functions of the data processing apparatus and the computing device implementing the data processing apparatus provided in the embodiment of the present application are described below with reference to the accompanying drawings.

Referring to fig. 10, which shows a schematic structural diagram of a data processing apparatus, the data processing apparatus 1000 may be a software apparatus or a hardware apparatus in an accelerator, and the apparatus 1000 includes:

an obtaining unit 1002, configured to obtain a KV operation request;

a determining unit 1004, configured to determine an execution manner according to the KV operation request, where the execution manner includes an offloading manner and a non-offloading manner, where the offloading manner is used to instruct the accelerator to execute the operation of the KV operation request, and the non-offloading manner is used to instruct the processor to execute the operation of the KV operation request;

and the execution unit 1006 is configured to execute the processing of the KV operation request according to the execution manner.

It should be appreciated that the apparatus 1000 of the embodiments of the present invention may be implemented by a central processing unit (central processing unit, CPU), an application-specific integrated circuit (ASIC), or a programmable logic device (programmable logic device, PLD), which may be a complex program logic device (complex programmable logical device, CPLD), a field-programmable gate array (field-programmable gate array, FPGA), a general-purpose array logic (generic array logic, GAL), a data processing unit (data processing unit, DPU), a system on chip (SoC), or any combination thereof. When the data processing method shown in fig. 2 to 9 is implemented by software, the apparatus 1000 and its respective modules may be software modules.

In some possible implementations, the determining unit 1004 is specifically configured to:

acquiring operation metadata in the KV operation request;

and when the operation metadata meets preset conditions, determining that the execution mode is the unloading mode, otherwise, determining that the execution mode is the non-unloading mode.

In some possible implementations, the operation metadata includes an operation type and a key length, and the operation metadata satisfies a preset condition, including: the operation type is one or more of adding, deleting, inquiring, modifying or adding in batches, deleting in batches, inquiring in batches or modifying in batches, and the key length is smaller than the preset length.

In some possible implementations, when the execution mode determined according to the KV operation request is the offload mode, the execution unit 1006 is specifically configured to:

and executing target KV operation on the memory of the computing equipment according to the KV operation request.

In some possible implementations, the memory stores KV data using KV blocks, the KV blocks including key content fields and value content fields;

the execution unit 1006 specifically is configured to:

and writing a target KV block into the memory of the computing equipment or inquiring the target KV block from the memory of the computing equipment according to the KV operation request.

In some possible implementations, the memory stores metadata of the KV data using a hash table, where the hash table includes a plurality of hash buckets, each of the plurality of hash buckets includes a plurality of hash slots, and the plurality of hash slots belonging to the same hash bucket are used to store fingerprints, key lengths, and corresponding block addresses of a plurality of keys having the same hash value.

In some possible implementations, the KV operation request is a KV modification request, and the execution unit 1006 is further configured to:

determining a hash value and a fingerprint according to key contents of the target KV block;

determining a hash bucket corresponding to the target KV block according to the hash value;

and updating a hash slot in which the fingerprint in the hash bucket is matched with the fingerprint determined by the key content in the target KV block.

In some possible implementations, the KV block further includes a lower KV block identification field and a lower KV block address field, the KV operation request is a KV increment request, and the execution unit 1006 is further configured to:

when the fingerprint stored in the target hash slot in the hash bucket is matched with the fingerprint determined by key content in the target KV block, reading a lower KV block identification field and a lower KV block address field in the target hash slot, determining a KV block at the tail of a linked list according to field values of the lower KV block identification field and the lower KV block address field, writing the block address of the target KV block into the lower KV block address field in the KV block at the tail of the linked list, and marking the field value of the lower KV block identification field in the KV block at the tail of the linked list as effective.

In some possible implementations, the KV operation request is a KV increment request, and the execution unit 1006 is further configured to:

and writing the block address of the target KV block and the fingerprint determined by key content in the target KV block into a blank hash slot in the hash bucket.

In some possible implementations, the KV operation request is a KV query request, where the KV operation request includes a block address and key content of a target KV block to be queried, and the execution unit 1006 is specifically configured to:

determining a hash value according to key content of the target KV block, and determining a corresponding hash bucket according to the hash value;

performing address translation according to the block address of the target KV block to obtain a physical address, and reading the hash bucket according to the physical address;

and determining fingerprints according to the key contents of the target KV block, and inquiring the hash bucket according to the fingerprints determined by the key contents of the target KV block to obtain the value contents corresponding to the key contents.

Since the data processing apparatus 1000 shown in fig. 10 corresponds to the methods shown in fig. 2, 4, 7, 8 and 9, the specific implementation of the data processing apparatus 1000 shown in fig. 10 and the technical effects thereof can be referred to the description of the related parts in the foregoing embodiments, and the description thereof will be omitted herein.

Fig. 11 is a hardware structure diagram of a computing device 1100 provided in the present application, where the computing device 1100 may be the KV server node 100 described above, and is configured to implement the functions of the data processing apparatus 1000 in the embodiment shown in fig. 10.

As shown in fig. 11, the computing device 1100 includes a processor 1101, an accelerator 1102, and a memory 1103. The processor 1101, the accelerator 1102, and the memory 1103 may communicate via a bus 1104, or may communicate via other means such as wireless transmission. The computing device 1100 also includes a communication interface 1105, where the communication interface 1105 is used to communicate with external devices, such as the KV client node 200. In some possible implementations, the computing device 1100 may also include memory 1106.

The processor 1101 may be a central processor CPU and the accelerator 1102 may be a data processor DPU or an infrastructure processor IPU. The accelerator 1102 is used to unload the workload of the processor 1101, thereby implementing an acceleration function. It should be noted that, the accelerator 1102 may be a separate operating system (i.e., a small system) that provides KV services, and in this case, the computing device 1100 includes two operating systems, i.e., a general-purpose operating system running in the processor 1101, and a small system running in the accelerator 1102. In addition, the accelerator 1102 may also exist as an external device to the processor 1101, and the processor 1101 and accelerator 1102 may constitute a heterogeneous system.

The memory 1103 is an internal memory that exchanges data directly with the processor 1101 or the accelerator 1102, and can read and write data at any time, and is fast, and is used as a temporary data storage for an operating system or other running programs. The Memory may include at least two types of memories, for example, the Memory may be a random access Memory (Random Access Memory, RAM) or a Read Only Memory (ROM). For example, the random access memory is a Dynamic Random Access Memory (DRAM), a Static RAM (SRAM), a storage class memory (Storage Class Memory, SCM), or the like. The read-only memory may be a Programmable read-only memory (PROM), an erasable Programmable read-only memory (Erasable Programmable ROM, EPROM), or the like. In addition, the memory 1103 may be a Dual In-line Memory Module (Dual In-DIMM) memory module, i.e., a module composed of DRAM, or a Solid State Disk (SSD). In addition, the memory 1103 can be configured to have a power conservation function. The power-up protection function means that the data stored in the memory 1103 is not lost when the system is powered down and powered up again. The memory having the power-saving function is called a nonvolatile memory.

The bus 1104 may include a power bus, a control bus, a status signal bus, and the like in addition to the data bus. But for clarity of illustration, the various buses are labeled as bus 1104 in the figures.

The communication interface 1105 is used to communicate with external devices such as KV client node 200. In particular, communication interface 1105 may be a network card, such as the RDMA network card described previously. The communication interface 1105 may be used to receive KV operation requests sent by KV client nodes 200 over RDMA Write.

Memory 1106, also referred to as external memory or external storage, is typically used for persistent storage of data or instructions. Memory 1106 may include magnetic disks or other types of storage media such as solid state disks or shingled magnetic recording disks, among others. When computing device 1100 also includes memory 1106, memory 1103 is also used to temporarily store data exchanged with memory 1106.

The memory 1103 is configured to store instructions, which may be instructions that the memory 1103 solidifies, or instructions that are exchanged from the memory 1106, and the accelerator 1102 is configured to execute the instructions stored in the memory 1103 to perform the following operations:

acquiring a KV operation request;

determining an execution mode according to the KV operation request, wherein the execution mode comprises an unloading mode and a non-unloading mode, the unloading mode is used for indicating the operation of executing the KV operation request by the accelerator, and the non-unloading mode is used for indicating the operation of executing the KV operation request by a processor;

And executing the processing of the KV operation request according to the execution mode.

Optionally, the accelerator 1102 is further configured to execute instructions stored in the memory 1103 to perform other steps of the data processing method according to the embodiment of the present application.

It should be understood that the computing device 1100 according to the embodiment of the present application may correspond to the data processing apparatus 1000 in the embodiment of the present application, and may correspond to the KV server node 100 performing the method shown in fig. 2 in the embodiment of the present application, and that the foregoing and other operations and/or functions implemented by the computing device 1100 are respectively for implementing the corresponding flow of the method in fig. 2, and are not repeated herein for brevity.

Embodiments of the present application also provide a computer-readable storage medium. The computer readable storage medium may be any available medium that can be stored by a computing device or a data storage device such as a data center containing one or more available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk), etc. The computer readable storage medium includes instructions that instruct a computing device to perform the above-described method for executing a data processing method applied to the data processing apparatus 1000.

Embodiments of the present application also provide a computer program product comprising instructions. The computer program product may be software or a program product containing instructions capable of running on a computing device or stored in any useful medium. The computer program product, when run on at least one computing device, causes the at least one computing device to perform the data processing method described above.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; these modifications or substitutions do not depart from the essence of the corresponding technical solutions from the protection scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data processing method, the method being applied to a computing device supporting a key-value KV service, the computing device comprising an accelerator and a processor, the method being performed by the accelerator, comprising:

acquiring a KV operation request;

2. The method of claim 1, wherein determining an execution manner according to the KV operation request comprises:

acquiring operation metadata in the KV operation request;

3. The method of claim 2, wherein the operation metadata includes an operation type and a key length, the operation metadata satisfying a preset condition, comprising: the operation type is one or more of adding, deleting, inquiring, modifying or adding in batches, deleting in batches, inquiring in batches or modifying in batches, and the key length is smaller than the preset length.

4. A method according to any one of claims 1 to 3, wherein when the execution mode determined according to the KV operation request is the offload mode, the performing the processing of the KV operation request according to the execution mode includes:

5. The method of claim 4, wherein the memory stores KV data using KV blocks, the KV blocks including a key content field and a value content field;

the executing, according to the KV operation request, a target KV operation on a memory of the computing device, including:

6. The method of claim 5, wherein the memory stores metadata of the KV data using a hash table, the hash table including a plurality of hash buckets, each of the plurality of hash buckets including a plurality of hash slots, the plurality of hash slots belonging to the same hash bucket storing fingerprints, key lengths, and corresponding block addresses of a plurality of keys having the same hash value.

7. The method of claim 6, wherein the KV operation request is a KV modification request, the method further comprising:

8. The method of claim 6, wherein the KV operation request encapsulates a plurality of KV operations;

generating a plurality of transactions according to the KV operation request, wherein each transaction in the plurality of transactions is used for executing one KV operation in the plurality of KV operations;

the plurality of transactions are executed in parallel by a plurality of cores.

9. An accelerator comprising a processing module and a communication interface for providing network communication for the processing module, the accelerator for performing the method of any of claims 1 to 8.

10. A computing device comprising an accelerator, wherein the computing device comprises the accelerator and a processor, the accelerator to perform the method of any of claims 1-8.