CN117666450A - Control signal output circuit and control device - Google Patents
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Abstract
The invention discloses a control signal output circuit and control equipment, wherein the circuit comprises: the output end of the converter is connected with the normal phase input end of the first amplifier, the output end of the first amplifier is respectively connected with the normal phase input end of the second amplifier and one end of the first resistor assembly, the other end of the first resistor assembly is used as the output end of the output circuit and is respectively connected with the reverse phase input end of the second amplifier and one end of the second resistor assembly, the reverse phase input end of the second amplifier is connected with the output end of the second resistor assembly, the other end of the second resistor assembly is connected with the reverse phase input end of the first amplifier, the controllable switch is arranged between the reverse phase input end of the first amplifier and the output end of the second amplifier, the controllable switch is in an off state when the output circuit outputs a first control signal, and the controllable switch is in an on state when the output circuit outputs a second control signal.
Description
Technical Field
The invention relates to the technical field of industrial control, in particular to a control signal output circuit and control equipment.
Background
The industrial control field widely uses 4-20mA/0-10V as control signals, the 4-20mA/0-10V output circuits in the related technology are complex, one circuit is used for outputting the 4-20mA control signals, the other circuit is used for outputting the 0-10V control signals, the cost is high, and the wiring is complex.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, a first object of the present invention is to provide a control signal output circuit, which can output two control signals through one output circuit, thereby effectively reducing the cost and simplifying the wiring.
A second object of the present invention is to propose a control device.
In order to achieve the above object, an embodiment of a first aspect of the present invention provides an output circuit of a control signal, wherein the output circuit includes: the output end of the converter is connected with the normal phase input end of the first amplifier, the output end of the first amplifier is respectively connected with the normal phase input end of the second amplifier and one end of the first resistor component, the other end of the first resistor component is used as the output end of the output circuit and is respectively connected with the reverse phase input end of the second amplifier and one end of the second resistor component, the reverse phase input end of the second amplifier is connected with the output end of the second resistor component, the other end of the second resistor component is connected with the reverse phase input end of the first amplifier, and the controllable switch is arranged between the reverse phase input end of the first amplifier and the output end of the second amplifier, wherein the controllable switch is configured to be in an off state when the output circuit is used for outputting a first control signal and in a closed state when the output circuit is used for outputting a second control signal.
According to the control signal output circuit provided by the embodiment of the invention, two control signals can be output through one output circuit, so that the cost is effectively reduced, and the wiring is simple.
In addition, the output circuit of the control signal according to the above embodiment of the present invention may further include the following additional technical features:
according to one embodiment of the invention, the converter is configured to convert received digital quantity information into analog quantity information.
According to one embodiment of the present invention, the second resistor assembly includes a first resistor and a second resistor, one end of the first resistor is connected to the inverting input terminal of the first amplifier and has a first node, the other end of the first resistor is connected to the other end of the first resistor assembly, one end of the second resistor is connected to the first node, and the other end of the second resistor is grounded.
According to one embodiment of the invention, the second resistor assembly is configured to determine a magnification of the analog quantity information.
According to one embodiment of the invention, the first resistor assembly comprises at least two resistors connected in parallel.
According to one embodiment of the invention, the first resistor assembly is configured to convert a voltage signal output by the output of the first amplifier into the second control signal.
According to one embodiment of the invention, the output circuit further comprises: one end of the third resistor is connected with the output end of the second amplifier, and the other end of the third resistor is connected with the inverting input end of the second amplifier; one end of the fourth resistor is connected with the other end of the third resistor, and the other end of the fourth resistor is connected with the other end of the first resistor component; one end of the fifth resistor is connected with the non-inverting input end of the second amplifier, and the other end of the fifth resistor is grounded; and one end of the sixth resistor is connected with one end of the fifth resistor, and the other end of the sixth resistor is connected with one end of the first resistor assembly.
According to one embodiment of the invention, the output circuit further comprises: one end of the first protection branch is connected with the other end of the first resistor assembly, and the other end of the first protection branch is used as an output end of the output circuit; and one end of the second protection branch is connected with the output end of the converter, and the other end of the second protection branch is connected with the non-inverting input end of the first amplifier.
According to one embodiment of the invention, the first protection branch comprises: a cathode of the first transient diode is connected with the other end of the first resistor component, and an anode of the first transient diode is grounded; one end of the fuse is connected with the cathode of the first transient diode; and the cathode of the second transient diode is connected with the other end of the fuse and is used as the output end of the output circuit, and the anode of the second transient diode is grounded.
According to one embodiment of the invention, the second protection branch comprises: one end of the third transient diode is connected with the output end of the converter, and the other end of the third transient diode is grounded; one end of the first capacitor is connected with one end of the third transient diode, and the other end of the first capacitor is grounded; one end of the seventh resistor is connected with one end of the first capacitor, and the other end of the seventh resistor is connected with the non-inverting input end of the first amplifier and is provided with a second node; and one end of the second capacitor is connected with the second node, and the other end of the second capacitor is grounded.
According to one embodiment of the invention, the capacitance of the first capacitor is less than 1nF.
In order to achieve the above object, an embodiment of a second aspect of the present invention proposes a control device, wherein the control device includes the output circuit of the control signal of the foregoing embodiment of the present invention.
According to the control device provided by the embodiment of the invention, by adopting the output circuit of the control signal, two control signals can be output through one output circuit, so that the cost is effectively reduced, and the wiring is simple.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a schematic circuit diagram of an output circuit for a control signal in accordance with an embodiment of the present invention;
fig. 2 is a block schematic diagram of a control device in an embodiment according to the invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
An output circuit and a control device of a control signal according to an embodiment of the present invention are described below with reference to the drawings.
Fig. 1 is a schematic circuit diagram of an output circuit of a control signal in an embodiment according to the present invention.
Specifically, in some embodiments of the present invention, as shown in fig. 1, the output circuit of the control signal includes: the output end of the converter U13 is connected with the normal phase input end of the first amplifier U5D, the output end of the first amplifier U5D is respectively connected with the normal phase input end of the second amplifier U5A and one end of the first resistor component, the other end of the first resistor component is used as the output end of the output circuit and is respectively connected with the reverse phase input end of the second amplifier U5A and one end of the second resistor component, the reverse phase input end of the second amplifier U5A is connected with the output end, the other end of the second resistor component is connected with the reverse phase input end of the first amplifier U5D, and the controllable switch is arranged between the reverse phase input end of the first amplifier U5D and the output end of the second amplifier U5A, wherein the controllable switch is configured to be in an off state when the output circuit is used for outputting a first control signal and in a closed state when the output circuit is used for outputting a second control signal.
Specifically, in this embodiment, the second resistor assembly includes a first resistor R1 and a second resistor R2, one end of the first resistor R1 is connected to the inverting input terminal of the first amplifier U5D and has a first node P1, the other end of the first resistor R1 is connected to the other end of the first resistor R1 assembly, one end of the second resistor R2 is connected to the first node P1, and the other end of the second resistor R2 is grounded. The resistance of the first resistor R1 is 200k, and the resistance of the second resistor R2 is 100k.
The first resistor R1 assembly includes an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10, wherein one end of the eighth resistor R8 is connected to one end of the ninth resistor R9 and one end of the tenth resistor R10, respectively, and has a third node P3, the third node P3 is connected to the output end of the first amplifier U5D and the non-inverting input end of the second amplifier U5A, respectively, and the other end of the eighth resistor R8 is connected to the other end of the ninth resistor R9 and the other end of the tenth resistor R10, respectively, and has a fourth node P4, and the fourth node P4 is used as an output end of the output circuit. The resistance values of the eighth resistor R8, the ninth resistor R9 and the tenth resistor R10 are 499Ω.
The model of the converter U13 is GP8502, and an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a third capacitor C3, and a fourth capacitor C4 are disposed around the converter U13. The NC pin 1 of the converter U13 is connected with an I2C2-SCL port of the singlechip, the NC pin 2 of the converter U13 is connected with an I2C2-SDA port of the singlechip, one end of a fourteenth resistor R14 is connected with the NC pin 2 of the converter U13, the other end of the fourteenth resistor R14 is connected with a 3.3V direct current power supply, one end of a fifteenth resistor R15 is connected with the NC pin 1 of the converter U13, the other end of the fifteenth resistor R15 is connected with the other end of the fourteenth resistor R14, one end of a third capacitor C3 is connected with the other end of the fifteenth resistor R15, and the other end of the third capacitor C3 is grounded; the ENB pin of the converter U13 is connected with one end of a thirteenth resistor R13, and the other end of the thirteenth resistor R13 is connected with a 3.3V direct current power supply. The GND pin of the converter U13 is grounded, the VOUT pin 6 of the converter U13 is used as an output end, the REFEN pin 4 of the converter U13 is connected with one end of an eleventh resistor R11, the other end of the eleventh resistor R11 is grounded, one end of a twelfth resistor R12 is connected with one end of the eleventh resistor R11, the other end of the twelfth resistor R12 is connected with a 3.3V direct current power supply, and the VCC pin 8 of the converter U13 is connected with the other end of the twelfth resistor R12; the fourth capacitor C4 is arranged beside the converter U13, one end of the fourth capacitor C4 is connected with a 3.3V direct current power supply, and the fourth capacitor C4 plays a role in filtering. The resistance of the eleventh resistor R11, the twelfth resistor R12, and the thirteenth resistor R13 is 1k, the resistance of the fourteenth resistor R14 and the fifteenth resistor R15 is 10k, and the capacitance of the third capacitor C3 and the fourth capacitor C4 is 0.1uF.
The selection type of the first amplifier U5D and the second amplifier U5A is LM224DT, wherein the power supply end of the second amplifier U5A is connected with a 20V power supply.
The controllable switch may be a dial switch or a relay, and in addition, the present invention may not specifically limit the type of the controllable switch.
Further, in some embodiments of the invention, the converter is configured to convert the received digital quantity information into analog quantity information.
Specifically, in this embodiment, the host computer sends digital quantity information to the converter, the converter converts the received digital quantity information into analog quantity information, the model of the converter may be preferably GP8502, the analog quantity information includes a voltage of 0V to 3.3V, and in addition, the present invention may not specifically limit the type of the converter, for example, the signal of the converter may be GP8500.
Further, in some embodiments of the invention, the second resistor assembly is configured to determine a magnification of the analog quantity information.
Specifically, in this embodiment, as shown in fig. 1, the second resistor assembly includes a first resistor R1 and a second resistor R2, and when the controllable switch is in the off state, the circuits in which the first amplifier U5D and the second resistor assembly are located form a common circuitAnd in the phase amplification circuit, the resistance value of the first resistor R1 is 200k, the resistance value of the second resistor R2 is 100k, and the amplification factor of analog quantity information can be obtained according to ohm's law and is 3 times. For example, the analog information is input at the non-inverting input of the first amplifier U5DAt a voltage of 0 to 3.3V, the voltage of the fourth node P4 is +.>The calculation can be based on the following formula:
further, in some embodiments of the invention, the first resistor assembly comprises at least two resistors connected in parallel.
Specifically, in this embodiment, as shown in fig. 1, the first resistor assembly includes three parallel resistors, namely, an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10, and the resistance values of the three parallel resistors are 499Ω.
Further, in some embodiments of the present invention, the first resistive component is configured to convert a voltage signal output by the output terminal of the first amplifier into the second control signal.
Specifically, in this embodiment, as shown in fig. 1, the first resistor assembly includes an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10, where the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10 are connected in parallel, and resistance values of the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10 are 499Ω, that is, a voltage signal at an output terminal of the first amplifier U5D may be converted into a second control signal, and the second control signal includes a current signal of 4mA to 20 mA.
Further, in some embodiments of the present invention, as shown in fig. 1, the output circuit further includes: one end of the third resistor R3 is connected with the output end of the second amplifier U5A, and the other end of the third resistor R3 is connected with the inverting input end of the second amplifier U5A; one end of the fourth resistor R4 is connected with the other end of the third resistor R3, and the other end of the fourth resistor R4 is connected with the other end of the first resistor component; one end of the fifth resistor R5 is connected with the non-inverting input end of the second amplifier U5A, and the other end of the fifth resistor R5 is grounded; and one end of the sixth resistor R6 is connected with one end of the fifth resistor R5, and the other end of the sixth resistor R6 is connected with one end of the first resistor assembly. The resistance values of the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are 100k.
Specifically, in this embodiment, when the controllable switch is in the closed state, the voltage at the output end of the second amplifier U5A is equal to the voltage difference across the eighth resistor R8, and when the non-inverting input end and the inverting input end of the second amplifier U5A are virtually disconnected, the currents flowing through the third resistor R3 and the fourth resistor R4 are equal, and the currents flowing through the fifth resistor R5 and the sixth resistor R6 are equal, so that the following formula can be obtained:
wherein,for the voltage at the third node P3, < ->For the voltage at the fourth node P4, < ->For the voltage at the non-inverting input of the second amplifier U5A, +.>For the voltage at the inverting input of the second amplifier U5A, +.>For the second amplifier U5AIs provided.
When the non-inverting input terminal and the inverting input terminal of the second amplifier U5A are short, the voltage of the non-inverting input terminal of the second amplifier U5A is equal to the voltage of the inverting input terminal, which results in the following formula:
wherein,for the voltage at the non-inverting input of the second amplifier U5A, +.>Is the voltage at the inverting input of the second amplifier U5A.
The calculation can be obtained from the above formula:
wherein,equal to the voltage difference across the eighth resistor R8.
And then the voltage of the non-inverting input end of the first amplifier U5D is equal to the voltage of the two ends of the eighth resistor R8, and the voltage of the non-inverting input end of the first amplifier U5D is divided by the resistance value of the eighth resistor R8, the ninth resistor R9 and the tenth resistor R10 which are connected in parallel, so that the output of a current signal from 4mA to 20mA can be realized.
Further, in some embodiments of the present invention, the output circuit further includes: one end of the first protection branch is connected with the other end of the first resistor assembly, and the other end of the first protection branch is used as an output end of the output circuit; and one end of the second protection branch is connected with the output end of the converter, and the other end of the second protection branch is connected with the non-inverting input end of the first amplifier.
Specifically, in this embodiment, as shown in fig. 1, the first protection branch includes: the cathode of the first transient diode D1 is connected with the other end of the first resistor R1 component, and the anode of the first transient diode D1 is grounded; a fuse F1, wherein one end of the fuse F1 is connected with the cathode of the first transient diode D1; and the cathode of the second transient diode D2 is connected with the other end of the fuse F1 and serves as an output end of the output circuit, and the anode of the second transient diode D2 is grounded. The first transient diode D1 and the second transient diode D2 are SMBJ15CA-AT, the fuse F1 is SMD1210B005TF, the first transient diode D1 and the second transient diode D2 can protect a circuit from electrostatic discharge, voltage surge, overvoltage and the like, and the fuse F1 can protect the circuit from excessive current impact.
The second protection branch includes: the other end of the third transient diode D3 is grounded; one end of the first capacitor C1 is connected with one end of the third transient diode D3, and the other end of the first capacitor C1 is grounded; a seventh resistor R7, one end of the seventh resistor R7 is connected to one end of the first capacitor C1, and the other end of the seventh resistor R7 is connected to the non-inverting input end of the first amplifier U5D and has a second node P2; and one end of the second capacitor C2 is connected with the second node P2, and the other end of the second capacitor C2 is grounded. The model of the third transient diode D3 is SMF6.0CA, the value of the first capacitor C1 affects the dynamic characteristics, the value of the first capacitor C1 may be smaller than 1nF according to practical situations, the value of the first capacitor C1 is 220pF, the resistance of the seventh resistor R7 is 51k, the value of the second capacitor C2 is 0.1uF, where the third transient diode D3, the first capacitor C1 and the second capacitor C2 play a role in filtering the voltage output by the converter U13, and the seventh resistor R7 is a protection resistor and plays a role in protecting the circuit.
Summarizing, when the controllable switch is in an off state, the inverting input terminal of the first amplifier and the output terminal of the second amplifier are in an off state, and the output circuit of the control signal outputs a first control signal, wherein the first control signal comprises a voltage signal of 0V to 10V, and when the controllable switch is in an on state, the inverting input terminal of the first amplifier and the output terminal of the second amplifier are in a connected state, and the output circuit of the control signal outputs a second control signal, wherein the second control signal comprises a current signal of 4mA to 20 mA.
In summary, according to the control signal output circuit provided by the embodiment of the invention, two control signals can be output through one output circuit, so that the cost is effectively reduced, and the wiring is simple.
Fig. 2 is a schematic structural view of a control apparatus according to an embodiment of the present invention.
As shown in fig. 2, the control apparatus 1000 includes the output circuit 100 of the control signal of the above-described embodiment of the present invention.
According to the control device provided by the embodiment of the invention, by adopting the output circuit of the control signal, two control signals can be output through one output circuit, so that the cost is effectively reduced, and the wiring is simple.
In addition, other configurations and functions of the control device according to the embodiments of the present invention are known to those skilled in the art, and are not described herein for redundancy reduction.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, for example, may be considered as a ordered listing of executable instructions for implementing logical functions, and may be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (12)
1. An output circuit for a control signal, the output circuit comprising: the output end of the converter is connected with the normal phase input end of the first amplifier, the output end of the first amplifier is respectively connected with the normal phase input end of the second amplifier and one end of the first resistor assembly, the other end of the first resistor assembly is used as the output end of the output circuit and is respectively connected with the reverse phase input end of the second amplifier and one end of the second resistor assembly, the reverse phase input end of the second amplifier is connected with the output end of the second resistor assembly, the other end of the second resistor assembly is connected with the reverse phase input end of the first amplifier, the controllable switch is arranged between the reverse phase input end of the first amplifier and the output end of the second amplifier,
the controllable switch is configured to be in an off state when the output circuit is used to output a first control signal and in a closed state when the output circuit is used to output a second control signal.
2. The output circuit of the control signal according to claim 1, wherein the converter is configured to convert received digital quantity information into analog quantity information.
3. The control signal output circuit according to claim 2, wherein the second resistor assembly includes a first resistor and a second resistor, one end of the first resistor is connected to the inverting input terminal of the first amplifier and has a first node, the other end of the first resistor is connected to the other end of the first resistor assembly, one end of the second resistor is connected to the first node, and the other end of the second resistor is grounded.
4. The control signal output circuit of claim 3, wherein the second resistive component is configured to determine a magnification factor of the analog quantity information.
5. The control signal output circuit of claim 1, wherein the first resistive component comprises at least two resistors connected in parallel.
6. The control signal output circuit of claim 5, wherein the first resistive component is configured to convert a voltage signal output by the output of the first amplifier into the second control signal.
7. The output circuit of a control signal according to claim 1, wherein the output circuit further comprises:
one end of the third resistor is connected with the output end of the second amplifier, and the other end of the third resistor is connected with the inverting input end of the second amplifier;
one end of the fourth resistor is connected with the other end of the third resistor, and the other end of the fourth resistor is connected with the other end of the first resistor component;
one end of the fifth resistor is connected with the non-inverting input end of the second amplifier, and the other end of the fifth resistor is grounded;
and one end of the sixth resistor is connected with one end of the fifth resistor, and the other end of the sixth resistor is connected with one end of the first resistor assembly.
8. The output circuit of a control signal according to claim 1, wherein the output circuit further comprises:
one end of the first protection branch is connected with the other end of the first resistor assembly, and the other end of the first protection branch is used as an output end of the output circuit;
and one end of the second protection branch is connected with the output end of the converter, and the other end of the second protection branch is connected with the non-inverting input end of the first amplifier.
9. The control signal output circuit of claim 8, wherein the first protection branch comprises:
a cathode of the first transient diode is connected with the other end of the first resistor component, and an anode of the first transient diode is grounded;
one end of the fuse is connected with the cathode of the first transient diode;
and the cathode of the second transient diode is connected with the other end of the fuse and is used as the output end of the output circuit, and the anode of the second transient diode is grounded.
10. The control signal output circuit of claim 8, wherein the second protection branch comprises:
one end of the third transient diode is connected with the output end of the converter, and the other end of the third transient diode is grounded;
one end of the first capacitor is connected with one end of the third transient diode, and the other end of the first capacitor is grounded;
one end of the seventh resistor is connected with one end of the first capacitor, and the other end of the seventh resistor is connected with the non-inverting input end of the first amplifier and is provided with a second node;
and one end of the second capacitor is connected with the second node, and the other end of the second capacitor is grounded.
11. The control signal output circuit of claim 10, wherein the first capacitance has a capacitance value of less than 1nF.
12. A control device, characterized in that the control device comprises an output circuit for the control signal according to any one of claims 1-11.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202410140344.6A CN117666450B (en) | 2024-02-01 | 2024-02-01 | Control signal output circuit and control device |
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| CN202410140344.6A CN117666450B (en) | 2024-02-01 | 2024-02-01 | Control signal output circuit and control device |
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| CN117666450A true CN117666450A (en) | 2024-03-08 |
| CN117666450B CN117666450B (en) | 2024-04-12 |
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| CN202410140344.6A Active CN117666450B (en) | 2024-02-01 | 2024-02-01 | Control signal output circuit and control device |
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| EP0270871A2 (en) * | 1986-12-12 | 1988-06-15 | Heidelberger Druckmaschinen Aktiengesellschaft | Input/output system for signals in a digital control system |
| CN202815491U (en) * | 2012-10-24 | 2013-03-20 | 惠州市蓝微电子有限公司 | Output circuit with high error-proofing and high driving capability |
| CN106707847A (en) * | 2016-11-30 | 2017-05-24 | 中国船舶重工集团公司第七六研究所 | Mixed input signal quantity intelligent detection device |
| CN106972843A (en) * | 2017-03-28 | 2017-07-21 | 浙江大学 | Possess the electronic instrument control signal output circuit and implementation method of defencive function |
| CN108062054A (en) * | 2017-12-22 | 2018-05-22 | 深圳市英威腾电气股份有限公司 | A kind of analog signals output circuit |
| CN210721074U (en) * | 2019-09-24 | 2020-06-09 | 衡水益通管业股份有限公司 | Signal acquisition and output circuit and device |
| CN115864781A (en) * | 2022-12-12 | 2023-03-28 | 国网江苏省电力有限公司 | Power supply circuit with multiple output modes and test equipment |
| KR102542082B1 (en) * | 2022-05-23 | 2023-06-13 | 이종영 | Control signal input/output controller Stage equipment system |
-
2024
- 2024-02-01 CN CN202410140344.6A patent/CN117666450B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0270871A2 (en) * | 1986-12-12 | 1988-06-15 | Heidelberger Druckmaschinen Aktiengesellschaft | Input/output system for signals in a digital control system |
| CN202815491U (en) * | 2012-10-24 | 2013-03-20 | 惠州市蓝微电子有限公司 | Output circuit with high error-proofing and high driving capability |
| CN106707847A (en) * | 2016-11-30 | 2017-05-24 | 中国船舶重工集团公司第七六研究所 | Mixed input signal quantity intelligent detection device |
| CN106972843A (en) * | 2017-03-28 | 2017-07-21 | 浙江大学 | Possess the electronic instrument control signal output circuit and implementation method of defencive function |
| CN108062054A (en) * | 2017-12-22 | 2018-05-22 | 深圳市英威腾电气股份有限公司 | A kind of analog signals output circuit |
| CN210721074U (en) * | 2019-09-24 | 2020-06-09 | 衡水益通管业股份有限公司 | Signal acquisition and output circuit and device |
| KR102542082B1 (en) * | 2022-05-23 | 2023-06-13 | 이종영 | Control signal input/output controller Stage equipment system |
| CN115864781A (en) * | 2022-12-12 | 2023-03-28 | 国网江苏省电力有限公司 | Power supply circuit with multiple output modes and test equipment |
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| CN117666450B (en) | 2024-04-12 |
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