CN117651128A - Video display method, apparatus, computer device and storage medium - Google Patents
Video display method, apparatus, computer device and storage medium Download PDFInfo
- Publication number
- CN117651128A CN117651128A CN202311532336.8A CN202311532336A CN117651128A CN 117651128 A CN117651128 A CN 117651128A CN 202311532336 A CN202311532336 A CN 202311532336A CN 117651128 A CN117651128 A CN 117651128A
- Authority
- CN
- China
- Prior art keywords
- video signal
- preset
- eye frame
- information
- initial video
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 42
- 230000015654 memory Effects 0.000 claims abstract description 173
- 238000012545 processing Methods 0.000 claims abstract description 83
- 238000004590 computer program Methods 0.000 claims abstract description 41
- 230000000873 masking effect Effects 0.000 claims description 12
- 230000009286 beneficial effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 10
- 230000005540 biological transmission Effects 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003550 marker Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 210000004556 brain Anatomy 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
Abstract
The present application relates to a video display method, apparatus, computer device, storage medium and computer program product. The method comprises the following steps: acquiring an initial video signal and identifying a zone bit of the initial video signal; if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen. The method can realize 2/3D compatible display without increasing the hardware cost of a control system; and the processing efficiency of the initial video is improved, thereby being beneficial to reducing the video display delay.
Description
Technical Field
The present application relates to the field of signal display technology, and in particular, to a video display method, apparatus, computer device, storage medium, and computer program product.
Background
With the development of video display technology, a 3D display technology has emerged, and the 3D display technology mainly uses subtle differences of images seen by left and right eyes of a human eye, namely parallax, which can cause a brain to read into a stereoscopic imaging effect, thereby achieving the purpose of 3D display.
At present, 3D display is mainly finished through an active 3D display technology, and the active 3D display mainly utilizes a screen to sequentially display complete left and right eye images, and simultaneously sends left and right eye synchronizing signals to strictly synchronize left and right eye switches of active shutter 3D glasses, so that the left and right eye images at the screen end are consistent with images seen by left and right eyes of a user.
However, at present, 2D video is still the mainstream video, and the active 3D display technology uses a screen to sequentially display complete left and right eye images, so that one frame of image needs to be transmitted twice, and therefore, the transmission bandwidth needs to be increased by one time, and the hardware cost of a control system needs to be increased for the compatibility of 2D display and 3D display.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a video display method, apparatus, computer device, computer-readable storage medium, and computer program product that can reduce hardware costs.
In a first aspect, the present application provides a video display method. The method comprises the following steps:
acquiring an initial video signal and identifying a zone bit of the initial video signal;
if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen;
if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
In one embodiment, the at least 2 preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; the interleaving processing is performed on the left eye frame and the right eye frame of the initial video signal in at least 2 preset memories to obtain a 3D video signal, including:
if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of the initial video signal into the first preset memory; pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
In one embodiment, the frame line information is comprised of a plurality of pixel arrangements; the step of alternatively selecting pixel information from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and writing the pixel information into the second preset memory includes:
a pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier; reading a first pixel value from the current left-eye frame line information stored in the first preset memory according to a first pixel position identifier, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to a second pixel position identifier; writing the first pixel value and the second pixel value into a second preset memory according to a preset interleaving sequence; returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read; the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, and the value of N is increased along with the execution times of the pixel position mark reading step.
In one embodiment, the at least 2 preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; the interleaving processing is performed on the left eye frame and the right eye frame of the initial video signal in at least 2 preset memories to obtain a 3D video signal, including:
If the initial video signal belongs to a second 3D video signal type, reading left eye frame information of the initial video signal; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into the first preset memory; reading right-eye frame information of the initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory.
In one embodiment, the left-eye frame information includes a plurality of left-eye frame lines; the masking processing is performed on the left-eye frame information to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory, including:
if the current left eye frame acts as an odd left eye frame, carrying out mask processing on pixel points at a first pixel position in the left eye frame information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; if the current left eye frame line is even, carrying out mask processing on pixel points at a second pixel position in the left eye frame line information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; the arrangement position sequence of the first pixel position in the left-eye frame line information is 2M, the arrangement position sequence of the second pixel position in the left-eye frame line information is 2M-1, and M is a positive integer.
In one embodiment, the displaying the 2D video signal through a preset display screen includes adjusting a screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal through the preset display screen at the first preset brightness; the displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen; wherein the second preset brightness is greater than the first preset brightness.
In a second aspect, the present application also provides a video display apparatus. The device comprises:
the signal source module is used for acquiring an initial video signal, and carrying out zone bit identification on the initial video signal to obtain a zone bit type;
the 2D video processing module is used for performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen;
and the 3D video processing module is used for carrying out interleaving processing on the left eye frame and the right eye frame of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
In a third aspect, the present application also provides a computer device. The computer device comprises a memory storing a computer program and a processor which when executing the computer program performs the steps of:
acquiring an initial video signal and identifying a zone bit of the initial video signal; if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
In a fourth aspect, the present application also provides a computer-readable storage medium. The computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:
acquiring an initial video signal and identifying a zone bit of the initial video signal; if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
In a fifth aspect, the present application also provides a computer program product. The computer program product comprises a computer program which, when executed by a processor, implements the steps of:
acquiring an initial video signal and identifying a zone bit of the initial video signal; if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
The passive 3D display method, the device, the computer equipment, the storage medium and the computer program product are used for obtaining the type of the marker bit by obtaining the initial video signal and carrying out marker bit identification on the initial video signal; if the zone bit type is a first preset zone, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the zone bit type is a second preset zone, interleaving left eye frames and right eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen. In the method, the left eye frame and the right eye frame of the initial video signal are subjected to interleaving processing in at least 2 preset memories by the initial video signal of the second preset mark, the obtained 3D video signal is the frame information of the mutual interleaving of the left eye frame information and the right eye frame information, and the left eye image and the right eye image can be simultaneously displayed according to the interleaving frame information, so that the transmission bandwidths of the processed 3D video signal and the 2D video signal are consistent, and the 3D display can be realized without increasing the hardware cost of a control system; and when the initial video signal of the second preset mark is subjected to interleaving treatment, at least 2 preset memories are used for interleaving treatment on the initial video signal, and the interleaving treatment can be performed while the initial video signal is read, so that the processing efficiency of the initial video is improved, and the video display delay is reduced.
Drawings
FIG. 1 is a flow chart of a video display method according to an embodiment;
FIG. 2 is a schematic diagram of two formats of a 3D video frame in one embodiment;
FIG. 3 is a schematic diagram of the format of left and right 3D video types in one embodiment;
FIG. 4 is a schematic diagram of the format of the up and down 3D video types in one embodiment;
FIG. 5 is a schematic diagram of a format of a line-space 3D video type in one embodiment;
FIG. 6 is a schematic diagram of an interleaving process for left and right 3D video types in one embodiment;
FIG. 7 is a schematic diagram of an interleaving process of up and down 3D video types in one embodiment;
FIG. 8 is a schematic diagram of a mask interleaving process for a line-space 3D video type in one embodiment;
FIG. 9 is a flow chart of a video display method according to one embodiment;
FIG. 10 is a block diagram showing the structure of a video display apparatus in one embodiment;
FIG. 11 is an internal block diagram of a computer device in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In one embodiment, as shown in fig. 1, a video display method is provided, where the method is applied to a terminal to illustrate, it is understood that the method may also be applied to a server, and may also be applied to a system including the terminal and the server, and implemented through interaction between the terminal and the server. In this embodiment, the method includes the steps of:
step 202, acquiring an initial video signal and identifying a flag bit of the initial video signal.
The initial video signal may be obtained through interfaces such as HDMI, DP, DVI and a cinema server, where the initial video signal includes a video flag bit, a video type of the initial video signal may be obtained according to the flag bit of the initial video, the flag bit may be 0 or 1, when the flag bit is 1, the initial video signal is indicated as a 3D video type, and when the flag bit is 0, the initial video signal is indicated as a 2D video type.
In step 204, if the flag bit is the first preset flag, the initial video signal is gamma-processed to obtain a 2D video signal, and the 2D video signal is displayed through a preset display screen.
The first preset flag bit may be 0, the initial video signal corresponding to the first preset flag bit is a 2D video type, the gamma processing is a method of editing a gamma curve of an image to perform nonlinear tone editing on the image, a dark color part and a light color part in the image signal are detected, and the proportion of the dark color part and the light color part is increased, so that the contrast effect of the image is improved, the gamma curve is a conversion relation curve between a screen output voltage and corresponding brightness, and the preset display screen may be an LED screen.
As one example, a specific mathematical expression of the gamma process is as follows:
V out ＝V in γ
wherein V is out For 2D video output signal, V in For the initial video input signal, γ is a constant.
Step 206, if the flag bit is the second preset flag, the left-eye frame and the right-eye frame of the initial video signal are interleaved in at least 2 preset memories to obtain a 3D video signal, and the 3D video signal is displayed through a preset display screen.
The second preset flag bit may be 1, the initial video signal corresponding to the second preset flag bit is of a 3D video type, the initial video signal of the 3D video type includes a left eye frame and a right eye frame, the interleaving process refers to selecting half of the left eye frame and half of the right eye frame for interleaving and merging, the 3D video signal is composed of 3D video frames, the sizes of the 3D video frames are consistent with those of the left eye frame and the right eye frame, and the passive 3D frames and the 3D glasses cooperate to display left and right eye images at the same frame at the same time, so that 3D display is achieved, and therefore, the 3D video frames and the 2D video signals of the embodiment are consistent in size and can be transmitted by using the same transmission bandwidth.
As an example, as shown in fig. 2, the 3D video frame includes two 3D formats, both of which are in a checkerboard arrangement, taking fig. 2 (a) as an example, where L in L00 represents a left eye frame, 00 represents a 1 st row and a 1 st column, i.e., L00 represents a 1 st left eye frame row and a 1 st column pixel, L24 represents a 3 rd left eye frame row and a 5 th column pixel, R01 represents a 1 st right eye frame row and a 2 nd column pixel, R34 represents a 4 th right eye frame row and a 5 th right eye frame row pixel, and the 3D video frame is formed by interlacing a left eye frame row pixel with a right eye frame row pixel.
As an example, step 206 includes: if the flag bit is a second preset flag, judging the 3D video signal type of the initial video signal; if the initial video signal belongs to the first 3D video signal type, performing interleaving treatment on left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal; if the initial video signal belongs to the second 3D video signal type, mask interleaving is carried out on left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal; and displaying the 3D video signal through a preset display screen.
As an example, the first 3D video signal type includes a left-right 3D video type and a line-space 3D video type, and the second 3D video signal type includes an upper and lower 3D video type.
In the video display method, the left-eye image and the right-eye image can be simultaneously displayed in the same frame by the 3D video signal obtained by interleaving the left-eye frame and the right-eye frame of the initial video signal, and the 3D video signal and the 2D video signal of the embodiment have the same size, so that the same transmission bandwidth can be used for transmission, and the hardware cost of a control system is not required to be increased when the 2/3D compatible display is performed; in addition, according to the characteristic that the initial video signal of the 3D video type comprises a left eye frame and a right eye frame, the interleaving processing can be performed by using at least 2 preset memories when the initial video signal is read, so that the processing efficiency of the initial video is improved, and the video display delay is reduced.
In one embodiment, the at least 2 preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; interleaving left-eye frames and right-eye frames of an initial video signal in at least 2 preset memories to obtain a 3D video signal, including:
if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of an initial video signal into a first preset memory; the pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
The initial video signal is composed of a plurality of frame line information, and when the frame line information of the initial video signal is read, the frame line information of the initial video signal of the first 3D video signal type needs to be orderly read according to the arrangement sequence of the frame line information of the 3D video signal, and the frame line information of the initial video signal of the first 3D video signal type is read by interleaving left eye frame lines with right eye frame lines, so that the left eye frame line information and the right eye frame line information can be simultaneously interleaved when the frame line information is read; the first predetermined memory may be a random access memory (RAM, random Access Memory) and the second predetermined memory may be a double rate random access memory (DDR, double Data Rate Synchronous Dynamic Random Access Memory).
Specifically, as shown in fig. 6 and 7, left Frame Line1 represents a Left-eye 1 st Frame Line, right Frame Line1 represents a Right-eye 1 st Frame Line; if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of an initial video signal into the RAM; pixel information is selected in a staggered mode from current left-eye frame line information and current right-eye frame line information of an initial video signal stored in the RAM to serve as 3D frame line information to be written into the DDR; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the RAM. In this embodiment, taking the case that the left-eye frame line is in front, when the right-eye frame line is in front, the method of this embodiment may also implement the interleaving processing on the original video signal, and when the right-eye frame line is in front, the 3D frame obtained by the interleaving processing is shown in fig. 2 b.
In the above embodiment, the 2 preset memories are used to perform the interleaving processing of the left-eye frame line information and the right-eye frame line information on the initial video signal, the interleaving processing can be completed while the left-eye frame line and the right-eye frame line are read, the interleaving processing of the original video signal can be realized without waiting until the reading of the left-eye frame line and the right-eye frame line is completed, and the interleaving processing of the original video signal can be realized by the RAM capable of storing one line of frame information and the DDR capable of storing the left-eye frame information in the memory space, so that the storage space of the memories can be saved, the processing efficiency of the initial video can be improved, and the video display delay can be reduced.
In one embodiment, the frame line information is comprised of a plurality of pixel arrangements; the method for writing the 3D frame line information into the second preset memory by using the pixel information which is selected in a staggered way from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal comprises the following steps:
a pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier; reading a first pixel value from the current left-eye frame line information stored in the first preset memory according to the first pixel position identification, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to the second pixel position identification; writing the first pixel value and the second pixel value into a second preset memory according to a preset interleaving sequence; returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read; the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, and the value of N is increased along with the execution times of the pixel position mark reading step.
The preset interleaving sequence is determined according to the arrangement sequence of the left-eye frame line and the right-eye frame line of the original video signal, if the left-eye frame line is in front, the preset interleaving sequence is that the first pixel value is written into the second preset memory before the second pixel value, and if the right-eye frame line is in front, the preset interleaving sequence is that the second pixel value is written into the second preset memory before the first pixel value, and the initial value of N can be 1.
Specifically, the pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier; reading a first pixel value from the current left-eye frame line information stored in the RAM according to the first pixel position identification, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to the second pixel position identification; if the left-eye frame line of the initial video signal is in front, the first pixel value and the second pixel value are sequentially written into the DDR, and if the right-eye frame line of the initial video signal is in front, the second pixel value and the first pixel value are sequentially written into the DDR; returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read; the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, the value of N increases with the execution times of the pixel position mark reading step, and the initial value of N is 1.
In one embodiment, the at least 2 preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; interleaving left-eye frames and right-eye frames of an initial video signal in at least 2 preset memories to obtain a 3D video signal, including:
If the initial video signal belongs to the second 3D video signal type, reading left eye frame information of the initial video signal; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into a first preset memory; reading right-eye frame information of an initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory.
Wherein the frame line information arrangement mode of the initial video signal of the second 3D video signal type is that all left eye frames are arranged before the right eye frames, and the mask processing means to mask the specified pixels by bitwise operation with the target pixels.
As an example, taking color depth 8bit rgb, 4 pixels at a time as an example, the masking operation is as follows:
where X represents a value that is not written, i.e., does not affect the existing value of the RAM.
Specifically, as shown in fig. 8, left Frame represents a Left-eye Frame line, right Frame represents a Right-eye Frame; if the initial video signal belongs to the second 3D video signal type, reading left eye frame information of the initial video signal; performing mask processing on the left-eye frame information according to the first preset mask to obtain mask left-eye frame information, and writing the mask left-eye frame information into the RAM; reading right-eye frame information of the initial video signal, and carrying out mask processing on the right-eye frame information according to a second preset mask to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the RAM into the DDR, wherein the second preset mask is obtained by inverting the first preset mask according to the bits.
In this embodiment, for the left and right frame line arrangement sequence of the initial video signal of the second 3D video signal type, mask processing is performed on the left eye frame and the right eye frame to obtain mask left eye frame information and mask right eye frame information, and interleaving processing of the initial video signal is completed according to the mask left eye frame information and the mask right eye frame information, so that processing efficiency of the initial video can be improved, and video display delay can be reduced.
In one embodiment, the left-eye frame information includes a plurality of left-eye frame lines; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into a first preset memory, including:
if the current left eye frame acts as an odd left eye frame, carrying out mask processing on pixel points at a first pixel position in left eye frame line information to obtain mask left eye frame information, and writing the mask left eye frame information into a first preset memory; if the current left-eye frame line is even, carrying out mask processing on the pixel points at the second pixel position in the left-eye frame line information to obtain mask left-eye frame information, and writing the mask left-eye frame information into a first preset memory; the arrangement position sequence of the first pixel position in the left-eye frame line information is 2M, the arrangement position sequence of the second pixel position in the left-eye frame line information is 2M-1, and M is a positive integer.
In one embodiment, displaying a 2D video signal through a preset display screen includes adjusting screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal at the first preset brightness through the preset display screen; displaying the 3D video signal through a preset display screen, comprising: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen; wherein the second preset brightness is greater than the first preset brightness.
Since the 3D glasses attenuate brightness, when displaying the 3D video signal, the screen brightness needs to be increased, and when displaying the 2D video signal, the normal display brightness needs to be adjusted back, so that the 3D display is compatible.
In this embodiment, according to the type of the video signal to be displayed, the screen brightness of the preset display screen is adjusted, so that the compatibility between 2D video display and 3D video display can be improved.
In one embodiment, as shown in fig. 9, an initial video signal is acquired, and a flag bit of the initial video signal is identified; if the flag bit is a first preset flag, gamma processing is carried out on the initial video signal to obtain a 2D video signal, the screen brightness of a preset display screen is adjusted to be the first preset brightness, and the 2D video signal is displayed at the first preset brightness through the preset display screen.
If the flag bit is a second preset flag, identifying the video signal type of the initial video signal; if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of an initial video signal into a first preset memory; the pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
If the initial video signal belongs to the second 3D video signal type, reading left eye frame information of the initial video signal; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into a first preset memory; reading right-eye frame information of an initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory. According to the characteristics of the 3D video type of the initial video signal including the left eye frame and the right eye frame, the interleaving processing can be performed by using at least 2 preset memories while the initial video signal is read, so that the processing efficiency of the initial video is improved, and the video display delay is reduced.
And finally, adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen. The 3D video signal obtained by performing the interleaving processing on the left eye frame and the right eye frame of the initial video signal can simultaneously display the left eye image and the right eye image in the same frame, and the 3D video signal and the 2D video signal in this embodiment have the same size, so that the same transmission bandwidth can be used for transmission, the hardware cost of the control system is not required to be increased when the 2/3D compatible display is performed, and different interleaving processing methods are adopted according to different 3D video signal types, so that the processing efficiency of the initial video is improved, and the video display delay is reduced.
It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.
Based on the same inventive concept, the embodiment of the application also provides a video display device for realizing the video display method. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation of one or more embodiments of the video display device provided below may be referred to the limitation of the video display method hereinabove, and will not be repeated here.
In one embodiment, as shown in fig. 10, there is provided a video display apparatus including: a signal source module 302, a 2D video processing module 304, and a 3D video processing module 306, wherein:
the signal source module 302 acquires an initial video signal, and performs bit zone identification on the initial video signal to obtain a bit zone type;
the 2D video processing module 304 is configured to perform gamma processing on the initial video signal to obtain a 2D video signal, and display the 2D video signal through a preset display screen;
the 3D video processing module 306 is configured to interleave the left-eye frame and the right-eye frame of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and display the 3D video signal through the preset display screen.
In one embodiment, the at least 2 preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; the 3D video processing module 306 is further configured to:
if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of the initial video signal into the first preset memory; pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
In one embodiment, the frame line information is comprised of a plurality of pixel arrangements; the 3D video processing module 306 is further configured to:
a pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier; reading a first pixel value from the current left-eye frame line information stored in the first preset memory according to a first pixel position identifier, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to a second pixel position identifier; writing the first pixel value and the second pixel value into a second preset memory according to a preset interleaving sequence; returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read; the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, and the value of N is increased along with the execution times of the pixel position mark reading step.
In one embodiment, the at least 2 preset memories include a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; the 3D video processing module 306 is further configured to:
if the initial video signal belongs to a second 3D video signal type, reading left eye frame information of the initial video signal; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into the first preset memory; reading right-eye frame information of the initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory.
In one embodiment, the left-eye frame information includes a plurality of left-eye frame lines; the 3D video processing module 306 is further configured to:
if the current left eye frame acts as an odd left eye frame, carrying out mask processing on pixel points at a first pixel position in the left eye frame information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; if the current left eye frame line is even, carrying out mask processing on pixel points at a second pixel position in the left eye frame line information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; the arrangement position sequence of the first pixel position in the left-eye frame line information is 2M, the arrangement position sequence of the second pixel position in the left-eye frame line information is 2M-1, and M is a positive integer.
In one embodiment, the 2D video processing module 304 is further configured to adjust a screen brightness of the preset display screen to a first preset brightness, and display the 2D video signal at the first preset brightness through the preset display screen; the 3D video processing module 306 is further configured to: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen; wherein the second preset brightness is greater than the first preset brightness.
The various modules in the video display apparatus described above may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, a computer device is provided, which may be a terminal, and the internal structure thereof may be as shown in fig. 11. The computer device includes a processor, a memory, a communication interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The communication interface of the computer device is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program is executed by a processor to implement a video display method. The display of the computer device may be a liquid crystal display or an electronic ink display.
It will be appreciated by those skilled in the art that the structure shown in fig. 11 is merely a block diagram of a portion of the structure associated with the present application and is not limiting of the computer device to which the present application applies, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.
In one embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:
acquiring an initial video signal and identifying a zone bit of the initial video signal; if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
In one embodiment, the processor when executing the computer program further performs the steps of:
If the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of the initial video signal into the first preset memory; pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
In one embodiment, the processor when executing the computer program further performs the steps of:
a pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier; reading a first pixel value from the current left-eye frame line information stored in the first preset memory according to a first pixel position identifier, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to a second pixel position identifier; writing the first pixel value and the second pixel value into a second preset memory according to a preset interleaving sequence; returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read; the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, and the value of N is increased along with the execution times of the pixel position mark reading step.
In one embodiment, the processor when executing the computer program further performs the steps of:
if the initial video signal belongs to a second 3D video signal type, reading left eye frame information of the initial video signal; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into the first preset memory; reading right-eye frame information of the initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory.
In one embodiment, the processor when executing the computer program further performs the steps of:
if the current left eye frame acts as an odd left eye frame, carrying out mask processing on pixel points at a first pixel position in the left eye frame information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; if the current left eye frame line is even, carrying out mask processing on pixel points at a second pixel position in the left eye frame line information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; the arrangement position sequence of the first pixel position in the left-eye frame line information is 2M, the arrangement position sequence of the second pixel position in the left-eye frame line information is 2M-1, and M is a positive integer.
In one embodiment, the processor when executing the computer program further performs the steps of:
adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal with the first preset brightness through the preset display screen; the displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen; wherein the second preset brightness is greater than the first preset brightness.
In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:
acquiring an initial video signal and identifying a zone bit of the initial video signal; if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
In one embodiment, the computer program when executed by the processor further performs the steps of:
if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of the initial video signal into the first preset memory; pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
In one embodiment, the computer program when executed by the processor further performs the steps of:
a pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier; reading a first pixel value from the current left-eye frame line information stored in the first preset memory according to a first pixel position identifier, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to a second pixel position identifier; writing the first pixel value and the second pixel value into a second preset memory according to a preset interleaving sequence; returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read; the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, and the value of N is increased along with the execution times of the pixel position mark reading step.
In one embodiment, the computer program when executed by the processor further performs the steps of:
if the initial video signal belongs to a second 3D video signal type, reading left eye frame information of the initial video signal; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into the first preset memory; reading right-eye frame information of the initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory.
In one embodiment, the computer program when executed by the processor further performs the steps of:
if the current left eye frame acts as an odd left eye frame, carrying out mask processing on pixel points at a first pixel position in the left eye frame information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; if the current left eye frame line is even, carrying out mask processing on pixel points at a second pixel position in the left eye frame line information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; the arrangement position sequence of the first pixel position in the left-eye frame line information is 2M, the arrangement position sequence of the second pixel position in the left-eye frame line information is 2M-1, and M is a positive integer.
In one embodiment, the computer program when executed by the processor further performs the steps of:
adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal with the first preset brightness through the preset display screen; the displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen; wherein the second preset brightness is greater than the first preset brightness.
In one embodiment, a computer program product is provided comprising a computer program which, when executed by a processor, performs the steps of:
acquiring an initial video signal and identifying a zone bit of the initial video signal; if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen; if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
In one embodiment, the computer program when executed by the processor further performs the steps of:
if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of the initial video signal into the first preset memory; pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory; and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
In one embodiment, the computer program when executed by the processor further performs the steps of:
a pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier; reading a first pixel value from the current left-eye frame line information stored in the first preset memory according to a first pixel position identifier, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to a second pixel position identifier; writing the first pixel value and the second pixel value into a second preset memory according to a preset interleaving sequence; returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read; the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, and the value of N is increased along with the execution times of the pixel position mark reading step.
In one embodiment, the computer program when executed by the processor further performs the steps of:
if the initial video signal belongs to a second 3D video signal type, reading left eye frame information of the initial video signal; masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into the first preset memory; reading right-eye frame information of the initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information; and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory.
In one embodiment, the computer program when executed by the processor further performs the steps of:
if the current left eye frame acts as an odd left eye frame, carrying out mask processing on pixel points at a first pixel position in the left eye frame information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; if the current left eye frame line is even, carrying out mask processing on pixel points at a second pixel position in the left eye frame line information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory; the arrangement position sequence of the first pixel position in the left-eye frame line information is 2M, the arrangement position sequence of the second pixel position in the left-eye frame line information is 2M-1, and M is a positive integer.
In one embodiment, the computer program when executed by the processor further performs the steps of:
adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal with the first preset brightness through the preset display screen; the displaying the 3D video signal through the preset display screen includes: adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen; wherein the second preset brightness is greater than the first preset brightness.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the various embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magnetic random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (Phase Change Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), and the like. The databases referred to in the various embodiments provided herein may include at least one of relational databases and non-relational databases. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic units, quantum computing-based data processing logic units, etc., without being limited thereto.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.
Claims (10)
1. A video signal display method, the method comprising:
acquiring an initial video signal and identifying a zone bit of the initial video signal;
if the flag bit is a first preset flag bit, performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen;
if the flag bit is a second preset flag, interleaving left-eye frames and right-eye frames of the initial video signal in at least 2 preset memories to obtain a 3D video signal ， And displaying the 3D video signal through the preset display screen.
2. The method according to claim 1, wherein the at least 2 preset memories comprise a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; the interleaving processing is performed on the left eye frame and the right eye frame of the initial video signal in at least 2 preset memories to obtain a 3D video signal, including:
if the initial video signal is of the first 3D video signal type, performing the writing step: writing current left eye frame line information of the initial video signal into the first preset memory;
pixel information is selected in a staggered mode from the current left eye frame line information stored in the first preset memory and the current right eye frame line information of the initial video signal to serve as 3D frame line information and is written into the second preset memory;
and returning to the writing step until all left-eye frame line information of the initial video signal is written into the first preset memory.
3. The method of claim 2, wherein the frame line information is comprised of a plurality of pixel arrangements; the step of alternatively selecting pixel information from the current left-eye frame line information stored in the first preset memory and the current right-eye frame line information of the initial video signal as 3D frame line information and writing the pixel information into the second preset memory includes:
A pixel identification reading step: acquiring a first pixel position identifier and a second pixel position identifier;
reading a first pixel value from the current left-eye frame line information stored in the first preset memory according to a first pixel position identifier, and reading a second pixel value from the current right-eye frame line information of the initial video signal according to a second pixel position identifier;
writing the first pixel value and the second pixel value into a second preset memory according to a preset interleaving sequence;
returning to the pixel identification reading step until the current left-eye frame line information and the previous right-eye frame line information are completely read;
the first pixel position mark is 2N-1, the second pixel position mark is 2N, N is a positive integer, and the value of N is increased along with the execution times of the pixel position mark reading step.
4. The method according to claim 1, wherein the at least 2 preset memories comprise a first preset memory and a second preset memory, and the 3D video signal is composed of a plurality of 3D frame line information; the interleaving processing is performed on the left eye frame and the right eye frame of the initial video signal in at least 2 preset memories to obtain a 3D video signal, including:
If the initial video signal belongs to a second 3D video signal type, reading left eye frame information of the initial video signal;
masking the left-eye frame information to obtain masked left-eye frame information, and writing the masked left-eye frame information into the first preset memory;
reading right-eye frame information of the initial video signal, and carrying out mask processing on the right-eye frame information to obtain mask right-eye frame information;
and interleaving and writing the mask left-eye frame information and the mask right-eye frame information in the first preset memory into the second preset memory.
5. The method of claim 4, wherein the left-eye frame information comprises a plurality of left-eye frame lines; the masking processing is performed on the left-eye frame information to obtain masked left-eye frame information, and the masked left-eye frame information is written into the first preset memory, including:
if the current left eye frame acts as an odd left eye frame, carrying out mask processing on pixel points at a first pixel position in the left eye frame information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory;
if the current left eye frame line is even, carrying out mask processing on pixel points at a second pixel position in the left eye frame line information to obtain mask left eye frame information, and writing the mask left eye frame information into the first preset memory;
The arrangement position sequence of the first pixel position in the left-eye frame line information is 2M, the arrangement position sequence of the second pixel position in the left-eye frame line information is 2M-1, and M is a positive integer.
6. The method of claim 1, wherein displaying the 2D video signal through a preset display screen comprises:
adjusting the screen brightness of the preset display screen to a first preset brightness, and displaying the 2D video signal with the first preset brightness through the preset display screen;
the displaying the 3D video signal through the preset display screen includes:
adjusting the screen brightness of the preset display screen to a second preset brightness, and displaying the 3D video signal with the second preset brightness through the preset display screen;
wherein the second preset brightness is greater than the first preset brightness.
7. A passive 3D display device, the device comprising:
the signal source module is used for acquiring an initial video signal, and carrying out zone bit identification on the initial video signal to obtain a zone bit type;
the 2D video processing module is used for performing gamma processing on the initial video signal to obtain a 2D video signal, and displaying the 2D video signal through a preset display screen;
And the 3D video processing module is used for carrying out interleaving processing on the left eye frame and the right eye frame of the initial video signal in at least 2 preset memories to obtain a 3D video signal, and displaying the 3D video signal through the preset display screen.
8. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1 to 6 when the computer program is executed.
9. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 6.
10. A computer program product comprising a computer program, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311532336.8A CN117651128A (en) | 2023-11-16 | 2023-11-16 | Video display method, apparatus, computer device and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311532336.8A CN117651128A (en) | 2023-11-16 | 2023-11-16 | Video display method, apparatus, computer device and storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117651128A true CN117651128A (en) | 2024-03-05 |
Family
ID=90044299
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311532336.8A Pending CN117651128A (en) | 2023-11-16 | 2023-11-16 | Video display method, apparatus, computer device and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117651128A (en) |
-
2023
- 2023-11-16 CN CN202311532336.8A patent/CN117651128A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9924153B2 (en) | Parallel scaling engine for multi-view 3DTV display and method thereof | |
| US20180018931A1 (en) | Splicing display system and display method thereof | |
| AU2018233015B2 (en) | System and method for image processing | |
| US9123090B2 (en) | Image data compression device, image data decompression device, display device, image processing system, image data compression method, and image data decompression method | |
| WO2015044716A1 (en) | Head-up display warping controller | |
| TWI603290B (en) | Method, device and system for resizing original depth frame into resized depth frame | |
| KR102581470B1 (en) | Method and apparatus for processing image data | |
| TW201514914A (en) | Unpacking method, device and system or packed frame | |
| EP4078526A1 (en) | Noise synthesis for digital images | |
| CN117651128A (en) | Video display method, apparatus, computer device and storage medium | |
| CN115293994B (en) | Image processing method, image processing device, computer equipment and storage medium | |
| CN111508447A (en) | Image time sequence control circuit of grating type naked eye 3D liquid crystal screen based on FPGA | |
| CN114554171A (en) | Image format conversion method, device, display screen control equipment and storage medium | |
| TWI503788B (en) | Method, device and system for restoring resized depth frame into original depth frame | |
| TWI242986B (en) | Display with data group comparison | |
| US10339641B2 (en) | Image processing apparatus and method, and decoding apparatus | |
| KR101684834B1 (en) | Method, device and system for resizing and restoring original depth frame | |
| CN113194267B (en) | Image processing method and device and photographing method and device | |
| TW201444338A (en) | Image displaying method and image displaying apparatus | |
| CN112911268A (en) | Image display method and electronic equipment | |
| CN116248845A (en) | Image processing method, apparatus, system, device, and computer-readable storage medium | |
| CN118075549A (en) | Image processing method, device, computer equipment and image display method | |
| CN116055742A (en) | Image compression method, decompression method, device and electronic equipment | |
| CN118203832A (en) | Frame insertion method, device, electronic equipment and computer readable storage medium | |
| TW201515430A (en) | Non-transitory storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |