CN117650047A - Method for forming semiconductor structure, plasma generating device and semiconductor process equipment - Google Patents

Method for forming semiconductor structure, plasma generating device and semiconductor process equipment Download PDF

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Publication number
CN117650047A
CN117650047A CN202410116211.5A CN202410116211A CN117650047A CN 117650047 A CN117650047 A CN 117650047A CN 202410116211 A CN202410116211 A CN 202410116211A CN 117650047 A CN117650047 A CN 117650047A
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Prior art keywords
plasma
semiconductor
reaction chamber
etching process
chamber
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CN202410116211.5A
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CN117650047B (en
Inventor
杨光
李佳阳
马一鸣
蒋中伟
王京
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Beijing Naura Microelectronics Equipment Co Ltd
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Beijing Naura Microelectronics Equipment Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357—Generation remote from the workpiece, e.g. down-stream
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32807—Construction (includes replacing parts of the apparatus)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention discloses a method for forming a semiconductor structure, a plasma generating device and semiconductor process equipment, which belong to the technical field of semiconductors, and the disclosed method comprises the following steps: performing a first etching process on the semiconductor laminated structure to form a plurality of fin-shaped structures which are spaced from each other; the semiconductor laminated structure comprises at least one first semiconductor layer and at least one second semiconductor layer which are alternately stacked, wherein a first interval is formed between a plasma generating cavity and a reaction cavity when a first etching process is performed; a second etching process is performed on the fin structure to selectively etch at least a portion of one of the first semiconductor layer and the second semiconductor layer, the second etching process being performed to space the plasma generation cavity from the reaction chamber by a second spacing, the second spacing being greater than the first spacing. The scheme can solve the problem that the etching yield is low due to the fact that the cavity needs to be replaced in the process of carrying out different types of etching processes of semiconductor process equipment.

Description

Method for forming semiconductor structure, plasma generating device and semiconductor process equipment
Technical Field
The application belongs to the technical field of semiconductors, and particularly relates to a method for forming a semiconductor structure, a plasma generating device and semiconductor process equipment.
Background
The plasma plays an important role in the etching process, and active substances in the plasma, such as uncharged free radicals and charged ions, react with the semiconductor film to obtain a desired pattern.
In processing wafers, different types of etching processes are required, for example isotropic etching in some process steps and anisotropic etching in other process steps. In the related art, when the anisotropic etching is required to be performed again after the isotropic etching is performed in one reaction chamber, unlike the reaction chamber in which the isotropic etching is performed, the reaction chamber needs to be purged, evacuated, and then the wafer is taken out of the reaction chamber by a robot and transferred to another reaction chamber to perform the anisotropic etching. In the process, the wafer needs to be changed in cavity, so that the etching productivity is low.
Disclosure of Invention
The invention discloses a method for forming a semiconductor structure, a plasma generating device and semiconductor process equipment, which are used for solving the problem that the etching yield is low due to the need of changing cavities when the semiconductor process equipment related to the related technology performs different types of etching processes.
In order to solve the technical problems, the invention provides the following technical scheme:
in a first aspect, embodiments of the present invention disclose a method of forming a semiconductor structure, the method being applied to a semiconductor processing apparatus including a plasma generation chamber and a reaction chamber in communication with each other, the method comprising:
performing a first etching process on the semiconductor laminated structure to form a plurality of fin-shaped structures which are spaced from each other; wherein the semiconductor stacked structure includes at least one first semiconductor layer and at least one second semiconductor layer alternately stacked; spacing a first space between the plasma generating cavity and the reaction cavity when the first etching process is performed;
a second etching process is performed on the fin structure to selectively etch at least a portion of one of the first semiconductor layer and the second semiconductor layer, the second etching process being performed with a second spacing between the plasma generation cavity and the reaction chamber, the second spacing being greater than the first spacing.
In a second aspect, embodiments of the present invention disclose a plasma generating apparatus for cooperation with a reaction chamber, the plasma generating apparatus comprising:
a plasma generation chamber for generating plasma;
and one end of the plasma conveying pipe is communicated with the plasma generation cavity, the other end of the plasma conveying pipe is communicated with the reaction cavity, and the length of the plasma conveying pipe is adjustable so that the plasma generation cavity is close to or far away from the reaction cavity.
In a third aspect, embodiments of the present invention provide a semiconductor processing apparatus, the disclosed semiconductor processing apparatus comprising:
a reaction chamber;
the plasma generating device of the second aspect, wherein the plasma generating chamber is in communication with the reaction chamber through the plasma delivery pipe.
The technical scheme provided by the invention can achieve the following beneficial effects:
according to the method for forming the semiconductor structure, disclosed by the embodiment of the invention, the distance between the plasma generation cavity and the reaction cavity is adjusted, so that the transmission distance of plasma is adjusted, and finally, the purpose of adjusting the concentration of free radicals in the plasma is achieved. The different concentrations of the free radicals can adapt to different etching processes to achieve different etching effects. In this case, when the plasma etching process requiring different concentrations of radicals is performed on the semiconductor laminated structure, only the distance between the plasma generating cavity and the reaction cavity needs to be adjusted, and a different process cavity does not need to be replaced for performing different types of etching processes, so that the problem of low etching productivity caused by the fact that the different process cavities are not needed is avoided.
Drawings
FIG. 1 is a flow chart of a method of forming a semiconductor structure according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a substrate and a semiconductor stacked structure thereon after completion of a first etching process according to a method of forming a semiconductor structure disclosed in an embodiment of the present invention;
FIG. 3 is a schematic diagram of a substrate and a semiconductor stacked structure thereon after completion of a second etching process according to a method of forming a semiconductor structure disclosed in an embodiment of the present invention;
FIG. 4 is an electron microscope image of a semiconductor stacked structure etched using a nitrogen-free process gas;
FIG. 5 is an electron microscope image of a semiconductor stacked structure etched using a process gas with nitrogen added;
FIG. 6 is a schematic diagram of a semiconductor processing apparatus according to an embodiment of the present invention;
FIG. 7 is a schematic view of another configuration of a semiconductor processing apparatus according to an embodiment of the present invention;
FIG. 8 is a schematic view of a first configuration of a plasma delivery tube according to an embodiment of the present invention;
FIG. 9 is a schematic view showing a second structure of a plasma transport pipe according to an embodiment of the present invention;
FIG. 10 is a schematic view of a third construction of a plasma delivery tube according to an embodiment of the present invention;
FIG. 11 is a schematic view of a fourth construction of a plasma delivery tube according to an embodiment of the present invention;
FIG. 12 is a schematic view of a fifth construction of a plasma delivery tube according to an embodiment of the present invention;
FIG. 13 is a schematic view of a further semiconductor processing apparatus according to an embodiment of the present invention in a reaction chamber with a filter baffle;
FIG. 14 is a schematic view of a further semiconductor processing apparatus in accordance with an embodiment of the present invention in a baffle storage chamber at a filter baffle;
fig. 15 is a schematic view showing the structure of a further filter separator according to an embodiment of the present invention.
Reference numerals illustrate:
10-reaction chamber, 11-inner cavity, 101-first subspace, 102-second subspace,
20-plasma generating device, 21-plasma generating cavity, 22-plasma conveying pipe, 23-first driving mechanism, 24-magnetic isolation cover body, 25-sealing cover body,
30-bearing seat, 40-filtering partition board, 41-through hole, 50-second driving mechanism, 60-partition board storage cavity,
01-conveying pipe section, 02-annular gap, 03-sealing ring, 031-first magnetic ring, 032-second magnetic ring, 033-magnetic fluid, 034-inner sealing lip, 035-outer sealing lip, 036-base part,
A 001-substrate, a 002-semiconductor stacked structure, a 021-first semiconductor layer, a 022-second semiconductor layer, and a 023-fin structure.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to specific embodiments of the present invention and corresponding drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The following describes the technical solutions disclosed in the embodiments of the present invention in detail with reference to fig. 1 to 15.
The embodiment of the invention discloses a method for forming a semiconductor structure, which can be used for forming a memory cell of a GAA-FET or a 3D NAND, and is applied to semiconductor process equipment. The semiconductor processing apparatus according to the embodiment of the present invention includes a reaction chamber 10 and a plasma generation chamber 21. The reaction chamber 10 and the plasma generation chamber 21 communicate with each other. Wherein the plasma generating chamber 21 is used for generating plasma, and the plasma can be conveyed into the reaction chamber 10 after being generated so as to participate in the etching process.
Referring to fig. 1, a method for forming a semiconductor structure according to an embodiment of the present invention includes:
s101, a first etching process is performed on the semiconductor stacked structure 002 to form a plurality of Fin structures 023 spaced apart from each other.
The semiconductor stacked structure 002 may be formed on the substrate 001 by a deposition process, for example, in a chemical vapor deposition chamber, wherein the semiconductor stacked structure 002 includes at least one first semiconductor layer 021 and at least one second semiconductor layer 022 alternately stacked. The structure formed after completion of S101 is shown in fig. 2, each fin-shaped structure 023 is formed by alternately stacking a portion of each first semiconductor layer 021 and a portion of each second semiconductor layer 022, that is, the fin-shaped structure 023 includes a portion of the first semiconductor layer 021 and a portion of the second semiconductor layer 022. The plasma generating chamber 21 is spaced apart from the reaction chamber 10 by a first interval while the first etching process is performed. Alternatively, the plurality of fin structures 023 may be spaced apart in the direction of extension of the substrate 001. The first etching process may be, for example, an anisotropic etching process, in which a radio frequency bias is applied to the lower electrode of the reaction chamber 10 to attract charged ions in the plasma to etch the semiconductor stacked structure 002 in the vertical direction, thereby forming a fin structure 023 with high verticality and flat sidewalls.
S102, performing a second etching process on the fin structure 023 to selectively etch at least a portion of one of the first semiconductor layer 021 and the second semiconductor layer 022.
The structure formed after completion of S102 is further etched based on S101 as shown in fig. 3, S102, and the second etching process is performed to space the plasma generating chamber 21 from the reaction chamber 10 by a second space. In an embodiment of the present invention, the second pitch is greater than the first pitch. The second etching process may be, for example, an isotropic etching process, applying no radio frequency bias to the lower electrode, and in the example of fig. 3, the second semiconductor layer 022 has a high etching selectivity with respect to the first semiconductor layer 021, thereby achieving lateral etching of the second semiconductor layer 022.
As described above, a certain distance is provided between the plasma generating chamber 21 and the reaction chamber 10, and after the plasma generating chamber 21 generates plasma, the plasma needs to be transferred by a certain distance to enter the reaction chamber 10. The plasma includes active species such as energetic electrons, charged ions, free radicals (free radicals are neutral and uncharged). Since the lifetime of the charged ions (on the order of microseconds) is smaller than the lifetime of the radicals (on the order of milliseconds), the longer the movement distance of the plasma during its movement towards the reaction chamber 10, the more charged ions disappear due to recombination, which in turn results in a higher concentration of radicals, and correspondingly the shorter the movement distance of the plasma, the fewer charged ions disappear due to recombination, which results in a lower concentration of radicals.
It can be seen that the method for forming a semiconductor structure according to the embodiment of the present invention adjusts the distance between the plasma generating chamber 21 and the reaction chamber 10, thereby adjusting the distance of the plasma, and finally achieving the purpose of adjusting the concentration of the free radicals in the plasma. The different concentrations of the free radicals can adapt to different etching processes to achieve different etching effects. In this case, when the plasma etching process requiring different concentrations of radicals is performed on the semiconductor stacked structure 002, only the distance between the plasma generating chamber 21 and the reaction chamber 10 needs to be adjusted, and there is no need to replace a different process chamber in order to perform a different etching process, so that the problem of low etching productivity caused by this is not caused.
In the embodiment of the invention, the first etching process and the second etching process have different formulas due to different concentration requirements on free radicals, so that the types of the first etching process and the second etching process are different. The embodiment of the invention is not limited to the specific types of the first etching process and the second etching process, and any etching process can be used as the etching medium if the free radicals with different concentrations are needed. For example, the first etching process may be an anisotropic etching process and the second etching process may be an isotropic etching process.
The semiconductor stacked structure 002 includes the first semiconductor layers 021 and the second semiconductor layers 022 alternately stacked. The first semiconductor layer 021 and the second semiconductor layer 022 may be of various kinds, and only different materials etched by radicals with different concentrations are needed. For example, the first semiconductor layer 021 may be silicon oxide, and the second semiconductor layer 022 may be silicon nitride; or the first semiconductor layer 021 may be Si and the second semiconductor layer 022 may be SiGe. The second etching process may selectively etch at least a portion of one of the first semiconductor layer 021 and the second semiconductor layer 022, for example, selectively remove SiGe from a stacked structure of Si and SiGe to form a GAA-FET, or selectively remove silicon nitride from a stacked structure of silicon nitride and silicon oxide to form a memory cell of a 3D NAND.
In some alternative embodiments, the first semiconductor layer 021 is a silicon oxide layer, the second semiconductor layer 022 is a silicon nitride layer, the process gas used in the second etching process may include a fluorine-containing gas and an oxygen-containing gas, optionally, the content ratio of fluorine element in the process gas and oxygen element in the process gas may be in a range of 0.1-2, and the oxygen-containing gas may be, for example, nitrogen oxide, carbon oxide, oxygen, etc. The fluorine-containing gas may be CF 4 、C 3 F 6 、C 4 F 8 、NF 3 And SF (sulfur hexafluoride) 6 At least one of them. In the process gas, fluorine-containing gas is used as main etching gas, and fluorine element reacts with silicon element to generate a volatilizable product SiF 4 To achieve etching; the oxygen-containing gas is auxiliary etching gas, and oxygen can inhibit the reaction of fluorine and the silicon oxide layer so as to improve the etching selectivity of silicon nitride relative to silicon oxide. In some alternative embodiments, the process gas used in the second etching process may not contain hydrogen, because the inventors have found that the inclusion of hydrogen in the process gas during etching results in the deposition of non-volatile polymers on the surfaces of the silicon oxide and silicon nitride layers to prevent further progress of the etching, reducingThe etching rate and the etching selectivity of silicon nitride to silicon oxide are reduced to a certain extent.
The embodiments of the present invention are not limited to the specific types of process gases required to perform the first etching process and the second etching process. More specifically, in performing the second etching process, the pressure of the reaction chamber 10 may be 0 to 2 Torr, the rf power of the upper electrode of the reaction chamber 10 may be 50 to 3000W, and the rf power of the lower electrode may not be applied. In one embodiment, the process gas used in the second etching process comprises CF 4 And O 2 ，CF 4 With O 2 The ratio range of (2) is 0.1-1, and the electron microscope image obtained after the second etching process is completed is shown in fig. 4, so that the selective etching of the silicon nitride layer relative to the silicon oxide layer is realized.
As can be seen from fig. 4, while etching silicon nitride, the outer silicon oxide also has a certain loss, and is in a circular arc shape, so as to further improve the etching selectivity of the silicon nitride layer relative to the silicon oxide layer, in some alternative embodiments, the process gas used in the second etching process may further include a nitrogen-containing gas, where the content ratio of fluorine element in the process gas to nitrogen element in the process gas may be greater than 1. The inventors of the present invention found that when the auxiliary etching gas includes both nitrogen and oxygen, the oxygen and nitrogen combine to form N x O y The material can further promote etching of the silicon nitride layer. Further, the ratio of the fluorine element to the nitrogen element may be more than 2 and less than 10.
In one embodiment, the process gas used in the second etching process may include CF 4 、O 2 And N 2 ，CF 4 With O 2 The ratio of (C) may range from 0.1 to 1, CF 4 And N 2 May be greater than 0.5, more preferably CF 4 And N 2 The ratio range of (2) may be 0.1-1, and the electron microscope image obtained after the second etching process is completed is shown in fig. 5. It can be clearly seen that the side wall of the etched recessed silicon nitride layer is smooth, the etching uniformity is good, the profile of the outer silicon oxide layer is flat, and the process adopted in the second etching process Under the condition that nitrogen-containing gas is added in the gas, the etching selectivity ratio of the silicon nitride layer relative to the silicon oxide layer is obviously improved, and the silicon nitride layer is etched while the loss of the silicon oxide layer is ensured to be extremely low. It should be noted that, the ratio between gases herein refers to a volume ratio or a flow ratio.
In a further alternative, as shown in fig. 7, the semiconductor processing apparatus disclosed in the embodiment of the present invention may further include a filtering baffle 40, and the method disclosed in the embodiment of the present invention may further include: in performing the first etching process, the filter partition 40 is moved out of the reaction chamber 10, in which case various ions of plasma inputted into the reaction chamber 10 can participate in etching. In performing the second etching process, the filter partition 40 is moved into the reaction chamber 10, and the filter partition 40 serves to pass through, i.e., block, charged ions in the generated plasma from reaching the surface of the semiconductor stack structure 002. In this case, since the filter baffle 40 filters out charged ions in the plasma, uncharged radicals in the plasma pass through the filter baffle 40 to participate in the second etching process, thereby achieving a better isotropic etching effect. Specifically, the filter separator 40 is provided with a through hole 41, and since the lifetime of the charged ions is smaller than that of the free radicals, the charged ions lengthen their paths when passing through the through hole 41, so that the charged ions annihilate; due to the longer lifetime of the radicals, the radicals impinging on the non-through-hole region of the filter separator 40 may also pass through the through-holes 41 by continuing to move and participate in the second etching process.
In the embodiment of the present invention, the filtering baffle 40 may be grounded or applied with a certain voltage, so that in the process of passing through the filtering baffle 40, charged ions in the plasma are adsorbed on the filtering baffle 40 to be combined and cannot pass through the filtering baffle 40, thereby better achieving the purpose of filtering the charged ions.
Referring again to fig. 6, an embodiment of the present invention discloses a plasma generating apparatus 20, wherein the plasma generating apparatus 20 is disclosed for cooperation with a reaction chamber 10. The plasma generating device 20 includes a plasma generating chamber 21 and a plasma delivery pipe 22. The plasma generation chamber 21 is used to generate plasma. One end of the plasma transport pipe 22 communicates with the plasma generation chamber 21, and the other end of the plasma transport pipe 22 is used to communicate with the reaction chamber 10. During specific operation, the plasma generation chamber 21 is capable of generating a plasma that can be delivered into the reaction chamber 10 through the plasma delivery tube 22 for a corresponding etching process.
In the embodiment of the present invention, the length of the plasma transport pipe 22 is adjustable to bring the plasma generation chamber 21 closer to or farther from the reaction chamber 10. In this case, the length of the plasma transfer pipe 22 can be adjusted so that the interval (e.g., first interval, second interval) between the plasma generation chamber 21 and the reaction chamber 10 can be changed, and finally the concentration of radicals transferred into the reaction chamber 10 can be adjusted to accommodate different kinds of etching processes. Therefore, the plasma generating device 20 disclosed in the embodiment of the invention can realize the concentration adjustment of the free radicals, so that the reaction chamber 10 can perform different etching processes, and the different reaction chambers 10 do not need to be replaced during the process, which is clearly beneficial to improving the etching productivity.
There are various structures for realizing the length adjustment of the plasma transport pipe 22, and the embodiment of the present invention is not limited to the specific structure of the plasma transport pipe 22. In an alternative embodiment, the plasma delivery tube 22 may include a bellows that can be stretched to change the length of the plasma delivery tube 22, and a quartz coating or an aluminum oxide layer coated on the inner wall of the bellows. A first port of the bellows may be in sealing abutment with the plasma generation chamber 21 and a second port of the bellows may be used for communication with the reaction chamber 10.
In other embodiments, as shown in fig. 8, the plasma delivery tube 22 may include at least two delivery tube segments 01, with adjacent delivery tube segments 01 being nested one within the other and being relatively movable. The pipe section 01 at one end of the plasma pipe 22 may be in communication with the plasma generation chamber 21, the pipe section 01 at the other end of the plasma pipe 22 is used to communicate with the reaction chamber 10, and the plasma pipe 22 may be adapted to expand and contract by relative sliding between the adjacent two pipe sections 01. In the specific use process, the two adjacent conveying pipe sections 01 slide relatively, so that the length of the whole plasma conveying pipe 22 is changed, the length of the plasma conveying pipe 22 is changed, the conveyed distance of the plasma is changed, and the purpose of adjusting the concentration of free radicals in the plasma is achieved.
In embodiments where the plasma delivery tube 22 includes at least two delivery tube segments 01, an annular gap 02 may be formed between nested portions of adjacent two delivery tube segments 01, as shown in fig. 8. During the process, the plasma may escape through the annular gap 02, based on which the length of the annular gap 02 (i.e., in the length direction of the plasma delivery tube 22) and the width of the annular gap 02 may be designed such that once the plasma enters the annular gap 02, the plasma annihilates during the escape along the annular gap 02, thereby avoiding the plasma escaping out of the plasma delivery tube 22 through the annular gap 02. Of course, those skilled in the art can design the dimensions (i.e., length and width) of the annular gap 02 such that the annular gap 02 communicates the interior of the plasma delivery tube 22 with the external environment, but the annular gap 02 can become an annihilation gap in which annihilation of plasma can occur, thereby mitigating occurrence of plasma escape.
In the case that the annular gap 02 communicates the interior of the plasma delivery pipe 22 with the external environment, the process gas leaks outwards through the annular gap 02, so as to avoid adverse effects on the external environment, in a further alternative, as shown in fig. 9, the plasma generating apparatus 20 disclosed in the embodiment of the present invention may further include a sealing cover 25, where the sealing cover 25 is sealed and covered outside the plasma delivery pipe 22, and the plasma delivery pipe 22 passes through the sealing cover 25 and is sealed with the sealing cover 25 in a sliding manner. Of course, the sealing cover 25 and the plasma conveying pipe 22 can be in sliding fit, so as to avoid influencing the expansion and contraction of the plasma conveying pipe 22.
No seal may be provided in the annular gap 02. Of course, in order to better prevent the plasma and the process gas from escaping, in a further technical solution, as shown in fig. 10 to 12, the plasma generating device 20 disclosed in the embodiment of the present invention may further include a sealing ring 03, where the sealing ring 03 is disposed between two adjacent conveying pipe sections 01, specifically, the sealing ring 03 is disposed in an annular gap 02 formed by two adjacent conveying pipe sections 01. Specifically, among the plurality of conveying pipe sections 01 constituting the plasma conveying pipe 22, a seal ring 03 may be provided in an annular gap 02 formed by nesting all adjacent two conveying pipe sections 01. The sealing ring 03 can seal the annular gap 02, thereby better preventing the passage of plasma and process gases. The sealing ring 03 can slide relative to one another along with the adjacent two conveying pipe sections 01, so that the annular gap 02 is sealed, and meanwhile, the relative movement of the plasma conveying pipe 22 between the adjacent two conveying pipe sections 01 in the telescopic process can be adapted.
The types of the sealing ring 03 may be various, and the embodiment of the present invention is not limited to the specific type of the sealing ring 03. In an alternative, the sealing ring 03 may be a magnetic fluid sealing ring. As shown in fig. 10, the magnetic fluid sealing ring may include a first magnetic ring 031, a second magnetic ring 032 and a magnetic fluid 033, where the first magnetic ring 031 and the second magnetic ring 032 are sleeved on the conveying pipe section 01 located on the inner side and are distributed at intervals. The magnetic poles of the opposite ends of the first magnetic ring 031 and the second magnetic ring 032 are opposite, and the magnetic fluid 033 is constrained in a space defined by the outer wall of the first magnetic ring 031, the second magnetic ring 032, the inner conveying pipe section 01 and the inner wall of the outer conveying pipe section 01, and is respectively in sealing fit with the outer wall of the inner conveying pipe section 01 and the inner wall of the outer conveying pipe section 01, so that the sealing of the annular gap 02 is realized. In this embodiment, the magnetic fluid sealing ring not only can play a sealing function, but also can avoid friction with the conveying pipe section 01, so that particles generated by friction can be prevented from falling into the plasma conveying pipe 22, and further, the phenomenon that the particles fall into the reaction chamber 10 to pollute the reaction chamber 10 after falling into the plasma conveying pipe 22 can be avoided, and the process effect can be well ensured.
In order to avoid the magnetic fluid seal ring from being interfered by the magnetic field of the external environment or avoid the magnetic field of the magnetic fluid seal ring from affecting the external environment, in a further alternative scheme, as shown in fig. 11, the plasma generating device 20 disclosed in the embodiment of the present invention may further include a magnetic isolation cover 24, where the plasma conveying pipe 22 passes through the magnetic isolation cover 24, and the magnetic isolation cover 24 is covered outside the area corresponding to the magnetic fluid seal ring. In this case, the magnetic shield 24 can function to isolate the magnetic field, and thus, magnetic field interference can be avoided. In this case, the magnetic shield 24 can be slidably fitted to the plasma transfer pipe 22, so that the expansion and contraction of the plasma transfer pipe 22 can be unaffected.
As described above, the types of the sealing ring 03 may be various, specifically, the sealing ring 03 may be a common sealing ring, for example, the sealing ring 03 may be an O-ring, a V-ring, or the like, referring to fig. 12, in an alternative, the sealing ring may be a Y-ring, which is an integral structure and includes an inner sealing lip 034, an outer sealing lip 035, and a base 036, first ends of the inner sealing lip 034 and the outer sealing lip 035 are both fixed on the base 036, and second ends of the inner sealing lip 034 and the outer sealing lip 035 may extend in directions away from the base 036 and away from each other, respectively. The outer sealing lip 035 is in sealing engagement with the inner wall of the outer conveying pipe section 01 and the inner sealing lip 034 is in sealing engagement with the outer wall of the inner conveying pipe section 01. In this case, the inner sealing lip 034 and the outer sealing lip 035 respectively sealingly engage with the adjacent two conveying pipe sections 01 to effect sealing. Meanwhile, grooves are formed between the inner sealing lip 034 and the outer sealing lip 035, so that particles generated by friction in the relative sliding process of the sealing ring 03 and the conveying pipe section 01 can be collected, and the phenomenon that the particles possibly fall into the plasma conveying pipe 22 can be relieved.
In the embodiment of the present invention, in two adjacent conveying pipe sections 01, a conveying pipe section 01 with a higher position can be sleeved outside a conveying pipe section 01 with a lower position. In this case, the annular gap 02 formed by two adjacent conveying pipe sections 01 is located outside the conveying pipe section 01 with a lower position, and even if particles generated by friction exist, the particles easily fall into the annular gap 02 under the action of gravity, but are not easily fallen into the conveying pipe section 01 with a lower position and conveyed into the reaction chamber 10.
The plasma transfer pipe 22 is a pipe for transferring plasma, and thus can be made of a material suitable for transferring plasma. Alternatively, the plasma delivery tube 22 may be made of quartz material. In the case where the plasma transport pipe 22 includes a plurality of transport pipe sections 01, the transport pipe sections 01 may be quartz pipes. Alternatively, the delivery tube section 01 may be a metal tube, and the inner wall of the metal tube may be coated with a layer of alumina or quartz material. The embodiment of the invention does not limit the specific material of the conveying pipe section 01.
In order to make the apparatus more automated, the plasma generating apparatus 20 disclosed in the embodiment of the present invention may further include a first driving mechanism 23, one end of the first driving mechanism 23 may be connected to the plasma generating chamber 21, the other end of the first driving mechanism 23 is connected to the reaction chamber 10, and the first driving mechanism 23 is used to drive the plasma generating chamber 21 to approach or separate from the reaction chamber 10. In this case, the first driving mechanism 23 can drive the plasma generation chamber 21 to move with respect to the reaction chamber 10 so as to be close to or away from the reaction chamber 10. In this process, the plasma delivery tube 22 may follow the expansion and contraction, thereby achieving its length adjustability. The first driving mechanism 23 may be a hydraulic telescopic member, an air telescopic member, a linear motor, etc., and the embodiment of the present invention is not limited to the specific kind of the first driving mechanism 23.
The embodiment of the invention further discloses a semiconductor process device, which comprises a reaction chamber 10 and the plasma generating device 20 according to any of the above embodiments, wherein the plasma generating chamber 21 is communicated with the reaction chamber 10 through a plasma conveying pipe 22, as shown in fig. 6.
In order to ensure etching quality and further isolate charged ions in the plasma to enhance isotropic etching effect, referring to fig. 7, the semiconductor processing apparatus disclosed in the embodiment of the present invention may further include a filter baffle 40, the reaction chamber 10 has an inner cavity 11, the filter baffle 40 is disposed in the inner cavity 11, and the filter baffle 40 may be grounded or a voltage may be applied. The filtering baffle 40 is disposed in the interior chamber 11 so as to divide the interior chamber 11 into a first subspace 101 and a second subspace 102, the first subspace 101 being located above the second subspace 102. The second subspace 102 is provided with the bearing seat 30. The substrate 001 formed with the semiconductor stack structure 002 is placed on the susceptor 30 so as to be within the second subspace 102.
The first subspace 101 is communicated with the plasma conveying pipe 22, plasma conveyed by the plasma conveying pipe 22 enters the first subspace 101, the plasma passes through the filtering baffle 40, charged ions in the plasma are filtered by the filtering baffle 40 and cannot enter the second subspace 102, and free radicals can pass through the filtering baffle 40 and enter the second subspace 102 and participate in etching due to no charging. In this case, the radical concentration can be ensured as high as possible to promote the effect of isotropic etching.
Optionally, the filtering baffle 40 is provided with a plurality of through holes 41 spaced apart for the passage of free radicals. The plurality of through holes 41 may be uniformly distributed or unevenly distributed, and the embodiment of the present invention is not limited. Of course, the plurality of through holes 41 may be distributed in a row and column manner or may be distributed in a plurality of circles, and the embodiment of the present invention is not limited to a specific distribution manner of the through holes. Of course, the through hole 41 may be a straight hole or a curved hole, and the embodiment of the present invention is not limited. Of course, in the case where the through-hole 41 is a curved hole, a longer path is required for charged ions to pass through the curved hole, and charged ions can be filtered better, as shown in fig. 15.
In the embodiment of the present invention, the filtering baffle 40 may be fixed in the inner cavity 11 or may be movably disposed in the inner cavity 11. Of course, in other etching scenarios, such as anisotropic etching scenarios, charged ions are required to etch the semiconductor stacked structure 002, based on which, as shown in fig. 13, the semiconductor processing apparatus disclosed in the embodiment of the present invention may further include a spacer storage chamber 60 and a second driving mechanism 50. Wherein the baffle storage chamber 60 is located at a side of the reaction chamber 10 and communicates with the reaction chamber 10. Specifically, the partition storage chambers 60 and the reaction chambers 10 are sequentially distributed in a horizontal plane. The filter membrane 40 is arranged on a carrying arm of a second drive mechanism 50, the second drive mechanism 50 being used for transporting the filter membrane 40 between the membrane storage chamber 60 and the reaction chamber 10. The second drive mechanism 50 positions the filter separator 40 in the separator storage chamber 60 when an etching scenario with charged ions is desired, and the second drive mechanism 50 positions the filter separator 40 in the reaction chamber 10 when an etching scenario with charged ions is not desired.
When the filter baffle 40 is within the reaction chamber 10, the filter baffle 40 separates the interior cavity 11 into a first subspace 101 and a second subspace 102 to block the passage of charged ions in the generated plasma. As shown in fig. 13, when the filter partition 40 is in the partition storage chamber 60, the filter partition 40 does not partition the inner chamber 11, in which case charged ions in the plasma entering the inner chamber 11 from the plasma delivery pipe 22 are not filtered by the filter partition 40.
The second driving mechanism 50 is provided on the reaction chamber 10 or on the partition plate storage chamber 60, and the second driving mechanism 50 can drive the filter partition plate 40 to switch between the reaction chamber 10 and the partition plate storage chamber 60. The structural design can improve the automation of semiconductor process equipment. Of course, the filtering baffle 40 may be movably disposed in the reaction chamber 10 or the baffle storage chamber 60, and the switching operation of the position thereof may be performed manually by an operator.
In the embodiment of the present invention, the through hole 41 may be a straight hole or a curved hole, and the embodiment of the present invention does not limit the specific shape of the through hole 41.
In order to improve the filtering effect, the number of the filtering baffles 40 in the embodiment of the present invention may be at least two, and accordingly, the number of the second driving mechanisms 50 may be at least two, and each filtering baffle 40 is connected to the corresponding second driving mechanism 50 and may be switched between the baffle storage chamber 60 and the reaction chamber 10 under the driving of the corresponding second driving mechanism 50. In this case, at least two filtering spacers 40 are stacked, so that the plasma inputted from the first subspace 101 may be subjected to a plurality of filtering processes, thereby better filtering out charged ions in the plasma. In this way, when the number of the filter spacers 40 is plural, the charged ions can be further filtered by adjusting the number of the filter spacers 40 in the reaction chamber 10.
In the embodiment of the present invention, each filter baffle 40 is provided with a plurality of through holes 41, and at least two second driving mechanisms 50 respectively drive the positions of the corresponding filter baffles 40 in the reaction chamber 10 so as to adjust the overlapping areas of the through holes 41 of the at least two filter baffles 40. For example, during a particular adjustment process, each filter baffle 40 may be driven by a corresponding second drive mechanism 50. In this case, the second driving mechanism 50 can make the through holes 41 of the filter separator 40 completely coincide, partially coincide, or not coincide. Of course, when the plasma does not overlap, the plasma enters the gap between one filter separator 40 and the adjacent other filter separator 40 from the through-hole 41 of the other filter separator 40, and then enters the through-hole 41 of the other filter separator 40. In this embodiment, the second driving mechanism 50 can adjust the positions of the respective corresponding filter partitions 40, thereby achieving the purpose of adjusting the overlapping areas of the through holes 41 in the filter partitions 40. For example, the respective second driving mechanisms 50 may be rotated by respective angles to adjust the overlapping degree of the through holes; alternatively, each second driving mechanism 50 may be rotated by the same angle, for example, each tray carrying the filter separator 40 is disposed on the same rotation axis, wherein one or more trays are extended or retracted a certain distance in the radial direction to adjust the overlapping degree of the through holes.
In this case, when the plasma passes through the filter separator 40 and the charged ions are adsorbed by the filter separator 40 and filtered, radicals collide with the filter separator 40 to different degrees due to different overlapping areas between the filter separators 40, so that the activity of the radicals is different, the more the number of collisions the radicals collide with during the passing of the filter separator 40, the activity gradually decreases, and the more the number of collisions the radicals collide with, the part of the radicals reach the life and are annihilated, thereby affecting the number of the radicals passing through the filter separator 40, and the activity and the number of the radicals are different, so that the etching rate is different. Specifically, the lower the number of radicals, the smaller the etch rate, whereas the higher the number of radicals, the greater the etch rate. The smaller the overlapping area of the through holes 41, the more radicals collide during the passage through the filter separator 40, and thus the lower the number of radicals becomes, whereas the fewer radicals collide during the passage through the filter separator 40, and thus the higher the number of radicals becomes.
Therefore, in the embodiment of the invention, the relative positions of the filter baffle plates 40 are adjusted, so that the overlapping area of the through holes 41 of the filter baffle plates 40 can be adjusted, and the purpose of adjusting the etching rate can be achieved by adjusting the activity and the number of free radicals.
Further, the semiconductor process equipment disclosed by the embodiment of the invention can further comprise a controller. The controller includes at least one memory and at least one processor. The memory stores a computer program which, when executed by the processor, implements the method described in the above embodiments.
In other embodiments, the semiconductor processing apparatus may further include a controller for adjusting the length of the plasma delivery tube 22 according to the process steps to be performed by the semiconductor processing apparatus. Specifically, the controller may control the first driving mechanism 23, so that the first driving mechanism 23 drives the plasma generating cavity 21 to move, so that the plasma generating cavity 21 is close to or far away from the reaction chamber 10, and in this process, the plasma conveying pipe 22 is adaptively stretched, so as to achieve the purpose of indirectly adjusting the length of the plasma conveying pipe 22.
In an embodiment of the present invention, the semiconductor process apparatus may further include a controller for spacing the plasma generation chamber 21 from the reaction chamber 10 by a first interval when the semiconductor process apparatus performs the anisotropic etching process; the controller is further configured to space the plasma generating chamber 21 from the reaction chamber 10 by a second spacing that is greater than the first spacing when the semiconductor processing apparatus performs the isotropic etching process. The distance between the plasma generating chamber 21 and the reaction chamber 10 is changed, and the length of the plasma transport pipe 22 is substantially changed, so that the change of the transport distance of the plasma is finally realized.
In other embodiments, the semiconductor processing apparatus may further include a controller for controlling the second driving mechanism 50 to place the filter partition 40 in the partition storage chamber 60 when the semiconductor processing apparatus performs the anisotropic etching process; the controller is also used to control the second drive mechanism 50 to place the filter baffle 40 within the reaction chamber 10 when the semiconductor processing apparatus performs an isotropic etching process.
In the embodiments of the present invention, the different embodiments are mainly described, and as long as the different optimization features of the embodiments are not contradictory, the different optimization features can be combined to form a better embodiment, and in consideration of brevity of line text, the description is omitted here.
The embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present invention and the scope of the claims, which are to be protected by the present invention.

Claims (22)

1. A method of forming a semiconductor structure, the method being applied to a semiconductor processing apparatus comprising a plasma generation chamber (21) and a reaction chamber (10) in communication with each other, the method comprising:
Performing a first etching process on the semiconductor stack structure (002) to form a plurality of fin structures (023) spaced apart from each other; wherein the semiconductor stacked structure (002) includes at least one first semiconductor layer (021) and at least one second semiconductor layer (022) alternately stacked; -spacing the plasma generating cavity (21) from the reaction chamber (10) by a first spacing while performing the first etching process;
-performing a second etching process on the fin structure (023) to selectively etch at least part of one of the first semiconductor layer (021) and the second semiconductor layer (022), the second etching process being performed with a second spacing between the plasma generation cavity (21) and the reaction chamber (10), the second spacing being larger than the first spacing.
2. The method of claim 1, wherein the semiconductor process equipment further comprises a filter baffle (40), the method further comprising:
-moving the filter baffle (40) out of the reaction chamber (10) while performing the first etching process;
the filter baffle plate (40) is moved into the reaction chamber (10) when the second etching process is performed, and the filter baffle plate (40) is used for blocking the passing of charged ions in the generated plasma.
3. The method of claim 1, wherein the first etching process is an anisotropic etching process and the second etching process is an isotropic etching process.
4. The method of claim 1, wherein the first semiconductor layer (021) is a silicon oxide layer and the second semiconductor layer (022) is a silicon nitride layer, the second etching process selectively etching at least a portion of the silicon nitride layer.
5. The method according to claim 4, wherein the process gas used for the second etching process includes a fluorine-containing gas and an oxygen-containing gas, and a content ratio of fluorine element in the process gas to oxygen element in the process gas is in a range of 0.1 to 2.
6. The method of claim 5, wherein the process gas used in the second etching process further comprises a nitrogen-containing gas, and wherein the ratio of the fluorine element in the process gas to the nitrogen element in the process gas is greater than 1.
7. The method according to claim 6, wherein the ratio of the content of the fluorine element to the content of the nitrogen element is more than 2 and less than 10.
8. The method according to any one of claims 5 to 7, wherein a process gas used for the second etching process does not contain a hydrogen element; or,
The pressure in the reaction chamber (10) is 0 to 2 Torr when the second etching process is performed; or,
when the second etching process is carried out, the radio frequency power of the upper electrode of the reaction chamber (10) ranges from 50W to 3000W; or,
the fluorine-containing gas comprises CF 4 、C 3 F 6 、C 4 F 8 、NF 3 And SF (sulfur hexafluoride) 6 At least one of the oxygen-containing gases comprising O 2 The process gas further comprises a nitrogen-containing gas comprising N 2 。
9. A plasma-generating device for cooperation with a reaction chamber (10), characterized in that the plasma-generating device (20) comprises:
a plasma generation chamber (21) for generating plasma;
and one end of the plasma conveying pipe (22) is communicated with the plasma generation cavity (21), the other end of the plasma conveying pipe (22) is used for being communicated with the reaction cavity (10), and the length of the plasma conveying pipe (22) is adjustable so that the plasma generation cavity (21) is close to or far away from the reaction cavity (10).
10. The plasma generating device according to claim 9, wherein the plasma transport pipe (22) includes at least two transport pipe sections (01), one of the two adjacent transport pipe sections (01) is sleeved outside the other transport pipe section and is relatively movable, the transport pipe section (01) at one end of the plasma transport pipe (22) is in communication with the plasma generating chamber (21), the transport pipe section (01) at the other end of the plasma transport pipe (22) is for communication with the reaction chamber (10), and the plasma transport pipe (22) is adapted to be telescopic by a relative sliding between the two adjacent transport pipe sections (01).
11. The plasma-generating device according to claim 10, characterized in that, in two adjacent conveying pipe sections (01), the conveying pipe section (01) located higher is nested outside the conveying pipe section (01) located lower.
12. The plasma-generating device as recited in claim 10, wherein the plasma-generating device (20) further comprises:
-a sealing ring (03), said sealing ring (03) being arranged between two adjacent conveying pipe sections (01), said sealing ring (03) being capable of following one of the two adjacent conveying pipe sections (01) sliding with respect to the other; and/or the number of the groups of groups,
the plasma conveying pipe (22) passes through the sealing cover body (25) and is in sliding sealing with the sealing cover body (25).
13. The plasma-generating device as claimed in any of claims 9 to 12, characterized in that the plasma-generating device (20) further comprises a first drive mechanism (23), one end of the first drive mechanism (23) being connected to the plasma-generating chamber (21), the other end of the first drive mechanism (23) being for connecting the reaction chamber (10), the first drive mechanism (23) being for driving the plasma-generating chamber (21) closer to or farther from the reaction chamber (10).
14. A semiconductor processing apparatus, comprising:
a reaction chamber (10);
the plasma-generating device (20) as claimed in any one of claims 9 to 13, the plasma-generating chamber (21) being in communication with the reaction chamber (10) via the plasma-conveying pipe (22).
15. The semiconductor processing apparatus of claim 14, wherein the semiconductor processing apparatus further comprises:
a filter separator (40) for blocking the passage of charged ions in the generated plasma, the filter separator (40) being provided with a through hole (41) through which free radicals in the plasma pass;
a partition plate storage chamber (60) which is positioned at the side surface of the reaction chamber (10) and is communicated with the reaction chamber (10);
and the second driving mechanism (50), the filtering baffle (40) is connected with the second driving mechanism (50), and the second driving mechanism (50) is used for conveying the filtering baffle (40) between the baffle storage cavity (60) and the reaction chamber (10).
16. The semiconductor processing apparatus of claim 15, wherein there are at least two of said filter baffles (40) and at least two of said second drive mechanisms (50), each of said filter baffles (40) being connected to a respective one of said second drive mechanisms (50) and being switchable between said baffle storage chamber (60) and said reaction chamber (10) upon actuation of a respective one of said second drive mechanisms (50).
17. The semiconductor process apparatus according to claim 16, wherein each of said filter partitions (40) is provided with a plurality of said through holes (41); the positions of the corresponding filter baffles (40) in the reaction chamber (10) are respectively adjusted by at least two second driving mechanisms (50) so as to adjust the overlapping areas of the through holes (41) of the at least two filter baffles (40).
18. The semiconductor processing apparatus of claim 15, wherein the through hole (41) is a curved hole or a straight hole.
19. The semiconductor process apparatus according to any one of claims 14 to 18, further comprising a controller comprising at least one memory and at least one processor, the memory having stored therein a computer program which when executed by the processor implements the method of any one of claims 1 to 7.
20. The semiconductor process apparatus according to any one of claims 14 to 18, further comprising a controller for adjusting the length of the plasma transport tube (22) in accordance with the process step to be performed by the semiconductor process apparatus.
21. A semiconductor process apparatus according to claim 20, wherein the controller is adapted to space the plasma generation chamber (21) from the reaction chamber (10) by a first spacing when the semiconductor process apparatus performs an anisotropic etching process; the controller is further configured to space the plasma generation chamber (21) from the reaction chamber (10) by a second spacing that is greater than the first spacing when the semiconductor processing apparatus performs an isotropic etching process.
22. The semiconductor process apparatus of any one of claims 15 to 18, further comprising a controller for controlling the second drive mechanism (50) to place the filter partition (40) within the partition storage chamber (60) when the semiconductor process apparatus performs an anisotropic etching process; the controller is further configured to control the second drive mechanism (50) to place the filter baffle (40) within the reaction chamber (10) while the semiconductor processing apparatus is performing an isotropic etching process.
CN202410116211.5A 2024-01-26 2024-01-26 Method for forming semiconductor structure, plasma generating device and semiconductor process equipment Active CN117650047B (en)

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