CN117613033B - Silicon-based micro-module structure containing temperature and strain sensing and preparation method - Google Patents
Silicon-based micro-module structure containing temperature and strain sensing and preparation method Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
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Abstract
The invention discloses a silicon-based micro-module structure containing temperature and strain sensing and a preparation method thereof, wherein the silicon-based micro-module structure comprises the following components: a silicon substrate, wherein a temperature sensor and a strain sensor are integrated on the surface of the silicon substrate by utilizing a semiconductor front-end process; the chip is integrated in the silicon substrate cavity containing the temperature sensor and the strain sensor through a wafer-level fan-out process; and the interconnection metal is used for leading out signals of the chip, the temperature sensor and the strain sensor to a preset position and bonding with the solder balls. According to the invention, the semiconductor resistance type temperature and strain sensor is integrated in the wafer fan-out silicon-based micro-module by adopting the embedded sensing integrated architecture, so that the silicon-based micro-module containing the temperature and strain sensor can be directly obtained, and the monitoring of the physical quantities such as temperature, strain and the like in the silicon-based micro-module is realized, and the data support and the technical support are provided for the health state evaluation of the silicon-based micro-module.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a silicon-based micro-module structure containing temperature and strain sensing and a preparation method thereof.
Background
With the continuous increase of the requirements of the electronic devices on performance, portability and integration, the miniaturization development of the electronic devices by using the wafer-level packaging integration technology is a necessary trend. The wafer level packaging integration technology achieves the size miniaturization and performance improvement of electronic products and simultaneously brings more reliability problems, for example, the heat dissipation effect inside the silicon-based micro-module is obvious after the function density is improved, so that the temperature of the silicon-based micro-module is too high, the performance is reduced, and meanwhile, when the environment loads such as external high temperature, mechanical impact and vibration are experienced, the internal stress state of the silicon-based micro-module is more complex, and the micro-structure inside the silicon-based micro-module is possibly invalid. In order to evaluate the reliability of the silicon-based micro-module under the conditions of working and external environmental load, the temperature and stress state inside the silicon-based micro-module need to be obtained, and the traditional temperature and strain measurement mode, such as a contact sensor, is difficult to integrate inside the silicon-based micro-module due to the small size of the silicon-based micro-module, and the non-contact measurement technology adopting the optical means can only measure the physical quantity of the surface of the silicon-based micro-module, so that the physical quantity inside the silicon-based micro-module is difficult to measure.
Disclosure of Invention
In order to solve the problem that the physical quantity such as temperature and strain in the silicon-based micro-module prepared by the wafer-level packaging technology is difficult to measure due to the reduced volume, the invention provides a silicon-based micro-module structure containing temperature and strain sensing and a preparation method thereof, by adopting an embedded sensing integrated architecture, the semiconductor resistance type temperature and strain sensor is integrated in the wafer fan-out silicon-based micro-module, so that the silicon-based micro-module containing the temperature and strain sensor can be directly obtained, and therefore monitoring of physical quantities such as temperature and strain in the silicon-based micro-module is realized, and data support and technical support are provided for health state evaluation of the silicon-based micro-module.
The invention is realized by the following technical scheme:
a silicon-based micro-module structure including temperature and strain sensing, the silicon-based micro-module structure comprising:
A silicon substrate, wherein a temperature sensor and a strain sensor are integrated on the surface of the silicon substrate by utilizing a semiconductor front-end process;
The chip is integrated in the silicon substrate cavity containing the temperature sensor and the strain sensor through a wafer-level fan-out process;
The interconnection metal is used for leading out signals of the chip, the temperature sensor and the strain sensor to a preset position and bonding with the solder balls;
Wherein the interconnect metal surface is insulated by a dielectric layer.
The existing temperature and strain measurement technology in the microelectronic packaging field is limited by the size of the silicon-based micro-module prepared by wafer-level fan-out, the temperature and strain physical quantity data inside the silicon-based micro-module cannot be measured, and technical support cannot be provided for reliability evaluation optimization of the silicon-based micro-module. The silicon-based micro-module structure provided by the invention adopts an embedded sensing integrated framework, a temperature sensor and a strain sensor are directly integrated at a preset position on the surface of a wafer through a semiconductor front-channel process, and the silicon-based micro-module is processed by utilizing a semiconductor back-channel process based on the wafer containing the temperature sensor and the strain sensor, so that the embedded integration of temperature and strain sensing is realized while the silicon-based micro-module is produced and prepared, the silicon-based micro-module has the capability of measuring internal temperature and strain physical quantity under the working and external environment load, and a sensing data support is provided for the reliability evaluation optimization.
In a preferred embodiment, the temperature sensor and the strain sensor of the present invention are both semiconductor resistive sensors.
As a preferred embodiment, the number and specific positions of the temperature sensors and the strain sensors of the present invention are determined according to actual monitoring requirements.
As a preferred embodiment, the silicon substrate of the present invention is an SOI wafer.
As a preferred embodiment, the interconnection metal of the invention adopts gold, and the dielectric layer adopts an organic material.
On the other hand, the invention also provides a preparation method of the silicon-based micro-module structure containing temperature and strain sensing, which specifically comprises the following steps:
Integrating a temperature sensor and a strain sensor on the surface of a silicon substrate by utilizing a semiconductor front-pass process to obtain the silicon substrate containing the temperature sensor and the strain sensor;
Integrating chips in a silicon substrate cavity containing a temperature sensor and a strain sensor by using a wafer-level fan-out process;
The signals of the chip, the temperature sensor and the strain sensor are led out to a preset position by utilizing interconnection metal and bonded with the solder balls; wherein the interconnect metal surface is insulated by a dielectric layer.
As a preferred embodiment, the present invention utilizes a semiconductor front-end process to integrate a temperature sensor and a strain sensor on a surface of a silicon substrate, and specifically includes:
growing a silicon dioxide layer on the surface of the silicon substrate, etching the silicon dioxide layer, and performing ion implantation at the arrangement position of the silicon substrate sensor to form a lightly doped region;
Coating photoresist on the surface of a silicon substrate, carrying out sensor pattern photoetching after carrying out heavy doping at the sensor arrangement position, and forming a temperature sensor, a strain sensor and an interconnection area;
And (3) growing a silicon dioxide layer, completing through hole etching, and preparing interconnection metal and a sensor bonding pad on the surface of the silicon dioxide layer to obtain the silicon substrate containing the temperature sensor and the strain sensor.
In a preferred embodiment, the temperature sensor and the strain sensor of the present invention have a rectangular shape or a curved configuration composed of a plurality of rectangular shapes.
As a preferred embodiment, the present invention utilizes a wafer level fan-out process to integrate a chip within a silicon substrate cavity containing a temperature sensor and a strain sensor, specifically comprising:
Etching the silicon cavity;
and placing a chip in the etched silicon cavity, and bonding the chip with the bottom of the cavity.
In an embodiment, the present invention utilizes interconnection metal to lead out signals of a chip and signals of a temperature sensor and a strain sensor to a preset position, and bonds the signals with solder balls, and specifically includes:
After chip integration is completed, preparing a dielectric layer, realizing insulation among different signal interconnection metals through the dielectric layer, and leading out signals of the chip, the temperature sensor and the strain sensor by utilizing the interconnection metals;
and preparing a dielectric layer on the surface of the interconnection metal, insulating a plurality of solder balls with different signals through the dielectric layer, and then bonding the solder balls at preset positions.
Compared with the prior art, the invention has the following advantages and beneficial effects:
According to the silicon-based micro-module structure and the preparation method, the temperature and strain sensors are integrated at specific positions on the surface of the wafer through the semiconductor front-end process, and the silicon-based micro-module is prepared by utilizing the wafer-level fan-out process based on the wafer containing the temperature and strain sensors, so that signal interconnection between chips can be realized, internal temperature and strain physical quantity measurement of the silicon-based micro-module can be realized, the internal temperature and strain of the silicon-based micro-module can be monitored on line in a working state, the problem that the internal temperature and strain physical quantity measurement of the silicon-based micro-module cannot be realized is solved, and data support and technical support are provided for reliability evaluation optimization.
Drawings
The accompanying drawings, which are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. In the drawings:
FIG. 1 is a schematic diagram of a silicon-based micro-module structure according to an embodiment of the present invention;
FIG. 2 is a flow chart of a process for fabricating a silicon-based micro-module structure according to an embodiment of the present invention;
FIG. 3 is a diagram showing a silicon dioxide layer growth and ion implantation process according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating a heavily doped region formation process according to an embodiment of the present invention;
FIG. 5 is a diagram of a sensor pattern etching process according to an embodiment of the present invention;
FIG. 6 is a diagram of a sensor pad interconnect process in accordance with an embodiment of the present invention;
FIG. 7 is a diagram illustrating a process of silicon cavity etching and chip embedding in accordance with an embodiment of the present invention;
FIG. 8 is a diagram illustrating a process for fabricating a dielectric layer and an interconnect metal layer according to an embodiment of the present invention;
Fig. 9 is a diagram illustrating a dielectric layer preparation and solder ball bonding process according to an embodiment of the present invention.
Reference numerals and corresponding part names:
1-solder balls, 2-temperature sensors, 3-interconnection metals, 4-dielectric layers, 5-chips, 6-strain sensors, 7-silicon substrates, 8-silicon dioxide layers, 9-P or N type lightly doped regions, 10-P or N type heavily doped regions and 11-photoresist.
Detailed Description
Hereinafter, the terms "comprises" or "comprising" as may be used in various embodiments of the present invention indicate the presence of inventive functions, operations or elements, and are not limiting of the addition of one or more functions, operations or elements. Furthermore, as used in various embodiments of the invention, the terms "comprises," "comprising," and their cognate terms are intended to refer to a particular feature, number, step, operation, element, component, or combination of the foregoing, and should not be interpreted as first excluding the existence of or increasing likelihood of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing.
In various embodiments of the invention, the expression "or" at least one of a or/and B "includes any or all combinations of the words listed simultaneously. For example, the expression "a or B" or "at least one of a or/and B" may include a, may include B or may include both a and B.
Expressions (such as "first", "second", etc.) used in the various embodiments of the invention may modify various constituent elements in the various embodiments, but the respective constituent elements may not be limited. For example, the above description does not limit the order and/or importance of the elements. The above description is only intended to distinguish one element from another element. For example, the first user device and the second user device indicate different user devices, although both are user devices. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of various embodiments of the present invention.
It should be noted that: if it is described to "connect" one component element to another component element, a first component element may be directly connected to a second component element, and a third component element may be "connected" between the first and second component elements. Conversely, when one constituent element is "directly connected" to another constituent element, it is understood that there is no third constituent element between the first constituent element and the second constituent element.
The terminology used in the various embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the various embodiments of the invention. As used herein, the singular is intended to include the plural as well, unless the context clearly indicates otherwise. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of the invention belong. The terms (such as those defined in commonly used dictionaries) will be interpreted as having a meaning that is the same as the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in connection with the various embodiments of the invention.
For the purpose of making apparent the objects, technical solutions and advantages of the present invention, the present invention will be further described in detail with reference to the following examples and the accompanying drawings, wherein the exemplary embodiments of the present invention and the descriptions thereof are for illustrating the present invention only and are not to be construed as limiting the present invention.
For easy understanding, the technical terms used in the embodiments of the present invention are explained first, and specifically as follows:
SOI (Silicon-On-Insulator): i.e., silicon on an insulating substrate, by introducing a buried oxide layer between the top silicon layer and the backing substrate;
DIC: namely, a digital image correlation method is used for calculating strain information of the measured object by measuring the relative position of the measured object after deformation;
Advanced packaging: flip chip packaging (FC) at the front edge, wafer level packaging (WLP, WAFER LEVEL PACKAGING, including wafer level fan-out, wafer level fan-in, etc.), system level packaging (SiP, system In a Package), and 2.5D/3DTSV packaging, etc., are important methods for improving connection density, improving system integration, and miniaturizing;
Wafer level fan-out: the wiring design of I/O contacts is adopted in the area outside the chip size, the number of the I/O contacts is increased, the wiring area which can be used by the chip is increased by adopting an RDL (re-wiring) process, and the effective area of the chip is fully utilized.
Silicon-based micro-module: the advanced packaging technology means, such as a wafer level packaging technology and a 2.5D/3D packaging technology, are utilized to integrate a plurality of bare chips inside a silicon substrate, so as to realize electrical interconnection among the plurality of chips and form the silicon-based micro module.
The semiconductor front-end process comprises the following steps: the process flow is to perform ion implantation on a silicon substrate to realize the preparation of N-type and P-type field effect transistors, namely the process for manufacturing an integrated circuit chip;
The semiconductor back-end process: this part of the process is usually directed to packaging the prepared chips.
Example 1
At present, temperature and strain measurement means in the field of microelectronic packaging mainly comprise contact type and non-contact type measurement methods, wherein the contact type measurement methods mainly comprise the following steps: platinum resistance for temperature measurement, strain gauge for stress-strain measurement, piezoresistive sensors, etc. With the development of advanced packaging technology, the size of the silicon-based micro-module prepared by adopting wafer-level fan-out is further reduced, and conventional platinum resistors, strain gauges and piezoresistive sensors cannot be integrated inside the silicon-based micro-module due to size limitation, so that the physical quantity inside the silicon-based micro-module cannot be obtained. The non-contact measurement method mainly comprises the following steps: the infrared thermal imager for temperature measurement is used for DIC (digital imaging and communication) and shadow moire interference and the like for stress strain measurement, the testing method mainly adopts an optical means to measure through an external instrument, only the physical quantity of the surface of the silicon-based micro-module can be measured, the physical quantity inside the silicon-based micro-module can not be measured, and meanwhile, the infrared thermal imager is limited by the testing environment and the size, and is difficult to directly use under some working and external environment loads. In summary, it is difficult to obtain the physical quantity data such as temperature and strain of the silicon-based micro-module under the working and external environmental load by the conventional measurement method, and thus it is not possible to directly provide technical support for reliability evaluation. In view of this, this embodiment provides a silicon-based micro-module structure including temperature and strain sensing, which adopts an embedded sensing integrated architecture, and integrates a semiconductor resistor type temperature and strain sensor inside a wafer fan-out silicon-based micro-module, so that the silicon-based micro-module including the temperature and strain sensor can be directly obtained, and monitoring of physical quantities such as temperature and strain inside the silicon-based micro-module is realized, and data support and technical support are provided for health state evaluation of the silicon-based micro-module.
As shown in fig. 1, the silicon-based micro-module provided in this embodiment mainly includes a silicon substrate 7, a chip 5, a temperature sensor 2, a strain sensor 6, an interconnection metal 3, a dielectric layer 4, a silicon dioxide layer 8, a bonding pad 1, and the like.
Integrating a temperature sensor 2 and a strain sensor 6 on the surface of a silicon substrate 7 by utilizing a semiconductor front-end process; the number and specific positions of the temperature sensor 2 and the strain sensor 6 are determined according to actual requirements.
The die 5 is integrated in the cavity of the silicon substrate 7 containing the temperature sensor 2 and the strain sensor 6 using a wafer level fan-out process.
Signals of the chip 5, the temperature sensor 2 and the strain sensor 6 are led out to specific positions through the interconnection metal 3, and are bonded with the solder balls 1. Wherein the interconnect metal 3 surface is insulated by a dielectric layer 4.
The silicon-based micro-module structure provided by the embodiment not only realizes signal interconnection among chips, but also realizes the function of measuring the internal temperature and strain quantity of the silicon-based micro-module, solves the problem that the internal temperature and strain physical quantity of the silicon-based micro-module cannot be measured, enables the silicon-based micro-module to perform on-line monitoring of the internal temperature and strain in a working state, and provides data support for reliability evaluation and optimization.
Furthermore, the temperature sensor and the strain sensor in the embodiment are both semiconductor resistance type sensors, and physical quantity signal measurement is realized based on the temperature resistance effect and the piezoresistance effect of the semiconductor material respectively, so that the temperature sensor and the strain sensor are convenient to integrate in the silicon-based micro-module.
Example 2
The embodiment provides a method for preparing a silicon-based micro-module structure containing temperature and strain sensing, which is provided by the embodiment 1, wherein the method for preparing the silicon-based micro-module structure comprises the steps of integrating a temperature sensor and a strain sensor on the surface of a silicon substrate by utilizing a semiconductor front-channel process to obtain the silicon substrate containing the temperature sensor and the strain sensor; and then integrating the chip in a silicon substrate cavity containing the temperature sensor and the strain sensor by utilizing a wafer-level fan-out (semiconductor back-end) process, and leading out signals of the chip, the temperature sensor and the strain sensor by utilizing interconnection metal, so that the temperature sensor and the strain sensor are integrated in a silicon-based micro-module prepared by utilizing the wafer-level fan-out process, and the silicon-based micro-module has the capability of measuring the internal temperature and the strain physical quantity under the working and external environmental loads, and provides data support for reliability evaluation optimization.
As shown in fig. 2, the specific flow of the preparation method is as follows:
Step 1, growing a silicon dioxide layer 8 on the surface of a silicon substrate 7, etching the silicon dioxide layer, and performing ion implantation at a specific position of the silicon substrate by utilizing a previous process to form a lightly doped region 9, as shown in fig. 3. The silicon substrate may be, but is not limited to, a conventional size SOI wafer, such as a 4 inch, 6 inch, 8 inch wafer, etc.; the specific position is a sensor arrangement position determined by the early design, is lightly doped into P type or N type, and is specifically selected according to the type of the sensor.
Step 2, coating photoresist 11 on the surface of the silicon substrate 7, performing heavy doping at a specific position to form a heavy doped region 10, and performing sensor pattern lithography to form a temperature sensor, a strain sensor and an interconnection region, as shown in fig. 4 and 5. The heavy doping type is selected according to the process of the step 1, namely, the heavy doping type is determined according to the light doping type; the shape of the temperature sensor and the strain sensor is preferably rectangular, and the temperature sensor and the strain sensor can also be a bending configuration formed by a plurality of rectangles so as to increase the resistance value of the sensor; the number of temperature sensors and strain sensors is determined by the specific physical quantity monitoring requirements.
And 3, growing a silicon dioxide layer, completing through hole etching, preparing interconnection metal 3 and a sensor pad on the surface of the silicon dioxide layer, and connecting the sensor pad with the interconnection metal 3 to obtain a silicon substrate 7 containing a temperature sensor 2 and a strain sensor 6, as shown in fig. 6. The pad metal is preferably aluminum, and the steps 1,2 and 3 are realized through the previous process, and the silicon substrate containing the temperature sensor and the strain sensor is obtained after the completion of the previous process.
And 4, integrating the chip 5 through a semiconductor back-end (wafer-level fan-out) process. The integration process of the chip 5 specifically includes the following steps: firstly, etching a silicon cavity, wherein the number of the cavity etches is determined according to the number of the required integrated chips; the etched silicon cavity is filled with a chip 5 and bonded to the bottom of the cavity, as shown in fig. 7.
And step 5, preparing a dielectric layer 4, realizing insulation among different signal interconnection metals 3 through the dielectric layer 4, and leading out signals of the chip 5 and signals of the sensors (2, 6) by utilizing the interconnection metals 3, as shown in fig. 8. The interconnect metal 3 is preferably gold and the dielectric layer 4 is preferably an organic material such as polyimide or the like.
And 6, preparing a dielectric layer 4 on the surface of the interconnection metal, insulating a plurality of solder balls 1 with different signals through the dielectric layer 4, and bonding the solder balls 1 at the designated positions to complete the preparation of the whole silicon-based micro-module containing the temperature sensor and the strain sensor, as shown in fig. 9.
The foregoing description of the embodiments has been provided for the purpose of illustrating the general principles of the invention, and is not meant to limit the scope of the invention, but to limit the invention to the particular embodiments, and any modifications, equivalents, improvements, etc. that fall within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (8)
1. A silicon-based micro-module structure including temperature and strain sensing, the silicon-based micro-module structure comprising:
a silicon substrate, wherein a temperature sensor and a strain sensor are integrated on the surface of the silicon substrate by utilizing a semiconductor front-end process; integrating a temperature sensor and a strain sensor on the surface of the silicon substrate by utilizing a semiconductor front-end process, and specifically comprising the following steps:
growing a silicon dioxide layer on the surface of the silicon substrate, etching the silicon dioxide layer, and performing ion implantation at the arrangement position of the silicon substrate sensor to form a lightly doped region;
Coating photoresist on the surface of a silicon substrate, carrying out sensor pattern photoetching after carrying out heavy doping at the sensor arrangement position, and forming a temperature sensor, a strain sensor and an interconnection area;
Growing a silicon dioxide layer, completing through hole etching, and preparing interconnection metal and a sensor bonding pad on the surface of the silicon dioxide layer to obtain a silicon substrate containing a temperature sensor and a strain sensor; the shape of the temperature sensor and the strain sensor is rectangular or a bending configuration formed by a plurality of rectangles;
The chip is integrated in the silicon substrate cavity containing the temperature sensor and the strain sensor through a wafer-level fan-out process;
The interconnection metal is used for leading out signals of the chip, the temperature sensor and the strain sensor to a preset position and bonding with the solder balls;
Wherein the interconnect metal surface is insulated by a dielectric layer.
2. The silicon-based micro-module structure with temperature and strain sensing according to claim 1, wherein the temperature sensor and the strain sensor are both semiconductor resistive sensors.
3. The silicon-based micro-module structure with temperature and strain sensors according to claim 1, wherein the number and specific positions of the temperature sensors and the strain sensors are determined according to actual monitoring requirements.
4. The silicon-based micro-module structure with temperature and strain sensing according to claim 1, wherein the silicon substrate is an SOI wafer.
5. The silicon-based micro-module structure with temperature and strain sensing according to claim 1, wherein the interconnection metal is gold, and the dielectric layer is made of an organic material.
6. The preparation method of the silicon-based micro-module structure containing temperature and strain sensing is characterized by specifically comprising the following steps:
Integrating a temperature sensor and a strain sensor on the surface of a silicon substrate by utilizing a semiconductor front-pass process to obtain the silicon substrate containing the temperature sensor and the strain sensor;
Integrating chips in a silicon substrate cavity containing a temperature sensor and a strain sensor by using a wafer-level fan-out process;
The signals of the chip, the temperature sensor and the strain sensor are led out to a preset position by utilizing interconnection metal and bonded with the solder balls; wherein the surface of the interconnection metal is insulated by a dielectric layer; the method for integrating the temperature sensor and the strain sensor on the surface of the silicon substrate by utilizing the semiconductor front-end process specifically comprises the following steps:
growing a silicon dioxide layer on the surface of the silicon substrate, etching the silicon dioxide layer, and performing ion implantation at the arrangement position of the silicon substrate sensor to form a lightly doped region;
Coating photoresist on the surface of a silicon substrate, carrying out sensor pattern photoetching after carrying out heavy doping at the sensor arrangement position, and forming a temperature sensor, a strain sensor and an interconnection area;
growing a silicon dioxide layer, completing through hole etching, and preparing interconnection metal and a sensor bonding pad on the surface of the silicon dioxide layer to obtain a silicon substrate containing a temperature sensor and a strain sensor; the temperature sensor and the strain sensor are rectangular or a bending configuration formed by a plurality of rectangles.
7. The method for preparing a silicon-based micro-module structure with temperature and strain sensors according to claim 6, wherein the wafer-level fan-out process is used to integrate chips in a silicon substrate cavity with temperature sensors and strain sensors, specifically comprising:
Etching the silicon cavity;
and placing a chip in the etched silicon cavity, and bonding the chip with the bottom of the cavity.
8. The method for preparing a silicon-based micro-module structure with temperature and strain sensing according to claim 6, wherein the method is characterized in that signals of a chip, signals of a temperature sensor and signals of a strain sensor are led out to a preset position by using interconnection metal and are bonded with solder balls, and specifically comprises the following steps:
After chip integration is completed, preparing a dielectric layer, realizing insulation among different signal interconnection metals through the dielectric layer, and leading out signals of the chip, the temperature sensor and the strain sensor by utilizing the interconnection metals;
and preparing a dielectric layer on the surface of the interconnection metal, insulating a plurality of solder balls with different signals through the dielectric layer, and then bonding the solder balls at preset positions.
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