CN117608864B - Multi-core cache consistency method and system - Google Patents
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
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- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention provides a multi-core cache consistency method and system, wherein when a monitoring module detects that a first kernel sends a first access request aiming at a target file to a first cache, if the monitoring module detects that first modification data are stored in a temporary storage module, the monitoring module instructs the first kernel to update the target file stored in the first cache based on the first modification data, and instructs the first kernel to execute a first access operation corresponding to the first access request on the updated target file. The first modified data is data generated when at least one core history, which is different from the first core, included in the multi-core processor performs a write operation on the target file. And if the monitoring module does not detect that the temporary storage module stores the first modified data, the first inner core is instructed to execute the first access operation on the target file stored in the first cache. The invention can reduce the power consumption of the multi-core processor by reducing the updating times of each core included in the multi-core processor to the stored target file.
Description
Technical Field
The present invention relates to the technical field of multi-core processors, and in particular, to a multi-core cache consistency method and system.
Background
In applications of multi-core processors, some data needs to be accessed by multiple cores in the processor. The data may be stored in a shared cache of the processor chip, where each core may read the data. However, since the access time of the kernel of the processor to the shared cache is long, in order to shorten the access time of the kernel to the data, the data is often copied into a private cache of the kernel itself. The next time a certain kernel accesses the data, only the data in its own private cache needs to be accessed. In addition, since the access to the data has write access in addition to read access, if a certain kernel performs write access to the data in its own private cache, the version of the data in the private cache is updated, and the data stored in other kernels and the shared cache are still the original versions, so that there is a problem that the multi-core caches are inconsistent.
Currently, when data in a private cache of a certain core is modified, a broadcast message for modifying the data needs to be sent to other cores storing the data, so as to inform the other cores to perform a consistency operation on the data stored in the private cache.
It can be seen that when performing a coherency operation in a multi-core processor, the core that issued the write operation needs to communicate with the other cores in order to determine which cores have a copy of the data cached therein, and thus perform the coherency operation on the cores that have stored the copy of the data. That is, each write operation performed on the data triggers communication between the cores, increasing the power consumption of the processor.
Disclosure of Invention
The invention aims to provide a multi-core cache consistency method and a system, which can reduce the power consumption of a processor.
The technical scheme for solving the technical problems is as follows:
on one hand, the invention provides a multi-core cache consistency method which is applied to a multi-core cache consistency system. The multi-core processor comprises a first kernel, wherein the first kernel corresponds to a first cache, and the first cache is a private cache of the first kernel. The method provided by the invention comprises the following steps: the monitoring module detects that the first kernel sends a first access request aiming at the target file to the first cache. The first access request is for requesting that a first access operation be performed on the target file. If the monitoring module detects that the temporary storage module stores the first modification data, the monitoring module instructs the first kernel to update the target file stored in the first cache based on the first modification data, and instructs the first kernel to execute a first access operation on the updated target file. The first modified data is data generated when at least one core history, which is different from the first core, included in the multi-core processor performs a write operation on the target file. If the monitoring module does not detect that the temporary storage module stores the first modified data, the monitoring module instructs the first kernel to execute the first access operation on the target file stored in the first cache.
The beneficial effects of the invention are as follows: when the monitoring module detects that the first kernel executes the first access request to the target file, whether the version of the target file in the first kernel is the latest version can be determined by detecting whether the first modification data is stored in the temporary cache module. If the monitoring module detects that the temporary cache module stores the first modified data, it can be determined that the version of the target file in the first kernel is not the latest version, and the monitoring module can instruct to update the target file stored in the first kernel and instruct the first kernel to execute the first access operation on the updated target file. That is, since some cores may have target files stored in their private caches for a long time, even though they may never use the target files, updating the target files stored in their private caches is not only meaningless, but also wastes communication resources and power consumption of the processor. Therefore, when one kernel in the processor performs write operation on the target file in the private cache, other kernels which also store the target file do not update the target file stored in the private cache immediately, but update the target file stored in the private cache when other kernels which also store the target file request to access the target file stored in the private cache, so that the power consumption of the processor can be reduced.
On the basis of the technical scheme, the invention can be improved as follows.
Further, in the case where the first access request is a read request, the first access operation is a read operation. In the case where the first access request is a write request, the first access operation is a write operation.
Further, under the condition that the first access operation is a write operation, after the monitoring module instructs the first kernel to execute the first access operation on the updated target file, the monitoring module acquires second modified data corresponding to the first access operation. The second modified data is data generated when the first kernel executes the first access operation on the target file. The monitoring module updates the stored first modification data based on the second modification data.
The beneficial effects of adopting the further scheme are as follows: after the first kernel performs writing operation on the target file to generate second modified data, the monitoring module can update the first modified data stored in the temporary storage module based on the second modified data so as to ensure that when other kernels update the target file based on the first modified data, the updated target file is consistent with the version of the target file stored in the first kernel, and is the target file of the latest version.
Further, the first modification data includes a value corresponding to a first field in the target file, the second modification data includes a value corresponding to a second field in the target file, and if the first field is the same as the second field, the value corresponding to the second field is replaced with the value corresponding to the first field. If the second field is different from the first field, a value corresponding to the second field is added to the first modification data.
The beneficial effects of adopting the further scheme are as follows: a possible implementation of updating the first modification data based on the second modification data is provided. And when updating the target file in the private caches of some cores, the whole target file is not replaced, but part of the content in the target file is replaced based on the modified data of other core histories, so that the updating time is shortened, the updating efficiency is improved, and the power consumption of a processor is reduced.
Further, a management list is stored in the monitoring module. For any core included in the multi-core processor, the management list stores cache information for any core. The cache information comprises the corresponding relation between any kernel and the files stored in the private caches corresponding to any kernel. After the monitoring module instructs the first kernel to execute the first access operation on the updated target file, if the first modification data is not updated within the preset time, and the monitoring module determines that the multi-core processor includes at least one second kernel, for any second kernel in the at least one second kernel, the monitoring module instructs any second kernel to update the target file stored in the private cache of any second kernel based on the first modification data, and the monitoring module deletes the stored first modification data. The second kernel is a kernel storing the target file.
The beneficial effects of adopting the further scheme are as follows: after the first kernel updates the target file, if the first modification data is not updated within the preset time, it is indicated that any second kernel does not modify the target file all the time, so that the target file in any second kernel can be updated, and the modification data corresponding to the target file is deleted, so that the memory of the multi-core processor can be released.
Further, the management list further stores the last access time of any one of the kernels to any one of the files, if the first modified data is not updated within the preset time, and the monitoring module determines that the multi-core processor includes at least one second kernel, for any one of the second kernels, if any one of the second kernels does not access the target file within the preset time, the monitoring module instructs any one of the second kernels to delete the target file stored in the private cache of any one of the second kernels.
The beneficial effects of adopting the further scheme are as follows: if the first modification data is not updated within the preset time and the second kernel does not access the target file within the preset time, it is indicated that the second kernel is highly likely to not access the target file all the time, and therefore, the target file stored in the second kernel can be deleted, and modification data corresponding to the target file is deleted, so that the memory of the multi-core processor can be released.
Further, if the memory size occupied by the first modified data is greater than the first memory threshold, and the monitoring module determines that the multi-core processor includes at least one second core based on the management list, for any second core, the monitoring module instructs any second core to update the target file stored in the private cache of any second core based on the first modified data. The listening module deletes the stored first modified data.
The beneficial effects of adopting the further scheme are as follows: if the memory size occupied by the first modified data is greater than the first memory threshold, the target files stored in each second kernel can be updated, and the first modified data is deleted so as to release the memory of the multi-core processor.
Further, if the memory size occupied by the first modified data is greater than the second memory threshold, and the monitoring module determines that the multi-core processor includes at least one second core, for any second core, the monitoring module instructs any second core to delete the target file stored in the private cache of any second core.
The beneficial effects of adopting the further scheme are as follows: if the memory size occupied by the first modified data is larger than the second memory threshold, the change amount of the target file is larger than a certain value, so that the target file stored in each second kernel can be deleted to release the memory of the multi-core processor, and subsequently, if the second kernel has the requirement of accessing the target file, the complete target file can be obtained again.
On the other hand, the invention provides a multi-core cache consistency system which comprises a monitoring module, a temporary storage module and a multi-core processor. The multi-core processor comprises a first kernel, wherein the first kernel corresponds to a first cache, and the first cache is a private cache of the first kernel. The monitoring module is used for detecting a first access request which is sent to the first cache by the first kernel and is aimed at the target file, and the first access request is used for requesting to execute a first access operation on the target file. The monitoring module is further configured to instruct the first kernel to update the target file stored in the first cache based on the first modification data and instruct the first kernel to perform a first access operation on the updated target file when detecting that the first modification data is stored in the temporary storage module. The first modified data is data generated when at least one core history, which is different from the first core, included in the multi-core processor performs a write operation on the target file. The monitoring module is further configured to instruct the first kernel to perform a first access operation with respect to the target file stored in the first cache if the first modification data stored in the temporary storage module is not detected.
The beneficial effects of the invention are as follows: when the monitoring module detects that the first kernel executes the first access request to the target file, whether the version of the target file in the first kernel is the latest version can be determined by detecting whether the first modification data is stored in the temporary cache module. If the monitoring module detects that the temporary cache module stores the first modified data, it can be determined that the version of the target file in the first kernel is not the latest version, and the monitoring module can instruct to update the target file stored in the first kernel and instruct the first kernel to execute the first access operation on the updated target file. That is, since some cores may have target files stored in their private caches for a long time, even though they may never use the target files, updating the target files stored in their private caches is not only meaningless, but also wastes communication resources and power consumption of the processor. Therefore, when one kernel in the processor performs write operation on the target file in the private cache, other kernels which also store the target file do not update the target file stored in the private cache immediately, but update the target file stored in the private cache when other kernels which also store the target file request to access the target file stored in the private cache, so that the power consumption of the processor can be reduced.
On the basis of the technical scheme, the invention can be improved as follows.
Further, in the case that the first access operation is a write operation, after the monitoring module instructs the first kernel to execute the first access operation on the updated target file, the monitoring module is further configured to obtain second modification data corresponding to the first access operation. The second modified data is data generated when the first kernel executes the first access operation on the target file. The monitoring module is also used for updating the stored first modification data based on the second modification data. The first modification data comprises a value corresponding to a first field in the target file, and the second modification data comprises a value corresponding to a second field in the target file. If the first field is the same as the second field, the monitoring module is used for replacing the value corresponding to the second field with the value corresponding to the first field. If the second field is different from the first field, the monitoring module is configured to add a value corresponding to the second field to the first modification data.
The beneficial effects of adopting the further scheme are as follows: after the first kernel performs writing operation on the target file to generate second modified data, the monitoring module can update the first modified data stored in the temporary storage module based on the second modified data so as to ensure that when other kernels update the target file based on the first modified data, the updated target file is consistent with the version of the target file stored in the first kernel, and is the target file of the latest version. And when updating the target file in the private caches of some cores, the whole target file is not replaced, but part of the content in the target file is replaced based on the modified data of other core histories, so that the updating time is shortened, the updating efficiency is improved, and the power consumption of a processor is reduced.
Drawings
FIG. 1 is a schematic diagram of a multi-core cache coherency system according to the present invention;
FIG. 2 is a flow chart of a method for multi-core cache coherency according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. Wherein, in the description of the present application, "/" means that the related objects are in a "or" relationship, unless otherwise specified, for example, a/B may mean a or B; the term "and/or" in this application is merely an association relation describing an association object, and means that three kinds of relations may exist, for example, a and/or B may mean: there are three cases, a alone, a and B together, and B alone, wherein a, B may be singular or plural. Also, in the description of the present application, unless otherwise indicated, "a plurality" means two or more than two. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural. In addition, in order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, the words "first", "second", and the like are used to distinguish the same item or similar items having substantially the same function and effect. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ. Meanwhile, in the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as examples, illustrations, or descriptions. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion that may be readily understood.
Since, when performing a coherency operation in a multi-core processor, the core that issued the write operation needs to communicate with the other cores in order to determine which cores have a copy of the data cached therein, the coherency operation is performed on the cores that have the copy of the data stored therein. That is, each write operation performed on the data triggers communication between the cores, increasing the power consumption of the processor.
Therefore, in order to solve the problem, the invention provides a multi-core cache consistency method which can be applied to the multi-core cache consistency system provided by the invention. Referring to fig. 1, the multi-core cache coherence system 100 provided by the present invention includes a monitor module, a temporary storage module, and a multi-core processor. The multi-core processor may include a plurality of cores, each core corresponding to a private cache. In the following, the multi-core processor includes a first core, and the private cache corresponding to the first core is taken as a first cache as an example, and the multi-core cache consistency system provided by the invention is combined to describe the multi-core cache consistency method provided by the invention in detail.
Referring to fig. 2, the multi-core cache consistency method provided by the present invention includes the following steps S201 to S203:
s201: the monitoring module detects that the first kernel sends a first access request aiming at the target file to the first cache.
The first access request is used for requesting to execute a first access operation on the target file.
The first access request may be a read request or a write request in some embodiments. The read request for the target file is a request to read the target file, and the content of the target file is not changed. A write request to the target file is a request to modify the target file, which alters the contents of the target file. Accordingly, in the case where the first access request is a read request, the first access operation is a read operation. In the case where the first access request is a write request, the first access operation is a write operation. If the first access request is a write request, the first access request to the target file may be a field in the target file or may be file information of the target file, which is not limited in this embodiment.
After executing step S201, the method for multi-core cache coherence provided by the present invention may execute step S202 or step S203 based on whether the monitoring module detects that the temporary storage module stores the first modified data. Step S202 and step S203 are described in detail below.
S202: if the monitoring module detects that the temporary storage module stores the first modification data, the monitoring module instructs the first kernel to update the target file stored in the first cache based on the first modification data, and instructs the first kernel to execute a first access operation on the updated target file.
The first modified data is data generated when at least one core history, which is different from the first core, included in the multi-core processor performs a write operation on the target file.
In some embodiments, in the case that the first access operation is a write operation, the snoop module may obtain second modified data corresponding to the first access operation. The second modified data is data generated when the first kernel executes the first access operation on the target file. The listening module may update the first modification data stored in the temporary storage module based on the second modification data.
That is, the temporary storage module always stores the update contents for the target file applicable to each kernel. When each kernel accesses the target file, the monitoring module can update the target file stored in the corresponding kernel based on the update content of the target file stored in the temporary storage module, so as to ensure that the target file accessed by the corresponding kernel is the target file of the latest version.
In some embodiments, the first modification data includes a value corresponding to a first field in the target file, the second modification data includes a value corresponding to a second field in the target file, and when the monitoring module updates the stored first modification data based on the second modification data, if the first field is the same as the second field, the value corresponding to the second field is replaced with the value corresponding to the first field. If the second field is different from the first field, a value corresponding to the second field is added to the first modification data.
For example, if the partial field included in the target file is (1.3.5.4.a.6), the first field included in the target file is modified from 1 to 2, the third field is modified from 5 to 4, the second modification data is modified from 1 to 3, the second field is modified from 3 to 4, the first modification data is updated based on the second modification data, the updated first modification data includes modified from 1 to 3, the second field is modified from 3 to 4, and the third field is modified from 5 to 4.
That is, after the first kernel modifies the target file, the monitoring module does not store the updated target file in the temporary storage module entirely, but uploads the modified portion of the target file by the first kernel to the temporary storage module, and then, the first modification data for the target file stored in the temporary storage module can be updated based on the modified portion of the target file by the first kernel, so as to update the first modification data, and reduce the memory of the multi-core processor.
S203: if the monitoring module does not detect that the temporary storage module stores the first modified data, the monitoring module instructs the first kernel to execute the first access operation on the target file stored in the first cache.
If the monitoring module does not detect that the temporary storage module stores the first modified data, it indicates that each core included in the multi-core processor does not execute writing operation on the target file, and versions of the target files included in each core are consistent. Therefore, after detecting that the first kernel sends the first access request for the target file to the first cache, the monitoring module may instruct the first kernel to directly execute the first access operation on the target file stored in the first cache.
In some embodiments, the listening module has a management list stored therein. For any core included in the multi-core processor, the management list stores cache information for any core. The cache information comprises a corresponding relation between any kernel and files stored in private caches corresponding to any kernel.
Illustratively, the part of the content in the management list stored in the listening module may be as shown in table 1 below:
TABLE 1
If the first modified data is not updated within the preset time and the monitoring module determines that the multi-core processor comprises at least one second core, the fact that each second core does not execute writing operation on the target file within the preset time is indicated. The second kernel is a kernel storing the target file. Therefore, in order to release the memory of the multi-core processor, the monitoring module may instruct each second core to update the target file stored in the private cache of each second core based on the first modification data, and the monitoring module deletes the stored first modification data.
In some embodiments, even though the target files are stored in the private caches of some cores, the cores may not use the target files for a long time, and even never use the target files, so that updating the target files stored in the private caches of the cores is meaningless, and communication resources and power consumption of a processor are wasted. Therefore, the last access time of any one of the cores to any one of the files is also stored in the management list.
Illustratively, the portion of the content in the management list stored in the listening module may be as shown in table 2 below:
TABLE 2
If the first modified data is not updated within the preset time and the monitoring module determines that the multi-core processor comprises at least one second core, for any second core, if the second core does not access the target file within the preset time, the monitoring module instructs the second core to delete the target file stored in the private cache of the second core so as to release the memory of the multi-core processor.
In some embodiments, if the memory size occupied by the first modified data is greater than the first memory threshold, and the snoop module determines, based on the management list, that the multi-core processor includes at least one second core, then for any second core, the snoop module instructs any second core to update the target file stored in the private cache of any second core based on the first modified data. And deleting the stored first modified data by the monitoring module.
That is, if the memory size occupied by the first modification data is greater than the first memory threshold, it indicates that the amount of modification to the target file is required to be greater than a certain value, so that the target file stored in each second core may be updated, and the first modification data may be deleted to release the memory of the multicore processor.
In some embodiments, if the memory size occupied by the first modified data is greater than the second memory threshold, and the snoop module determines that the multicore processor includes at least one second core, for any second core, the snoop module instructs any second core to delete the target file stored in the private cache of any second core.
That is, if the memory size occupied by the first modified data is greater than the second memory threshold, it indicates that the amount of modification required to the target file is greater than a certain value, so that the target file stored in each second core may be deleted to release the memory of the multi-core processor, and subsequently, if there is a need to access the target file in the second core, the complete target file may be re-acquired.
It will be apparent to those skilled in the art from this description that, for convenience and brevity of description, only the above-described division of functional modules is illustrated, and in practical application, the above-described functional allocation may be performed by different functional modules according to needs, i.e. the internal structure of the system is divided into different functional modules to perform all or part of the functions described above.
In the several embodiments provided in this application, it should be understood that the disclosed systems and methods may be implemented in other ways. For example, the system embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interface, system or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a readable storage medium. Based on such understanding, the technical solution of the embodiments of the present application may be essentially or contributing part or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, where the software product includes several instructions for causing a device (may be a single-chip microcomputer, a chip or the like) or a processor (processor) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read Only Memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely a specific embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (8)
1. The multi-core cache consistency method is characterized by being applied to a multi-core cache consistency system, wherein the multi-core cache consistency system comprises a monitoring module, a temporary storage module and a multi-core processor; the multi-core processor comprises a first core, wherein the first core corresponds to a first cache, and the first cache is a private cache of the first core; the method comprises the following steps:
the monitoring module detects that the first kernel sends a first access request aiming at a target file to the first cache; the first access request is used for requesting to execute a first access operation on the target file; wherein, in the case that the first access request is a read request, the first access operation is a read operation; in the case that the first access request is a write request, the first access operation is a write operation;
if the monitoring module detects that the temporary storage module stores first modification data, the monitoring module indicates the first kernel to update the target file stored in the first cache based on the first modification data; and instructing the first kernel to execute the first access operation on the updated target file; the first modified data is data generated when the at least one core history, which is different from the first core, included in the multi-core processor performs a write operation on the target file;
if the monitoring module does not detect that the first modified data is stored in the temporary storage module, the monitoring module instructs the first kernel to execute the first access operation on the target file stored in the first cache;
wherein, in the case that the first access operation is a write operation, after the listening module instructs the first kernel to execute the first access operation on the updated target file, the method further includes:
the monitoring module acquires second modification data corresponding to the first access operation; the second modification data is data generated when the first kernel performs the first access operation on the target file;
the monitoring module updates the stored first modification data based on the second modification data.
2. The method of claim 1, wherein the first modification data comprises a value corresponding to a first field in the target file, the second modification data comprises a value corresponding to a second field in the target file, and the listening module updates the stored first modification data based on the second modification data, comprising:
if the first field is the same as the second field, replacing the value corresponding to the second field with the value corresponding to the first field;
and if the second field is different from the first field, adding a value corresponding to the second field to the first modification data.
3. The method of claim 2, wherein the listening module has a management list stored therein; for any kernel included in the multi-core processor, cache information for any kernel is stored in the management list; the cache information comprises the corresponding relation between any one of the kernels and the files stored in the private caches corresponding to the any one of the kernels; after the monitoring module instructs the first kernel to execute the first access operation on the updated target file, the method further includes:
if the first modification data is not updated within a preset time, the monitoring module determines that the multi-core processor comprises at least one second core, for any second core in the at least one second core, the monitoring module instructs the any second core to update the target file stored in the private cache of the any second core based on the first modification data, and the monitoring module deletes the stored first modification data;
the second kernel is a kernel storing the target file.
4.A method according to claim 3, wherein the management list further stores a last access time of any file for any of the cores, the method further comprising:
if the first modified data is not updated within the preset time and the monitoring module determines that the multi-core processor includes the at least one second core, for any second core, if any second core does not access the target file within the preset time, the monitoring module instructs any second core to delete the target file stored in the private cache of any second core.
5. The method as recited in claim 4, further comprising:
if the memory size occupied by the first modified data is greater than a first memory threshold, and the monitoring module determines that the multi-core processor includes the at least one second core based on the management list, for any second core, the monitoring module instructs the any second core to update the target file stored in the private cache of the any second core based on the first modified data;
and the monitoring module deletes the stored first modified data.
6. The method as recited in claim 5, further comprising:
and if the memory size occupied by the first modified data is larger than a second memory threshold, and the monitoring module determines that the multi-core processor comprises the at least one second core, for any second core, the monitoring module instructs any second core to delete the target file stored in the private cache of any second core.
7. The multi-core cache consistency system is characterized by comprising a monitoring module, a temporary storage module and a multi-core processor;
the multi-core processor comprises a first core, wherein the first core corresponds to a first cache, and the first cache is a private cache of the first core;
the monitoring module is used for detecting a first access request which is sent to the first cache by the first kernel and is aimed at a target file; the first access request is used for requesting to execute a first access operation on the target file; wherein, in the case that the first access request is a read request, the first access operation is a read operation; in the case that the first access request is a write request, the first access operation is a write operation;
the monitoring module is further configured to instruct the first kernel to update the target file stored in the first cache based on the first modification data when it is detected that the first modification data is stored in the temporary storage module; and instructing the first kernel to execute the first access operation on the updated target file; the first modified data is data generated when the at least one core history, which is different from the first core, included in the multi-core processor performs a write operation on the target file;
the monitoring module is further configured to instruct the first kernel to perform the first access operation with respect to the target file stored in the first cache if the first modification data stored in the temporary storage module is not detected;
wherein, in the case that the first access operation is a write operation, the snoop module is configured to instruct the first kernel to execute the first access operation on the updated target file, where after the first kernel executes the first access operation, the snoop module is further configured to:
acquiring second modification data corresponding to the first access operation; the second modification data is data generated when the first kernel performs the first access operation on the target file;
updating the stored first modification data based on the second modification data.
8. The system of claim 7, wherein, in the case where the first access operation is a write operation, the first modification data includes a value corresponding to a first field in the target file, the second modification data includes a value corresponding to a second field in the target file, the snoop module is further configured to update the stored first modification data based on the second modification data, comprising:
if the first field is the same as the second field, the monitoring module is configured to replace the value corresponding to the second field with the value corresponding to the first field;
and if the second field is different from the first field, the monitoring module is used for adding the value corresponding to the second field to the first modification data.
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