CN117580145A - Radio frequency control method for high-precision timing - Google Patents
Radio frequency control method for high-precision timing Download PDFInfo
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- CN117580145A CN117580145A CN202311550726.8A CN202311550726A CN117580145A CN 117580145 A CN117580145 A CN 117580145A CN 202311550726 A CN202311550726 A CN 202311550726A CN 117580145 A CN117580145 A CN 117580145A
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- 238000000034 method Methods 0.000 title claims abstract description 22
- 230000007246 mechanism Effects 0.000 claims abstract description 22
- 238000012544 monitoring process Methods 0.000 claims abstract description 5
- 238000013475 authorization Methods 0.000 claims abstract description 4
- 238000012163 sequencing technique Methods 0.000 claims abstract description 4
- 238000012545 processing Methods 0.000 claims description 14
- 230000003993 interaction Effects 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 3
- 230000011664 signaling Effects 0.000 description 6
- 238000004891 communication Methods 0.000 description 5
- 238000010200 validation analysis Methods 0.000 description 5
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
- H04W56/001—Synchronization between nodes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
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Abstract
The invention relates to a radio frequency control method for high-precision timing, which comprises the following steps: issuing all packet messages to RFC through configuration links; the message manager initiates a message reading request to the packet manager by adopting a preset handshake mechanism according to the state of the message RAM managed by the message manager; after sequencing read message requests of all the packets managed by the packet manager and arbitrating timing messages and real-time messages, the packet manager initiates the read packet requests to the core manager by adopting a preset handshake mechanism; the core manager performs priority arbitration management on the packet reading requests of different cores, adopts overtime/expiration/normal waiting monitoring, and performs authorization or rejection indication on the packet reading requests according to the priority arbitration management result; the authorized read request initiates a read message operation to the corresponding message manager, and the denied read request initiates a discard message operation to the corresponding message manager. The invention can improve the radio frequency emission precision.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a radio frequency control method for high-precision timing.
Background
In the field of mobile wireless communication, most of timing synchronization between a terminal and a base station is based on a GPS/Beidou system, and compared with the situation that the position of the base station is fixed, the position of the terminal is movable at any time, so that the terminal side needs to synchronize timing information with a certain periodic frequency, and control signaling issued by a network side to an air interface radio frequency device also needs to be flexibly adjusted.
When most radio frequency controllers exist, a network high layer directly transmits control signaling to a radio frequency device one by one through a bus interface and a fixed peripheral interface, or a primary control signaling memory is added between the network high layer and the radio frequency controller, and a reading signaling operation is initiated based on a software control signal and is transmitted to the radio frequency device. The communication interface protocol between the network high layer and the physical layer is relatively fixed and simple, and can not be compatible to support different software cores and different peripheral devices, and the effective time for the control signaling to reach the radio frequency air interface is insufficient in precision due to the fact that the signal transmission time between the high layer and the radio frequency device is uncertain, so that the method is not applicable to high-precision timing requirements such as satellite communication/mobile communication and mobile terminal scenes.
Disclosure of Invention
The invention aims to provide a radio frequency control method for high-precision timing, which can improve the control precision of radio frequency emission.
The technical scheme adopted for solving the technical problems is as follows: there is provided a radio frequency control method for high precision timing, comprising the steps of:
issuing all packet messages to RFC through configuration links;
forwarding the analyzed message header to a corresponding message processing module under the cooperation of a packet manager, a message manager and a core manager, wherein the message processing module comprises the following specific steps:
the message manager monitors the state of the managed message RAM, and once the managed message RAM is in a non-idle state, a preset handshake mechanism is adopted to initiate a message reading request to the packet manager;
after sequencing read message requests of all the packets managed by the packet manager and arbitrating timing messages and real-time messages, the packet manager initiates the read packet requests to the core manager by adopting a preset handshake mechanism;
the core manager performs priority arbitration management on the packet reading requests of different cores, adopts overtime/expiration/normal waiting monitoring, and performs authorization or rejection indication on the packet reading requests according to the priority arbitration management result;
the authorized packet reading request initiates a message reading operation to the corresponding message manager, and the refused packet reading request initiates a message discarding operation to the corresponding message manager;
and after the message is executed, if the queued message exists, repeating the process until all message instructions are executed.
The radio frequency control method for high-precision timing is based on a time slot tunneling RAM, and adopts an N-1 time slot issuing, N time slot executing mechanism and a software and hardware interrupt interaction mechanism.
The N-1 time slot issuing and N time slot executing mechanism means that for the Core, N executing packets are issued to the Core idle time slot RAM in the N-1 time slot; and transmitting the packet executed by the N+1 to the other free time slot RAM in the N time slots, and simultaneously executing each message of the previous time slot RAM in sequence at the time of effective time in the present time slot.
The software and hardware interrupt interaction mechanism is that each time all messages of a time slot RAM are executed, a completion interrupt is generated, and software issues a new configuration message packet to the time slot RAM based on the completion interrupt.
Before forwarding the parsed message header to the corresponding message processing module under the cooperation of the packet manager, the message manager and the core manager, the method further comprises the following steps:
RFC analyzes the configuration links of different cores according to address decoding, and forwards the packet information to the configuration links of the corresponding cores; wherein, different cores are managed independently of each other;
the packet forwarder in the Core group forwards the packet header information analyzed from the packet message to the corresponding packet processing module;
the message forwarder in the packet forwards the message header parsed from the header message to the corresponding message processing module.
Advantageous effects
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects: according to the invention, all instructions to be executed are issued to RFC in advance, RFC and all related links thereof are automatically monitored and orderly executed based on the NCR time (including calibration adjustment of NCR) of the system, and software is not needed to participate, so that on one hand, the software load is reduced, on the other hand, the processing time delay and the transmission time delay are fixed, the execution of RF control instructions is accurate, and the RF emission control precision within 1us can be achieved.
Drawings
FIG. 1 is a flow chart of a radio frequency control method for high precision timing according to an embodiment of the present invention;
FIG. 2 is a timing diagram of a radio frequency control method for high precision timing according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a slot tunneling RAM in an embodiment of the invention.
Detailed Description
The invention will be further illustrated with reference to specific examples. It is to be understood that these examples are illustrative of the present invention and are not intended to limit the scope of the present invention. Further, it is understood that various changes and modifications may be made by those skilled in the art after reading the teachings of the present invention, and such equivalents are intended to fall within the scope of the claims appended hereto.
The embodiment of the invention relates to a radio frequency control method for high-precision timing, which is shown in fig. 1 and 2 and comprises the following steps:
step 1, issuing all packet messages to RFC through a configuration link;
step 2, RFC analyzes the configuration links of different cores according to address decoding, and forwards the packet information to the configuration links of the corresponding cores; wherein, different cores are managed independently of each other, and can support a plurality of independent peripheral interfaces to work in parallel;
step 3, the packet forwarder in the core group forwards the packet header information analyzed from the packet message to the corresponding packet processing module;
step 4, the message forwarder in the packet forwards the message header analyzed from the packet header message to the corresponding message processing module;
step 5, the message manager monitors the state of the managed message RAM, and once the managed message RAM is in a non-idle state, a req-ack handshake mechanism is adopted to initiate a message reading request to the packet manager;
step 6, after sequencing the read message requests of each packet managed by the packet manager and arbitrating the timing message and the real-time message, the packet manager initiates the read packet request to the core manager by adopting a req-ack handshake mechanism;
step 7, the core manager carries out priority arbitration management on the packet reading requests of different cores, adopts overtime/expiration/normal waiting monitoring, and carries out authorization or rejection indication on the packet reading requests according to the priority arbitration management result;
step 8, the authorized packet reading request initiates a message reading operation to the corresponding message manager, and the refused packet reading request initiates a message discarding operation to the corresponding message manager;
and after the message is executed, if the queued message exists, repeating the process until all message instructions are executed.
Therefore, the method and the system can perform hierarchical and parameterized management on all signaling, are classified into Core level/packet level/message level/frame level management, and have strong compatibility and portability under different application scenes. In the embodiment, a timeout and expiration mechanism and a plurality of abnormal monitoring and software intervention mechanisms are adopted to ensure normal operation of RFC, priority is divided for each Core among cores to execute arbitration, and in the cores, queuing real-time instructions are executed first and then queuing timing instructions are executed, in addition, the queuing timing instructions are automatically ordered and queued, and instant stamping is early and early sent.
As shown in fig. 3, the method of the present embodiment opens up a RAM based on time slots, and adopts an N-1 time slot issuing, an N time slot executing mechanism and a software and hardware interrupt interaction mechanism, thereby opening up a RAM of 2 time slots.
The N-1 time slot issuing and N time slot executing mechanism means that for the Core, N executing packets are issued to the Core idle time slot RAM in the N-1 time slot; and transmitting the packet executed by the N+1 to the other free time slot RAM in the N time slots, and simultaneously executing each message of the previous time slot RAM in sequence at the time of effective time in the present time slot. For high-precision timing instructions, after the software N-1 time slot unified packet issues all instruction messages to be executed in N time slots, CPU resources are released, all instructions are automatically monitored and ordered by RFC, and all instructions in the time slots are scheduled and executed in the N time slots as required.
The software and hardware interrupt interaction mechanism is that each time all messages of a time slot RAM are executed, a completion interrupt is generated, and software issues a new configuration message packet to the time slot RAM based on the completion interrupt.
This embodiment mode can be applied to the following two examples.
Example 1: and the power-on initialization and channel initialization configuration of the radio frequency device are completed through RFC, wherein the power-on initialization configuration belongs to real-time information, and the channel initialization configuration belongs to timing effective configuration.
According to different sources of configuration messages, cores of different issuing configurations are divided into TX_core, RX_core and OM_core, and the TX and RX Core messages support timing validation, and the OM cores are immediately validated in real time.
Example 2: after the communication service is established, the sending power and the downlink gain are configured and adjusted in a timing effective mode according to the upper-layer service requirement through RFC.
According to different sources of configuration messages, cores of different issuing configurations are divided into MGC0_core, MGC1_core, AGC0_core and AGC1_core which are all on the same CPU Core, wherein the message support timing validation of the MGC0_core and the message support timing validation of the MGC1_core, and the message support timing validation of the AGC0_core and the AGC1_core are real-time immediate validation.
It is not difficult to find that all instructions to be executed are issued to RFC in advance, RFC and all related links thereof are based on the NCR time (including calibration adjustment of NCR) of the system, all instructions are automatically monitored and orderly executed, software is not needed to participate, on one hand, the software load is reduced, on the other hand, the processing time delay and the transmission time delay are fixed, the execution of RF control instructions is accurate, and the RF emission precision within 1us can be achieved.
Claims (5)
1. A radio frequency control method for high precision timing, comprising the steps of:
issuing all packet messages to RFC through configuration links;
forwarding the analyzed message header to a corresponding message processing module under the cooperation of a packet manager, a message manager and a core manager, wherein the message processing module comprises the following specific steps:
the message manager monitors the state of the managed message RAM, and once the managed message RAM is in a non-idle state, a preset handshake mechanism is adopted to initiate a message reading request to the packet manager;
after sequencing read message requests of all the packets managed by the packet manager and arbitrating timing messages and real-time messages, the packet manager initiates the read packet requests to the core manager by adopting a preset handshake mechanism;
the core manager performs priority arbitration management on the packet reading requests of different cores, adopts overtime/expiration/normal waiting monitoring, and performs authorization or rejection indication on the packet reading requests according to the priority arbitration management result;
the authorized packet reading request initiates a message reading operation to the corresponding message manager, and the refused packet reading request initiates a message discarding operation to the corresponding message manager;
and after the message is executed, if the queued message exists, repeating the process until all message instructions are executed.
2. The radio frequency control method for high precision timing according to claim 1, wherein the RAM is opened based on time slots, and an N-1 time slot issuing, an N time slot executing mechanism and a software and hardware interrupt interaction mechanism are adopted.
3. The radio frequency control method for high precision timing according to claim 2, wherein said N-1 slot issuing, N slot executing mechanism means that, for Core, N executing packets are issued to the Core free slot RAM in N-1 slots; and transmitting the packet executed by the N+1 to the other free time slot RAM in the N time slots, and simultaneously executing each message of the previous time slot RAM in sequence at the time of effective time in the present time slot.
4. The radio frequency control method for high precision timing as set forth in claim 2, wherein the software and hardware interrupt interaction mechanism means that, every time all messages of a time slot RAM are executed, a completion interrupt is generated, and software issues a new configuration message packet to the time slot RAM based on the completion interrupt.
5. The radio frequency control method for high precision timing according to claim 1, wherein before forwarding the parsed message header to the corresponding message processing module under the cooperation of the packet manager, the message manager, and the core manager, further comprising:
RFC analyzes the configuration links of different cores according to address decoding, and forwards the packet information to the configuration links of the corresponding cores; wherein, different cores are managed independently of each other;
the packet forwarder in the Core group forwards the packet header information analyzed from the packet message to the corresponding packet processing module;
the message forwarder in the packet forwards the message header parsed from the header message to the corresponding message processing module.
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| CN202311550726.8A CN117580145B (en) | 2023-11-21 | 2023-11-21 | Radio frequency control method for high-precision timing |
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| CN202311550726.8A CN117580145B (en) | 2023-11-21 | 2023-11-21 | Radio frequency control method for high-precision timing |
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| US20090138682A1 (en) * | 2007-11-28 | 2009-05-28 | Capps Jr Louis B | Dynamic instruction execution based on transaction priority tagging |
| US20190050356A1 (en) * | 2017-08-10 | 2019-02-14 | Infineon Technologies Ag | Virtual Machine Monitor Interrupt Support for Computer Processing Unit (CPU) |
| CN113615239A (en) * | 2019-02-13 | 2021-11-05 | 瑞典爱立信有限公司 | Wireless time sensitive networking |
| US20220086854A1 (en) * | 2019-01-04 | 2022-03-17 | Apple Inc. | Accessing a communication channel using disparate communication systems |
| CN114253607A (en) * | 2020-09-25 | 2022-03-29 | 英特尔公司 | Method, system, and apparatus for out-of-order access to shared microcode sequencers by a clustered decode pipeline |
| CN115802414A (en) * | 2022-11-17 | 2023-03-14 | 恒玄科技(上海)股份有限公司 | Special time sequence processor for LTE communication and LTE communication method |
-
2023
- 2023-11-21 CN CN202311550726.8A patent/CN117580145B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090138682A1 (en) * | 2007-11-28 | 2009-05-28 | Capps Jr Louis B | Dynamic instruction execution based on transaction priority tagging |
| US20190050356A1 (en) * | 2017-08-10 | 2019-02-14 | Infineon Technologies Ag | Virtual Machine Monitor Interrupt Support for Computer Processing Unit (CPU) |
| US20220086854A1 (en) * | 2019-01-04 | 2022-03-17 | Apple Inc. | Accessing a communication channel using disparate communication systems |
| CN113615239A (en) * | 2019-02-13 | 2021-11-05 | 瑞典爱立信有限公司 | Wireless time sensitive networking |
| CN114253607A (en) * | 2020-09-25 | 2022-03-29 | 英特尔公司 | Method, system, and apparatus for out-of-order access to shared microcode sequencers by a clustered decode pipeline |
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