CN117579564A - Multi-path flow scheduling system and method based on FPGA and token bucket algorithm - Google Patents

Multi-path flow scheduling system and method based on FPGA and token bucket algorithm Download PDF

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CN117579564A
CN117579564A CN202410077775.2A CN202410077775A CN117579564A CN 117579564 A CN117579564 A CN 117579564A CN 202410077775 A CN202410077775 A CN 202410077775A CN 117579564 A CN117579564 A CN 117579564A
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data
tokens
token bucket
data channel
token
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CN117579564B (en
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刘政春
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Chengdu Zhimingda Electronic Co ltd
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Chengdu Zhimingda Electronic Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/215Flow control; Congestion control using token-bucket
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/22Traffic shaping
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/36Flow control; Congestion control by determining packet size, e.g. maximum transfer unit [MTU]

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

The invention discloses a multi-channel flow scheduling system and a multi-channel flow scheduling method based on an FPGA and a token bucket algorithm, wherein the multi-channel flow scheduling system comprises a data channel, a token bucket and a weighted polling arbiter; the token bucket is used for generating tokens, when data need to be sent, a plurality of tokens need to be acquired from the token bucket, and then the data with the same quantity as the tokens are sent; the data channel is used for receiving commands of the token bucket and the weighted polling arbiter and sending data; the weighted round robin arbiter is configured to receive the data transmission request and to issue the request to the data channel and the token bucket. The method of the invention ensures that the token generation is more accurate, and adopts a two-stage signed high-precision counter to generate the token. The token is allowed to be borrowed, so that the full-rate transmission of the port can be met, and the CIR limit of each data channel can be ensured; and a weighted polling design is adopted, so that the priority processing of high-priority data is ensured, and meanwhile, the traffic shaping and the traffic scheduling are completed.

Description

Multi-path flow scheduling system and method based on FPGA and token bucket algorithm
Technical Field
The invention belongs to the technical field of data processing, and particularly relates to a multi-channel flow scheduling system and method based on an FPGA and a token bucket algorithm.
Background
In digital systems, there are typically multiple channels of data that need to be sent simultaneously, each channel corresponding to a different priority and flow limit; traffic shaping and traffic control typically serves to limit traffic and bursts flowing out of a connection of a network such that such messages are sent out at a relatively uniform rate. In high-speed data centers, flow control and shaping of network traffic is typically accomplished using token bucket algorithms.
Conventional token bucket algorithms first produce a token bucket of a fixed size while continually producing tokens at a constant rate on their own. If tokens are not consumed, or are consumed less than the rate of generation, tokens continue to increase until the bucket is filled. The token that is regenerated later overflows from the bucket. The maximum number of tokens that can be saved in the last bucket never exceeds the bucket size. If tokens exist in the token bucket, allowing traffic to be sent; and if no tokens are present in the token bucket, no traffic is allowed to be sent.
Conventional token buckets have difficulty in addressing the transmission requirements of multiple high-speed data through the same network port in a data center. First, the token bucket always generates tokens at a certain time interval T, and the smaller the interval of T, the higher the accuracy, but the larger the burden on the processor, the higher the accuracy of token generation cannot be realized, and the transmission speed is substantially reduced. Secondly, when multiplexing data transmission, if the token bucket is used for limiting the flow of certain data, the request of other paths cannot be processed during scheduling, and the preset flow of other paths is actually occupied, so that the transmission bandwidth of the whole network port is reduced.
Disclosure of Invention
The invention aims to provide a multi-path flow scheduling system and method based on an FPGA and a token bucket algorithm, which are used for solving the problem that the traditional token bucket provided in the background art is difficult to solve the transmission requirement of multi-path high-speed data in a data center through the same network port.
In order to solve the technical problems, the invention adopts the following technical scheme:
a multi-channel flow scheduling system based on FPGA and token bucket algorithm comprises a data channel, a token bucket and a weighted polling arbiter; the token bucket is used for generating tokens, and when data needs to be sent, a plurality of tokens are needed to be acquired from the token bucket, and then the data with the same quantity as the tokens are sent; the data channel is used for receiving commands of the token bucket and the weighted polling arbiter and sending data; the weighted round robin arbiter is configured to receive the data transmission request and to issue the request to the data channel and the token bucket.
A multipath flow scheduling method based on FPGA and token bucket algorithm comprises the following steps:
step S1, setting parameters; the parameter setting comprises a data channel setting channel CIR, a token bucket calculates token generation according to the CIR, and a weighted round robin arbiter sets the weight Rn of the data channel;
the data channel setting channel CIR specifically is: assuming that the working clock period of the FPGA chip is T, the number of data channels is N, the weight value of each data channel is R0-Rn in sequence, and the promised information rate threshold ratio CIR of each data channel is L0-Ln in sequence, wherein L represents the accuracy duty ratio of the maximum transmission rate I; the maximum transmission rate I is the transmission rate of the scheduled sending port and is defined as the maximum byte number which can be transmitted by each FPGA working clock T;
step S2, the weighted round robin arbiter receives a data transmission request;
step S3, judging whether the number of tokens in the token bucket is larger than the length of data to be transmitted; if the data channel is larger than the weighted round robin arbiter, the data channel initiates a sending request to the weighted round robin arbiter; if not, not transmitting data, and continuing to wait for the next transmission request;
step S4, the weighted round robin arbiter sends a command allowing the data channel to send data;
step S5, the data channel starts data transmission; subtracting a value corresponding to the transmitted data from the weight Rn of the data channel, and subtracting the number of tokens corresponding to the transmitted data from the token bucket;
step S6, ending the data transmission.
According to the technical scheme, the token bucket calculates the token generation according to the CIR specifically as follows: the token bucket adopts a two-stage counter to generate tokens; the value of the counter is the number of tokens, and the number of tokens can be positive or negative; and when the number of the tokens is positive, the number of the tokens in the current token bucket is the number of the tokens, and when the number of the tokens is negative, the number of the tokens borrowed from the previous data channel is the number of the tokens.
According to the technical scheme, when the token bucket generates the token, two levels of waterline are adopted to avoid overflow of the token, and the method specifically comprises the following steps: the first level waterline is set to be 1/4 depth of the token bucket, and the second level waterline is set to be 3/4 depth of the token bucket;
when the first data transmission is started, the accumulated number of tokens in the token bucket cannot exceed 1/4 depth of the token bucket, and the newly generated tokens are discarded; and after the first data transmission is started, the token continues to generate the token at a constant speed at the CIR rate, and when the number of tokens exceeds 3/4 of the depth of the token bucket, the newly generated token is discarded, and the number of tokens in the token bucket is constant equal to the 3/4 of the depth of the token bucket.
According to the above technical solution, in step S4, the weighted round robin arbiter processes the transmission request of the data channel in a round robin manner; when the weighted round robin arbiter receives the sending request of the current data channel, judging whether other data channels are sending data, if so, the current data channel will continue waiting until the current data channel is polled; and if not, allowing the current data channel to transmit data, and transmitting a command allowing transmission to the current data channel.
According to the above technical solution, in step S5, after receiving the command allowing transmission, the data channel performs data transmission according to the working clock period T of the FPGA, that is, each clock period T transmits the data of the I bytes; the number of tokens in the token bucket is calculated according to each period T, namely, the number of tokens is reduced by I each period, and the number of tokens is increased at a constant speed at the CIR rate.
According to the above technical solution, in step S5, when the data channel transmits data, the number of tokens of I bytes is subtracted from each working clock period T of the FPGA chip, and at the same time, the number of tokens of ln×i of the CIR is increased, and each period T is operated twice.
According to the technical scheme, the weighted round robin arbiter counts the weight of the current data channel, and after each time the data channel transmits 1 data frame, the corresponding weight Rn subtracts 1 until the weight Rn is reduced to 0, and the weight is considered to be exhausted;
when the data received by the data channel is transmitted, or the current weight value is 0, or the number of tokens is smaller than the length of the data to be transmitted by the data channel, the data channel ends the current data transmission, and initiates a command for closing the transmission to the weighted round robin arbiter.
Compared with the prior art, the invention has the following beneficial effects:
the method of the invention ensures that the token generation is more accurate, and adopts a two-stage signed high-precision counter to generate the token. In addition, the token is allowed to be borrowed, so that the full-rate transmission of the port can be met, and the CIR limit of each data channel can be ensured; and a weighted polling design is adopted, so that the priority processing of high-priority data is ensured, and meanwhile, the traffic shaping and the traffic scheduling are completed.
Drawings
FIG. 1 is a schematic diagram of a system module according to the present invention;
FIG. 2 is a schematic diagram of token bucket token computation according to the present invention;
FIG. 3 is a flow chart of the method of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
As shown in fig. 1, a multi-path traffic scheduling system based on FPGA and token bucket algorithm includes a data channel, a token bucket, and a weighted round robin arbiter; the token bucket is used for generating tokens, and when data needs to be sent, a plurality of tokens are needed to be acquired from the token bucket, and then the data with the same quantity as the tokens are sent; the data channel is used for receiving commands of the token bucket and the weighted polling arbiter and sending data; the weighted round robin arbiter is configured to receive the data transmission request and to issue the request to the data channel and the token bucket.
The method of the invention ensures that the token generation is more accurate, and the token generation is performed by adopting the two-stage signed high-precision counter, so that the ns-level precision can be achieved. In addition, the token is allowed to be borrowed, so that the full-rate transmission of the port can be met, and the CIR limit of each data channel can be ensured; and a weighted polling design is adopted, so that the priority processing of high-priority data is ensured, and meanwhile, the traffic shaping and the traffic scheduling are completed.
Example two
This embodiment is a further refinement of embodiment one.
As shown in fig. 3, a multi-path flow scheduling method based on an FPGA and a token bucket algorithm, the scheduling method includes the following steps:
step S1, setting parameters; the parameter setting comprises a data channel setting channel CIR, a token bucket calculates token generation according to the CIR, and a weighted round robin arbiter sets the weight Rn of the data channel;
the data channel setting channel CIR specifically is: assuming that the working clock period of the FPGA chip is T, the number of data channels is N, the weight value of each data channel is R0-Rn in sequence, and the promised information rate threshold ratio CIR of each data channel is L0-Ln in sequence, wherein L represents the accuracy duty ratio of the maximum transmission rate I; the maximum transmission rate I is the transmission rate of the scheduled sending port and is defined as the maximum byte number which can be transmitted by each FPGA working clock T;
step S2, the weighted round robin arbiter receives a data transmission request;
step S3, judging whether the number of tokens in the token bucket is larger than the length of data to be transmitted; if the data channel is larger than the weighted round robin arbiter, the data channel initiates a sending request to the weighted round robin arbiter; if not, not transmitting data, and continuing to wait for the next transmission request;
step S4, the weighted round robin arbiter sends a command allowing the data channel to send data;
step S5, the data channel starts data transmission; subtracting a value corresponding to the transmitted data from the weight Rn of the data channel, and subtracting the number of tokens corresponding to the transmitted data from the token bucket;
step S6, ending the data transmission.
As shown in fig. 2, the token bucket calculates token generation according to CIR specifically as: the token bucket adopts a two-stage counter to generate tokens; the value of the counter is the number of tokens, and the number of tokens can be positive or negative; and when the number of the tokens is positive, the number of the tokens in the current token bucket is the number of the tokens, and when the number of the tokens is negative, the number of the tokens borrowed from the previous data channel is the number of the tokens.
When the token bucket generates tokens, two levels of waterline are adopted to avoid overflow of the tokens, and the method specifically comprises the following steps: the first level waterline is set to be 1/4 depth of the token bucket, and the second level waterline is set to be 3/4 depth of the token bucket;
when the first data transmission is started, the accumulated number of tokens in the token bucket cannot exceed 1/4 depth of the token bucket, and the newly generated tokens are discarded; and after the first data transmission is started, the token continues to generate the token at a constant speed at the CIR rate, and when the number of tokens exceeds 3/4 of the depth of the token bucket, the newly generated token is discarded, and the number of tokens in the token bucket is constant equal to the 3/4 of the depth of the token bucket.
In step S4, the weighted round robin arbiter processes the request for transmission of a data channel in a round robin manner; when the weighted round robin arbiter receives the sending request of the current data channel, judging whether other data channels are sending data, if so, the current data channel will continue waiting until the current data channel is polled; and if not, allowing the current data channel to transmit data, and transmitting a command allowing transmission to the current data channel.
In step S5, after receiving the command allowing transmission, the data channel transmits data according to the working clock period T of the FPGA, namely, each clock period T transmits data of I bytes; the number of tokens in the token bucket is calculated according to each period T, namely, the number of tokens is reduced by I each period, and the number of tokens is increased at a constant speed at the CIR rate.
In step S5, when the data channel transmits data, the number of tokens of I bytes is subtracted from the working clock period T of each FPGA chip, and the number of tokens of ln×i of the CIR is increased, and two operations are performed for each period T.
The weighted round robin arbiter counts the weight of the current data channel, and after each time the data channel transmits 1 data frame, the corresponding weight Rn subtracts 1 until the weight Rn is reduced to 0, and the weight is considered to be exhausted;
when the data received by the data channel is transmitted, or the current weight value is 0, or the number of tokens is smaller than the length of the data to be transmitted by the data channel, the data channel ends the current data transmission, and initiates a command for closing the transmission to the weighted round robin arbiter.
Example III
The invention is characterized in that: a multipath flow scheduling method based on FPGA and token bucket algorithm comprises the following steps:
step 1, firstly, setting a data channel to be scheduled, a token bucket and a weighted polling arbiter, wherein the specific setting is as follows: assuming that the working clock period of the FPGA chip is T, the number of data channels to be scheduled is N, the weight value of each data channel is R0-Rn in sequence, and the promised information rate threshold ratio CIR of each data channel is L0-Ln in sequence, wherein L represents the precision duty ratio of the maximum transmission rate I; the maximum transmission rate I is the transmission rate of the scheduled sending port and is defined as the maximum byte number which can be transmitted by each FPGA working clock T; the data transmission is carried out in the form of data frames;
and 2, generating tokens into the token bucket by the token bucket principle at a certain limited rate, and if data need to be sent, firstly sending an application and then acquiring a certain number of tokens from the token bucket. When no tokens are advisable in the bucket, the request is denied, and when the token bucket is full, the new token is discarded. The token bucket algorithm may be used to control the flow of data sent to the back-end devices. Based on the token bucket principle, after the digital system is powered on and started, tokens are generated, N total token buckets correspond to N paths of data channels, the tokens are generated at constant speed at the CIR rates set by the tokens, the tokens are accumulated in the token buckets, and two stages of waterlines are adopted to avoid overflow of the tokens. The design is based on the FPGA characteristic, and a two-stage counter is adopted to generate a token; each token bucket corresponds to an independent two-stage counter with sign bits, and the value of the counter is the number of tokens, so that the number of tokens can be positive or negative; when the number of tokens is positive, the number of tokens in the current token bucket N is negative, the number of tokens borrowed by the corresponding data channel N before is the number.
And 3, the data channel receives the data of the front end of the digital system. After the data channel N receives the external data, data transmission is prepared. The data channel N firstly inquires the state of the token bucket N corresponding to the data channel, and only when the number of tokens in the token bucket N is greater than or equal to the number of data bytes needing to be sent in the current sending, the data channel N initiates a sending request to the weighted round robin arbiter, otherwise, the data channel N continues to wait for the increase of the number of tokens.
And 4, after the data channel N initiates a sending request to the weighted round robin arbiter, waiting for the weighted round robin arbiter to return a command for allowing data to be sent. The weighted round robin arbiter processes the transmission requests of the plurality of data channels in a round robin fashion. When receiving the request for sending the data channel N, if no other channel is sending data, the data channel N is allowed to send and a command for allowing to send is sent to the data channel N, otherwise, the data channel N is allowed to wait until the data channel N is polled.
And 5, after receiving the command allowing transmission, the data channel N transmits data according to the working clock period T of the FPGA, namely, each clock period T transmits data of I bytes. At this time, the number of tokens in the token bucket is calculated according to each period T, i.e. the number of tokens is reduced by I in each period, and meanwhile, the number of tokens is continuously increased at a constant speed at the CIR rate, so that statistics of the number of tokens in the bucket is accurately realized. Meanwhile, the weighted round robin arbiter counts the weight of the current data channel N, and each time the data channel N transmits 1 data frame, its corresponding weight Rn is subtracted by 1. Until the weight Rn decreases to 0, the weight is considered to have been exhausted.
And 6, when the data channel N finishes transmitting the data received from the outside, or the current weight value is 0, or the number of tokens is smaller than the length of the data to be transmitted by the data channel N, the data channel N finishes the current data transmission and initiates a command for closing the transmission to the weighted round robin arbiter. And after receiving the command, the weighted round robin arbiter finishes the current sending state and performs the round robin state.
In step 2, the token generation and calculation adopts an independent two-stage counter with sign bits to generate the number of tokens with positive and negative numbers, and the value of the counter is the number of tokens, so that the number of tokens is also signed, namely the number of tokens can be positive or negative. And when the number is positive, the number of tokens in the current token bucket N is negative, and when the number is negative, the number of tokens borrowed by the corresponding data channel N before.
In step 2, two stages of water lines are used to avoid token overflow, the first stage of water line is set to 1/4 depth and the second stage of water line is set to 3/4 depth. When the digital system starts the first dispatch, the accumulated number of tokens cannot exceed 1/4 depth of the token bucket, and the newly generated tokens are discarded; and after the first scheduling is started, the tokens continue to generate tokens at a constant speed at the CIR rate, and when the number of tokens exceeds 3/4 of the depth of the token bucket, the newly generated tokens are discarded, and the number of tokens in the token bucket is constant equal to the 3/4 of the depth of the token bucket. This is designed so that tokens do not overflow the depth of the token bucket.
In step 3, the data transmission flow of the data channel is limited by the number of tokens in the corresponding token bucket, and the data channel N is allowed to transmit data only when the number of tokens in the corresponding token bucket is greater than P when the data channel initiates a request. And if the number of tokens in the current corresponding token bucket is negative or smaller than the number of tokens requested, prohibiting the current transmission. However, when the data channel is transmitting data, the design still allows the token to be borrowed for transmission, and the tokens in the token bucket are negative until the transmission of the current data frame is completed. Therefore, the transmitting port defined in step S1 always transmits at the maximum transmission rate I, and the transmission rate of the whole system is not reduced, but the token borrowed by the data channel needs to be recovered to be greater than the next transmission length P, so that the next transmission can be performed, and the traffic requirement defined by the CIR is satisfied.
In step 5, when the data channel N transmits data, the token of I bytes is subtracted from the working clock period T of each FPGA chip, and the token number of Ln x I specified by the CIR is increased, and each period T is calculated twice, so that the clock period of the FPGA chip is only nanosecond, and the method has the characteristic of high precision; the subtraction is designed as a complement addition, which contains 1 sign bit; in binary system, the complement of positive number is the original code, the complement of negative number is the sign bit unchanged, the rest bits are inverted by bit and added with 1.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Finally, it should be noted that: the foregoing description is only a preferred embodiment of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (8)

1. A multipath flow scheduling system based on FPGA and token bucket algorithm is characterized in that: includes a data channel, a token bucket, and a weighted round robin arbiter; the token bucket is used for generating tokens, and when data needs to be sent, a plurality of tokens are needed to be acquired from the token bucket, and then the data with the same quantity as the tokens are sent; the data channel is used for receiving commands of the token bucket and the weighted polling arbiter and sending data; the weighted round robin arbiter is configured to receive the data transmission request and to issue the request to the data channel and the token bucket.
2. A multipath flow scheduling method based on FPGA and token bucket algorithm is characterized in that: the scheduling system of claim 1, the scheduling method comprising the steps of:
step S1, setting parameters; the parameter setting comprises a data channel setting channel CIR, a token bucket calculates token generation according to the CIR, and a weighted round robin arbiter sets the weight Rn of the data channel;
the data channel setting channel CIR specifically is: assuming that the working clock period of the FPGA chip is T, the number of data channels is N, the weight value of each data channel is R0-Rn in sequence, and the promised information rate threshold ratio CIR of each data channel is L0-Ln in sequence, wherein L represents the accuracy duty ratio of the maximum transmission rate I; the maximum transmission rate I is the transmission rate of the scheduled sending port and is defined as the maximum byte number which can be transmitted by each FPGA working clock T;
step S2, the weighted round robin arbiter receives a data transmission request;
step S3, judging whether the number of tokens in the token bucket is larger than the length of data to be transmitted; if the data channel is larger than the weighted round robin arbiter, the data channel initiates a sending request to the weighted round robin arbiter; if not, not transmitting data, and continuing to wait for the next transmission request;
step S4, the weighted round robin arbiter sends a command allowing the data channel to send data;
step S5, the data channel starts data transmission; subtracting a value corresponding to the transmitted data from the weight Rn of the data channel, and subtracting the number of tokens corresponding to the transmitted data from the token bucket;
step S6, ending the data transmission.
3. The multi-path flow scheduling method based on the FPGA and the token bucket algorithm according to claim 2, wherein the method is characterized in that: the token bucket calculates the token generation according to the CIR specifically as follows: the token bucket adopts a two-stage counter to generate tokens; the value of the counter is the number of tokens, namely the number of tokens in the current token bucket when the tokens are positive numbers, and the number of tokens borrowed from the previous data channel when the tokens are negative numbers.
4. The multi-path flow scheduling method based on the FPGA and the token bucket algorithm according to claim 3, wherein the method comprises the following steps: when the token bucket generates tokens, two levels of waterline are adopted to avoid overflow of the tokens, and the method specifically comprises the following steps: the first level waterline is set to be 1/4 depth of the token bucket, and the second level waterline is set to be 3/4 depth of the token bucket;
when the first data transmission is started, the accumulated number of tokens in the token bucket cannot exceed 1/4 depth of the token bucket, and the newly generated tokens are discarded; and after the first data transmission is started, the token continues to generate the token at a constant speed at the CIR rate, and when the number of tokens exceeds 3/4 of the depth of the token bucket, the newly generated token is discarded, and the number of tokens in the token bucket is constant equal to the 3/4 of the depth of the token bucket.
5. The multi-path flow scheduling method based on the FPGA and the token bucket algorithm according to claim 2, wherein the method is characterized in that: in step S4, the weighted round robin arbiter processes the request for transmission of a data channel in a round robin manner; when the weighted round robin arbiter receives the sending request of the current data channel, judging whether other data channels are sending data, if so, the current data channel will continue waiting until the current data channel is polled; and if not, allowing the current data channel to transmit data, and transmitting a command allowing transmission to the current data channel.
6. The multi-path flow scheduling method based on the FPGA and the token bucket algorithm according to claim 2, wherein the method is characterized in that: in step S5, after receiving the command allowing transmission, the data channel transmits data according to the working clock period T of the FPGA, namely, each clock period T transmits data of I bytes; the number of tokens in the token bucket is calculated according to each period T, namely, the number of tokens is reduced by I each period, and the number of tokens is increased at a constant speed at the CIR rate.
7. The multi-path flow scheduling method based on the FPGA and the token bucket algorithm according to claim 6, wherein the method comprises the following steps: in step S5, when the data channel transmits data, the number of tokens of I bytes is subtracted from the working clock period T of each FPGA chip, and the number of tokens of ln×i of the CIR is increased, and two operations are performed for each period T.
8. The multi-path flow scheduling method based on the FPGA and the token bucket algorithm according to claim 7, wherein the method comprises the following steps: the weighted round robin arbiter counts the weight of the current data channel, and after each time the data channel transmits 1 data frame, the corresponding weight Rn subtracts 1 until the weight Rn is reduced to 0, and the weight is considered to be exhausted;
when the data received by the data channel is transmitted, or the current weight value is 0, or the number of tokens is smaller than the length of the data to be transmitted by the data channel, the data channel ends the current data transmission, and initiates a command for closing the transmission to the weighted round robin arbiter.
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