CN117579522B - Bandwidth and delay performance measuring method and circuit of IB network switching chip - Google Patents
Bandwidth and delay performance measuring method and circuit of IB network switching chip Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0876—Network utilisation, e.g. volume of load or congestion level
- H04L43/0894—Packet rate
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0823—Errors, e.g. transmission errors
- H04L43/0829—Packet loss
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0852—Delays
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0876—Network utilisation, e.g. volume of load or congestion level
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/22—Parsing or analysis of headers
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Abstract
The invention provides a bandwidth and delay performance measuring method and circuit of an IB network switching chip, wherein the method comprises the following steps: receiving the configuration parameters defined by the software at the detection initiating terminal, and analyzing the configuration parameters to obtain control parameters of the IB network switching chip; constructing an IB protocol message according to the control parameters and outputting the IB protocol message to a link layer; and receiving an IB protocol message returned by the link layer, analyzing the returned IB protocol message according to the control parameter, carrying out packet loss detection and message transmission delay calculation according to the serial number and the time stamp information of the returned IB protocol message, and writing the calculation result into a register. The scheme of the invention realizes the measurement of bandwidth and delay performance under the conditions of different message sizes and flow control in the chip.
Description
Technical Field
The invention belongs to the field of network transmission, and particularly relates to a bandwidth and delay performance measuring method and circuit of an IB network switching chip.
Background
IB (InfiniBand) is a computer network communication standard for high performance computing. It has extremely high throughput and extremely low latency for data interconnection from computer to computer. InfiniBand also serves as a direct or switched interconnect between servers and storage systems, as well as an interconnect between storage systems.
As the core of the network, the performance of the network interconnection device directly affects the stability, reliability and scale of the network. Therefore IB switched network performance measurements are of paramount importance. However, the existing IB switching network performance measurement can only use a network card, and is easily affected by the performance of an operating system. The measurement means is mainly passive monitoring of the use condition of the IB network, and the bandwidth and the delay performance of a link in the network cannot be measured due to the lack of an active measurement means.
Disclosure of Invention
The invention aims to provide a method and a circuit for measuring bandwidth and delay performance of an IB network switching chip, which aim to realize active measurement of the bandwidth and delay performance of the IB network switching chip.
According to a first aspect of the present invention, there is provided a method for measuring bandwidth and delay performance of an IB network switching chip, comprising:
receiving configuration parameters defined by software, and analyzing the configuration parameters to obtain control parameters of an IB network switching chip;
constructing an IB protocol message according to the control parameter and outputting the IB protocol message to a link layer;
And receiving the IB protocol message returned by the link layer, analyzing the returned IB protocol message according to the control parameter, carrying out packet loss detection and message transmission delay calculation according to the serial number and the timestamp information of the returned IB protocol message, and writing the calculation result into a register.
Preferably, the constructing an IB protocol packet according to the control parameter further includes:
according to the control parameters, constructing LRH, DETH and load containing time stamp information, combining the header and the load, and constructing IB protocol message of type, length, DLID and IPD related to the control parameters.
Preferably, the packet loss detection further includes:
Receiving IB protocol message and analyzing DLID, SLID, opcode and PSN in the header, including header and time stamp information, checking DLID, SLID and OPcode, carrying out message data volume statistics, PSN statistics and time stamp information extraction after the checking is passed, calculating bandwidth according to the message data volume statistics result, detecting packet loss condition according to the PSN statistics result, and calculating message path transmission time according to the time stamp information.
Preferably, after receiving the IB protocol packet returned by the link layer, the method further comprises:
and determining whether a response message needs to be replied according to software configuration, and if the response message needs to be replied, exchanging SLID and DLID in the received message, recombining the SLID and DLID into an IB protocol message and outputting the IB protocol message.
Preferably, after writing the calculation result into the register, the method further comprises:
And reading the register with a preset period by using software according to the size of a preset detection window so as to acquire the calculation result.
According to a second aspect of the present invention, there is provided a bandwidth and delay performance measurement circuit of an IB network switching chip, comprising:
The register configuration parameter analysis module is used for receiving the configuration parameters defined by the software and analyzing the configuration parameters to obtain the control parameters of the IB network switching chip;
the packet sending module is used for constructing an IB protocol message according to the control parameter and outputting the IB protocol message to a link layer;
and the receiving detection module is used for receiving the IB protocol message returned by the link layer, analyzing the returned IB protocol message according to the control parameter, carrying out flow statistics, packet loss detection and message transmission delay calculation according to the serial number and the timestamp information of the returned IB protocol message, and writing the calculation result into a register.
And the response message reply module is used for receiving the IB protocol message returned by the link layer, extracting the header and the time stamp information in the message, exchanging the DLID and the SLID in the header, and recombining the DLID and the SLID into a response message of the minimum PMTU and sending the response message back to the opposite-end chip.
Preferably, the packet sending module is further configured to:
according to the control parameters, a load containing time stamp information is constructed LRH, BTH, DETH, a header is combined with the load, and an IB protocol message of the type, the length, the DLID and the IPD related to the control parameters is constructed.
Preferably, the receiving detection module is further configured to:
Receiving IB protocol message and analyzing DLID, SLID, opcode and PSN in the header, including header and time stamp information, checking DLID, SLID and OPcode, carrying out message data volume statistics, PSN statistics and time stamp information extraction after the checking is passed, calculating bandwidth according to the message data volume statistics result, detecting packet loss condition according to the PSN statistics result, and calculating message path transmission time according to the time stamp information.
Preferably, the system further comprises a response message reply module for:
and determining whether a response message needs to be replied according to software configuration, and if the response message needs to be replied, exchanging SLID and DLID in the received message, recombining the SLID and DLID into an IB protocol message and outputting the IB protocol message.
Preferably, the circuit is further for:
After the calculation result is written into the register, the register is read by software according to the size of a detection window which is preset, and the calculation result is obtained.
The invention relates to a method and a circuit for measuring bandwidth and delay performance of an IB network switching chip, wherein a modularized circuit for measuring bandwidth and delay performance of the IB network switching chip is embedded in the chip, and external test equipment is not needed at all. The test flow is controlled by software, the package sending and the detection are executed by hardware, the test result is perceived by software, the message sending of any length, any number and any flow is supported, the cyclic sending is supported, the detection of an internal loop or an external link can be carried out according to the needs, and the bandwidth and the delay performance of the internal fabric and the external link of the chip under the conditions of different message sizes and flow can be accurately evaluated. The method provided by the invention is realized by matching with software, and can be used for chip design and chip modeling.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure and process particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of an IB network switch chip architecture incorporating bandwidth and latency performance measurement circuitry according to the present invention.
Fig. 2 is a block diagram of a bandwidth and delay performance measurement circuit according to the present invention.
Fig. 3 is a flow chart of a bandwidth and latency performance measurement method of an IB network switch chip according to the invention.
Fig. 4 is a flow chart of the bandwidth and latency performance measurement circuit according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which are derived by a person skilled in the art from the embodiments according to the invention without creative efforts, fall within the protection scope of the invention.
Aiming at the defects of the prior art, the invention provides a bandwidth and delay performance measuring method and circuit of an IB network switching chip, and a group of bandwidth and delay performance measuring circuits are built by using hardware resources in the chip.
The measuring circuit for the bandwidth and the delay performance of the IB network switching chip is arranged in the IB network switching chip equipment shown in figure 1. 101-106 in fig. 1 represent mutually independent functional entity modules in an IB switching chip device. 101 shows a register interface module, 102 shows a test module, 103 shows a data channel module, 104 shows a small link transmission module, 105 shows a data routing module, and 106 shows a link transmission layer module. The data path includes two independent data channels: where 102 is the test bandwidth and delay channel module. The functional circuitry described in the present invention is implemented in 102 of fig. 1.
Fig. 2 depicts an implementation architecture of the test channel module shown in fig. 1. Referring to fig. 2, the bandwidth and delay performance measurement circuit 102 of the ib network switch chip mainly includes a register configuration parameter analyzing module 201, a packet sending module 202, a response message replying module 203, and a receiving detection module 204. The register configuration parameter analyzing module 201 is configured to analyze the software configuration parameter into a control parameter that can be directly used by a subsequent module. The packet sending module 202 is configured to construct IB protocol messages with a specific length, a specific flow control, and a specific number of IB protocol messages carrying time stamp information according to control parameters, send the IB protocol messages to a link layer, and count a packet sending flow. The response message reply module 203 is configured to exchange a SLID (source local identifier) and a DLID (destination local identifier) of a message returned by the link layer, and reconstruct the shortest response message by combining with time stamp information in the message to reply, and send the shortest response message to the link layer. The packet sending module 202 and the response message reply module 203 may not operate simultaneously. That is, the protocol message constructed by the packet sending module 202 or the response message reassembled by the response message reply module 203 is sent to the link layer by an alternative manner. The receiving detection module 204 performs, according to the configuration parameters, the SLID, DLID, and PSN (packet sequence number) verification on the packet returned by the link layer. And carrying out flow and delay statistics on the checked message, recording the packet loss condition, updating the calculation result to a state register according to the size of the detection window, and periodically reading the state register by software according to the size of the detection window to obtain the calculation result.
Referring to the flowchart of fig. 3, the bandwidth and delay performance measurement method of the IB network switching chip provided by the invention includes:
step 101: and receiving the configuration parameters defined by the software, and analyzing the configuration parameters to obtain the control parameters of the IB network switching chip.
Fig. 4 depicts the workflow of the measurement circuit. The scheme of the invention can be used as a detection initiating terminal. The register configuration parameter parsing module 201 parses the software configuration parameters into control parameters in a predefined format in order to instruct the packet sending module 202 to complete the sending of packets and the receiving detection module 204 to complete the receiving detection. Configuration parameters include, but are not limited to: PMTU (path maximum transmission unit), number of transmitted messages, DLID, SLID, IPD (inter-packet delay), detection window size, etc. The analysis of the obtained control parameters comprises the following steps: the number of clock cycles required for a single message transmission, the number of clock cycles for a message interval, the length of a single message, etc. And the software determines each configuration parameter of the test mode according to different test purposes, and updates the configuration parameters to the hardware module by writing a register. And the hardware module analyzes and starts working after acquiring the correct configuration parameters.
Step 102: and constructing an IB protocol message according to the control parameter and outputting the IB protocol message to a link layer.
The packet transmission module 202 constructs LRH (local routing header), BTH (basic transport header), DETH (datagram extended transport header) and payload containing time stamp information according to control parameters of a predefined format. The packet sending module 202 sends the header and payload component IB protocol packets (including the IB protocol packets that construct the type, length, DLID and IPD associated with the control parameters) to the output port, i.e., the mini-link layer, i.e., the MINILINK module 104 of the IB switching chip device shown in fig. 1. When all the message transmission is completed or the software forcibly ends the transmission, the packet transmission module 202 notifies the software that the packet transmission work has been stopped in the form of an interrupt.
Step 103: and receiving the IB protocol message returned by the link layer, analyzing the returned IB protocol message according to the control parameter, carrying out packet loss detection and message transmission delay calculation according to the returned IB protocol message, and writing the calculation result into a register.
The receiving detection module 204 performs preparation work before receiving the message according to the control parameter, receives the IB protocol message input by the MINILINK module, analyzes DLID, SLID, opcode (operation code) and PSN in a header, including header and timestamp information, checks DLID, SLID and Opcode, performs message data volume statistics, PSN statistics and timestamp information extraction after the check is passed, calculates bandwidth according to the message data volume statistics result, detects packet loss condition according to the PSN statistics result, and calculates message path transmission time according to the timestamp information.
The receiving detection module 204 also has a time stamp reply function. When the software configuration receiving detection module 204 needs to reply to the time stamp information, the module extracts the time stamp information in the message when receiving and checking a passing message, and then reconstructs the time stamp information into a message of the minimum PMTU to form a response message and sends the response message. The top layer of the measuring circuit selects and outputs a common test message or a response test message according to software configuration requirements.
The response message reply module 203 is used when RTT (in network transmission delay) is measured, extracts time stamp information from the received message, and then exchanges DLID and SLID, and reassembles the DLID and SLID into a response message and outputs the response message. And determining whether a response message needs to be replied according to the work requirement of software configuration, and if the response message needs to be replied, exchanging SLID and DLID in the received message, recombining the SLID and DLID into an IB protocol message and outputting the IB protocol message to a port.
The receiving detection module 204 updates the calculation result register with a preset period according to the size of the detection window configured by the software. And when the software forcibly ends the detection and the updating of the calculation result of the last window is completed, ending all detection work and informing the software in the form of interrupt. And the software reads the calculation result register according to the size of a pre-configured detection window in a preset period to acquire a calculation result.
When the software receives the group sending completion interrupt and the detection completion interrupt and the last group window calculation result has been read, the current test work is completed entirely.
When the scheme of the invention is used as a detection response end, the configuration parameters defined by software are received, and the configuration parameters are analyzed to obtain the control parameters of the IB network switching chip; and receiving an IB protocol message input by the link layer and sent by the detection initiating terminal, extracting time stamp information, recombining the time stamp information into a response message, outputting the response message to the link layer, and sending the response message back to the detection initiating terminal.
The circuit of the present invention can be used either alone or in pairs.
When the method is used alone, the packet sending module 202 constructs an output message, the output message is looped back by other subsystems in the chip and then is input to the receiving detection module 204, and the use scene can be used for measuring path delay and bandwidth among different subsystems in the chip.
When the local packet sending module 202 is used in pairs, an output message is constructed by the local packet sending module 202, and is output to the receiving and detecting module 204 of the opposite end chip after passing through each subsystem in the chip, the receiving and detecting module 204 of the opposite end chip performs verification and statistics on the received message, and the use scene can be used for measuring the bandwidth of the local chip sent to the opposite end chip, and meanwhile, optionally, the response message replying module 203 of the opposite end can reply a response message to the local receiving and detecting module 204, and the response message can be used for measuring the network transmission delay between the local chip and the opposite end chip.
Therefore, the bandwidth and delay performance measuring method and circuit of the IB network switching chip provided by the invention have the advantages that the modularized circuit for measuring the bandwidth and delay performance of the IB network switching chip is embedded in the chip, and no external test equipment is needed. The test flow is controlled by software, the package sending and the detection are executed by hardware, the test result is perceived by software, the message sending of any length, any number and any flow control is supported, the cyclic sending is supported, the detection of an internal loop or an external link can be carried out according to the needs, and the bandwidth and the time delay performance of the internal fabric and the external link of the chip under the conditions of different message sizes and flow control can be accurately evaluated. The method provided by the invention is realized by matching with software, and can be used for chip design and chip modeling.
It will be appreciated that the circuit configurations, parameters and interface types described in the above embodiments are by way of example only. Those skilled in the art may also make and adjust the structural features of the above embodiments as desired without limiting the inventive concept to the specific details of the examples described above.
While the invention has been described in detail with reference to the foregoing embodiments, it will be appreciated by those skilled in the art that variations may be made in the techniques described in the foregoing embodiments, or equivalents may be substituted for elements thereof; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. The bandwidth and delay performance measuring method for IB network exchange chip is characterized by comprising the following steps:
receiving configuration parameters defined by software, and analyzing the configuration parameters to obtain control parameters of an IB network switching chip;
constructing an IB protocol message according to the control parameter and outputting the IB protocol message to a link layer;
And receiving the IB protocol message returned by the link layer, analyzing the returned IB protocol message according to the control parameter, carrying out packet loss detection and message transmission delay calculation according to the serial number and the timestamp information of the returned IB protocol message, and writing the calculation result into a register.
2. The method for measuring bandwidth and delay performance of an IB network switch chip according to claim 1, wherein constructing an IB protocol packet according to the control parameter further comprises:
according to the control parameters, a load containing time stamp information is constructed LRH, BTH, DETH, a header is combined with the load, and an IB protocol message of the type, the length, the DLID and the IPD related to the control parameters is constructed.
3. The method for measuring bandwidth and delay performance of an IB network switch chip according to claim 2, wherein said packet loss detection further comprises:
Receiving IB protocol message and analyzing DLID, SLID, opcode and PSN in the header, including header and time stamp information, checking DLID, SLID and OPcode, carrying out message data volume statistics, PSN statistics and time stamp information extraction after the checking is passed, calculating bandwidth according to the message data volume statistics result, detecting packet loss condition according to the PSN statistics result, and calculating message path transmission time according to the time stamp information.
4. The method for measuring bandwidth and delay performance of an IB network switch chip according to claim 1, wherein after said receiving an IB protocol packet returned by said link layer, the method further comprises:
and determining whether a response message needs to be replied according to software configuration, and if the response message needs to be replied, exchanging SLID and DLID in the received message, recombining the SLID and DLID into an IB protocol message and outputting the IB protocol message.
5. The method of measuring bandwidth and latency performance of an IB network switch chip of claim 1, further comprising, after writing the calculation result into a register:
And reading the register with a preset period by using software according to the size of a preset detection window so as to acquire the calculation result.
6. A bandwidth and latency performance measurement circuit for an IB network switching chip, comprising:
The register configuration parameter analysis module is used for receiving the configuration parameters defined by the software and analyzing the configuration parameters to obtain the control parameters of the IB network switching chip;
the packet sending module is used for constructing an IB protocol message according to the control parameter and outputting the IB protocol message to a link layer;
And the receiving detection module is used for receiving the IB protocol message returned by the link layer, analyzing the returned IB protocol message according to the control parameter, carrying out packet loss detection and message transmission delay calculation according to the serial number and the timestamp information of the returned IB protocol message, and writing the calculation result into a register.
7. The IB network switch chip bandwidth and latency performance measurement circuit of claim 6, wherein the packet transmitting module is further configured to:
according to the control parameters, a load containing time stamp information is constructed LRH, BTH, DETH, a header is combined with the load, and an IB protocol message of the type, the length, the DLID and the IPD related to the control parameters is constructed.
8. The IB network switch chip bandwidth and latency performance measurement circuit of claim 7, wherein the reception detection module is further configured to:
Receiving IB protocol message and analyzing DLID, SLID, opcode and PSN in the header, including header and time stamp information, checking DLID, SLID and OPcode, carrying out message data volume statistics, PSN statistics and time stamp information extraction after the checking is passed, calculating bandwidth according to the message data volume statistics result, detecting packet loss condition according to the PSN statistics result, and calculating message path transmission time according to the time stamp information.
9. The IB network switch chip bandwidth and latency performance measurement circuit of claim 6, further comprising a response message reply module for:
and determining whether a response message needs to be replied according to software configuration, and if the response message needs to be replied, exchanging SLID and DLID in the received message, recombining the SLID and DLID into an IB protocol message and outputting the IB protocol message.
10. The IB network switch chip bandwidth and latency performance measurement circuit of claim 6, wherein the circuit is further configured to:
After the calculation result is written into the register, the register is read by software according to the size of a detection window which is preset, and the calculation result is obtained.
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| US7724678B1 (en) * | 2006-06-14 | 2010-05-25 | Oracle America, Inc. | Method and apparatus for testing a communication link |
| CN104363142A (en) * | 2014-11-25 | 2015-02-18 | 中国人民解放军国防科学技术大学 | Automatic data center network performance bottleneck analysis method |
| CN108390797A (en) * | 2018-02-27 | 2018-08-10 | 盛科网络（苏州）有限公司 | A method of active measurement agreement is realized based on chip |
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