CN117561464A

CN117561464A - Chip, optical fiber array unit and communication system

Info

Publication number: CN117561464A
Application number: CN202180099573.2A
Authority: CN
Inventors: 张文奇; 邱志成; 宗飞
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2021-11-22
Filing date: 2021-11-22
Publication date: 2024-02-13
Also published as: WO2023087305A1

Abstract

The embodiment of the application discloses chip, fiber array unit and communication system sets up the first alignment structure including the alignment wave ridge on the chip, set up the second alignment structure including the alignment groove in the fiber array unit, and fiber array unit is used for fixed fiber array, alignment wave ridge in the first alignment structure and the alignment groove in the second alignment structure can be utilized, realize the fixed between chip and the fiber array unit, thereby realize the passive coupling of waveguide array in the chip and the fiber array fixed by the fiber array unit, need not to set up the groove that is used for placing the fiber array at the chip, compare in the groove that is used for placing the fiber array, the alignment wave ridge occupies less area, reduce the cost of chip.

Description

Chip, optical fiber array unit and communication system

Technical Field

The present disclosure relates to the field of semiconductor technologies, and in particular, to a chip, an optical fiber array unit, and a communication system.

Background

With the continuous growth of data communication, optical-input-output (OIO) modules based on photonics, which may also be referred to as optical engines, have been widely used and developed in optical link (optical links) systems, wherein optical transceiver modules based on silicon-based photonics have characteristics of high speed and high bandwidth. In the optical transceiver module, a chip may be included, the chip may be a photonic chip (photonics integrated circuit, PIC), an optical medium for transmitting an optical signal is included in the chip, and at least one of an electro-optical modulator, a laser, a photodetector, an optical amplifier, and the like may be further included in the chip, for implementing conversion between the optical signal and the electrical signal. The chip has an interface that allows receiving or transmitting optical signals from/to the optical fiber and thus has a waveguide coupled to the optical fiber for transmitting optical signals, and in a multi-channel optical transceiver module, the chip may have a plurality of waveguides that constitute a waveguide array.

To obtain higher bandwidth, the optical transceiver module may implement coupling between a Fiber Array (FA) and an on-chip waveguide array, where the waveguide array is coupled to an off-chip optical fiber array, so that the chip may receive optical signals from the optical fiber array or transmit optical signals to the optical fiber array. The fiber array may be fixed so as to have a certain relative position, and a means for fixing the fiber array and aligning the fiber array to the chip is called a Fiber Array Unit (FAU). The coupling mode of the optical fiber array and the waveguide array can be edge coupling, the optical fiber array is coupled to the edge of the chip, and the edge coupling has small loss and receives general attention.

With the increasing bandwidth, the number of optical channels is increasing, and in order to reduce the coupling packaging cost, it is necessary to implement passive coupling of the fiber array and the waveguide array. In order to realize passive coupling between an optical fiber array and a waveguide array, an optical fiber fixing area needs to be disposed at an edge of a chip for placing and fixing optical fibers, referring to fig. 1, which is a schematic structural diagram of a chip at present, the chip includes a substrate 100, a waveguide array 110 on the substrate 100, and an optical fiber fixing area 120, where the optical fiber fixing area 120 is generally provided with one or more grooves, and when a plurality of optical fibers are placed in the grooves, the grooves and the waveguide array realize self alignment, however, the grooves need to occupy an area of the chip, and the positions of the grooves cannot be provided with other structures, so that the area of the chip is increased due to the introduction of the grooves, and the cost of the chip is increased.

Disclosure of Invention

In view of this, a first aspect of the present application provides a chip, an optical fiber array connector, and a communication system, which reduce the cost of the chip while guaranteeing passive coupling of the optical fiber array and the waveguide array.

According to a first aspect of the embodiment of the present invention, a chip is provided, which includes a first substrate, the first substrate has a first alignment structure extending along a first direction parallel to a surface of the first substrate, the first alignment structure includes an alignment ridge extending along the first direction and two first grooves respectively located at two sides of the alignment ridge, the first grooves partially penetrate the first substrate along the first direction from a first side wall of the first substrate, the chip further includes a waveguide array located at one side of the first substrate, a plurality of transmission waveguides in the waveguide array extend along the first direction toward the first side wall, when the first alignment structure is aligned with a second alignment structure in the optical fiber array unit, the alignment waveguides are embedded in alignment grooves in the second alignment structure, an end portion of the waveguide array facing the first side wall serves as a first lead-out end, the second lead-out end of the optical fiber array is fixed by the alignment fiber array, that is, the first alignment structure including the alignment ridge can be disposed on the chip, the second alignment structure including the alignment grooves is disposed in the optical fiber array unit, and the optical fiber array unit is used for fixing the optical fiber array, and compared with the first alignment structure and the second alignment structure, the chip has a small occupied area compared with the optical fiber array, the chip can be realized by using the alignment groove and the alignment groove.

In some possible embodiments, the top of the alignment ridge is provided with a waveguide structure, and the waveguide structure and the transmission waveguide are made of the same material; the top surface of the waveguide structure is flush with the top surface of the transmission waveguide.

In this embodiment of the present application, the waveguide structure with the same material as that of the transmission waveguide may be provided on the alignment ridge, where the top surface of the alignment ridge is flush with the top surface of the transmission waveguide, and the height of the top surface of the alignment ridge is related to the thickness of the transmission waveguide, which is favorable for realizing accurate control of the size of the first alignment structure, and avoiding the influence of the thickness of the transmission waveguide on the alignment accuracy.

In some possible embodiments, the number of the first alignment structures is two, and the first alignment structures are respectively located at two sides of the waveguide array.

In this embodiment of the present application, the number of the first alignment structures may be two, which is favorable for realizing higher fixing strength between the chip and the optical fiber array unit.

In some possible embodiments, the first outlet is flush with the first sidewall.

In this embodiment of the application, the first extraction end of a plurality of transmission waveguides can flush with first side wall, draws forth waveguide array like this and obtains first side wall, realizes the terminal surface coupling, improves coupling efficiency, reduces the area waste to the chip.

In some possible embodiments, the transmission waveguide is disposed in a suspended manner with respect to the first substrate.

In the embodiment of the application, the transmission waveguide can be suspended relative to the first substrate, so that the transmission waveguide is facilitated to be subjected to mode expansion, and has higher coupling efficiency with the single-mode fiber.

In some possible embodiments, a bonding pad is disposed in at least one of the first grooves, for eutectic bonding with solder on top of the first ridge.

In this embodiment of the application, can set up the pad in the first recess, utilize the solder at pad and first wave ridge top to realize eutectic welding, avoid the backward flow problem that the organic sticky produced.

In some possible embodiments, the first groove provided with the pad is located on a side of the alignment ridge facing away from the waveguide array.

In this embodiment of the present application, a bonding pad may be disposed in a first groove facing away from the waveguide array, which is favorable for realizing higher fixing strength between the chip and the optical fiber array unit.

In some possible embodiments, the first groove has a rectangular or inverted trapezoid cross section in a direction perpendicular to the first direction.

In this embodiment of the present application, the cross section of the first groove in the direction perpendicular to the first direction is rectangular or inverted trapezoid, and the first groove can be obtained by dry etching, is compatible with a complementary metal oxide semiconductor (complementary metal oxide semiconductor, CMOS) process, and has a planar bottom surface, so that the bonding pad is advantageously disposed.

According to a second aspect of the embodiment of the present invention, an optical fiber array unit is provided, including a cover plate, the cover plate has a second alignment structure extending along a second direction parallel to a surface of the cover plate, the second alignment structure includes an alignment groove extending along the second direction and a first ridge on at least one side of the alignment groove, the alignment groove penetrates the cover plate at least partially along the second direction from a second side wall of the cover plate, the cover plate further has a groove array, a plurality of second grooves in the groove array extend along the second direction toward the second side wall, the groove array is used for fixing the optical fiber array, when the second alignment structure aligns with the first alignment structure in the chip, the alignment ridge in the first alignment structure is embedded in the alignment groove, an end portion of the optical fiber array facing the second side wall serves as a second extraction end, and the first extraction end of the waveguide array in the chip is aligned, that is, the first alignment structure including the alignment ridge can be arranged on the chip, the second alignment structure including the alignment groove is arranged in the optical fiber array unit, and the optical fiber array unit is used for fixing the optical fiber array, the groove array is used for fixing the optical fiber array, when the chip is aligned with the first alignment structure, the first alignment ridge and the second alignment structure is not required, compared with the second alignment structure, the chip has a small-size, and the optical fiber array can be placed in the chip, and the chip has a reduced occupation area compared with the chip.

In some possible embodiments, the cover plate has a coupling surface between the groove array and the second sidewall, the first ridge protruding from the coupling surface in a direction perpendicular to the surface of the second substrate; in the second direction, the dimension of the coupling surface is less than or equal to the dimension of the alignment slot; the coupling surface covers the waveguide array when the second alignment structure is aligned with the first alignment structure in the chip.

In this embodiment, the cover plate has a coupling surface between the groove array and the second sidewall, the first ridge protrudes out of the coupling surface, and the surface of the coupling surface is lower than the top surface of the first ridge, and the coupling surface is used for covering the waveguide array, so that a part of the cover plate at the position is prevented from blocking the alignment of the first alignment structure and the second alignment structure.

In some possible embodiments, the cover plate has a step surface between the coupling surface and the groove array, the coupling surface protrudes from the step surface in a direction perpendicular to the surface of the second substrate, the step surface protrudes from the bottom of the second groove, and the coupling surface faces the side wall of the second groove to block the optical fiber array from extending into the area where the step surface is located.

In this embodiment of the application, have the step face between coupling face and the recess array, the step face is less than the coupling face, and is higher than the bottom of second recess, constitutes the step between the bottom of step face and second recess, and the fiber array is automatic stop when touching the step, guarantees that fiber coupling terminal surface flushes, improves multichannel fiber coupling uniformity.

In some possible embodiments, the number of the second alignment structures is two, and the second alignment structures are respectively located at two sides of the groove array.

In this embodiment of the present application, the number of second alignment structures may be two, which is favorable for realizing higher fixing strength between the chip and the optical fiber array unit.

In some possible embodiments, the alignment slot extends completely through the cover plate from the second sidewall of the cover plate in the second direction.

In the embodiment of the application, the alignment groove can completely penetrate through the cover plate, so that the alignment groove can adapt to the forming process of various alignment grooves, and the alignment groove can be formed on the cover plate made of various materials.

In some possible embodiments, the second groove has an inverted triangle shape in cross section in a direction perpendicular to the second direction.

In this embodiment of the application, the second recess can be the V groove, can obtain through multiple technology to adapt to the diversified design of apron.

In some possible embodiments, the first wave ridge top is provided with solder for eutectic soldering with the bonding pad in the first groove.

In the embodiment of the application, the solder can be arranged at the top of the first ridge, and co-crystal welding is realized by using the solder and the bonding pad in the first groove, so that the problem of reflow generated by the organic adhesive is avoided.

In some possible embodiments, the alignment groove has first ridges on both sides, and the first ridge of solder is disposed on a side of the alignment groove facing away from the groove array.

In this embodiment of the application, solder can be disposed at the top of the first wave ridge deviating from the groove array, which is favorable for realizing higher fixing strength between the chip and the optical fiber array unit.

In some possible embodiments, the material of the cover plate is silicon or glass.

In the embodiment of the application, the material of the cover plate can be silicon or glass, which is beneficial to realizing diversified designs of the cover plate.

In some possible embodiments, the alignment groove has an inverted triangle shape in cross section in a direction perpendicular to the second direction.

In this embodiment of the present application, the alignment groove may be a V groove, and may be obtained through various processes, so as to adapt to various designs of the cover plate.

In some possible embodiments, the optical fiber array unit further includes:

and the second substrate is connected with the cover plate at one side of the cover plate with the groove array.

In this embodiment of the present application, the optical fiber array unit further includes a second substrate, where the second substrate is provided with one side of the cover plate, where the side of the cover plate is provided with the groove array, and the second substrate and the cover plate may be respectively located at two sides of the optical fiber array, so that the optical fiber array is better fixed.

In a third aspect of the embodiments of the present application, there is provided a communication system, including: the chip described in the first aspect of the embodiments of the present application, and the optical fiber array unit described in the second aspect of the embodiments of the present application.

From the above technical solutions, the embodiments of the present application have the following advantages:

the embodiment of the application provides a chip, an optical fiber array unit and a communication system, the chip can comprise a first substrate, the first substrate is provided with a first alignment structure extending along a first direction parallel to the surface of the first substrate, the first alignment structure comprises an alignment ridge extending along the first direction and two first grooves respectively positioned at two sides of the alignment ridge, the first grooves penetrate the first substrate from a first side wall of the first substrate along the first direction, the chip further comprises a waveguide array positioned at one side of the first substrate, a plurality of transmission waveguides in the waveguide array extend along the first direction along the first side wall, when the first alignment structure is aligned with a second alignment structure in the optical fiber array unit, the alignment waveguides are embedded into alignment grooves in the second alignment structure, the end part of the waveguide array, which faces the first side wall, serves as a first leading-out end of the optical fiber array fixed by the optical fiber array unit, that is, namely, the first alignment structure comprising the alignment ridge can be arranged on the chip, the second alignment structure comprising the alignment grooves is arranged in the optical fiber array unit, and the optical fiber array unit is used for fixing the optical fiber array, compared with the optical fiber array chip, the optical fiber array is not required to be fixed, and compared with the optical fiber array unit and the optical fiber array unit, the chip is placed in the alignment groove, and the optical fiber array unit is used for realizing the alignment of the alignment groove.

Drawings

In order that the detailed description of the present application may be clearly understood, a brief description of the drawings will be provided below. It is apparent that these figures are only some of the embodiments of the present application.

FIG. 1 is a schematic top view of a chip of the prior art;

FIG. 2 is a schematic diagram of a chip structure in the prior art;

FIG. 3 is a schematic diagram of another chip structure;

fig. 4 is a schematic top view of a chip according to an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of a three-dimensional structure of the chip in FIG. 4;

FIG. 6 is a cross-sectional view of the chip of FIG. 5 taken along the direction AA;

fig. 7 is a schematic top view of an optical fiber array unit according to an embodiment of the present disclosure;

FIG. 8 is a schematic diagram of a three-dimensional structure of the optical fiber array unit in FIG. 7;

FIG. 9 is a schematic cross-sectional view of the fiber array unit of FIG. 8;

FIG. 10 is a schematic top view of another optical fiber array unit according to an embodiment of the present disclosure;

FIG. 11 is a schematic three-dimensional structure of the optical fiber array unit in FIG. 10;

FIG. 12 is a schematic cross-sectional view of the fiber array unit of FIG. 11;

FIG. 13 is a schematic alignment diagram of a chip and a fiber array unit according to an embodiment of the present application;

fig. 14 is a schematic cross-sectional view of a communication system in an embodiment of the present application.

Detailed Description

The embodiment of the application provides a chip, an optical fiber array connector and a communication system, which can reduce the cost of the chip on the basis of ensuring the passive coupling of an optical fiber array and a waveguide array.

The terms "first," "second," "third," "fourth" and the like in the description and in the claims of this application and in the above-described figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In describing embodiments of the present application in detail, the cross-sectional views illustrating the structure of the device are not to scale locally for ease of illustration, and the schematic is merely exemplary and should not limit the scope of protection of the present application. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.

With the increasing bandwidth, the number of optical channels is increasing, and in order to reduce the coupling packaging cost, it is necessary to implement passive coupling of the fiber array and the waveguide array. In order to achieve passive coupling between the optical fiber array and the waveguide array, an optical fiber fixing area needs to be disposed at an edge of a chip for placing and fixing optical fibers, referring to fig. 1, which is a schematic top view of a chip currently, the chip includes a substrate 100, a waveguide array 110 on the substrate 100, and an optical fiber fixing area 120 on a surface of the substrate 100, where the optical fiber fixing area 120 is generally provided with one or more grooves, and when a plurality of optical fibers are placed in the grooves, self-alignment is achieved with the waveguide array 110.

The optical fiber fixing area 120 may be provided with a V-groove (V-groove) array, when a plurality of optical fibers are placed in the corresponding V-grooves and the waveguide array 110 achieve self-alignment, referring to fig. 2, which is a schematic structural diagram of a current chip, wherein fig. 2A is a three-dimensional structure diagram of the chip, the chip includes a substrate 100, the waveguide array 110 on the substrate, the waveguide array 110 is used as a waveguide core layer, and a waveguide cover layer 111 is wrapped around the substrate, wherein the gray line of the waveguide array 110 in fig. 2 characterizes that the optical fiber fixing area 120 covered on one side of the chip near the side wall has a V-groove array 121, the V-groove array 121 includes a plurality of V-grooves arranged in an array, fig. 2B is a cross-sectional view along the AA direction of the chip in fig. 2A when the optical fibers 130 are placed in the V-groove array 121, and after the optical fibers 130 are placed in the V-groove array 121, the optical fibers 130 and the waveguide array 110 achieve central self-alignment. However, the V-groove array 121 occupies a larger area of the chip, which increases the chip cost. Further, since the V-groove array 121 is used for placing the optical fibers, a large depth is required, and it is difficult to make the chip thin.

In the specific implementation, the V-groove array is prepared by adopting long-time wet etching in a micro-electro-mechanical system (micro electro mechanical system, MEMS) process, is not compatible with the conventional CMOS process, and needs to carry out special protection on other positions of the chip in the wet etching process, so that the complexity of manufacturing the chip is increased, the yield is reduced, and the cost of the chip is further increased.

At present, the optical fiber fixing area 120 may be provided with a U groove (U-groove), the U groove is used to replace a V groove array, the U groove may be prepared by plasma etching commonly used in CMOS technology, a series of problems caused by long-time wet etching technology are avoided, referring to fig. 3, which is a schematic structural diagram of another chip at present, wherein fig. 3A is a three-dimensional structure diagram of the chip, the chip includes a substrate 100, a waveguide array 110 on the substrate, the waveguide array 110 is used as a waveguide core layer, a waveguide cover layer 111 is wrapped around the waveguide array 110, the optical fiber fixing area 120 may be provided with a U groove 122, the U groove 122 has a larger area relative to the V groove array 121, a plurality of optical fibers 130 may be placed in the same U groove 122, guide ribs 123 may be formed in the U groove 122 as an alignment structure, the optical fiber array is placed in the U groove 122, and the center of the optical fiber array and the waveguide array is guaranteed, so that high-precision passive coupling is realized, and the optical fiber 130 and the waveguide array 110 are self-aligned after the optical fiber 130 is placed in the U groove 122 when the optical fiber 130 is provided in the U groove 122, referring to fig. 3B. In addition, the optical fiber array and the cover plate for fixing the optical fiber array can be put into the U-shaped groove 122 together, and the cover plate is contacted with the bottom of the U-shaped groove 122, so that high-precision passive coupling of the optical fiber array and the waveguide array is ensured.

Although the U-groove 122 obtained by plasma etching reduces the complexity of manufacturing the chip, since the U-groove 122 is used for placing the optical fiber array, any active or passive devices and waveguides cannot be arranged at the position, in addition, optical glue is required to be arranged at the middle point of the U-groove, and the U-groove width needs to be additionally increased, so that a larger area of the chip is still occupied, meanwhile, the U-groove 122 needs to have a certain depth, and when the optical fiber array and the cover plate for fixing the optical fiber array are placed in the U-groove 122 together, the U-groove 122 needs to have a larger depth, so that the thinning of the chip is difficult to realize, and the cost of plasma etching is increased.

In view of the above technical problems, embodiments of the present application provide a chip, an optical fiber array unit, and a communication system, where the chip may include a first substrate having a first alignment structure extending in a first direction parallel to a surface of the first substrate, the first alignment structure including an alignment ridge extending in the first direction and two first grooves respectively located at both sides of the alignment ridge, the first grooves penetrating the first substrate from a first sidewall of the first substrate partially in the first direction, a waveguide array located at one side of the first substrate, a plurality of transmission waveguides in the waveguide array extending along the first direction first sidewall, the alignment waveguides being embedded in alignment grooves in the second alignment structure when the first alignment structure is aligned with a second alignment structure in the optical fiber array unit, an end of the waveguide array facing the first sidewall serving as a first extraction terminal, the second lead-out end of the optical fiber array fixed by the alignment optical fiber array unit, that is, the first alignment structure comprising the alignment wave ridge can be arranged on the chip, the second alignment structure comprising the alignment groove can be arranged in the optical fiber array unit, the optical fiber array unit is used for fixing the optical fiber array, the alignment wave ridge in the first alignment structure and the alignment groove in the second alignment structure can be utilized for realizing the fixation between the chip and the optical fiber array unit, the passive coupling between the waveguide array in the chip and the optical fiber array fixed by the optical fiber array unit is realized, the groove for placing the optical fiber array is not required to be arranged on the chip, compared with the groove for placing the optical fiber array, the alignment wave ridge occupies smaller area and can have lower depth, therefore, the smaller area and thickness of the chip can be realized, the cost of the chip is reduced, meanwhile, the thinning of the chip is facilitated.

In order to make the above objects, features and advantages of the present application more comprehensible, embodiments accompanied with figures are described in detail below.

In this embodiment, the chip may include a first substrate 200 and a waveguide array located on one side of the first substrate 200, where the waveguide array includes a plurality of transmission waveguides 210. Referring to fig. 4, a schematic top view of a chip according to an embodiment of the present application is shown, referring to fig. 5, a schematic three-dimensional structure of the chip in fig. 4 is shown, and referring to fig. 6, a cross-sectional view of the chip in fig. 5 along AA direction is shown.

In the embodiment of the present application, the chip may include a first substrate 200, where the first substrate 200 is used to support a photonic device thereon, and the first substrate 200 may be a semiconductor substrate, for example, may be a Si substrate, a Ge substrate, a SiGe substrate, a silicon-on-insulator (silicon on insulator, SOI), a germanium-on-insulator (germanium on insulator, GOI), or a silicon-germanium-on-insulator (silicon and germanium on insulator, SGOI), etc. In other embodiments, the semiconductor substrate may also be a substrate of other elemental or compound semiconductors, such as GaAs, inP, siC, or the like. In the embodiment of the present application, the material of the first substrate 200 may be silicon.

The chip may be a photonic chip, and a photonic device (not shown) may be disposed on one side of the first substrate 200, and the photonic device may include an optical medium for transmitting an optical signal, and the photonic device may include at least one of an electro-optical modulator, a laser, a photodetector, an optical amplifier, and the like, for performing conversion between an optical signal and an electrical signal.

The chip also has an interface allowing to receive or transmit optical signals from or to the optical fibers, so that a transmission waveguide 210 may be further provided at one side of the first substrate 200, and as shown with reference to fig. 4, 5 and 6, the transmission waveguide 210 may be provided at the same side of the first substrate 200 as the photonic device. The transmission waveguide 210 is used to couple with an external optical fiber to transmit an optical signal, and in a chip having a multi-channel communication function, there may be a plurality of transmission waveguides 210, and the plurality of transmission waveguides 210 constitute a waveguide array.

The transmission waveguide 210 serves as a waveguide core layer, and is peripherally wrapped with a waveguide cover layer including a first cover layer 211 and a second cover layer 212, as shown with reference to fig. 5 and 6, wherein gray lines of the transmission waveguide 210 in fig. 5 characterize that it is covered. The first cladding layer 211 is located between the transmission waveguide 210 and the first substrate 200, the second cladding layer 212 surrounds the side wall of the transmission waveguide 210 and the surface facing away from the first substrate 200, the refractive index of the first cladding layer 211 and the second cladding layer 212 is smaller than that of the transmission waveguide 210, for example, the material of the waveguide array may be silicon or silicon nitride, and the material of the first cladding layer 211 and the second cladding layer 212 may be silicon oxide.

For convenience of explanation, in the embodiment of the present application, the side of the chip where the transmission waveguide 210 is disposed may be referred to as "upper", that is, the direction from the first substrate 200 to the transmission waveguide 210 is referred to as "upper", and the direction from the transmission waveguide 210 to the first substrate 200 is referred to as "lower", and in fact, such a mark is for convenience and is irrelevant to the direction of gravity. And when defined according to the direction of gravity, the positional relationship between the first substrate 200 and the transmission waveguide 210 is determined according to the placement of the chip thereof.

In this embodiment, the plurality of transmission waveguides 210 in the waveguide array in the chip may extend along the first direction parallel to the surface of the first substrate 200 and extend toward the first sidewall 2001 of the chip, so as to draw the optical path inside the chip to the first sidewall 2001, so as to facilitate side coupling with the external optical fiber, where the surface of the first sidewall 2001 is perpendicular to the first direction. The end of the waveguide array facing the first sidewall 2001 is denoted as a first extraction end, and the end surface of the first extraction end may be flush with the first sidewall 2001, as shown in fig. 4 and 5, or the end surface of the first extraction end may have a protrusion or recess (not shown) with a smaller width than the first sidewall 2001, or the end surface of the first extraction end may be parallel to the first sidewall 2001 or may not be parallel to the first sidewall 2001.

In some possible embodiments, the transmission waveguide 210 has a requirement of coupling with a Single Mode Fiber (SMF), so that the Mode spot of the conventional transmission waveguide 210 is smaller, and there is a significant Mode spot mismatch between the Single Mode Fiber, so that the transmission waveguide 210 may be configured in a floating manner with respect to the first substrate 200, that is, the transmission waveguide 210 is configured in a floating (u-cut) manner, and a gap is formed between the transmission waveguide 210 and the first substrate 200, that is, the first cladding layer 211 Under the transmission waveguide 210 has a hollowed-out region.

In this embodiment, the first substrate 200 further has a first alignment structure 220, and the waveguide array is disposed on the side of the first substrate 200 having the first alignment structure 220, and alignment between the waveguide array and the external optical fiber array is achieved through the first alignment structure 220, as shown in fig. 4. Specifically, the first alignment structure 220 extends along the first direction, that is, the first alignment structure 220 and the transmission waveguide 210 are disposed in parallel, and the first alignment structure 220 includes an alignment ridge 222 extending along the first direction and two first grooves 221 respectively located at both sides of the alignment ridge 222, forming a first alignment structure 220 including a first groove 221-the alignment ridge 222-the first groove 221, and the height of the alignment ridge 222 is higher relative to the two first grooves 221, as shown with reference to fig. 5 and 6.

Outside the first alignment structure 220, there may also be provided a stationary ridge 226, the stationary ridge 226 being in contact with a first groove 221 facing away from the waveguide array, the side walls of the stationary ridge 226 surrounding the first groove 221, defining the dimensions of the first groove 221, as shown with reference to fig. 5 and 6.

In implementation, the first groove 221 may be obtained by etching the first substrate 200, for example, plasma etching, and the top surface of the alignment ridge 222 may be the surface of the first substrate 200, and as shown in fig. 5 and 6, the plasma etching may be compatible with CMOS process, so as to reduce the manufacturing complexity of the chip. The top surface of the alignment ridge 222 may be coplanar with the surface of the first substrate 200 that contacts the waveguide array, so that the formation of the first alignment structure 220 does not affect the placement of the waveguide array, nor does it create additional protection operations, reducing the complexity of chip fabrication.

In this embodiment, the distance between the first groove 221 facing the waveguide array and the transmission waveguide 210 in the waveguide array may be determined according to practical situations, and thus the transmission waveguide 210 is surrounded by the second cover layer 212, and the minimum horizontal distance between the transmission waveguide 210 and the first groove 221 in the direction perpendicular to the first direction is greater than zero, that is, the side wall of the transmission waveguide 210 and the side wall of the first groove 221 have a certain distance, which is shown in fig. 3, 4 and 5.

In some possible embodiments, the transmission waveguide 210 may be obtained by depositing a waveguide material and then etching the waveguide material, where the waveguide material may be formed on the top surface of the alignment ridge 222 at the same time, and at this time, the waveguide material aligned with the top surface of the ridge 222 may not be removed, so as to be different from the transmission waveguide 210, where the waveguide material is denoted as a waveguide structure 213, as shown in fig. 5 and 6, the material of the waveguide structure 213 is consistent with the material of the transmission waveguide 210, and the top surface of the waveguide structure 213 is flush with the top surface of the transmission waveguide 210, i.e. the top surface of the waveguide structure 213 is coplanar with the top surface of the transmission waveguide 210, a first cover layer 211 is disposed on a side of the waveguide structure 213 facing the first substrate 200, a third cover layer 214 is disposed on a side facing away from the second substrate 200, and the material of the third cover layer 214 is consistent with the top surface of the third cover layer 214 covering the waveguide structure 213, so that in actual operation, the second cover layer 212 covers the top surface and the side wall of the transmission waveguide 210, the top surface of the third cover layer 214 is coplanar with the top surface of the third cover layer 214 of the transmission waveguide 210. In addition, the waveguide structure 213, the first cladding layer 211, and the third cladding layer 214 may be formed on the fixed ridge 226 as well.

The first groove 221 may partially penetrate the first substrate 200 along the first direction from the first sidewall 2001 of the first substrate 200, that is, the first groove 221 may extend to the first sidewall 2001, and accordingly, the alignment ridge 222 may also extend to the first sidewall 2001, so that when the chip and the optical fiber array unit are aligned, the first alignment structure 220 aligns with the second alignment structure in the optical fiber array unit, the alignment ridge 222 may be pushed into the alignment groove in the optical fiber array unit, and the first ridge located on at least one side of the alignment groove pushes into the first groove 221, so as to achieve alignment between the chip and the optical fiber array unit, and align the first lead-out end of the waveguide array with the second lead-out end of the optical fiber array fixed by the optical fiber array unit.

The length of the alignment ridge 222 in the first direction may be identical to the length of the transmission waveguide 210 in the first direction, may be greater than the length of the transmission waveguide 210 in the first direction, or may be less than the length of the transmission waveguide 210 in the first direction. The cross section of the first groove 221 in the direction perpendicular to the first direction may be rectangular or inverted trapezoid, that is, the first groove 221 may be a U-shaped groove, the bottom of the first groove 221 has a plane, and the cross section of the alignment ridge 222 in the direction perpendicular to the first direction is rectangular or trapezoid.

For the same waveguide array, only one first alignment structure 220 can be arranged on one side of the waveguide array, and two first alignment structures 220 can be arranged on two sides of the waveguide array, and the two first alignment structures 220 are aligned with two second alignment structures in the optical fiber array unit, so that stable connection of the chip and the optical fiber array unit is realized.

Based on the above description, for the same waveguide array, two first grooves 221 may be provided at one side of the waveguide array, or four first grooves 221 may be provided at both sides of the waveguide array, and among these first grooves 221, there is a pad 223 provided in at least one groove for achieving eutectic soldering with solder pushed into the top of the first ridge of the first groove 221 when the first alignment structure 220 is aligned with the second alignment structure in the optical fiber array unit, which is more resistant to high temperature than the organic gel fixing chip and the optical fiber array unit, without causing reflow. Specifically, the first grooves 221 provided with the pads 223 are located on a side of the alignment ridge 222 facing away from the waveguide array, for example, the pads 223 may be provided in two first grooves 221 on a side of the two first alignment structures 220 facing away from the waveguide array, as shown in fig. 6. The material of the pad 223 may be gold (Au), and the material of the solder may be tin (Sn).

In this embodiment of the present application, the first alignment structure 220 is disposed on the chip, so as to achieve alignment between the chip and the optical fiber array unit, and the groove for placing the optical fiber array is not required to be disposed on the chip, compared with the groove for placing the optical fiber array, the first groove 221 in the first alignment structure 220 has a lower depth, so that the requirement on the thickness of the first substrate 200 of the chip is lower, and therefore, the first substrate 200 can be disposed to have a lower thickness. Typically, the depth of the groove for placing the optical fiber is about 125 micrometers (um), and the depth of the interconnect via penetrating the first substrate 200 is about 100 micrometers (um), so that the placement of the interconnect via cannot be compatible after the groove for placing the optical fiber is placed on the chip. However, in the embodiment of the present application, the first groove 221 does not need to place an optical fiber, so the first substrate 200 may be provided to have a low thickness, and may be compatible with an interconnection via penetrating the first substrate 200 in a direction perpendicular to the surface of the first substrate 200, the interconnection via being filled with a conductor material. When the material of the first substrate 200 is silicon, the interconnection via may also be referred to as a through-silicon-via (TSV).

The embodiment of the application provides a chip, the chip comprises a first substrate, the first substrate is provided with a first alignment structure extending along a first direction parallel to the surface of the first substrate, the first alignment structure comprises an alignment wave ridge extending along the first direction and two first grooves respectively positioned at two sides of the alignment wave ridge, the first grooves penetrate through the first substrate from the first side wall of the first substrate along the first direction, the chip further comprises a waveguide array positioned at one side of the first substrate, a plurality of transmission waveguides in the waveguide array extend along the first direction towards the first side wall, when the first alignment structure is aligned with a second alignment structure in an optical fiber array unit, the alignment waveguides are embedded into alignment grooves in the second alignment structure, the end part of the waveguide array, which faces the first side wall, serves as a first leading-out end, of the optical fiber array fixed by the alignment wave ridge, that is, namely, the first alignment structure comprising the alignment wave ridge can be arranged on the chip, the second alignment structure comprising the alignment grooves is arranged in the optical fiber array unit, the array unit is used for fixing the optical fibers, compared with the optical fibers in the chip, the alignment groove is not occupied by the alignment wave ridge and the optical fiber array fixed by the chip, and compared with the optical fiber array fixed by the chip, and the cost of the alignment groove is reduced.

The embodiment of the application also provides an optical fiber array unit, which may include a cover plate 300. Referring to fig. 7, a schematic top view of an optical fiber array unit according to an embodiment of the present application is shown, referring to fig. 8, a schematic three-dimensional structure of the optical fiber array unit in fig. 7 is shown, referring to fig. 9, and a schematic cross-sectional view of the optical fiber array unit in fig. 8 is shown; referring to fig. 10, a schematic top view of another optical fiber array unit according to an embodiment of the present application is shown, referring to fig. 11, a schematic three-dimensional structure of the optical fiber array unit in fig. 10 is shown, referring to fig. 12, and a schematic cross-sectional view of the optical fiber array unit in fig. 11 is shown.

In this embodiment, the cover 300 is used for fixing an optical fiber array, specifically, the cover 300 includes a groove array, the groove array includes a plurality of second grooves 310, the second grooves 310 extend along a second direction parallel to a surface of the cover 300 and extend toward a third side wall 3002 (right side wall in fig. 7 and 10) of the cover 300, the second grooves 310 may partially penetrate the cover 300 along the second direction from the third side wall 3002 of the cover 300, the surface of the third side wall 3002 is perpendicular to the second direction, and the groove array is used for fixing the optical fiber array, so that the optical fiber array accessed from the third side wall 3002 is fixed on the cover 300, and coupling with a chip is facilitated.

In this embodiment, the cover 300 further has a second side wall 3001 (the left side wall in fig. 7 and 10), the second side wall 3001 and the third side wall 3002 are two opposite side walls of the cover 300, the surfaces of the second side wall 3001 and the third side wall 3002 are parallel, the end of the optical fiber array facing the second side wall 3001 may be denoted as a second outlet, and a certain distance is between the second outlet and the second side wall 3001. The plurality of optical fibers in the optical fiber array may be single-mode optical fibers or other optical fibers.

In the embodiment of the present application, for convenience of explanation, the side of the cover plate 300 having the groove array may be described as an upper side, and in fact, such a mark is for convenience and is irrelevant to the direction of gravity. The groove array may also be located on the underside of the cover plate 300 after the cover plate 300 is flipped over.

Specifically, the plurality of second grooves 310 in the groove array may be V-grooves, that is, the cross sections of the second grooves 310 in the direction perpendicular to the second direction are inverted triangles, so that the cross sections of the third ridges between the second grooves 310 in the direction perpendicular to the second direction are trapezoids, as shown in fig. 8, 9, 11 and 12, fig. 9A is a cross section of the optical fiber array unit in DD direction in fig. 8, fig. 12A is a cross section of the optical fiber array unit in DD direction in fig. 11, the optical fibers 130 may be placed in the second grooves 310 to achieve fixation of the optical fiber array, the center of the optical fibers 130 is indicated by black dots, fig. 9B is a cross section of the optical fiber array unit in CC direction in fig. 8, fig. 12B is a cross section of the optical fiber array unit in CC direction in fig. 11, and the second grooves 310 have the same depth in the second direction.

The cover plate 300 has a second alignment structure 320 extending in a second direction parallel to the surface of the cover plate 300, the second alignment structure 320 is disposed on at least one side of the groove array, and alignment of the optical fiber array and the waveguide array is achieved by fixing the second alignment structure 320 and the chip, as shown with reference to fig. 7 and 10. Specifically, the second alignment structure 320 extends along the second direction, that is, the second alignment structure 320 is disposed in parallel with the grooves in the groove array, the second alignment structure 320 includes an alignment groove 322 extending along the second direction and a first ridge 321 on at least one side of the alignment groove 322, and the second alignment structure 320 including the first ridge 321-alignment groove 322 or the first ridge 321-alignment groove 322-first ridge 321 is formed, and the height of the first ridge 321 is higher with respect to the alignment groove 322, as shown in fig. 7, 8, 10 and 11. When the outer side of the second alignment structure 320 is the first ridge 321, the outer side of the first ridge 321 may be further provided with a concave structure 324, so as to form an alignment groove 322-the first ridge 321-the concave structure 324, as shown in fig. 10, 11 and 12A, the concave structure 324 is located on the right side of the first ridge 321, and of course, the concave structure 324 may not be provided on the outer side of the first ridge 321, as shown in fig. 7, 8 and 9A.

In particular, the alignment groove 322 may be formed by etching the cover plate 300, the top surface of the first ridge 321 may be the surface of the cover plate 300, the top surface of the first ridge 321 may be flush with the top of the ridge between the second grooves 310 in the groove array, as shown in fig. 9A and 12A, so that the arrangement of the alignment groove 322 does not affect the arrangement of the groove array, and the alignment groove 322 and the groove array may be etched by the same process, thereby reducing the complexity of chip manufacturing. Of course, the top surface of the first ridge 321 may not be flush with the tops of the ridges between the second grooves 310 in the groove array to accommodate more application scenarios.

Specifically, the cross section of the alignment groove 322 in the direction perpendicular to the second direction is an inverted triangle, that is, the alignment groove 322 may be a V groove, so that the cross section of the first ridge 321 in the direction perpendicular to the second direction is a trapezoid, as shown in fig. 9C, which is a cross section of the optical fiber array unit in fig. 8 along the BB direction, and in fig. 12C, which is a cross section of the optical fiber array unit in fig. 11 along the BB direction. When the second groove 310 is a V-groove, the depths of the alignment groove 322 and the second groove 310 may be identical or not, and the included angle between the two sidewalls of the second groove 310 and the included angle between the two sidewalls of the alignment groove 322 may be equal or not; where the second recess 310 includes the first portion 311 and the second portion 312, the depths of the alignment groove 322 and the second portion 312 may or may not be identical, and the angle between the two sidewalls of the second portion 312 and the angle between the two sidewalls of the alignment groove 322 may or may not be equal.

The cover 300 may be made of a semiconductor material, for example Si, ge, siGe, or an insulating material, for example glass. When the material of the cover plate 300 is a semiconductor material, a V-shaped groove can be obtained by wet etching to serve as the alignment groove 322, the etching of the V-shaped groove is determined according to the crystal orientation of the cover plate 300, the etching precision is good, and the length of the alignment groove 322 is well controlled; when the material of the cover plate 300 is glass, the cutter can be used for cutting the cover plate 300 to obtain the V-groove as the alignment groove 322, which is beneficial to realizing the personalized design of the cover plate 300.

Since the dimensions of the first alignment structure and the second alignment structure 320 directly affect the alignment accuracy of the optical fiber array and the waveguide array, when the material of the cover plate 300 is consistent with the material of the first substrate 200 in the chip, the dimensions of the first alignment structure 220 and the second alignment structure 320 are more precisely controlled, and thus, when the material of the first substrate 200 is silicon, the material of the cover plate 300 may also be silicon.

In this embodiment, the alignment groove 322 at least partially penetrates the cover plate 300 along the second direction from the second side wall 3001 of the cover plate 300, the third side wall 3002 and the second side wall 3001 are opposite side walls, and the alignment groove 322 may partially penetrate the cover plate 300 along the second direction from the second side wall 3001 or may completely penetrate the cover plate 300 along the second direction from the second side wall 3001. That is, the alignment groove 322 may extend to the second sidewall 3001, and accordingly, the first ridge 321 may also extend to the second sidewall 3001, so that when the chip and the optical fiber array unit are aligned, the first alignment structure 220 in the chip is aligned with the second alignment structure 320 in the optical fiber array unit, the alignment ridge 222 may be pushed into the alignment groove 322 from the second sidewall 3001 of the optical fiber array unit, and the first ridge 321 located on at least one side of the alignment groove 322 may be pushed into the first groove 221 from the first sidewall 2001 of the chip, so as to achieve alignment between the chip and the optical fiber array unit, and the first lead-out end of the waveguide array is aligned with the second lead-out end of the optical fiber array fixed by the optical fiber array unit.

Since the alignment groove 322 penetrates the cover plate 300 at least partially from the second sidewall 3001 of the cover plate 300 in the second direction, the groove array penetrates the cover plate 300 from the third sidewall 3002 of the cover plate 300 partially in the second direction, and the second sidewall 3001 and the third sidewall 3002 are opposite sidewalls, the sum of the dimension of the alignment groove 322 in the second direction and the dimension of the groove array in the second direction may be equal to the distance between the second sidewall 3001 and the third sidewall 3002, or may be greater than the distance between the second sidewall 3001 and the third sidewall 3002.

When the sum of the dimension of the alignment groove 322 in the second direction and the dimension of the groove array in the second direction is equal to the distance between the second side wall 3001 and the third side wall 3002, the alignment groove 322 partially penetrates the cover plate 300 from the second side wall 3001 of the cover plate 300 in the second direction, and projections of the alignment groove 322 and the groove array in a plane perpendicular to the second direction do not overlap. When the sum of the dimension of the alignment groove 322 in the second direction and the dimension of the groove array in the second direction is greater than the distance between the second side wall 3001 and the third side wall 3002, the alignment groove 322 may partially penetrate the cover plate 300 from the second side wall 3001 of the cover plate 300 in the second direction, and projections of the alignment groove 322 and the groove array in a plane perpendicular to the second direction overlap, as shown with reference to fig. 7 and 8; the alignment groove 322 may also completely penetrate the cover plate 300 along the second direction from the second side wall 3001 of the cover plate 300, where the projections of the alignment groove 322 and the groove array on the plane perpendicular to the second direction overlap, as shown in fig. 10 and 11, in actual operation, when the material of the cover plate 300 is glass, the alignment groove 322 may be implemented by cutting with a cutter, and the alignment groove 322 completely penetrates the cover plate 300 along the second direction from the second side wall 3001 of the cover plate 300, so that the requirement of the cutting process is lower and the complexity of the process is avoided.

In this embodiment, the distance between the alignment groove 322 and the groove array in the direction perpendicular to the second direction may be determined according to practical situations, and when the projections of the alignment groove 322 and the groove array on the plane perpendicular to the second direction overlap, a first ridge 321 is disposed between the alignment groove 322 and the groove array, for separating the alignment groove 322 and the groove array. When the alignment groove 322 and the groove array have a closer distance in the direction perpendicular to the second direction, correspondingly, the alignment ridge and the waveguide array in the chip may also have a closer distance in the direction perpendicular to the first direction, which is beneficial to downsizing the optical fiber array unit and the chip.

For the same groove array, only one second alignment structure 320 can be arranged on one side of the groove array, and two second alignment structures 320 can be arranged on two sides of the groove array, and the two second alignment structures 320 are aligned with the two first alignment structures 220 in the chip, so that stable connection between the chip and the optical fiber array unit is realized.

In this embodiment, the second groove 310 partially penetrates the cover plate 300 along the second direction from the third side wall 3002 of the cover plate 300, one end of the second groove 310 facing the second side wall 3001 is a certain distance from the second side wall 3001, a coupling surface 330 may be disposed between the groove array and the second side wall 3001, the coupling surface 330 is parallel to the surface of the second substrate 300, and the first ridge 321 protrudes from the coupling surface 330 in a direction perpendicular to the coupling surface 330. In the second direction, the dimension of the coupling surface 330 is less than or equal to the dimension of the alignment slot 322, and when the second alignment structure 320 is aligned with the second alignment structure 320 in the chip, the coupling surface 330 covers the waveguide array, preventing a portion of the cover plate in that position from blocking alignment of the first alignment structure and the second alignment structure. Specifically, the coupling surface 330 may be obtained by etching the cover plate 300, and the coupling surface 330 may have a height higher than that of the bottom surface of the second groove 310, as shown in fig. 9B and 12B.

In this embodiment of the present application, the cover plate 300 has a step surface 340 between the coupling surface 330 and the groove array, in the direction perpendicular to the surface of the second substrate, the coupling surface protrudes out of the step surface, the step surface protrudes out of the bottom of the second groove, so that a step is formed between the coupling surface 330 and the step surface 340, the step surface 340 and the bottom of the second groove 310 form a step before, the side wall of the step surface 340 facing the second groove 310 is used for blocking the area where the optical fiber array extends into the step surface 340, so that the optical fiber array encounters the coupling surface 330 and automatically stops towards the side wall of the second groove 310, the second leading end of the optical fiber array is flush with the side wall of the coupling surface 330 facing the second groove 310, the optical fiber coupling end face is guaranteed to be flush, and the multi-channel optical fiber coupling consistency is improved. Referring to fig. 11 and 12, in which an optical fiber may be placed in the second groove 310 with the bottom surface of the step surface 340 being higher than the lower surface of the optical fiber, the optical fiber is blocked from extending into the region where the step surface 340 is located, referring to fig. 12B, in which the depth of the step surface 340 is smaller than the depth of the second groove 310, and correspondingly, the bottom height of the step surface 340 is greater than the bottom height of the second groove 310.

Based on the above description, for the same groove array, one alignment groove 322 may be provided at one side of the groove array, one first ridge 321 may be provided at one side of the alignment groove 322, or one first ridge 321 may be provided at each side of the alignment groove 322, or one alignment groove 322 may be provided at each side of the groove array, one first ridge 321 may be provided at one side of the alignment groove 322, or one first ridge 321 may be provided at each side of the alignment groove 322, and solder 323 may be provided on top of at least one of the first ridges 321 for achieving eutectic soldering with the pads 223 in the first groove 221 when the first alignment structure 220 in the chip is aligned with the second alignment structure 320 in the optical fiber array unit, compared to the case where the chip and the optical fiber array unit are fixed by an organic adhesive, the eutectic soldering is more resistant to high temperature without causing reflow.

Specifically, when one first ridge 321 is disposed on each side of the alignment groove 322, the first ridge 321 provided with the solder 323 may be located on a side of the alignment groove 322 facing away from the groove array, for example, the solder 323 may be disposed on top of two first ridges 321 on each side of the two second alignment structures 320 facing away from the groove array, as shown in fig. 8, 9C and 11. The material of the pad 223 may be gold (Au), and the material of the solder may be tin (Sn).

In this embodiment, the optical fiber array unit may further include a second substrate, where the second substrate is connected to the cover plate 300 on a side of the cover plate 300 having the groove array, and is used for covering the groove array, and the second substrate and the cover plate 300 jointly fix the optical fiber array in the groove array.

The embodiment of the application provides an optical fiber array unit, including the apron, the apron has the second alignment structure that extends along the second direction of parallel apron surface, the second alignment structure includes the alignment groove that extends along the second direction and the first wave ridge of at least one side of alignment groove, the alignment groove runs through the apron along the second direction from the second lateral wall of apron at least partially, the apron still has the recess array, a plurality of second recesses in the recess array extend to the second lateral wall along the second direction, the recess array is used for fixing the optical fiber array, when the second alignment structure aligns with the first alignment structure in the chip, the alignment wave ridge in the first alignment structure is embedded in the alignment groove, the tip of optical fiber array orientation second lateral wall is as the second leading-out terminal, the first leading-out terminal of waveguide array in the alignment chip that is said, that is to say, can set up including the alignment wave ridge on the chip, set up the second alignment structure including the alignment groove in the optical fiber array unit, and the optical fiber array unit is used for fixing the optical fiber array, can utilize the alignment wave ridge in the first alignment structure and the alignment groove in the second alignment structure to extend to the second lateral wall, when the first alignment structure aligns up with the first alignment structure aligns, the first alignment structure aligns the first alignment structure, the alignment ridge in the chip alignment groove and the first alignment structure aligns the chip alignment groove in the chip alignment, the optical fiber array is realized, the end of waveguide array is compared with the chip array that the chip is realized, the chip is compared with the chip array, the chip array is placed in the chip and the chip array is placed in the chip, and the chip array is reduced and the cost is compared to the chip array.

Based on the chip and the optical fiber array unit provided in the foregoing embodiments, the embodiments of the present application further provide a communication system, including the foregoing chip and the foregoing optical fiber array unit, where the communication system may be an optical transceiver module, and the optical transceiver module and a switch chip form an optical switch, and the optical switch may be used for data exchange between servers on different levels in a large-scale data center, so as to improve bandwidth and greatly reduce extra energy consumption caused by routing of a switching network.

The optical transceiver module may include a pluggable module (or a co-packaged-optical module), and the like, and may be divided into an optical receiving module, an optical output module, and a Splitter (Splitter), and the like according to functions of the internal module, wherein the optical receiving module is used for obtaining an optical signal from an optical fiber connected thereto, the optical output module is used for transmitting the optical signal to the optical fiber connected thereto, and the Splitter is used for splitting the optical signal from one optical fiber connected thereto into a plurality of waveguides in an internal chip, and the optical signals in the plurality of waveguides may be output from the optical output module after modulation. As an example, the light receiving module is used for connecting 32 optical fibers, the light output module is used for connecting 32 optical fibers, the splitter is used for connecting 8 optical fibers, and multi-channel optical fiber communication is achieved, wherein the splitter can branch optical signals in the 8 optical fibers into 32 internal waveguides, and the optical signals are output to the 32 optical fibers by the light output module after being modulated in the 32 waveguides.

After the chip and the optical fiber array unit are formed, the optical fiber array unit may be inverted, the groove array is oriented to the waveguide array of the chip, the first alignment structure 210 in the chip and the second alignment structure 320 in the optical fiber array unit are aligned, referring to fig. 13, which is an alignment schematic diagram of the chip and the optical fiber array unit in the embodiment of the present application, the alignment ridge 222 is pushed into the alignment groove 322, and meanwhile, the first ridge 321 in the optical fiber array unit is embedded into the first groove 221 in the chip, and the second outlet end of the optical fiber array is aligned with the first outlet end of the waveguide array in the chip. A pad 223 is provided in the first groove 222, and when a solder 323 is provided on top of the first ridge 321, eutectic soldering can be achieved between the pad 223 and the solder 323 by heating.

Referring to fig. 14, which is a schematic cross-sectional view of a communication system according to an embodiment of the present application, fig. 14A is a cross-sectional view of the communication system at a pad 223 along a direction perpendicular to an extending direction of an alignment ridge 222, and it can be seen from the figure that the alignment ridge 222 is embedded in an alignment groove 322, a first ridge 321 is embedded in a first groove 221, the pad 223 in the first groove 222 is in contact with a solder 323 on top of the first ridge 321, a coupling surface 330 is located above a transmission waveguide 210, and a distance is provided between the coupling surface 330 and a second cover layer 212 covering the transmission waveguide, so that impurities attached on a surface of the second cover layer 212 are prevented from affecting precise fixation between a chip and an optical fiber array unit.

Referring to fig. 14B, which is a sectional view of the communication system in a direction perpendicular to the extending direction of the groove array at the groove array, when the optical fiber is fixed in the second groove 310, the optical fiber 130 and the transmission waveguide 210 are aligned in the center, thereby achieving high-precision coupling, and the transmission waveguide 210 is not present in the sectional view, and thus is indicated by a broken line to show the relative positions of the transmission waveguide 210 and the optical fiber 130. After the chip and the optical fiber array unit are fixedly connected, the groove array and the waveguide array are not overlapped in a direction perpendicular to the plane of the first substrate 100, and the transmission waveguide 210 and the optical fibers 130 in the second groove 310 are aligned in a direction parallel to the plane of the first substrate 100.

Referring to fig. 14C, which is a cross-sectional view of the communication system along the first direction at the transmission waveguide 210, the transmission waveguide 210 is disposed on the first substrate 200, the transmission waveguide 210 is led out to the first sidewall 2001 of the first substrate 200 and coupled with the optical fiber 130, the optical fiber array unit for fixing the optical fiber 130 includes a cover plate 300 and a second substrate 400, the cover plate 300 is located above the optical fiber 130, the second substrate 400 is located below the optical fiber 130, the optical fiber 130 may be a single mode optical fiber, the transmission waveguide 210 is disposed in a floating manner with respect to the first substrate 200, that is, the transmission waveguide 210 is a floating waveguide, there may be a certain gap between the transmission waveguide 210 and the first substrate 200, there may be an optical adhesive disposed at the gap, there may also be a certain gap between the second substrate 400 and the first substrate 200, and the optical adhesive may be disposed at the gap.

In this embodiment, the geometric dimensions of the alignment ridge 222, the alignment groove 322, the first ridge 321, and the first groove 221 may all be determined by corresponding calculation formulas, and the alignment error may also be calculated by the dimensional deviation of the alignment structure actually processed. For example, the alignment groove 322 and the second groove 310 are V-grooves, the angles between the two sidewalls of the V-grooves of the alignment groove 322 and the second groove 310 are equal, and denoted as 2α, the pitch of the adjacent second grooves 310 in the cover plate 300 may be denoted as w, and the core radius of the optical fiber 130 may be denoted as r, and w may be defined by the following formula:

wherein x can be adjusted according to the photolithographic process capability and flip chip die attach accuracy. A mask layer may be formed on the cover plate 300, a patterned photoresist may be formed on the surface of the cover plate 300 by using a photolithography process, the patterned photoresist may be used to etch the mask layer to obtain a patterned mask, the patterned mask is used as a mask to etch the cover plate 300 to obtain the second groove 310, the photolithography process capability is determined by the minimum size of the photoresist in the photolithography process, and since the minimum size of the photoresist determines the minimum size of the patterned mask layer, the space between adjacent V grooves may be affected; the flip chip accuracy refers to the alignment accuracy of the pads 223 and the solder 323 when the cover plate 300 is flipped, and can be expressed by the alignment error of the pads 223 and the solder 323 when the cover plate 300 is flipped, and the maximum allowable alignment error of the pads 223 and the solder 323 can be 5um, for example.

The width (dimension perpendicular to the first direction) of the alignment ridge 222 in the chip is denoted as W _α The thickness (dimension in the direction perpendicular to the surface of the first substrate 200) of the transmission waveguide 210 and the waveguide structure 213 is denoted as t _WG The thickness of the second cladding layer 212 on the side of the transmission waveguide 210 facing away from the first substrate 200 (i.e., the upper surface of the transmission waveguide 210 in the drawing) may be expressed as t _top Correspondingly, the thickness of the third cladding layer 214 on the side of the waveguide structure 213 facing away from the first substrate 200 (i.e. the upper surface of the waveguide structure 213 in the figure) is also t _top The following formula can be established:

the longitudinal distance (distance in the direction perpendicular to the surface of the first substrate 200) between the bottom surface of the step surface 340 and the top surface of the first ridge 321 is denoted as h ₃ The following equation can be established by taking the longitudinal distance between the coupling surface 330 and the top surface of the first ridge 321 as Δh:

in this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments.

The foregoing is a specific implementation of the present application. It should be understood that the above-described embodiments are only for illustrating the technical solution of the present application, and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

A chip, comprising:

a first substrate; the first substrate is provided with a first alignment structure extending along a first direction parallel to the surface of the first substrate, the first alignment structure comprises an alignment wave ridge extending along the first direction and two first grooves respectively positioned at two sides of the alignment wave ridge, the first grooves penetrate through the first substrate from a first side wall of the first substrate along the first direction, and the surface of the first side wall is perpendicular to the first direction;

a waveguide array located on one side of the first substrate, a plurality of transmission waveguides in the waveguide array extending in a first direction toward the first sidewall; when the first alignment structure is aligned with the second alignment structure in the optical fiber array unit, the alignment ridge is embedded into the alignment groove in the second alignment structure, and the end part of the waveguide array, which faces the first side wall, is used as a first leading-out end to align with the second leading-out end of the optical fiber array fixed by the optical fiber array unit.
The chip of claim 1, wherein a waveguide structure is provided on top of the alignment ridge, the waveguide structure being of a material consistent with the transmission waveguide; the top surface of the waveguide structure is flush with the top surface of the transmission waveguide.
The chip of claim 1 or 2, wherein the number of first alignment structures is two, one on each side of the waveguide array.
A chip according to any one of claims 1-3, wherein the first terminal is flush with the first sidewall.
The chip of any one of claims 1-4, wherein the transmission waveguide is suspended relative to the first substrate.
The chip of any one of claims 1-5, wherein at least one of the first grooves has a pad disposed therein for eutectic soldering with solder on top of the first ridge.
The chip of claim 6, wherein the first groove provided with the bonding pad is located on a side of the alignment ridge facing away from the waveguide array.
The chip of any one of claims 1-7, wherein the first recess has a rectangular or inverted trapezoidal cross-section in a direction perpendicular to the first direction.
An optical fiber array unit is characterized by comprising a cover plate;

the cover plate has a second alignment structure extending in a second direction parallel to a surface of the cover plate, the second alignment structure including an alignment groove extending in the second direction and a first ridge located on at least one side of the alignment groove, the alignment groove extending at least partially through the cover plate in the second direction from a second sidewall of the cover plate, a surface of the second sidewall being perpendicular to the second direction;

The cover plate is further provided with a groove array, a plurality of second grooves in the groove array extend towards a third side wall of the cover plate along a second direction, the groove array is used for fixing an optical fiber array, and the second side wall and the third side wall are two opposite side walls of the cover plate;

when the second alignment structure is aligned with the first alignment structure in the chip, the alignment ridge in the first alignment structure is embedded in the alignment groove, and the end part of the optical fiber array, which faces the second side wall, is used as a second leading-out end to align with the first leading-out end of the waveguide array in the chip.
The fiber array unit of claim 9, wherein the cover plate has a coupling surface between the groove array and the second sidewall, the first ridge protruding from the coupling surface in a direction perpendicular to a surface of the second substrate; in the second direction, the dimension of the coupling surface is less than or equal to the dimension of the alignment slot; the coupling surface covers the waveguide array when the second alignment structure is aligned with the first alignment structure in the chip.
The optical fiber array unit according to claim 10, wherein the cover plate has a step surface between the coupling surface and the groove array, the coupling surface protrudes from the step surface in a direction perpendicular to the surface of the second substrate, the step surface protrudes from the bottom of the second groove, and the coupling surface faces the side wall of the second groove to block the optical fiber array from protruding into the area where the step surface is located.
The fiber array unit of any of claims 9-11, wherein the number of second alignment structures is two, one on each side of the groove array.
The fiber array unit of any of claims 9-12, wherein the alignment slot extends completely through the cover plate from the second sidewall of the cover plate in the second direction.
The optical fiber array unit according to any one of claims 9 to 13, wherein a cross section of the second groove in a direction perpendicular to the second direction is an inverted triangle.
The fiber array unit of any of claims 9-14, wherein the first ridge top is provided with solder for eutectic soldering with a pad in the first groove.
The optical fiber array unit according to claim 15, wherein the alignment groove has first ridges on both sides, and the first ridge of the solder is disposed on a side of the alignment groove facing away from the groove array.
The fiber array unit of any one of claims 9-16, wherein the cover plate is made of silicon or glass.
The optical fiber array unit according to any one of claims 9 to 17, wherein the alignment groove has an inverted triangle shape in cross section in a direction perpendicular to the second direction.
The fiber array unit of any of claims 9-18, further comprising:

and the second substrate is connected with the cover plate at one side of the cover plate with the groove array.
A communication system, comprising: the chip of any one of claims 1-8, and the fiber array unit of any one of claims 9-19.