CN117560020B - Channel coding sparse check matrix reconstruction method and device and electronic equipment - Google Patents
Channel coding sparse check matrix reconstruction method and device and electronic equipment Download PDFInfo
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- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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Abstract
The application provides a channel coding sparse check matrix reconstruction method, a device and electronic equipment, wherein the method comprises the following steps: preprocessing information of a noisy received code stream to obtain a codeword matrix; starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in a codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors; expanding and combining partial check vectors to obtain a partial sparse check matrix; judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not; if yes, outputting a part of sparse check matrix; and otherwise, performing iterative decoding on the noisy received code stream, and re-executing the steps. By the method, the device and the electronic equipment for reconstructing the channel coding sparse check matrix, the reconstruction rate of the check matrix under the condition of high error codes can be effectively improved.
Description
Technical Field
The application relates to the technical field of communication coding, in particular to a channel coding sparse check matrix reconstruction method, a device and electronic equipment.
Background
In a communication system, channel coding is a key technical means for correcting channel errors and ensuring reliability and efficiency of information transmission. The Low Density Parity Check (LDPC) code is used as a channel coding method with excellent error correction performance, the decoding process and the error correction performance depend on a sparse check matrix specially designed in an optimization mode, and the constraint relation between information bits and check bits is determined by the matrix. In an actual communication environment, a signal faces channel noise and different kinds of signal interference in the transmission process, so that the error rate of a demodulation signal of a receiver is high; meanwhile, in order to ensure the reliability of transmission, an LDPC code with a longer code length is often adopted in a communication system to perform channel coding.
In non-cooperative communication, the receiver will face the challenge of efficiently decoding and analyzing the received code stream containing partial errors in the case of unknown LDPC code check matrices. The first problem faced by the receiver at this time is how to reconstruct the sparse check matrix of the LDPC code based on the received code stream information and part of priori information (such as the code length and code rate of the LDPC code), which is the premise that the receiver effectively decodes the received code stream and completes the extraction of the effective information. At present, the LDPC code sparse check matrix reconstruction method is mostly oriented to the reconstruction of the short code length LDPC code under the condition of low error rate. For example: the random column extraction construction check space method carries out random extraction construction check space on the codeword matrix, so that the interference of error rate on reconstruction can be reduced to a certain extent, but the extraction times and the calculation complexity of traversing the codeword matrix are too high under the condition of large code length.
Therefore, how to effectively reconstruct the sparse check matrix of the long-code LDPC code according to the received information bit stream under the condition of high error codes is a problem to be solved urgently.
Disclosure of Invention
In order to solve the above problems, an embodiment of the present application is to provide a method, an apparatus, and an electronic device for reconstructing a sparse check matrix of channel coding.
In a first aspect, an embodiment of the present application provides a method for reconstructing a sparse check matrix of channel coding, including:
preprocessing information of a noisy received code stream to obtain a codeword matrix;
starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in a codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors;
expanding and combining partial check vectors to obtain a partial sparse check matrix;
judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not;
outputting part of the sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of the sparse check matrix reach the preset quantity;
and under the condition that the check vectors in the partial sparse check matrix do not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, and re-executing the step of starting the calculation task.
In a second aspect, an embodiment of the present application further provides a device for reconstructing a sparse check matrix of channel coding, including:
the preprocessing module is used for preprocessing the information of the noisy received code stream to obtain a codeword matrix;
the searching module is used for starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in the codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors;
the expansion module is used for expanding and combining the partial check vectors to obtain a partial sparse check matrix;
the judging module is used for judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not; outputting part of the sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of the sparse check matrix reach the preset quantity; and under the condition that the check vectors in the partial sparse check matrix do not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, and re-executing the step of starting the calculation task.
In a third aspect, embodiments of the present application further provide a computer readable storage medium having a computer program stored thereon, wherein the computer program when executed by a processor performs the steps of the method of the first aspect described above.
In a fourth aspect, embodiments of the present application also provide an electronic device, including a memory, a processor, and one or more programs, where the one or more programs are stored in the memory and configured to perform the steps of the method of the first aspect.
In the solution provided in the first aspect of the embodiment of the present application, the codeword matrix is obtained by preprocessing the information of the noisy received code stream; starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in a codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors; expanding and combining partial check vectors to obtain a partial sparse check matrix; judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not; outputting part of the sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of the sparse check matrix reach the preset quantity; and under the condition that the check vectors in the partial sparse check matrix do not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, and re-executing the step of starting the calculation task. Compared with the mode of reconstructing short code length LDPC codes under the condition of low error rate in the related art, the method reduces the number of codewords used in the process of participating in calculation of the check space, namely reduces the number of error bits participating in calculation by performing scale-down search based on sub-matrix sampling, thereby reducing error code interference in calculation and effectively improving the reconstruction rate of the check matrix under the condition of high error code.
In order to make the above objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 shows a flowchart of a channel coding sparse check matrix reconstruction method provided in embodiment 1 of the present application;
fig. 2 shows a schematic structural diagram of a channel coding sparse check matrix reconstruction device provided in embodiment 2 of the present application;
fig. 3 shows a schematic structural diagram of an electronic device provided in embodiment 3 of the present application.
Detailed Description
The execution main body of the channel coding sparse check matrix reconstruction method provided by the invention is a processor capable of reconstructing the channel coding sparse check matrix.
Example 1
Referring to a flowchart of a method for reconstructing a sparse check matrix of channel coding provided in this embodiment shown in fig. 1, the method for reconstructing a sparse check matrix of channel coding provided in this embodiment includes the following specific steps:
step 100: and preprocessing the information of the noisy received code stream to obtain a codeword matrix.
In the above step 100, the noisy received code stream refers to the received information bit stream, and the information bit stream contains a partial error.
The codeword matrix refers to a matrix formed by dividing a noisy received code stream into a plurality of codewords in units of code length.
The check vector refers to a certain row in the sparse check matrix.
The purpose of updating the codeword matrix is: because the noisy received code stream contains more noise before the first iteration is carried out, the error rate in the verification space is higher, and the probability of finding out the sparse vector is lower; the codeword matrix is updated after each iteration, so that the error rate in the check space corresponding to the updated codeword matrix is lower, and the probability of finding out the sparse vector is higher.
Therefore, in order to find the sparse vector with a higher probability, the process of channel coding sparse check matrix reconstruction in the embodiment of the present application needs to perform steps 100 to 106 multiple times.
Alternatively, step 100 may include steps (1) to (2):
step (1): under the condition that the noisy received code stream is a soft information sequence, carrying out hard judgment on the noisy received code stream to obtain a hard judgment bit stream sequence;
step (2): converting the hard decision bit stream sequence according to a preset mode to obtain a codeword matrix, wherein the preset mode comprises the following steps: either with each codeword as a row or with each codeword as a column.
In step (2) above, the hard decision bit stream sequence is illustrativelyFor sequencesAccording to->A bit is a row, and constitutes a noise-containing +.>Go->Code word matrix of columns->：Wherein (1)> And so on.
The subsequent processing steps of the present embodiment are performed on the basis of converting the hard decision bit stream sequence in such a way that each codeword is a row. When the arrangement is changed, that is, the hard decision bit stream sequence is converted in a manner of taking each code word as a column, the subsequent processing can be adjusted according to the correlation method of the mathematical operation.
Step 102: starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in a codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors;
in step 102 described above, the computing task is referred to as a process or thread.
The sampling sub-matrix refers to a sub-matrix obtained by randomly sampling a codeword matrix by a calculation task, and one calculation task corresponds to one sampling sub-matrix.
Sparse vectors may also be referred to as small weight vectors.
Optionally, before determining a sampling submatrix corresponding to each computing task in the codeword matrix, the method for reconstructing a sparse check matrix for channel coding provided in the embodiments of the present application further includes step (1):
step (1): and determining the number of rows and columns of the sampling sub-matrix according to the encoded basic information and the basic information of the channel. Wherein the encoded base information comprises: code length, code weight, and information bit length; the basic information of the channel includes: channel demodulation error rate, channel type, and signal-to-noise ratio.
In the step (1), the number of rows of the sampling sub-matrix is not greater than the number of rows of the codeword matrix, and the number of columns of the sampling sub-matrix is not greater than the number of columns of the codeword matrix.
Determining the number of rows and the number of columns of the sampling sub-matrix according to the encoded basic information and the basic information of the channel refers to determining the lower limit value of the number of rows of the sampling sub-matrix according to the encoded basic information and the basic information of the channel, and under the condition that the number of rows of the sampling sub-matrix is larger than the lower limit value, the number of rows and the number of columns of the sampling sub-matrix try to take different values, so that the average number of check vectors reserved after sampling once is calculated according to the number of rows of the sampling sub-matrix, the number of columns of the sampling sub-matrix, the encoded basic information and the basic information of the channel is maximum. And taking the value of the number of rows of the sampling sub-matrix and the value of the number of columns of the sampling sub-matrix as the number of rows and the number of columns of the sampling sub-matrix under the condition that the average number of the check vectors reserved after one sampling is the largest.
The fact that the number of lines of the sampling sub-matrix is larger than the lower limit value can ensure that all the reconstructed sparse vectors in the subsequent processing process are check vectors. When the average number of the check vectors reserved after one sampling is the largest, the number of iterations required by the embodiment of the invention is the smallest, that is to say, the total complexity of the algorithm is close to the minimum value.
Further, under the condition that the channel demodulation error rate is unknown, the demodulation error rate can be calculated according to the channel type and the signal-to-noise ratio; in the case of unknown code weights, the size or range of code weights may be estimated from other known codes that are similar to the code length, information bit length, etc.
Optionally, the step (1) includes a step (11)
Step (11): the average number of check vectors reserved after a single iteration is calculated, and can be realized by the following formula:wherein (1)>Represents the average number of check vectors remaining after a single iteration,/->Represents the number of check vectors remaining after a single iteration, < >>Representing the demodulation error rate of the channel, for example>Indicates the code length +.>Representing the information bit length, ">Representing the code weight, the code weight specifically refers to the row weight of the sparse check matrix, < ->Representing the number of rows of the sampling sub-matrix,/->Representing the number of columns of the sampling sub-matrix; at->Satisfy the lower limit value->Under defined conditions, determine to +.>Parameter pair at maximization +.>As the number of rows of the sampling sub-matrix and the number of columns of the sampling sub-matrix.
In the step (11), in each subsequent iteration, the adjustment can be performed according to the actual situationIs a value of (a). In practice, the speed of a single iteration of the algorithm follows +.>And->Decreases with increasing number, that is to say the complexity of a single iteration of the algorithm is +.>And->Is increased by an increase in (a). Therefore, the reconstruction speed according to the actual algorithm can be calculated at +.>Appropriately reduced +.>To maximize the reconstruction efficiency.
The maximization of the reconstruction efficiency here means: the maximum check vector reconstruction quantity is realized in unit calculation time, so that the algorithm realizes complete reconstruction of the sparse check matrix of the channel coding under the condition of high error code in the fastest time.
Optionally, the plurality of computing tasks includes: a plurality of first sample calculation tasks and a plurality of second sample calculation tasks; for each computing task in step 102, determining a sampling submatrix corresponding to each computing task in the codeword matrix may include steps (1) to (2):
step (1): for each first sampling calculation task in a plurality of first sampling calculation tasks, randomly sampling at least one group of code words in a code word matrix through each first sampling calculation task to obtain a first sampling matrix;
step (2): and randomly sampling at least one group of bits in the first sampling matrix through a second sampling calculation task in the plurality of second sampling calculation tasks to obtain a second sampling sub-matrix.
In the step (1) and the step (2), reasonable computing tasks are distributed according to actual computing resources.
If the first sampling calculation task is a row sampling calculation task, the second sampling calculation task is a column sampling calculation task; if the first sampling computation task is a column sampling computation task, the second sampling computation task is a row sampling computation task.
According to the embodiment of the invention, the efficient iteration framework based on distributed parallelism is built by starting a plurality of parallel computing tasks, so that the reconstruction efficiency of the algorithm is effectively improved, and the algorithm can completely reconstruct the sparse check matrix with acceptable computing complexity under the constraint of double conditions of large code length and high error code.
Optionally, in each computing task in step 102, searching for a sparse vector orthogonal to the sampling submatrix to obtain a partial check vector may include steps (1) to (3):
step (1): transforming the sampling submatrix into a codeword space base by a Gaussian line transformation method;
step (2): converting a codeword space base into a check space base through a block matrix transformation method, and generating a check space based on a plurality of row vectors in the check space base, wherein the row vectors in the check space are orthogonal to the sampling submatrices;
step (3): searching a plurality of row vectors in a verification space through a sparse vector searching algorithm, and taking a set of row vectors meeting preset row weights in the row vectors as partial verification vectors; the sparse vector refers to a row vector meeting preset row weights in the row vectors.
In the above step (1), the gaussian line transformation refers to an operation that allows line swapping, line addition. The codeword space base has a block matrix formWherein->Representing codeword space basis>Representing an identity matrix>Representing a blocking matrix.
In the step (2), the block matrix transformation may be performed by the formulaRealization of, wherein->Representing check space base>Representation->Middle block matrix->Is a transposed matrix of (a).
As a set of row vectors, a set of base vectors can be said, and a check space can be created.
In the step (3), the preset row weight refers to a preset maximum target hamming weight of the check vector.
The preset row weight setting method may be that the hamming weight is set according to a predicted or expected check vector. Illustratively, the predicted check vector hamming weight is no greater thanPresetting row weights; />Alternatively, if the sparse check matrix to be reconstructed has only one row weight, the +_can be dynamically set according to the iterative operation condition of the algorithm>Is a value of (2). Specifically, a preset row weight is set to +.>Every time a weight of +.>Is adjusted according to the vector of (2)。
Step 104: and expanding and combining the partial check vectors to obtain a partial sparse check matrix.
Optionally, the step 104 may include steps (1) to (2):
step (1): in each calculation task, expanding the length of each partial check vector to the original length in a zero padding expansion mode, wherein the original length refers to the number of columns of a codeword matrix;
step (2): and combining all the partial check vectors expanded to the original length to obtain a partial sparse check matrix.
In the step (1), expanding the length of the partial check vector to the original length by means of zero padding expansion means that the partial check vector is expandedBy->Length zero padding expansion to original->Length check vector, obtain. Length of->In the expanded check vector of bits, sampled to the column +.>Position-filling corresponding bits of the reconstructed partial check vector, the remaining non-sampled +.>All positions are filled with bit 0.
In the step (2), after merging all the partial check vectors expanded to the original length, removing the repeated or linear relevant parts, that is, preferentially preserving the vectors with small hamming weight, to form a partial sparse check matrix。
Alternatively, in the case where the code is a quasi-cyclic code, the above step (2) may include steps (21) to (22):
step (21): in each calculation task, performing cyclic shift expansion on each partial check vector expanded to the original length to obtain an expanded check vector set of each cyclic shift expanded partial check vector;
step (22): and merging the sets of all the expansion check vectors to obtain a part of sparse check matrix.
In the step (21), the cyclic shift expansion refers to performing a piecewise cyclic shift on each partial parity vector according to the QC-LDPC code quasi-cyclic factor size, thereby expanding the partial parity vector into all the parity vectors in one cyclic block.
The cyclic block refers to a cyclic block of a sparse check matrix of the QC-LDPC code, where the sparse check matrix is composed of a plurality of square matrices (i.e., cyclic blocks) with equal sizes, and each cyclic block is a cyclic shift matrix or a full 0 matrix of the identity matrix.
Cyclic shift spreading is divided into two cases:
in the first case, the quasi-cyclic factorIf the test is known or has been tried out by the heuristic algorithm, the heuristic process is skipped and each reconstructed check vector is directly checked by the quasi-cyclic factor +.>Performing cyclic shift amplification to obtain +.>All +.>Individual check vectors->。
In the second case, if the quasi-cyclic factor is unknown, then takeIs a check vector of any one of>Probing all possible quasi-cyclic factors of QC-LDPC code to obtain cyclic factor +.>。
The probing process is as follows:
step one: the set of all possible cyclic factor values is contained inEach of the ranges can be +.>Integer divided by integer. For each candidate in this set the cyclic factor value +.>(probing from big to small) for +.>According to every->The bits are used as a cyclic block to carry out the piecewise cyclic shift to obtain +.>Candidate check vectors.
Step two: this is put into effectThe candidate check line vectors form a trial sparse check matrix +.>Calculation ofWherein (1)>For a matrix of code words>Representing a calculation matrix or vector->Hamming weight (number of bits of 1). If->Then consider to be currently->The value is the correct quasi-cyclic factor. Otherwise, returning to the step one to continue the next probing.
Wherein,representing threshold value->，/>Depending on the actual bit error rate, it is generally preferable Representation->Number of codewords included.
Step three: after the quasi-cyclic factor test is finished, each reconstructed check vector is subjected to quasi-cyclic factor testPerforming cyclic shift amplification to obtain all +.>Verification ofVector group->。
Step 106: judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not; outputting part of the sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of the sparse check matrix reach the preset quantity; and under the condition that the check vectors in the partial sparse check matrix do not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, and re-executing the step of starting the calculation task.
Optionally, the "iteratively decoding the noisy received code stream according to the partial sparse check matrix" in the above step 106 to obtain the updated codeword matrix "may include steps (1) to (3):
step (1): under the condition that the noisy received code stream is a soft information sequence, performing iterative decoding on the noisy received code stream by using a partial sparse check matrix through an iterative soft decoding algorithm to obtain soft decoding;
step (2): hard decision is carried out on the soft decoding to obtain an updated codeword matrix;
step (3): and under the condition that the noisy received code stream is a hard information sequence, performing iterative decoding on the noisy received code stream by using a partial sparse check matrix through an iterative hard decision decoding algorithm to obtain an updated codeword matrix.
In the above steps (1) and (3), iterative decoding is continued until all received codewords satisfy the partial sparse check matrixUntil the check relation in (a).
The iterative decoding process can reduce the error rate in the codeword matrix in the next algorithm iteration, so that the probability of finding out sparse vectors in the next algorithm iteration is increased.
After completing one iteration of the algorithm, the updated codeword matrix is used as input for the next iteration of the algorithm. Meanwhile, the parameters of the next round of algorithm iteration are updated, and the parameters are specifically as follows:
step one: if the number of the reconstructed linearly uncorrelated check vectors reachesThe reconstruction is completed, the algorithm is finished, and the reconstructed sparse check matrix is output>。
Step two: if the number of the reconstructed linear uncorrelated check vectors does not reachEstimating the error rate reduction condition in the codeword matrix after the partial decoding is completed according to the information such as the number of the reconstructed partial check vectors, and re-calculating algorithm parameters according to the reduced error rate: such as the number of rows, columns, computational tasks, etc.
Step three: returning to step 102 for the next algorithm iteration.
In summary, according to the channel coding sparse check matrix reconstruction method provided by the embodiment of the invention, the codeword matrix is obtained by preprocessing the information of the noisy received code stream; starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in a codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors; expanding and combining partial check vectors to obtain a partial sparse check matrix; judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not; outputting part of the sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of the sparse check matrix reach the preset quantity; and under the condition that the check vectors in the partial sparse check matrix do not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, and re-executing the step of starting the calculation task. Compared with the mode of reconstructing short code length LDPC codes under the condition of low error rate in the related art, the method reduces the number of codewords used in the process of participating in calculation of the check space, namely reduces the number of error bits participating in calculation by performing scale-down search based on sub-matrix sampling, thereby reducing error code interference in calculation and effectively improving the reconstruction rate of the check matrix under the condition of high error code.
Example 2
The foregoing describes in detail a method for reconstructing a sparse check matrix for channel coding provided in embodiment 1 of the present invention, and the method may also be implemented by a corresponding apparatus, and the following describes in detail a device for reconstructing a sparse check matrix for channel coding provided in embodiment 2 of the present invention.
The apparatus for reconstructing a channel coding sparse check matrix provided in embodiment 2 is configured to perform a method for reconstructing a channel coding sparse check matrix set forth in embodiment 1.
Referring to fig. 2, a schematic structural diagram of a channel coding sparse check matrix reconstruction device according to an embodiment of the present invention is shown. As shown in fig. 2, the channel coding sparse check matrix reconstruction device includes:
the preprocessing module 200 is configured to preprocess information of the noisy received code stream to obtain a codeword matrix;
a search module 202, configured to start at least one parallel computing task, for each computing task, determine a sampling sub-matrix corresponding to each computing task in the codeword matrix, and search, in each computing task, a sparse vector orthogonal to the sampling sub-matrix to obtain a partial check vector;
the expansion module 204 is configured to expand and combine the partial check vectors to obtain a partial sparse check matrix;
a judging module 206, configured to judge whether the number of check vectors in the partial sparse check matrix reaches a preset number; outputting part of the sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of the sparse check matrix reach the preset quantity; and under the condition that the check vectors in the partial sparse check matrix do not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, and re-executing the step of starting the calculation task.
In summary, the device for reconstructing the sparse check matrix of the channel coding provided by the embodiment of the invention obtains the codeword matrix by preprocessing the information of the noisy received code stream; starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in a codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors; expanding and combining partial check vectors to obtain a partial sparse check matrix; judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not; outputting part of the sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of the sparse check matrix reach the preset quantity; and under the condition that the check vectors in the partial sparse check matrix do not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, and re-executing the step of starting the calculation task. Compared with the mode of reconstructing short code length LDPC codes under the condition of low error rate in the related art, the method reduces the number of codewords used in the process of participating in calculation of the check space, namely reduces the number of error bits participating in calculation by performing scale-down search based on sub-matrix sampling, thereby reducing error code interference in calculation and effectively improving the reconstruction rate of the check matrix under the condition of high error code.
Example 3
The present embodiment proposes a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the channel coding sparse check matrix based reconstruction method described in embodiment 1 above. The specific implementation can be referred to method embodiment 1, and will not be described herein.
In addition, referring to the schematic structural diagram of an electronic device shown in fig. 3, the present embodiment also proposes an electronic device, which includes a bus 51, a processor 52, a transceiver 53, a bus interface 54, a memory 55, and a user interface 56. The electronic device includes a memory 55.
In this embodiment, the electronic device further includes: one or more programs stored on memory 55 and executable on processor 52 are configured to be executed by the processor for performing steps 100 through 106.
A transceiver 53 for receiving and transmitting data under the control of the processor 52.
Where bus architecture (represented by bus 51), bus 51 may comprise any number of interconnected buses and bridges, with bus 51 linking together various circuits, including one or more processors, represented by processor 52, and memory, represented by memory 55. The bus 51 may also link together various other circuits such as peripheral devices, voltage regulators, power management circuits, etc., as are well known in the art, and therefore, will not be described further in connection with this embodiment. Bus interface 54 provides an interface between bus 51 and transceiver 53. The transceiver 53 may be one element or may be a plurality of elements, such as a plurality of receivers and transmitters, providing a means for communicating with various other apparatus over a transmission medium. For example: the transceiver 53 receives external data from other devices. The transceiver 53 is used to transmit the data processed by the processor 52 to other devices. Depending on the nature of the computing system, a user interface 56 may also be provided, such as a keypad, display, speaker, microphone, joystick.
The processor 52 is responsible for managing the bus 51 and general processing, as described above, running the general-purpose operating system 551. And memory 55 may be used to store data used by processor 52 in performing operations.
Alternatively, processor 52 may be, but is not limited to: a central processing unit, a single chip microcomputer, a microprocessor or a programmable logic device.
It is understood that the memory 55 in embodiments of the present application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The nonvolatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable EPROM (EEPROM), or a flash Memory. The volatile memory may be random access memory (Random Access Memory, RAM) which acts as an external cache. By way of example, and not limitation, many forms of RAM are available, such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (Double Data Rate SDRAM), enhanced SDRAM (ESDRAM), synchronous DRAM (SLDRAM), and Direct RAM (DRRAM). The memory 55 of the system and method described in this embodiment is intended to comprise, without being limited to, these and any other suitable types of memory.
In some implementations, the memory 55 stores the following elements, executable modules or data structures, or a subset thereof, or an extended set thereof: operating system 551 and application programs 552.
The operating system 551 includes various system programs, such as a framework layer, a core library layer, a driver layer, and the like, for implementing various basic services and processing hardware-based tasks. The application programs 552 include various application programs such as a Media Player (Media Player), a Browser (Browser), and the like for implementing various application services. A program implementing the method of the embodiment of the present application may be included in the application program 552.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (12)
1. The channel coding sparse check matrix reconstruction method is characterized by comprising the following steps of:
preprocessing information of a noisy received code stream to obtain a codeword matrix;
starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in the codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors;
expanding and combining the partial check vectors to obtain a partial sparse check matrix;
judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not;
outputting a part of sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of sparse check matrix reach the preset quantity;
and under the condition that the number of check vectors in the partial sparse check matrix does not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, re-executing the starting of at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in the codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain the partial check vector.
2. The method of claim 1, wherein the preprocessing the information of the noisy received code stream to obtain a codeword matrix comprises:
carrying out hard decision on the noisy received code stream under the condition that the noisy received code stream is a soft information sequence to obtain a hard decision bit stream sequence;
converting the hard decision bit stream sequence according to a preset mode to obtain a codeword matrix, wherein the preset mode comprises the following steps: either with each codeword as a row or with each codeword as a column.
3. The method of claim 1, wherein prior to determining the sampling submatrices corresponding to each of the computing tasks in the codeword matrix, further comprising:
determining the number of rows and columns of the sampling sub-matrix according to the encoded basic information and the basic information of the channel; wherein the encoded base information comprises: code length, code weight, and information bit length; the basic information of the channel includes: channel demodulation error rate, channel type, and signal-to-noise ratio.
4. A method according to claim 3, wherein said determining the number of rows and columns of the sampling sub-matrix based on the encoded basis information and the basis information of the channel comprises:
the average number of check vectors reserved after a single iteration is calculated, and can be realized by the following formula:
wherein (1)>Represents the average number of check vectors remaining after a single iteration,/->Represents the number of check vectors remaining after a single iteration, < >>Representing the demodulation error rate of the channel, for example>Indicates the code length +.>Representing the information bit length, ">Representing the code weight, which refers to the row weight of the sparse check matrix, < >>Representing the number of rows of the sampling sub-matrix,/->Representing the number of columns of the sampling sub-matrix; at->Satisfy the lower limit value->Under defined conditions, determine to +.>Parameter pair at maximization +.>As the number of rows of the sampling sub-matrix and the number of columns of the sampling sub-matrix.
5. The method of claim 1, wherein for each computing task, determining a sampling sub-matrix in the codeword matrix corresponding to each computing task comprises:
for each first sampling calculation task in a plurality of first sampling calculation tasks, randomly sampling at least one group of code words in the code word matrix through each first sampling calculation task to obtain a first sampling matrix;
randomly sampling at least one group of bits in the first sampling matrix through the second sampling calculation tasks in a plurality of second sampling calculation tasks to obtain a second sampling sub-matrix;
wherein the computing task comprises: a plurality of first sample calculation tasks and a plurality of second sample calculation tasks.
6. The method of claim 1, wherein searching for sparse vectors orthogonal to the sampling submatrices in each of the computing tasks results in partial check vectors, comprising:
transforming the sampling submatrix into a codeword space base by a Gaussian line transformation method;
converting the codeword space base into a check space base through a block matrix transformation method, and generating a check space based on row vectors in the check space base matrix, wherein the row vectors in the check space are orthogonal to the sampling submatrices;
searching a plurality of row vectors in the check space through a sparse vector searching algorithm, and taking a set of row vectors meeting preset row weights in the row vectors as partial check vectors; the sparse vector refers to a row vector meeting a preset row weight in the row vectors.
7. The method of claim 1, wherein expanding and merging the partial check vectors to obtain a partial sparse check matrix comprises:
in each calculation task, expanding the length of each partial check vector to an original length in a zero padding expansion mode, wherein the original length refers to the number of columns of the codeword matrix;
and merging all the partial check vectors expanded to the original length to obtain a partial sparse check matrix.
8. The method of claim 7, wherein in the case where the code is a quasi-cyclic code, the merging all the partial check vectors extended to the original length to obtain a partial sparse check matrix includes:
in each calculation task, performing cyclic shift expansion on each partial check vector expanded to the original length to obtain an expanded check vector set of each cyclic shift expanded partial check vector;
and merging all the sets of the expansion check vectors to obtain a partial sparse check matrix.
9. The method of claim 1, wherein iteratively decoding the noisy received code stream according to the partially sparse check matrix to obtain an updated codeword matrix comprises:
under the condition that the noisy received code stream is a soft information sequence, performing iterative decoding on the noisy received code stream by using the partial sparse check matrix through an iterative soft decoding algorithm to obtain soft decoding;
hard decision is carried out on the soft decoding to obtain an updated codeword matrix;
and under the condition that the noisy received code stream is a hard decision bit sequence, performing iterative decoding on the noisy received code stream by using the partial sparse check matrix through an iterative hard decision decoding algorithm to obtain an updated codeword matrix.
10. A channel coding sparse check matrix reconstruction device, comprising:
the preprocessing module is used for preprocessing the information of the noisy received code stream to obtain a codeword matrix;
the search module is used for starting at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in the codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain partial check vectors;
the expansion module is used for expanding and combining the partial check vectors to obtain a partial sparse check matrix;
the judging module is used for judging whether the check vectors in the partial sparse check matrix reach the preset quantity or not; outputting a part of sparse check matrix as a reconstruction result of the sparse check matrix under the condition that the check vectors in the part of sparse check matrix reach the preset quantity; and under the condition that the number of check vectors in the partial sparse check matrix does not reach the preset number, carrying out iterative decoding on the noisy received code stream according to the partial sparse check matrix to obtain an updated codeword matrix, re-executing the starting of at least one parallel computing task, determining a sampling sub-matrix corresponding to each computing task in the codeword matrix for each computing task, and searching sparse vectors orthogonal to the sampling sub-matrix in each computing task to obtain the partial check vector.
11. A computer readable storage medium having stored thereon a computer program, characterized in that the computer program when executed by a processor performs the steps of the method of any of the preceding claims 1-9.
12. An electronic device comprising a memory, a processor and one or more programs, wherein the one or more programs are stored in the memory and configured to perform the steps of the method of any of claims 1-9 by the processor.
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