CN1175590C - Eche eliminator for asymmetrical digital client loop - Google Patents
Eche eliminator for asymmetrical digital client loop Download PDFInfo
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- CN1175590C CN1175590C CNB011092572A CN01109257A CN1175590C CN 1175590 C CN1175590 C CN 1175590C CN B011092572 A CNB011092572 A CN B011092572A CN 01109257 A CN01109257 A CN 01109257A CN 1175590 C CN1175590 C CN 1175590C
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Abstract
The present invention relates to a high-efficiency echo eliminator for asymmetrical digital client loops, which mainly comprises a frequency domain updater, a remote signal estimator and a time domain eliminator, and a framework with the functions of time domain echo elimination and frequency domain echo channel estimation is established. The present invention is suitable for the design of an integrated circuit in super-large scale, and accords with the standard of the asymmetrical digital client loops.
Description
Technical field
The present invention relates to a kind of echo eliminator, particularly relate to the echo eliminator that the asymmetric digital client loop of a kind of confession is used.
Background technology
In recent years, (Asymmetric Digital SubscriberLine, ADSL) system is applied in the two-way wideband network asymmetric digital client loop gradually, as the framework of high speed data transfer communication.ADSL utilizes discrete multifrequency modulation, and (Discrete Multitone Modulation, DMT) technology on limited frequency range channel, are sent out the numerical data of peak data rate.Generally speaking, the ADSL system operates under singly to the twisted-pair feeder line loop.Because single impedance on network does not match to the twisted-pair feeder line loop, make and transmit data when passing through the node (bridge) of hybrid circuit (hybridcircuit) or transmission line, have echo (echo) and produce.
(Frequency-Division Multiplexed, FDM) technology are separated the two-way frequency range of full two-way transmission on the twisted-pair feeder line loop, use the reduction echo can to utilize the frequency division multichannel.Yet in many situations, ADSL Modem also can be used the transmitted in both directions of overlapping frequency, to improve delivery flow rate.That is be by the overall data transmission rate on the expansion increase channel of transmitting bandwidth.
Echo eliminator is necessary when using the transmitted in both directions of overlapping frequency, and can utilizes analog form or digital form to reduce echo.Figure one demonstrates the functional block diagram of conventional digital adaptability echo eliminator.This echo eliminator normally with the parallel placement of echo path (echo channel), and echo path generally comprises digital filter, digital to analog converter (DAC), transmit filter, hybrid circuit, receiving filter, and the digital filter of analog to digital converter (ADC) and receiving terminal.Echo eliminator can synthesize echo channel with adaptive way, and produces echo replica signal by this, and this echo replica signal can be fallen by subduction in received signal.
The adaptability echo eliminator also can transmit the part of receiver as other digital client loop (DSL) usually except being applied to the ADSL system, such as HDSL, and VDSL etc.General echo eliminator technology also can be applied in other the field, for example the cross-talk noise arrester.
Because echo-signal is to transmit the part of letting out ripple in the signal to feed back to near-end same district receiver, thereby can cause serious disturbance to received signal.For designing high efficiency ADSL Modem, need high efficiency adaptive digital echo eliminator, the echo that eliminates full two-way environment downward modulation modem disturbs.In addition, this echo eliminator can with other system in combination, cut apart modulation (FDM) pattern such as frequency domain, allow the system designer can the flexible optimizer system of designing.
Many ECT echo cancellation techniques have been proposed in the communal technique.For example, traditional echo eliminator uses the finite impulse response (FIR) with many acquisitions (tap) number (Finite Impulse Response, FIR) filter comes the artificial echo channel, and eliminates the echo on the time domain, as shown in Figure 1.If be applied in the ADSL system, these traditional echo eliminators need to upgrade the tap coefficient very apace usually, and its computation complexity is very high.The design that some other echo eliminators are arranged is the bilateral relation of utilizing between frequency domain and the time domain, realizes echo eliminating function in frequency domain.The echo eliminator of these frequency domain runnings has higher cost and complexity, because need the more fast fourier transform of counting (FFT) circuit or anti-fast fourier transform (IFFT) circuit.
J.M.Cioffi and J.Bingham delivered the article of title for " Data-Driven Multitone Echo Canceller " among the IEEE Transaction onCommunication in 1994, propose the conception of " data-driven echo eliminator ".This echo eliminator comprises to be set and frequency domain echo eliminator that update coefficients is used, and the time domain echo eliminator used of synthetic echo.This framework need be done frequent FFT/IFFT conversion operations between frequency domain and time domain, in addition, because the hypothesis of its spin-off effects is also improper for long echo channel.Minnie Ho, J.M.Cioffi and J.Bingham delivered the article of title for " Discrete Multitone Echo Cancellation " among the IEEE Transaction on Communication in 1996, propose another kind of echo eliminator.This echo eliminator also is the function that adopts frequency domain and the dual running of time domain, eliminates the echo in frequency domain and the time domain.The structure of this novelty can reduce adding in the ADSL echo eliminator (or other similar application) and take advantage of computation complexity in general typical environment.Yet the just viewpoint of handling in real time, and special structure with integrated circuit (ASIC) does not obtain real advantage, and especially when echo channel was long, its framework still needed considerable numerical operation.
Therefore, industry needs a kind of echo eliminator with dual frequency domain and time domain echo elimination framework, disturb with the echo that eliminates among the ADSL, make things convenient for again simultaneously in super large integrated circuit (VLSI) design and realize, to solve the problem in the above-mentioned located by prior art, and meet ITU G.992.1 with T1, the standard of 413 couples of ADSL.
Summary of the invention
Main purpose of the present invention is to provide a kind of echo eliminator with frequency domain and the dual running of time domain, the elimination of echo is handled in the echo channel estimation that can carry out frequency domain simultaneously and the time domain, and its whole framework and structural unit are fit to design and the manufacturing of present VLSI, can eliminate the echo effect among the ADSL effectively.
Another object of the present invention is to provide a kind of echo eliminator, main system comprises a frequency domain renovator, a time domain arrester, and remote signal estimation device.Its frequency domain renovator utilizes adaptability lowest mean square (Least Mean Square, LMS) algorithm, the estimation coefficient of generation frequency domain echo channel.And convert this frequency coefficient to time domain echo channel coefficient via anti-fast fourier transform (IFFT).The time domain arrester carries out linearity (convolution) calculation process of circling round to transmitting signal and the time domain echo channel that estimates, synthetic echo replica signal, and it is deducted from received signal.And remote signal estimation device is the frequency domain impulse response that is used for the producing destination channel equivalent impulse response of time-domain equalizer (that is among loop channel (Loop channel) and the ADSL), and the estimating signal of synthetic simultaneously remote signal, deduction falls this estimating signal from the received signal of deducting echo replica signal again, and then produces the error items conditioning signal.
Of the present invention time a purpose is to provide a kind of echo eliminator with training mode and operator scheme, and wherein training mode and operator scheme all are that special design is used for the binding setting step of institute's standard in the ADSL standard.In training mode, begin to carry out the estimation of frequency domain channel, utilize the picture frame signal of one-period property, for example, periodically false sign indicating number (PRU:pseudo-randomupstream code) signal of uploading is at random trained and the echo channel coefficient in the estimation frequency territory adaptively, and can selectively be suspended the time domain operation simultaneously, because in the ADSL standard, there is not remote signal to transmit under this training mode.After finishing training and operation, can produce time domain echo channel tap coefficient, then begin the synthetic processing and the elimination of time domain echo replica signal via IFFT.In operator scheme, echo eliminator can be followed the mode of a picture frame signal constantly with a picture frame signal, carry out the synthetic processing and the elimination of time domain echo-signal, but only when receiving synchronous picture frame (Synchronization-frame) signal, just can carry out the adaptability of frequency domain echo channel and upgrade.It should be noted that before the error items conditioning signal is used to upgrade the coefficient of echo channel estimated value, can from deduct the received signal of duplicating echo, deduct the remote signal estimated value earlier.
Description of drawings
Fig. 1 is a function block schematic diagram of commonly using echo eliminator;
Fig. 2 is the function block schematic diagram of echo eliminator of the present invention;
Fig. 3 is the function block schematic diagram of frequency domain renovator of the present invention;
Fig. 4 is remote signal estimation device function block schematic diagram of the present invention;
Fig. 5 is the function block schematic diagram of time domain arrester of the present invention;
Fig. 6 is the integrated operation flow chart of echo eliminator of the present invention;
Fig. 7 is the training mode flow chart of echo eliminator of the present invention;
Fig. 8 is the operator scheme flow chart of echo eliminator of the present invention.
Embodiment
Now consult relevant drawings and further describe content of the present invention.
Consult Fig. 2, the present invention's echo eliminator mainly is to comprise a frequency domain renovator 10, one time domain arresters 20, and remote signal estimation device 30, wherein have switch a and b respectively in time domain arrester 20 and the frequency domain renovator 10, be used for switching training mode and operator scheme.By transmitting the frequency domain signal X (f) that discrete multifrequency modulator 40 is exported, respectively among input frequency domain renovator 10 and the IFFT (square 50a).IFFT (square 50a) receives X (f), carrying out anti-fast fourier transform handles, and will handle back signal input and add device (Cyclic Prefix) 54 before circulating, produce time-domain signal x (t) again and add device 54 before circulating, this time-domain signal x (t) is input to again in time domain arrester 20 and the echo channel 56.The output signal of echo channel 56 sends time domain channel equalizer 58 to, and the signal of crossing via time domain channel equalizer 58 equilibrium treatment is passed to and removed CP device 62, and the time-domain signal s (t) after removing CP device 62 and will handling is sent to time domain arrester 20.The time-domain signal s (t) that adds the time-domain signal x (t) of device 54 and remove CP device 62 before 20 receptions of time domain arrester are circulating, but also receive the time-domain signal w (t) that imports by IFFT (square 50b), wherein time-domain signal w (t) is the frequency-region signal W (f) that IFFT (square 50b) receives frequency domain renovator 10, handles resulting time-domain signal through anti-fast fourier transform again.W ' after time domain arrester 20 will be handled (t) with d (t) signal feed-in FFT (square 52a) and FFT (square 52b) in, wherein FFT (square 52a) with the w ' of input (t) signal carry out fast fourier transform and handle, again with (f) input frequency domain renovator 10 of gained frequency-region signal W ', and FFT (square 52b) carries out the fast fourier transform processing with d (t) signal of importing, with gained frequency-region signal D (f) input frequency domain renovator 10 and remote signal estimation device 30, be input to frequency-domain equalizer 64 simultaneously again.The W ' that frequency domain renovator 10 receives FFT (square 52a) and FFT (square 52b) output (f) with D (f) signal, and transmit the frequency domain signal X (f) that discrete multifrequency modulator 40 is exported, also have the frequency-region signal E ' that exported by remote signal estimation device 30 (f), produce frequency-region signal W (f), offer IFFT (square 50b) and use.The frequency domain renovator utilizes X (f), D (f), E ' (f) and W ' (f) finish echo channel estimation; The time domain arrester utilizes x (t), and w (t) generation echo-signal is duplicated and it is deducted from s (t) to produce d (t); Remote signal estimation device 30 then utilizes frequency-region signal D (f) to carry out the destination channel estimation process, and obtains frequency-region signal E ' (f).
Consult Fig. 3, frequency domain renovator 10 comprises reproducer 12 and LMS adaptability square 14, and wherein frequency domain signal X (f) is handled through reproducer 12, produces the frequency domain signal X of k double-length degree
k(f), export to LMS adaptability square 14 again.LMS adaptability square 14 receives the frequency domain signal X of reproducer 12
k(f), the frequency-region signal W ' of FFT (square 52b) (f) and utilize switch b to be frequency-region signal E ' that switching imports (f) or behind the frequency-region signal E (f), mat LMS algorithm, carry out adaptability frequency domain echo channel coefficients and upgrade processing, so that produce frequency coefficient signal W (f), offer an IFFT (square 50b) and a multiplier, and this multiplier is multiplied by frequency-region signal W (f) frequency domain signal X of k double-length degree
k(f), obtain frequency-region signal Y (f), and frequency-region signal E (f) does addition processing back by an adder to this frequency-region signal Y (f) and frequency-region signal D (f) to be produced.
When switch b switched to 2, frequency domain renovator 10 can be carried out the LMS1 algorithm process, is expressed as follows:
Y(f)＝W(f)×X(f)，
E(f)＝D(f)-Y(f)，
W(f)＝W(f)+μ
1×E(f)×X
k *(f)；
(newly) (former)
When switch b switched to 1, frequency domain renovator 10 can be carried out the LMS2 algorithm process, is expressed as follows:
W(f)＝W’(f)+μ
1×E’(f)×X
k *(f)，
μ wherein
1Be the step size factor (step-size factor).
Consult Fig. 4, remote signal estimation device 30 comprises a LMS adaptability square 32 and a PRD generator 34.PRD generator 34 produces the defined false sign indicating number (pseudo-randomdownstream code) that passes down at random among the ADSL, offer LMS adaptability square 32, allow LMS adaptability square 32 when receiving frequency-region signal D (f), utilize following LMS3 algorithm to handle, carry out adaptability frequency domain destination channel and upgrade
H(f)＝H(f)+μ
2×E’(f)×P
*(f)，
(newly) (former)
μ wherein
2It is the step size factor.
Consult Fig. 5, time domain arrester 20 comprises in one zero insertion processor 22, one linearities square 24, one puncturer 26 of circling round, and a zero padding processor 28, and wherein x (t) is a N length real number vector, and w
L(t) be L length real number vector, all the other signals are all K*N length real number vector.Interior zero insertion processor 22 is filled k-1 " 0 " between the two adjacent samples signals of x (t), produce x
k(t) signal.L sampled signal before among the puncturer 26 intercepting w (t) forms w
L(t) signal, wherein L is the echo channel length of estimation.Zero padding processor 28 is with w
L(t) signal is filled (K*N-L) individual " 0 ", and forming length is the w ' of K*N
L(t) signal.The linearity 24 couples of x of square that circle round
k(t) signal and w
L(t) signal carries out the linearity processing of circling round, and obtains
y(t)＝x
k(t)*w
L(t)
＝∑x
k(n-t)×w
L(t)。
Comprehensive, the present invention utilizes frequency domain renovator 10, time domain arrester 20 and remote signal estimation device 30, construction goes out the echo synthesis mechanism of emulation, produce echo estimation signal comparatively accurately, and then the echo-signal of getting rid of on the actual transmission channel to be derived, improve the transfer of data quality of ADSL.
Echo eliminator of the present invention has two kinds of operator schemes, comprises training mode and operator scheme.Wherein training mode and operator scheme all are that special design is set step usefulness for the binding of institute's standard in the ADSL standard.
Consult Fig. 6, the integrated operation flow chart of echo eliminator of the present invention shows, at first carry out step 101, and starting frequency domain echo channel estimation process produces W (f) initial value, and starting frequency domain destination channel estimation process produces H (f) initial value.Whether subsequent step 102, training of judgement state begin (in the ADSL standard, being defined as the R-ECT state), if not, then get back to step 101, if, then carry out step 104, enter training mode.After training mode is finished, enter step 106, judge other transitional state for example R-REVERB2 whether finish, if not, then rest on step 106, if then carry out step 107, to w
L(t) and x
k(t) processing of circling round produces y (t), and deducts echo replica signal, and W ' (f) and w
L(t) remain unchanged.Then, enter step 108, whether (Show time) begins during judge showing, is meant the time after the beginning transfer of data during wherein showing in the ADSL standard, if not, then get back to step 107, if then enter step 109, implement either operational mode.
Consult Fig. 7, further demonstrate the training mode flow process of echo eliminator of the present invention among Fig. 2, at first step 701 switches to the 1st end points with first switch (a), and (b) switches to the 2nd end points with second switch, the subsequent step 702 that enters, modulator transmitted periodicity PRU signal and carried out W (f) * X this moment
k(f), produce the frequency domain echo estimating signal, Y (f).Enter step 703, relatively the difference of Y (f) and D (f) is carried out first lowest mean square (LMS1) operation again, upgrades the echo channel estimating signal, W (f).Enter step 704, judge whether the R-ECT state finishes, if not, then get back to step 702, if, then carry out step 705, stop W (f) is upgraded, and convert w (t) to via IFFT (square 50b).Then enter step 706, w (t) is deleted into w
L(t), mend " 0 " again and form w ' (t), and (t) become W ' (f) via FFT (square 52a) conversion w '.Enter step 707, judge whether the R-REVERB2 state begins, if not, then enter step 707a, keep W ' (f) and w
L(t) constant, if then enter step 708, to w
L(t) and x
k(t) processing of circling round produces time domain echo replica signal y (t), enters step 709 again.In step 709, received time-domain signal s (t) is cut time domain echo replica signal y (t), enter step 710.In step 710, (a) switches to the 2nd end points with first switch, carries out H (f) * P (f), produces the C (f) of remote synchronization picture frame estimating signal.Then enter step 711, relatively the difference between C (f) and the D (f) is carried out the LMS3 algorithm operating, upgrades H (f), enters step 712.In step 712, judge whether the R-REVERB2 state finishes, if not, then get back to step 708, if, then carry out step 713, stop training mode, keep W ' (f), w
L(t) constant with H (f), and lasting execution in step 708 and step 709 are up to operator scheme.Therefore, whole flow process reaches the purpose of tap coefficient in the frequency of training territory, and finishes whole training mode operation.
Consult Fig. 8, further demonstrate the operator scheme flow process of echo eliminator of the present invention among Fig. 2, at first execution in step 801, the operation during beginning to show.Then enter step 802, second switch is switched to first end points, carry out step 803 again, w
L(t) and x
k(t) processing of circling round produces time domain echo replica signal y (t), enters step 804.In step 804, received time-domain signal s (t) is cut time domain echo replica signal y (t), enter step 805.In step 805, judge whether to receive synchronous picture frame signal, if not, get back to step 803, if then enter step 806.In step 806, carry out H (f) * P (f), produce remote synchronization picture frame estimating signal, enter step 807, from D (f), deduct C (f), produce E ' (f).Then enter step 808, carry out the LMS3 algorithm operating, upgrade frequency domain destination channel estimating signal H (f), enter step 809.In step 809, carry out the LMS2 algorithm operating, upgrade W (f), enter step 810.In step 810, via IFFT (square 50b), convert W (f) to w (t), w (t) is deleted into w
L(t), mend " 0 " again and form w ' (t), and (t) become W ' (f), getting back to step 803, repeat above operation in regular turn via FFT (square 52a) conversion w '.
Saying of summary in training mode, begins to carry out the estimation of frequency domain channel, utilize periodic PRU picture frame signal, come the echo channel tap coefficient in the frequency of training territory, can optionally suspend the time domain operation simultaneously, because in the ADSL standard, there is not this moment remote signal to transmit.After finishing frequency domain estimation, can produce time domain echo channel tap coefficient via IFFT, the synthetic processing that then begins the time domain echo replica signal is handled with eliminating, and utilizes PRD picture frame signal to train destination channel tap coefficient in the frequency domain.In operator scheme, echo eliminator continues to follow with a picture frame signal mode of a picture frame signal, the synthetic processing of carrying out the time domain echo-signal is handled with eliminating, but only when receiving synchronous picture frame signal, just can carry out the adjusting again and the renewal of frequency domain echo channel tap coefficient.At this moment, before the error items conditioning signal is used to upgrade the coefficient of echo channel estimated value, can from eliminate the received signal that echo duplicates, fall the remote signal estimated value by deduction.
In sum, when knowing that this programme creation has practicality and novelty, and this programme is not indicated in any publication, when meeting patent statute.
Only the above person only is preferred embodiment of the present invention, when can not with the scope of qualification the invention process.Promptly the equivalence done of the present patent application claim changes and modifies generally, all should belong in the scope that patent of the present invention contains.
Claims (9)
1. an echo eliminator carries out the elimination of echo-signal and handles for asymmetric digital client loop, it is characterized in that comprising:
One frequency domain renovator utilizes modulability lowest mean square (LMS) algorithm, produces frequency domain echo channel estimating signal;
One remote signal estimation device, produce the impulse response of destination channel, that is produce the equivalent impulse response of a loop channel and a time domain equalizer, and synthetic simultaneously remote signal estimating signal, deduction falls this remote signal estimating signal from deduct the received signal that echo duplicates again, and then produces the error items conditioning signal;
One time domain arrester carries out linearity processings of circling round to transmitting with the time domain echo channel estimating signal that estimates, and synthesizes echo replica signal again;
The first anti-fast Fourier transformer, convert input frequency domain signal X (f) to time-domain signal x ' (t), offer one and add device before circulating, and this adds device before circulating and (t) converts time-domain signal x ' to time-domain signal x (t), offer an echo channel and time domain arrester, and the output of this echo channel sends a time domain channel equalizer again to, the output of this time domain channel equalizer sends one again to and removes the CP device, and the output time-domain signal s (t) that then this is removed the CP device sends the time domain arrester again to;
The second anti-fast Fourier transformer, the frequency-region signal W (f) that the frequency domain renovator is exported converts time-domain signal w (t) to, offers the time domain arrester;
First fast Fourier transformer (t) converts the time-domain signal w ' of time domain arrester to frequency-region signal W ' (f), offers the frequency domain renovator; And
Second fast Fourier transformer converts the time-domain signal d (t) of time domain arrester to frequency-region signal D (f), offers the frequency domain renovator;
Wherein have first switch and second switch respectively in time domain arrester and the frequency domain renovator, be used for time domain arrester and frequency domain renovator are switched to training mode and operator scheme, set step for the binding of institute's standard in the asymmetric digital client loop standard and use; When training mode, begin to carry out the estimation of frequency domain channel, utilize periodic false sign indicating number (PRU:pseudo-random upstream code) picture frame signal of uploading at random, come acquisition (tap) coefficient in the frequency of training territory, can optionally suspend simultaneously the time domain operation, because in asymmetric digital client loop standard, be not have remote signal under the physical training condition; After finishing training and operation, can produce time domain tap coefficient via the second anti-fast Fourier transformer, the synthetic processing that then begins the time domain echo replica signal is handled with elimination; In operator scheme, echo eliminator continues the mode with a picture frame signal of a picture frame signal, carrying out the synthetic processing of time domain echo-signal handles with elimination, but only when receiving synchronous picture frame signal, just can carry out the adjusting again and the renewal of frequency domain echo channel, before the error items conditioning signal is used to upgrade the coefficient of echo channel estimated value, can from deduct the received signal that echo duplicates, fall the remote signal estimated value by deduction.
2. as the echo eliminator of claim 1, it is characterized in that this frequency domain renovator further comprises a reproducer and a lowest mean square adapt square, this reproducer is handled frequency domain signal X (f), produces the frequency-region signal x of k double-length degree
k(f), export to lowest mean square modulability square again, and lowest mean square modulability square receives the frequency domain signal X of reproducer
k(f), the frequency-region signal W ' of second fast Fourier transformer (f) and utilize switch b to be frequency-region signal E ' that switching imports (f) or behind the frequency-region signal E (f), the mat least mean square algorithm, carrying out the renewal of adaptability frequency domain echo channel tap coefficient handles, so that produce frequency-region signal W (f), offer first fast Fourier transformer and a multiplier usefulness, and this multiplier can be multiplied by frequency-region signal W (f) frequency domain signal X of k double-length degree
k(f), obtain frequency-region signal Y (f), frequency-region signal E (f) does addition processing back by an adder to this frequency-region signal Y (f) and frequency-region signal D (f) to be produced.
3. as the echo eliminator of claim 1, it is characterized in that this remote signal estimation device further comprises a lowest mean square adapt square and a PRD generator, wherein this PRD generator produces the defined false sign indicating number that passes down at random in the asymmetric digital client loop, offering this lowest mean square modulability square uses, allow this lowest mean square modulability square when receiving frequency-region signal D (f), utilize the 3rd least mean square algorithm to handle, upgrade to carry out modulability frequency domain destination channel, the 3rd least mean square algorithm is expressed as follows: H (f)=H (f)+μ
2* E ' (f) * P* (f),
(newly) (former)
μ wherein
2It is the step size factor.
4. as the echo eliminator of claim 1, it is characterized in that this time domain arrester further comprises zero insertion processor in, the one linearity square that circles round, one puncturer, an and zero padding processor, wherein interior zero insertion processor is filled k-1 " 0 " between the two adjacent samples signals in the x (t) of N length real number vector, produce x
k(t) signal, preceding L sampled signal forms w among the puncturer intercepting w (t)
L(t) signal, wherein L is estimation echo channel length, the zero padding processor is with w
L(t) signal is filled (K*N-L) individual " 0 ", and forming length is the w ' of K*N
L(t) signal, linearity circle round square to x
k(t) signal and w
L(t) signal carries out the linearity processing of circling round.
5. as the echo eliminator of claim 1, it is characterized in that this frequency domain renovator when second switch switches to second end points, can carry out first least mean square algorithm,
Be expressed as follows: Y (f)=W (f) * X (f),
E(f)＝D(f)-Y(f)，
W(f)＝W(f)+μ
1×E(f)×X
k*(f)。
(newly) (former)
6. as the echo eliminator of claim 1, it is characterized in that this frequency domain renovator when second switch switches to first end points, the frequency domain renovator can be carried out second least mean square algorithm and handle, and is expressed as follows:
W(f)＝W’(f)+μ
1×E’(f)×X
k*(f)，
Wherein μ 1 is the step size factor.
7. as the echo eliminator of claim 1, it is characterized in that the procedural representation of time domain arrester and frequency domain renovator execution training mode and operator scheme is as follows:
At first carry out step 101, starting frequency domain echo channel estimation process produces W (f) initial value, and starting frequency domain destination channel estimation process produces H (f) initial value;
Subsequent step 102 judges whether the R-ECT state begins, if not, then get back to step 101, if, then carry out step 104, enter training mode;
After training mode is finished, enter step 106, judge whether the R-REVERB2 state finishes, if not, then get back to step 104, if then carry out step 107, to w
L(t) and x
k(t) processing of circling round produces y (t), and deducts echo replica signal, and W ' (f) and w
L(t) remain unchanged; And
Then enter step 108, whether judgement begins during showing, if not, then get back to step 107, if then enter step 109, implement either operational mode.
8. as the echo eliminator of claim 7, it is characterized in that the training mode of time domain arrester and frequency domain renovator further is expressed as follows:
At first execution in step 701, and first switch is switched to first end points, and second switch is switched to second end points, and the subsequent step 702 that enters is carried out W (f) * X
k(f), produce the frequency domain echo estimating signal, Y (f);
Enter step 703, relatively the difference of Y (f) and D (f) is carried out the operation of first lowest mean square again, upgrades the echo channel estimating signal, W (f);
Enter step 704, judge whether the R-ECT state finishes, if not, then get back to step 702, if, then carry out step 705, W (f) is upgraded, and convert w (t) to via IFFT;
Then enter step 706, w (t) is deleted into w
L(t), mend " 0 " again and form w ' (t), and (t) become W ' (f) via FFT conversion w '.Enter step 707, judge whether the R-REVERB2 state begins, if not, then enter step 707a, keep W ' (f) and w
L(t) constant, if then enter step 708, to w
L(t) and x
k(t) processing of circling round produces time domain echo replica signal y (t), enters step 709 again;
In step 709, received time-domain signal s (t) is cut time domain echo replica signal y (t), enter step 710;
In step 710, first switch is switched to second end points, carry out H (f) * P (f), produce the C (f) of remote synchronization picture frame estimating signal;
Then enter step 711, relatively the difference between C (f) and the D (f) is carried out the operation of the 3rd least mean square algorithm, upgrades H (f), enters step 712; And
In step 712, judge whether the R-REVERB2 state finishes, if not, then get back to step 708, if, then carry out step 713, stop training mode, keep W ' (f), w
L(t) constant with H (f), and lasting execution in step 708 and 709 is duplicated to eliminate echo;
At last, reach the purpose of tap coefficient in the frequency of training territory, and finish whole training mode operation.
9. as the echo eliminator of claim 7, it is characterized in that the operator scheme of time domain arrester and frequency domain renovator further is expressed as follows:
At first execution in step 801, begin to show the operation of time;
Then enter step 802, second switch is switched to first end points, carry out step 803 again, w
L(t) and x
k(t) processing of circling round produces time domain echo replica signal y (t), enters step 804:
In step 804, received time-domain signal s (t) is cut time domain echo replica signal y (t), enter step 805;
In step 805, judge whether to receive synchronous picture frame signal, if not, get back to step 803, if then enter step 806;
In step 806, carry out H (f) * P (f), produce remote synchronization picture frame estimating signal, enter step 807, from D (f), deduct C (f), produce E ' (f);
Then enter step 808, carry out the operation of the 3rd least mean square algorithm, upgrade frequency domain destination channel estimating signal H (f), enter step 809;
In step 809, carry out the operation of second least mean square algorithm, upgrade W (f), enter step 810;
In step 810, via IFFT, convert W (f) to w (t), w (t) is deleted into w
L(t), mend " 0 " again and form w ' (t), and (t) become W ' (f), getting back to step 803, repeat above operation in regular turn via FFT conversion w '.
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| CNB011092572A CN1175590C (en) | 2001-02-28 | 2001-02-28 | Eche eliminator for asymmetrical digital client loop |
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| CNB011092572A CN1175590C (en) | 2001-02-28 | 2001-02-28 | Eche eliminator for asymmetrical digital client loop |
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| TWI819778B (en) * | 2022-09-06 | 2023-10-21 | 瑞昱半導體股份有限公司 | Communication system, electronic device, and echo noise cancelling ability determination method |
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