CN117543997A - Three-level NPC converter with neutral point potential balance function and modulation method thereof - Google Patents

Three-level NPC converter with neutral point potential balance function and modulation method thereof Download PDF

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Publication number
CN117543997A
CN117543997A CN202311496563.XA CN202311496563A CN117543997A CN 117543997 A CN117543997 A CN 117543997A CN 202311496563 A CN202311496563 A CN 202311496563A CN 117543997 A CN117543997 A CN 117543997A
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China
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bridge arm
phase
tube device
following formula
inner tube
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Inventor
裴金鑫
夏桂森
张�林
徐键
熊伟
高志文
刘洋
张华云
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Chongqing Kekai Qianwei Electric Co ltd
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Chongqing Kekai Qianwei Electric Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4833—Capacitor voltage balancing
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53873—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with digital control

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a three-level NPC converter with a neutral point potential balance function and a modulation method thereof. Meanwhile, the method can be used for directly calculating the duty ratio of each device of the three-level NPC, is convenient for programming realization, and has good technical implementation application prospect.

Description

Three-level NPC converter with neutral point potential balance function and modulation method thereof
Technical Field
The invention relates to the field of power electronics, in particular to a three-level NPC converter with a neutral point potential balance function and a modulation method thereof.
Background
PWM rectifiers and inverters have been widely used in new energy generation, electrical energy conversion, and other industrial settings. With the continuous rise of voltage class and power class, the advantages of the three-level converter in a high-voltage high-power scene are more obvious, and particularly, the neutral point clamped (Neutral Point Clamped, NPC) three-level converter is most widely applied.
However, the dc bus of the three-level NPC converter topology is formed by connecting a pair of split capacitors in series, and the midpoint potential of the capacitors has ac frequency-doubling fluctuation or dc offset, so that the waveform quality of the output voltage is affected, and excessive midpoint potential offset and fluctuation may even cause overvoltage failure of the power switch tube and overvoltage damage of the dc capacitors, thereby seriously threatening the stable operation capability of the converter.
In order to suppress the problem of neutral point potential imbalance, it is proposed to add an additional hardware circuit to suppress neutral point potential imbalance by extracting/compensating neutral point current, but this method greatly increases the hardware cost of the system; improved modulation algorithms such as modulation methods using redundant small vectors, zero sequence component injection methods, etc. have also been proposed, but these improved modulation algorithms have a more significant control effect only at high power factors and low modulation ratios; in addition, the industry also provides a new modulation strategy such as virtual space vector modulation, and the like, and the strategy can lead the average midpoint current to be zero in principle so as to realize the continuous balance of midpoint potential, but the method has large calculation amount, and a form of directly selecting a switching state and not directly generating a duty ratio is generally adopted, so that the programming implementation difficulty is high, and the midpoint potential still has unbalance due to non-ideal factors such as inconsistent device parameters in actual engineering.
Disclosure of Invention
Aiming at the defects existing in the prior art, the invention aims to provide a three-level NPC converter with a neutral point potential balance function and a modulation method thereof.
In order to solve the technical problems, the invention adopts the following technical scheme:
a three-level NPC converter with a neutral point potential balance function comprises a direct current side bus capacitor, a three-phase bridge type conversion circuit and a three-phase LC circuit; the DC side bus capacitor consists of two split capacitors C 1 And C 2 A positive electrode and a negative electrode which are connected in series and connected to the DC side bus; the capacitor ends of the three-phase LC circuit are connected in parallel; the three-phase bridge type conversion circuit comprises an A-phase bridge arm circuit, a B-phase bridge arm circuit and a C-phase bridge arm circuit which are connected in parallel at the two ends of the positive electrode and the negative electrode of the direct current side bus; the A-phase bridge arm circuit consists of an A-phase upper bridge arm and an A-phase lower bridge arm which are connected in series, the B-phase bridge arm circuit consists of a B-phase upper bridge arm and a B-phase lower bridge arm which are connected in series, and the C-phase bridge arm circuit consists of a C-phase upper bridge arm and a C-phase lower bridge arm which are connected in series; each upper bridge arm or lower bridge arm is formed by connecting a bridge arm outer pipe device and a bridge arm inner pipe device in series, the bridge arm outer pipe device is positioned on the outer side of the bridge arm inner pipe device, and each bridge arm outer pipe device or each bridge arm inner pipe device is formed by connecting a full control switch device and a half control switch device in anti-parallel; the outer side ends of the bridge arm outer pipe devices of the in-phase upper bridge arm and the lower bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus; the inner side ends of the bridge arm inner tube devices of the upper bridge arm and the lower bridge arm in the same phase are connected with one end of an inductor in a corresponding phase LC circuit, and the other end of the inductor in a A, B, C phase LC circuit is used for being connected with A, B, C phases of an alternating current power supply or a load; wherein:
in the A bridge arm circuit, the A phase upper bridge arm is outsideTube device S a1 Outer tube device S of outer side end of lower bridge arm of phase A a4 The outer side ends of the bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus, and the inner tube device S of the bridge arm of the A-phase upper bridge arm a2 And an A-phase lower bridge arm inner tube device S a3 The inner side ends of the lower bridge arm inner tube devices S are connected with one end of an inductor in the phase A LC circuit a3 From the outer side end of (C) to the inner tube device S of the A-phase upper bridge arm a2 A first unidirectional branch formed by connecting two diodes in series is also connected in parallel between the outer ends of the two diodes;
in the B-phase bridge arm circuit, a B-phase upper bridge arm outer pipe device S b1 Outer side end of (B) phase lower bridge arm outer tube device S b4 The outer side ends of the bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus, and the inner tube device S of the bridge arm of the B-phase upper bridge arm a2 And B-phase lower bridge arm inner tube device S b3 The inner side ends of the lower bridge arm inner tube devices S are connected with one end of an inductor in the B-phase LC circuit b3 From the outer side end of (C) to the inner tube device S of the B-phase upper bridge arm b2 A second unidirectional branch formed by connecting two diodes in series is also connected in parallel between the outer ends of the two diodes;
in the C-phase bridge arm circuit, a C-phase upper bridge arm outer pipe device S c1 Outer tube device S of C-phase lower bridge arm c4 The outer side ends of the C-phase upper bridge arm inner tube device S are respectively connected with the positive electrode and the negative electrode of the direct current side bus c2 And C-phase lower bridge arm inner tube device S c3 The inner side ends of the C phase LC circuit are connected with one end of an inductor in the C phase LC circuit, and the inner tube device S of the C phase lower bridge arm c3 Is from the outer side end of the bridge arm to the C-phase upper bridge arm inner tube device S c2 A third unidirectional branch formed by connecting two diodes in series is also connected in parallel between the outer ends of the two diodes;
the middle sections of the two diodes of the first unidirectional branch, the second unidirectional branch and the third unidirectional branch are also connected in parallel to a direct-current side bus capacitor by two split capacitors C 1 And C 2 Is provided.
Correspondingly, the invention also provides a modulation method of the three-level NPC converter with the neutral point potential balance function, which comprises the following steps:
a1 Acquiring an original modulated wave signal according to a control target, and transforming the original modulated wave signal under constant amplitude coordinate transformationThe modulated wave signal being converted into a modulated wave signal in the stationary two-phase alpha-beta coordinate system, i.e. u mα 、u mβ ；
A2 Collecting total DC bus voltage signal U dc Positive DC bus voltage signal U dcp Three-level NPC outputs three-phase current signal i abc ；
A3 Using the total dc bus voltage signal U) dc For modulated wave signal u mα 、u mβ Normalization processing is carried out to obtain a normalized modulation signal u α 、u β ；
A4 Calculating normalized modulation signal u α And u is equal to β Is a composite voltage vector U of (a) m Amplitude U of (2) and angle theta thereof in space m ；
A5 Dividing a large sector at each 60 DEG and respectively sequencing, according to the angle theta obtained in the step A4) m Determining a large sector sequence number N of the large sector where the current is located, and calculating the synthesized voltage vector U m A relative spatial angle θ within the corresponding large sector;
a6 According to the relative spatial angle θ obtained in step A5) and the resultant voltage vector U m Is used for calculating the boundary condition L of the small sector 1 、L 2 And L 3 ；
A7 L) obtained according to step A6) 1 、L 2 And L 3 Judging a small sector sequence number n where the relative space angle theta is located;
a8 According to the small sector number n obtained in step A8) and the resultant voltage vector U obtained in step A4) m The magnitude U of (2) calculates the comprehensive vector acting time T conforming to the volt-second balance principle 1 、T 2 And T 3 ；
A9 Outputting a three-phase current signal i according to the three-level NPC collected in step A2) abc And the large sector number N obtained in the step A5), judging the value of the balance factor J;
a10 Based on the value of balance factor J obtained in step A9), T calculated in step A8) 1 And U acquired in step A2) dc And U dcp Calculating the forward bias of the small vectorShift action time T 1P And a negative offset time T of the small vector 1N ；
A11 T) obtained according to step A10) 1P And T 1N T calculated in step A8) 1 、T 2 And T 3 Calculating the acting time Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 of 5 basic vectors participating in modulation in a half triangular carrier period according to the large sector sequence number N obtained in the step A5) and the small sector sequence number N obtained in the step A7);
a12 Calculating the acting time t of 5 basic vectors participating in modulation in one triangular carrier period according to Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 obtained in the step A11) 1 、t 2 、t 3 、t 4 And t 5 ；
A13 T) obtained according to step A12) 1 、t 2 、t 3 、t 4 And t 5 Calculating duty ratio modulation values duty1, duty2, duty3, duty4, duty5 and duty6 according to the large sector number N obtained in the step A5) and the small sector number N obtained in the step A7); wherein the duty ratio modulation values duty1 and duty2 respectively correspond to the outer tube device S of the A-phase upper bridge arm a1 And an A-phase upper bridge arm inner tube device S a2 The duty ratio modulation value duty3 and duty4 respectively correspond to the B-phase upper bridge arm outer pipe device S b1 And B-phase upper bridge arm inner tube device S b2 The duty ratio modulation value duty5 and duty6 respectively correspond to the C-phase upper bridge arm outer pipe device S c1 And C-phase upper bridge arm inner tube device S c2 ；
A14 Taking the duty1 obtained in the step A13) as an outer tube device S of an A-phase upper bridge arm a1 The duty ratio modulation value of (2) and the inner tube device S of the A-phase lower bridge arm a3 The switch state is set to be S a1 An opposite switch state; taking the duty2 obtained in the step A13) as an inner tube device S of an upper bridge arm of the A phase a2 The duty ratio modulation value of (2) is simultaneously the outer tube device S of the A-phase lower bridge arm a4 The switch state is set to be S a2 An opposite switch state;
taking the duty3 obtained in the step A13) as a B-phase upper bridge arm outer tube device S b1 The duty ratio modulation value of (2) and the inner tube device S of the B-phase lower bridge arm b3 Switch state settingAnd S is formed b1 An opposite switch state; taking the duty4 obtained in the step A13) as an inner tube device S of a B-phase upper bridge arm b2 While B phase lower bridge arm outer tube device S b4 The switch state is set to be S b2 An opposite switch state;
taking the duty5 obtained in the step A13) as a C-phase upper bridge arm outer tube device S c1 Duty cycle modulation value of (2) while C phase lower bridge arm inner tube device S c3 The switch state is set to be S c1 An opposite switch state; taking the duty6 obtained in the step A13) as a C-phase upper bridge arm inner tube device S c2 While the C phase lower bridge arm outer tube device S c4 The switch state is set to be S c2 And the opposite switch state.
In the modulation method of the three-level NPC converter with the neutral-point potential balancing function, in the step A3), preferably, the normalized modulation signal u α 、u β The method comprises the following steps:
in the step A4), the voltage vector U is synthesized m Amplitude U of (2) and angle theta thereof in space m The method comprises the following steps:
in the step A5), a synthetic voltage vector U is calculated m The specific way of the relative spatial angle θ in the corresponding large sector is:
in the modulation method of the three-level NPC converter with the neutral point potential balancing function, in the step A6), a small sector boundary condition L is preferably set 1 、L 2 And L 3 The calculation is performed as follows:
in the modulation method of the three-level NPC converter with the neutral point potential balancing function, as a preferred scheme, the step A7) specifically includes:
a7.1 If the following formula is satisfied, n=1;
a7.2 If the following formula is satisfied, n=2;
a7.3 If the following formula is satisfied, n=3;
a7.4 If the following formula is satisfied, n=4;
a7.5 If the following formula is satisfied, n=5;
in the modulation method of the three-level NPC converter with the neutral point potential balancing function, as a preferred scheme, the step A8) specifically includes:
a8.1 If n=1, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.2 If n=2, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.3 If n=3, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.4 If n=4, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.5 If n=5, calculate T according to the following formula 1 、T 2 And T 3 ；
In the modulation method of the three-level NPC converter with the neutral point potential balancing function, as a preferable scheme, the step A9) specifically includes:
a9.1 If n=1, and i a 0, j=1; if n=1, and i a <0, j= -1;
a9.2 If n=2, and i c Not less than 0, J= -1; if n=2, and i c <0, then j=1;
a9.3 If n=3, and i b 0, j=1; if n=3, and i b <0, j= -1;
a9.4 If n=4, and i a Not less than 0, J= -1; if n=4, and i a <0, then j=1；
A9.5 If n=5, and i c 0, j=1; if n=5, and i c <0, j= -1;
a9.3 If n=6, and i b Not less than 0, J= -1; if n=6, and i b <0, then j=1;
in the modulation method of the three-level NPC converter with the neutral point potential balance function, preferably, in the step a 10), the positive offset acting time T of the small vector is calculated according to the following formula 1P And a negative offset time T of the small vector 1N ：
Wherein k is the proportional gain coefficient of the midpoint potential difference, V diff Is the voltage difference between the upper and lower split capacitors.
In the modulation method of the three-level NPC converter with the neutral point potential balancing function, as a preferable scheme, the step a 11) specifically includes:
a11.1 If n=1, or n=3, or n=5; and n=1, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.2 If n=1, or n=3, or n=5; and n=2, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.3 If n=1, or n=3, or n=5; and n=3, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.4 If n=1, or n=3, or n=5; and n=4, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.5 If n=1, or n=3, or n=5; and n=5, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.6 If n=2, or n=4, or n=6; and n=1, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.7 If n=2, or n=4, or n=6; and n=2, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.8 If n=2, or n=4, or n=6; and n=3, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.9 If n=2, or n=4, or n=6; and n=4, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.10 If n=2, or n=4, or n=6; and n=5, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
in the step A12), the acting time t of 5 basic vectors participating in modulation in one triangular carrier period is calculated according to the following formula 1 、t 2 、t 3 、t 4 And t 5 ：
In the modulation method of the three-level NPC converter with the neutral point potential balancing function, as a preferable scheme, the step a 13) specifically includes:
a13.1 If n=1, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty2 1 1 1 1 1
duty3 t 5 t 5 t 5 t 4 +t 5 t 4 +t 5
duty4 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty5 0 0 0 0 0
duty6 t 3 +t 4 +t 5 t 4 +t 5 t 4 +t 5 t 5 t 5
a13.2 If n=2, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5
duty2 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty3 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty4 1 1 1 1 1
duty5 0 0 0 0 0
duty6 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5
a13.3 If n=3, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
a13.4 If n=4, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 0 0 0 0 0
duty2 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5
duty3 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5
duty4 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty5 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty6 1 1 1 1 1
a13.5 If n=5, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 t 5 t 5 t 5 t 4 +t 5 t 4 +t 5
duty2 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty3 0 0 0 0 0
duty4 t 3 +t 4 +t 5 t 4 +t 5 t 4 +t 5 t 5 t 5
duty5 t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty6 1 1 1 1 1
a13.6 If n=6, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty2 1 1 1 1 1
duty3 0 0 0 0 0
duty4 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5
duty5 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5
duty6 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5
。
compared with the prior art, the invention has the following advantages:
1. the invention can realize the modulation target of the three-level NPC without increasing any hardware cost, can keep the neutral point potential balance even under the working conditions of full power factor and full modulation ratio, and can inhibit the neutral point potential offset caused by non-ideal factors such as inconsistent device parameters in actual engineering.
2. The method can be used for directly calculating the duty ratio of each device of the three-level NPC, is convenient for programming realization, and has good technical implementation application prospect.
Drawings
Fig. 1 is a schematic diagram of the topology of a three-level NPC converter.
Fig. 2 is a simulation waveform of the voltage of the positive and negative dc bus capacitor when the modulation ratio of the three-level NPC converter is 1 and the power factor angle is 1 (unit power factor) by the proposed modulation method.
Fig. 3 is a simulation waveform of the positive and negative dc bus capacitor voltage when the modulation ratio of the three-level NPC converter is 1 and the power factor angle is 0 (pure capacitive) by the proposed modulation method.
Fig. 4 is a simulation waveform of the voltage of the positive and negative dc bus capacitor when the modulation ratio of the three-level NPC converter is 1 and the power factor angle is 1 (pure inductance) by the proposed modulation method.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without creative efforts, based on the described embodiments of the present invention fall within the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs.
The terms "first," "second," and the like in the description and in the claims, are not used for any order, quantity, or importance, but are used for distinguishing between different elements. Also, unless the context clearly indicates otherwise, singular forms "a," "an," or "the" and similar terms do not denote a limitation of quantity, but rather denote the presence of at least one. The terms "comprises," "comprising," or the like are intended to cover a feature, integer, step, operation, element, and/or component recited as being present in the element or article that "comprises" or "comprising" does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. "up", "down", "left", "right" and the like are used only to indicate a relative positional relationship, and when the absolute position of the object to be described is changed, the relative positional relationship may be changed accordingly.
FIG. 1 shows a schematic diagram of a topology of a three-level NPC converter with neutral-point potential balancing, including a DC side bus capacitor, a three-phase bridgeA conversion circuit and a three-phase LC circuit; the DC side bus capacitor consists of two split capacitors C 1 And C 2 A positive electrode and a negative electrode which are connected in series and connected to the DC side bus; the capacitor ends of the three-phase LC circuit are connected in parallel; the three-phase bridge type conversion circuit comprises an A-phase bridge arm circuit, a B-phase bridge arm circuit and a C-phase bridge arm circuit which are connected in parallel at the two ends of the positive electrode and the negative electrode of the direct current side bus; the A-phase bridge arm circuit consists of an A-phase upper bridge arm and an A-phase lower bridge arm which are connected in series, the B-phase bridge arm circuit consists of a B-phase upper bridge arm and a B-phase lower bridge arm which are connected in series, and the C-phase bridge arm circuit consists of a C-phase upper bridge arm and a C-phase lower bridge arm which are connected in series; each upper bridge arm or lower bridge arm is formed by connecting a bridge arm outer pipe device and a bridge arm inner pipe device in series, the bridge arm outer pipe device is positioned on the outer side of the bridge arm inner pipe device, and each bridge arm outer pipe device or each bridge arm inner pipe device is formed by connecting a full control switch device and a half control switch device in anti-parallel; the outer side ends of the bridge arm outer pipe devices of the in-phase upper bridge arm and the lower bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus; the inner ends of the bridge arm inner tube devices of the upper bridge arm and the lower bridge arm in the same phase are connected, and are connected with one end of an inductor in a corresponding phase LC circuit, and the other end of the inductor in a A, B, C phase LC circuit is used for being connected with A, B, C phases of an alternating current power supply or a load. As shown in FIG. 1, S a1 、S b1 And S is c1 A, B, C phase upper bridge arm outer pipe devices; s is S a2 、S b2 And S is c2 A, B, C phase upper bridge arm inner pipe devices; s is S a3 、S b3 And S is c3 A, B, C phase lower bridge arm inner pipe devices; s is S a4 、S b4 And S is c4 A, B, C phase lower bridge arm outer pipe devices. Wherein:
in the A-phase bridge arm circuit, an A-phase upper bridge arm outer pipe device S a1 Outer tube device S of outer side end of lower bridge arm of phase A a4 The outer side ends of the bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus, and the inner tube device S of the bridge arm of the A-phase upper bridge arm a2 And an A-phase lower bridge arm inner tube device S a3 The inner side ends of the lower bridge arm inner tube devices S are connected with one end of an inductor in the phase A LC circuit a3 From the outer side end of (C) to the inner tube device S of the A-phase upper bridge arm a2 Is also connected in parallel between the outer ends of the two diodesA first unidirectional branch is formed;
in the B-phase bridge arm circuit, a B-phase upper bridge arm outer pipe device S b1 Outer side end of (B) phase lower bridge arm outer tube device S b4 The outer side ends of the bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus, and the inner tube device S of the bridge arm of the B-phase upper bridge arm a2 And B-phase lower bridge arm inner tube device S b3 The inner side ends of the lower bridge arm inner tube devices S are connected with one end of an inductor in the B-phase LC circuit b3 From the outer side end of (C) to the inner tube device S of the B-phase upper bridge arm b2 A second unidirectional branch formed by connecting two diodes in series is also connected in parallel between the outer ends of the two diodes;
in the C-phase bridge arm circuit, a C-phase upper bridge arm outer pipe device S c1 Outer tube device S of C-phase lower bridge arm c4 The outer side ends of the C-phase upper bridge arm inner tube device S are respectively connected with the positive electrode and the negative electrode of the direct current side bus c2 And C-phase lower bridge arm inner tube device S c3 The inner side ends of the C phase LC circuit are connected with one end of an inductor in the C phase LC circuit, and the inner tube device S of the C phase lower bridge arm c3 Is from the outer side end of the bridge arm to the C-phase upper bridge arm inner tube device S c2 A third unidirectional branch formed by connecting two diodes in series is also connected in parallel between the outer ends of the two diodes;
the middle sections of the two diodes of the first unidirectional branch, the second unidirectional branch and the third unidirectional branch are also connected in parallel to a direct-current side bus capacitor by two split capacitors C 1 And C 2 Is provided.
The specific implementation steps of the modulation method of the three-level NPC converter with the neutral point potential balance function are as follows:
a1 Acquiring an original modulated wave signal according to a control target, and converting the original modulated wave signal into a modulated wave signal under a stationary two-phase alpha beta coordinate system, namely u under constant amplitude coordinate transformation mα 、u mβ ；
A2 Collecting total DC bus voltage signal U dc Positive DC bus voltage signal U dcp Three-level NPC outputs three-phase current signal i abc ；
A3 Using the total dc bus voltage signal U) dc For modulated wave signal u mα 、u mβ Normalization is carried outProcessing to obtain normalized modulated signal u α 、u β ：
A4 Calculating normalized modulation signal u α And u is equal to β Is a composite voltage vector U of (a) m Amplitude U of (2) and angle theta thereof in space m ：
A5 Dividing a large sector at each 60 DEG and respectively sequencing, according to the angle theta obtained in the step A4) m Determining a large sector sequence number N of the large sector where the current is located, and calculating the synthesized voltage vector U m Relative spatial angle θ within the corresponding large sector:
a6 According to the relative spatial angle θ obtained in step A5) and the resultant voltage vector U m The small sector boundary condition L is calculated according to the following formula 1 、L 2 And L 3 ：
A7 L) obtained according to step A6) 1 、L 2 And L 3 Judging a small sector sequence number n where the relative space angle theta is located; the method specifically comprises the following steps:
a7.1 If the following formula is satisfied, n=1;
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a7.2 If the following formula is satisfied, n=2;
a7.3 If the following formula is satisfied, n=3;
a7.4 If the following formula is satisfied, n=4;
a7.5 If the following formula is satisfied, n=5;
a8 According to the small sector number n obtained in step A8) and the resultant voltage vector U obtained in step A4) m The magnitude U of (2) is calculated according to the following steps of 1 、T 2 And T:
a8.1 If n=1, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.2 If n=2, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.3 If n=3, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.4 If n=4, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.5 If n=5, calculate T according to the following formula 1 、T 2 And T 3 ；
A9 Outputting a three-phase current signal i according to the three-level NPC collected in step A2) abc And the large sector number N obtained in the step A5), judging the value of the balance factor J according to the following steps;
a9.1 If n=1, and i a 0, j=1; if n=1, and i a <0, j= -1;
a9.2 If n=2, and i c Not less than 0, J= -1; if n=2, and i c <0, then j=1;
a9.3 If n=3, and i b 0, j=1; if n=3, and i b <0, j= -1;
a9.4 If n=4, and i a Not less than 0, J= -1; if n=4, and i a <0, then j=1;
a9.5 If n=5, and i c 0, j=1; if n=5, and i c <0, j= -1;
a9.3 If n=6, and i b Not less than 0, J= -1; if n=6, and i b <0, then j=1;
a10 Based on the value of balance factor J obtained in step A9), T calculated in step A8) 1 And U acquired in step A2) dc And U dcp The positive offset action time T of the small vector is calculated according to the following formula 1P And a negative offset time T of the small vector 1N ；
Wherein k is the proportional gain coefficient of the midpoint potential difference, V diff The voltage difference value of the upper and lower split capacitors;
a11 T) obtained according to step A10) 1P And T 1N T calculated in step A8) 1 、T 2 And T 3 The large sector number N obtained in the step A5) and the small sector number N obtained in the step A7) participate in the action time Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 of 5 basic vectors modulated in a half triangular carrier period according to the following steps;
a11.1 If n=1, or n=3, or n=5; and n=1, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.2 If n=1, or n=3, or n=5; and n=2, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.3 If n=1, or n=3, or n=5; and n=3, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.4 If n=1, or n=3, or n=5; and n=4, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
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a11.5 If n=1, or n=3, or n=5; and n=5, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.6 If n=2, or n=4, or n=6; and n=1, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.7 If n=2, or n=4, or n=6; and n=2, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.8 If n=2, or n=4, or n=6; and n=3, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.9 If n=2, or n=4, or n=6; and n=4, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.10 If n=2, or n=4, or n=6; and n=5, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a12 According to Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 obtained in the step A11), calculating the acting time t of 5 basic vectors participating in modulation in one triangular carrier period according to the following formula 1 、t 2 、t 3 、t 4 And t 5 ；
A13 T) obtained according to step A12) 1 、t 2 、t 3 、t 4 And t 5 Calculating duty ratio modulation values duty1, duty2, duty3, duty4, duty5 and duty6 according to the large sector number N obtained in the step A5) and the small sector number N obtained in the step A7); wherein the duty ratio modulation values duty1 and duty2 respectively correspond to the outer tube device S of the A-phase upper bridge arm a1 And an A-phase upper bridge arm inner tube device S a2 The duty ratio modulation value duty3 and duty4 respectively correspond to the B-phase upper bridge arm outer pipe device S b1 And B-phase upper bridge arm inner tube device S b2 The duty ratio modulation value duty5 and duty6 respectively correspond to the C-phase upper bridge arm outer pipe device S c1 And C-phase upper bridge arm inner tube device S c2 The method comprises the steps of carrying out a first treatment on the surface of the The method specifically comprises the following steps:
a13.1 If n=1, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty2 1 1 1 1 1
duty3 t 5 t 5 t 5 t 4 +t 5 t 4 +t 5
duty4 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty5 0 0 0 0 0
duty6 t 3 +t 4 +t 5 t 4 +t 5 t 4 +t 5 t 5 t 5
a13.2 If n=2, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
a13.3 If n=3, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 0 0 0 0 0
duty2 t 3 +t 4 +t 5 t 4 +t 5 t 4 +t 5 t 5 t 5
duty3 t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty4 1 1 1 1 1
duty5 t 5 t 5 t 5 t 4 +t 5 t 4 +t 5
duty6 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
a13.4 If n=4, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 0 0 0 0 0
duty2 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5
duty3 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5
duty4 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty5 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty6 1 1 1 1 1
a13.5 If n=5, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 t 5 t 5 t 5 t 4 +t 5 t 4 +t 5
duty2 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty3 0 0 0 0 0
duty4 t 3 +t 4 +t 5 t 4 +t 5 t 4 +t 5 t 5 t 5
duty5 t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5
duty6 1 1 1 1 1
a13.6 If n=6, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5
duty1 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5
duty2 1 1 1 1 1
duty3 0 0 0 0 0
duty4 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5
duty5 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5
duty6 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5
a14 Taking the duty1 obtained in the step A13) as an outer tube device S of an A-phase upper bridge arm a1 While the inner tube device S of the A-phase lower bridge arm a3 The switch state is set to be S a1 An opposite switch state; taking the duty2 obtained in the step A13) as an inner tube device S of an upper bridge arm of the A phase a2 While the A phase lower bridge arm outer tube device S a4 The switch state is set to be S a2 An opposite switch state;
taking the duty3 obtained in the step A13) as a B-phase upper bridge arm outer tube device S b1 While B phase lower bridge arm inner tube device S b3 The switch state is set to be S b1 An opposite switch state; taking the duty4 obtained in the step A13) as an inner tube device S of a B-phase upper bridge arm b2 The switching state of the outer tube device of the B-phase lower bridge arm is set to be equal to S b2 An opposite switch state;
taking the duty5 obtained in the step A13) as a C-phase upper bridge arm outer tube device S c1 While C phase lower bridge arm inner tube device S c3 The switch state is set to be S c1 An opposite switch state; taking the duty6 obtained in the step A13) as an inner tube device S of an A-phase upper bridge arm c2 The switching state of the outer tube device of the C-phase lower bridge arm is set to be equal to S c2 And the opposite switch state.
Fig. 2, fig. 3 and fig. 4 show simulation waveforms of voltages of positive and negative dc bus bars under pure resistive, pure capacitive and pure inductive operations respectively under full modulation ratio (modulation ratio is 1) by adopting the proposed modulation method, and simulation results show that the three-level NPC converter can realize balance control of midpoint potential under full modulation ratio and full power factor by adopting the proposed modulation method.
In summary, compared with the prior art, the invention has the following beneficial effects:
the invention can realize the modulation target of the three-level NPC without increasing any hardware cost, can keep the neutral point potential balance even under the working conditions of full power factor and full modulation ratio, and can inhibit the neutral point potential offset caused by non-ideal factors such as inconsistent device parameters in actual engineering. In addition, the method can be used for directly calculating the duty ratio of each device of the three-level NPC finally, and is convenient for programming realization.
Finally, it should be noted that the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the technical solution, and those skilled in the art should understand that modifications and equivalents may be made to the technical solution of the present invention without departing from the spirit and scope of the present invention, and all such modifications and equivalents are included in the scope of the claims.

Claims (10)

1. The three-level NPC converter with the neutral point potential balance function is characterized by comprising a direct-current side bus capacitor, a three-phase bridge type conversion circuit and a three-phase LC circuit; the DC side bus capacitor consists of two split capacitors C 1 And C 2 Formed in series and connected to a DC-side busPositive and negative electrodes of (a); the capacitor ends of the three-phase LC circuit are connected in parallel; the three-phase bridge type conversion circuit comprises an A-phase bridge arm circuit, a B-phase bridge arm circuit and a C-phase bridge arm circuit which are connected in parallel at the two ends of the positive electrode and the negative electrode of the direct current side bus; the A-phase bridge arm circuit consists of an A-phase upper bridge arm and an A-phase lower bridge arm which are connected in series, the B-phase bridge arm circuit consists of a B-phase upper bridge arm and a B-phase lower bridge arm which are connected in series, and the C-phase bridge arm circuit consists of a C-phase upper bridge arm and a C-phase lower bridge arm which are connected in series; each upper bridge arm or lower bridge arm is formed by connecting a bridge arm outer pipe device and a bridge arm inner pipe device in series, the bridge arm outer pipe device is positioned on the outer side of the bridge arm inner pipe device, and each bridge arm outer pipe device or each bridge arm inner pipe device is formed by connecting a full control switch device and a half control switch device in anti-parallel; the outer side ends of the bridge arm outer pipe devices of the in-phase upper bridge arm and the lower bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus; the inner side ends of the bridge arm inner tube devices of the upper bridge arm and the lower bridge arm in the same phase are connected with one end of an inductor in a corresponding phase LC circuit, and the other end of the inductor in a A, B, C phase LC circuit is used for being connected with A, B, C phases of an alternating current power supply or a load; wherein:
in the A-phase bridge arm circuit, an A-phase upper bridge arm outer pipe device S a1 Outer tube device S of outer side end of lower bridge arm of phase A a4 The outer side ends of the bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus, and the inner tube device S of the bridge arm of the A-phase upper bridge arm a2 And an A-phase lower bridge arm inner tube device S a3 The inner side ends of the lower bridge arm inner tube devices S are connected with one end of an inductor in the phase A LC circuit a3 From the outer side end of (C) to the inner tube device S of the A-phase upper bridge arm a2 A first unidirectional branch formed by connecting two diodes in series is also connected in parallel between the outer ends of the two diodes;
in the B-phase bridge arm circuit, a B-phase upper bridge arm outer pipe device S b1 Outer side end of (B) phase lower bridge arm outer tube device S b4 The outer side ends of the bridge arm are respectively connected with the positive electrode and the negative electrode of the direct current side bus, and the inner tube device S of the bridge arm of the B-phase upper bridge arm a2 And B-phase lower bridge arm inner tube device S b3 The inner side ends of the lower bridge arm inner tube devices S are connected with one end of an inductor in the B-phase LC circuit b3 From the outer side end of (C) to the inner tube device S of the B-phase upper bridge arm b2 Is also connected in parallel between the outer ends of the two diodesA second unidirectional leg of (a);
in the C-phase bridge arm circuit, a C-phase upper bridge arm outer pipe device S c1 Outer tube device S of C-phase lower bridge arm c4 The outer side ends of the C-phase upper bridge arm inner tube device S are respectively connected with the positive electrode and the negative electrode of the direct current side bus c2 And C-phase lower bridge arm inner tube device S c3 The inner side ends of the C phase LC circuit are connected with one end of an inductor in the C phase LC circuit, and the inner tube device S of the C phase lower bridge arm c3 Is from the outer side end of the bridge arm to the C-phase upper bridge arm inner tube device S c2 A third unidirectional branch formed by connecting two diodes in series is also connected in parallel between the outer ends of the two diodes;
the middle sections of the two diodes of the first unidirectional branch, the second unidirectional branch and the third unidirectional branch are also connected in parallel to a direct-current side bus capacitor by two split capacitors C 1 And C 2 Is provided.
2. The modulation method of the three-level NPC converter with neutral point potential balance function as claimed in claim, comprising the steps of:
a1 Acquiring an original modulated wave signal according to a control target, and converting the original modulated wave signal into a modulated wave signal under a stationary two-phase alpha beta coordinate system, namely u under constant amplitude coordinate transformation mα 、u mβ ；
A2 Collecting total DC bus voltage signal U dc Positive DC bus voltage signal U dcp Three-level NPC outputs three-phase current signal i abc ；
A3 Using the total dc bus voltage signal U) dc For modulated wave signal u mα 、u mβ Normalization processing is carried out to obtain a normalized modulation signal u α 、u β ；
A4 Calculating normalized modulation signal u α And u is equal to β Is a composite voltage vector U of (a) m Amplitude U of (2) and angle theta thereof in space m ；
A5 Dividing a large sector at each 60 DEG and respectively sequencing, according to the angle theta obtained in the step A4) m Determining a large sector sequence number N of the large sector, and calculating the synthesisVoltage vector U m A relative spatial angle θ within the corresponding large sector;
a6 According to the relative spatial angle θ obtained in step A5) and the resultant voltage vector U m Is used for calculating the boundary condition L of the small sector 1 、L 2 And L 3 ；
A7 L) obtained according to step A6) 1 、L 2 And L 3 Judging a small sector sequence number n where the relative space angle theta is located;
a8 According to the small sector number n obtained in step A8) and the resultant voltage vector U obtained in step A4) m The magnitude U of (2) calculates the comprehensive vector acting time T conforming to the volt-second balance principle 1 、T 2 And T 3 ；
A9 Outputting a three-phase current signal i according to the three-level NPC collected in step A2) abc And the large sector number N obtained in the step A5), judging the value of the balance factor J;
a10 Based on the value of balance factor J obtained in step A9), T calculated in step A8) 1 And U acquired in step A2) dc And U dcp Calculating the positive offset time of action T of small vector 1P And a negative offset time T of the small vector 1N ；
A11 T) obtained according to step A10) 1P And T 1N T calculated in step A8) 1 、T 2 And T 3 Calculating the acting time Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 of 5 basic vectors participating in modulation in a half triangular carrier period according to the large sector sequence number N obtained in the step A5) and the small sector sequence number N obtained in the step A7);
a12 Calculating the acting time t of 5 basic vectors participating in modulation in one triangular carrier period according to Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 obtained in the step A11) 1 、t 2 、t 3 、t 4 And t 5 ；
A13 T) obtained according to step A12) 1 、t 2 、t 3 、t 4 And t 5 The large sector number N obtained in the step A5) and the small sector number N obtained in the step A7) are countedDuty ratio modulation values duty1, duty2, duty3, duty4, duty5 and duty6 are calculated; wherein the duty ratio modulation values duty1 and duty2 respectively correspond to the outer tube device S of the A-phase upper bridge arm a1 And an A-phase upper bridge arm inner tube device S a2 The duty ratio modulation value duty3 and duty4 respectively correspond to the B-phase upper bridge arm outer pipe device S b1 And B-phase upper bridge arm inner tube device S b2 The duty ratio modulation value duty5 and duty6 respectively correspond to the C-phase upper bridge arm outer pipe device S c1 And C-phase upper bridge arm inner tube device S c2 ；
A14 Taking the duty1 obtained in the step A13) as an outer tube device S of an A-phase upper bridge arm a1 The duty ratio modulation value of (2) and the inner tube device S of the A-phase lower bridge arm a3 The switch state is set to be S a1 An opposite switch state; taking the duty2 obtained in the step A13) as an inner tube device S of an upper bridge arm of the A phase a2 The duty ratio modulation value of (2) is simultaneously the outer tube device S of the A-phase lower bridge arm a4 The switch state is set to be S a2 An opposite switch state;
taking the duty3 obtained in the step A13) as a B-phase upper bridge arm outer tube device S b1 The duty ratio modulation value of (2) and the inner tube device S of the B-phase lower bridge arm b3 The switch state is set to be S b1 An opposite switch state; taking the duty4 obtained in the step A13) as an inner tube device S of a B-phase upper bridge arm b2 While B phase lower bridge arm outer tube device S b4 The switch state is set to be S b2 An opposite switch state;
taking the duty5 obtained in the step A13) as a C-phase upper bridge arm outer tube device S c1 Duty cycle modulation value of (2) while C phase lower bridge arm inner tube device S c3 The switch state is set to be S c1 An opposite switch state; taking the duty6 obtained in the step A13) as a C-phase upper bridge arm inner tube device S c2 While the C phase lower bridge arm outer tube device S c4 The switch state is set to be S c2 And the opposite switch state.
3. The method for modulating a three-level NPC converter with neutral-point potential balance according to claim 2, wherein in said step A3), the normalized modulation signal u is α 、u β The method comprises the following steps:
in the step A4), the voltage vector U is synthesized m Amplitude U of (2) and angle theta thereof in space m The method comprises the following steps:
in the step A5), a synthetic voltage vector U is calculated m The specific way of the relative spatial angle θ in the corresponding large sector is:
4. the method for modulating a three-level NPC converter with neutral point potential balance function according to claim 2, wherein in said step A6), small sector boundary condition L 1 、L 2 And L 3 The calculation is performed as follows:
5. the modulation method of the three-level NPC converter with the neutral point potential balance function according to claim 2, wherein the step A7) specifically includes:
a7.1 If the following formula is satisfied, n=1;
a7.2 If the following formula is satisfied, n=2;
a7.3 If the following formula is satisfied, n=3;
a7.4 If the following formula is satisfied, n=4;
a7.5 If the following formula is satisfied, n=5;
6. the modulation method of the three-level NPC converter with the neutral point potential balance function according to claim 2, wherein the step A8) specifically includes:
a8.1 If n=1, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.2 If n=2, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.3 If n=3, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.4 If n=4, calculate T according to the following formula 1 、T 2 And T 3 ；
A8.5 If n=5, calculate T according to the following formula 1 、T 2 And T 3 ；
7. The modulation method of the three-level NPC converter with the neutral point potential balance function according to claim 2, wherein the step A9) specifically includes:
a9.1 If n=1, and i a 0, j=1; if n=1, and i a <0, j= -1;
a9.2 If n=2, and i c Not less than 0, J= -1; if n=2, and i c <0, then j=1;
a9.3 If n=3, and i b 0, j=1; if n=3, and i b <0, j= -1;
a9.4 If n=4, and i a Not less than 0, J= -1; if n=4, and i a <0, then j=1;
a9.5 If n=5, and i c 0, j=1; if n=5, and i c <0, j= -1;
a9.3 If n=6, and i b Not less than 0, J= -1; if n=6, and i b <0, j=1.
8. The method for modulating a three-level NPC converter with neutral-point potential balance according to claim 2, wherein in said step a 10), the positive offset acting time T of the small vector is calculated according to the following formula 1P And a negative offset time T of the small vector 1N ：
Wherein k is the proportional gain coefficient of the midpoint potential difference, V diff Is the voltage difference between the upper and lower split capacitors.
9. The modulation method of the three-level NPC converter with the neutral point potential balance function according to claim 2, wherein the step a 11) specifically includes:
a11.1 If n=1, or n=3, or n=5; and n=1, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.2 If n=1, or n=3, or n=5; and n=2, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.3 If n=1, or n=3, or n=5; and n=3, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.4 If n=1, or n=3, or n=5; and n=4, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.5 If n=1, or n=3, or n=5; and n=5, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.6 If n=2, or n=4, or n=6; and n=1, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.7 If n=2, or n=4, or n=6; and n=2, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.8 If n=2, or n=4, or n=6; and n=3, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.9 If n=2, or n=4, or n=6; and n=4, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
a11.10 If n=2, or n=4, or n=6; and n=5, then the values of Tsvm1, tsvm2, tsvm3, tsvm4 and Tsvm5 are calculated according to the following formula;
in the step A12), the acting time t of 5 basic vectors participating in modulation in one triangular carrier period is calculated according to the following formula 1 、t 2 、t 3 、t 4 And t 5 ：
10. The modulation method of the three-level NPC converter with the neutral point potential balance function according to claim 2, wherein the step a 13) specifically includes:
a13.1 If n=1, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5 duty1 t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 duty2 1 1 1 1 1 duty3 t 5 t 5 t 5 t 4 +t 5 t 4 +t 5 duty4 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 duty5 0 0 0 0 0 duty6 t 3 +t 4 +t 5 t 4 +t 5 t 4 +t 5 t 5 t 5
a13.2 If n=2, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5 duty1 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5 duty2 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 duty3 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 duty4 1 1 1 1 1 duty5 0 0 0 0 0 duty6 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5
a13.3 If n=3, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
a13.4 If n=4, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5 duty1 0 0 0 0 0 duty2 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5 duty3 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5 duty4 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 duty5 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 duty6 1 1 1 1 1
a13.5 If n=5, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5 duty1 t 5 t 5 t 5 t 4 +t 5 t 4 +t 5 duty2 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 duty3 0 0 0 0 0 duty4 t 3 +t 4 +t 5 t 4 +t 5 t 4 +t 5 t 5 t 5 duty5 t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 duty6 1 1 1 1 1
a13.6 If n=6, duty1, duty2, duty3, duty4, duty5, and duty6 are calculated according to the following table;
n＝1 n＝2 n＝3 n＝4 n＝5 duty1 t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 duty2 1 1 1 1 1 duty3 0 0 0 0 0 duty4 t 3 +t 4 +t 5 t 4 +t 5 t 5 t 5 t 4 +t 5 duty5 t 5 t 5 t 4 +t 5 t 4 +t 5 t 5 duty6 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 2 +t 3 +t 4 +t 5 t 3 +t 4 +t 5 t 3 +t 4 +t 5
。
CN202311496563.XA 2023-11-10 2023-11-10 Three-level NPC converter with neutral point potential balance function and modulation method thereof Pending CN117543997A (en)

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