CN117529222A - Topological phase change memristor with controllable conductive wire forming area and preparation method thereof - Google Patents
Topological phase change memristor with controllable conductive wire forming area and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
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- H—ELECTRICITY
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/10—Phase change RAM [PCRAM, PRAM] devices
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
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- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
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Abstract
The invention provides a topology phase-change memristor with a controllable conductive wire forming area and a preparation method thereof, and relates to the technical field of semiconductor information storage and artificial synapse devices; after voltage is applied, a conductive channel is formed between the bottom electrode layer and the top electrode layer, and the conductive channel conducts the top electrode layer and the bottom electrode layer; the conductive channel comprises a first conductive wire and a second conductive wire, the first conductive wire is formed on the dielectric layer, the second conductive wire is formed on the resistance change function layer, and the formation of the second conductive wire is limited by the first conductive wire. According to the invention, the dielectric layer is introduced into the upper interface of the resistive function layer to form a laminated structure, and the directional growth of the second conductive wire is realized through the first conductive wire, so that the forming and breaking order of the second conductive wire is facilitated, the cycling stability of the device is enhanced, and the storage window of the device is promoted.
Description
Technical Field
The invention relates to the technical field of semiconductor information storage and artificial synapse devices, in particular to a topological phase-change memristor with a controllable conductive wire forming area and a preparation method thereof.
Background
With the increasing demand of artificial intelligence and the big data age, traditional computing architectures face serious challenges in terms of energy efficiency and processing speed. To address this problem, resistive Switching (RS) memory has emerged as a viable alternative solution, and more specifically, resistive switching memory exhibits excellent performance, including low power consumption, fast switching speeds, and high levels of three-dimensional stackable integration, and has therefore evolved as one of the most promising options for nonvolatile memory and neuromorphic computation. However, the inherent instability of resistive switching effects limits the wide range of applications for memristors. The resistance switching mechanism of memristors is achieved by ion and electron transfer in the device, but ion and electron transfer is difficult to be consistent across devices and cycles. For oxide-based memristors with a valence charge mechanism as the conduction mechanism, this dispersibility is mainly due to the inevitable randomness of the growth position and shape of the Conductive Filaments (CF) under different devices and continuous cycling applications.
Topological phase change material SrFeO m (SFO) as a typical memristor material, a topological phase change material refers to a material in which a portion of the elements are extracted, resulting in distortion of the lattice symmetry, but the overall material skeleton remains stable. In SFO systems, SFO is achieved by losing or absorbing a portion of the oxygen atoms in SrFeO 2.5 Perovskite phase (BM-SFO) and SrFeO 3 The phase change between the perovskite phases (PV-SFO) is reversible. In addition to the differences in crystal structure, BM-SFO differs significantly from PV-SFO in terms of electronic structure. In BM-SFO, the charge transfer energy of the O2 p orbitals to the unoccupied Fe 3d orbitals is positive, creating a bandgap of about 2 eV, making BM-SFO an insulating phase. In contrast, in PV-SFO, the O2 p orbitals have one electron transferred to the Fe 3d orbitals, resulting in O2 p being in an unfilled state, forming a negative band gap, making the PV-SFO a conductive phase. This reversible topological phase change results in significant changes in electronic structure and conductivity, making SFO idealMemristor material of (c). Based on the above mechanism, it was found that unlike conventional oxide memristors, SFO memristors rely primarily on the formation and breaking of oxygen-rich ion PV-SFO phase conductive filaments to control the resistance-change switching characteristics.
The prior patent CN114883487a discloses a self-forming topology phase-change nano memory device structure, its preparation and application, active metal nano particles are grown on SXO (x=fe, co) film, partial O ions in SXO are absorbed by utilizing the property that the metal nano particles are easy to be oxidized, and at this time, the SXO film below the metal nano particles is in an anoxic state, forming a higher resistance valuePhase barrier layer, at this point->The dimensions of the conductive filaments are determined by the dimensions of the metal nanoparticles and +.>The direction of the conductive filaments is defined to be perpendicular to the in-plane direction of the thin film to some extent to achieve uniformity and reliability of the oxide-based memory device.
However, the above technical solution still has the following disadvantages: firstly, the nano metal particles used for generating the limiting area of the conductive wire in the technical scheme are required to be active metal with strong oxygen absorption capacity, so that the metal type is limited, and meanwhile, the range and the stoichiometric ratio of oxygen-deficient SFO generated by metal oxygen absorption are unstable, so that the isolated PV-SFO conductive wire is poor in structural stability; secondly, before bias voltage is applied, the components of the SFO functional layer are 2.85-3, SFO in the state is a conductive phase, and the bias voltage is applied in a process of adjusting the SFO functional layer from low resistance to high resistance, so that the resistance of the device in the high-low resistance state is low, and the power consumption optimization and the multi-value characteristic of the device are not facilitated; thirdly, in the technical scheme, the bottom electrode is an SRO bottom electrode, the lattice mismatch degree between the bottom electrode and the SFO is larger, and oxygen ions on the surface of the SRO are more active, so that the memristor is influenced by the bottom electrode SRO in the aspect of forming a conductive wire forming area, and the state of the conductive wire is unstable.
Disclosure of Invention
In view of the above, the invention provides a topology phase-change memristor with a controllable conductive wire forming area and a preparation method thereof, so as to solve the problems of poor structural stability and low resistance of the conductive wire formed by a memristor resistance change functional layer in the prior art, and the problem that the cycle stability and the device consistency of the topology phase-change memristor are not ideal.
The technical scheme of the invention is realized as follows:
in a first aspect, the invention provides a topology phase-change memristor with a controllable conductive wire forming area, wherein the topology phase-change memristor comprises a bottom electrode layer, a resistance-change functional layer, a dielectric layer and a top electrode layer from bottom to top;
after voltage is applied, a conductive channel is formed between the bottom electrode layer and the top electrode layer, and the conductive channel conducts the top electrode layer and the bottom electrode layer;
the conductive channel comprises a first conductive wire and a second conductive wire, the first conductive wire is formed on the dielectric layer, the second conductive wire is formed on the resistance change function layer, and the formation of the second conductive wire is limited by the first conductive wire.
On the basis of the technical scheme, preferably, after negative voltage is applied, the dielectric layer is subjected to conductive wire electroforming treatment to form a first conductive wire; and applying a positive bias voltage of 1-5V again, wherein the resistance change function layer forms a second conductive wire, the forming area of the second conductive wire corresponds to the forming area of the first conductive wire, and the width of the second conductive wire is smaller than or equal to that of the first conductive wire so as to limit the formation of the second conductive wire through the first conductive wire.
Specifically, before no voltage is applied, no conductive wires exist in the dielectric layer and the resistance change function layer. After the negative voltage is applied, the dielectric layer can divide most of the voltage, so that the first conductive wire is formed on the dielectric layer by layer, namely the oxygen vacancy conductive wire in the dielectric layer is equivalent to a conductive path which is partially broken down in the dielectric layer, and the first conductive wire is not easy to break and is not easy to disappear after being formed. At this time, in the dielectric layer, the resistance of the first conductive wire area is much smaller than that of other areas, so that after the first conductive wire is formed, current mainly flows through the first conductive wire, and small positive bias is applied again, and the positive bias only acts on the area of the resistive function layer corresponding to the first conductive wire, so that the resistive function layer is promoted to form a second conductive wire in the area corresponding to the first conductive wire, and the device is set; the second conductive wire comes from the topological phase change of the material of the resistance change functional layer, is caused by oxygen ion migration, has lower formation energy, can be broken by applying smaller negative bias voltage, and is reset.
In contrast, the conventional memristor realizes the storage and logic operation by utilizing the characteristic that the resistance of an oxide or metal film changes along with the change of the current direction, and the topological phase-change memristor realizes the storage and logic operation functions by utilizing the characteristic of the topological phase-change material, wherein the material can undergo topological phase change when being subjected to the change of an electric field or temperature, so that the resistance state of the material is changed. In the invention, the bottom electrode layer and the top electrode layer are respectively used as electrodes of the device, and the resistance change functional layer is a key part of the topology phase change material, when an electric field or temperature change is applied, the topology phase change of the resistance change functional layer material occurs, so that the resistance state of the resistance change functional layer material is changed. The topological phase change memristor mainly depends on formation and fracture of phase conductive wires of a resistance change function layer of oxygen-enriched ions to control resistance change switching characteristics, so that the heterogeneous thin film memristor with a top electrode layer/a dielectric layer/a resistance change function layer/a bottom electrode layer is constructed.
On the basis of the technical scheme, preferably, the thickness of the bottom electrode layer is 20-50 nm, and the material of the bottom electrode layer is La 1-y Sr y MnO 3 Wherein y is less than or equal to 1; the thickness of the top electrode layer is 70-100 nm, theThe top electrode layer is a Pt or Au electrode.
In the invention, lanthanum strontium manganese oxide is used as the bottom electrode, the lattice matching between the lanthanum strontium manganese oxide and the resistance change functional layer is better, the structural distortion and stress caused by lattice mismatch can be reduced, a more stable interface structure can be formed, good interface combination is beneficial to the transmission and distribution of charges, and the electrical property of the conductive wire can be improved; meanwhile, when the topological phase-change memristor is prepared, the second conductive wire of the resistance change functional layer is less influenced by the bottom electrode when being formed, and the controllability and the stability of a conductive wire forming area are facilitated to be realized. The thin bottom electrode layer can reduce the resistance of the growth of the bottom electrode layer, and promote the bottom electrode to grow along the direction of the substrate structure in the preparation process, so that the epitaxial relationship is ensured; and the thicker top electrode can avoid being punctured during testing.
On the basis of the technical scheme, preferably, the thickness of the dielectric layer is 2-4 nm, and the material of the dielectric layer is A a O b Wherein A is any one of Al, hf, ta, zr, biFe and BaTi, and a and b are both greater than 0.
Based on the above technical solution, preferably, the dielectric layer is Al 2 O 3 、HfO 2 、TaO 2 、ZrO 2 、BiFeO 3 And BaTiO 3 Any one of the following.
In the invention, binary or multi-element oxide is used as a dielectric layer material, so that the dielectric layer structure is more universal, the binary or multi-element oxide has more complex electrical properties, different electrical properties can be realized by adjusting components and structures, and the prepared topological phase change memristor structure has more flexible application; and meanwhile, the lattice parameter and the unit cell volume of the binary or multi-element oxide can realize better lattice matching and interface bonding by adjusting components, so that the stress caused by lattice mismatch is reduced, a more stable dielectric layer-electrode interface is formed, and the performance and the stability of the device are improved.
On the basis of the technical scheme, preferably, the thickness of the resistance change functional layer is 30-50 nm, wherein the material of the resistance change functional layer is BM-SXO 2.5 Wherein X is Fe or Co, i.e. the resistance-changing functional layer is SrFeO 2.5 Or SrCoO 2.5 。
In the invention, the functional layer material adopts pure phase BM-SXO 2.5 Materials, e.g. SrFeO 2.5 Or SrCoO 2.5 Film, pure phase SrFeO 2.5 Or SrCoO 2.5 The film has higher resistivity, can realize higher resistance as a functional layer, and is more beneficial to the performance optimization in the aspects of device power consumption, multivalue characteristics and switching ratio.
In a second aspect, the present invention provides a method for manufacturing a topological phase-change memristor with a controllable conductive wire formation region, including the following steps:
s1, depositing a bottom electrode layer on the surface of a substrate;
s2, depositing a resistance change function layer on the surface of the bottom electrode layer;
s3, depositing a dielectric layer on the surface of the resistance change functional layer by adopting an atomic layer deposition method;
and S4, carrying out photoetching treatment on the dielectric layer, and then preparing a top electrode layer on the surface of the photoetched dielectric layer by a magnetron sputtering or electron beam evaporation method.
Specifically, in step S1, the method further includes pretreating the substrate, where the pretreating step includes: sequentially placing a substrate in acetone, ethanol and deionized water for ultrasonic cleaning for 15-20 min each time, wherein the substrate is SrTiO 3 (STO)、LaAlO 3 （LAO）、La 0.3 Sr 0.7 Al 0.65 Ta 0.35 O 3 (LSAT) and DyScO 3 (DSO) any one of the following.
On the basis of the above technical solution, preferably, the depositing is performed by using a pulse laser deposition method in both step S1 and step S2, and the deposition process conditions include: the temperature is 650-700 ℃, the atmosphere of the cavity is oxygen, the laser energy is 250-450 mJ, the laser frequency is 1-8 Hz, and the vacuum degree is 1X 10 -7 ~ 9×10 -6 Pa, the distance between the substrate and the target is 40-60 mm.
Based on the above technical scheme, preferably, the air pressure deposited in the step S1 is 15-20 Pa, and the air pressure deposited in the step S2 is 0.6-2 Pa.
On the basis of the above technical solution, preferably, the process conditions of the atomic layer deposition method in step S3 include: the atmosphere of the cavity is nitrogen, the deposition speed is 0.08-0.12 nm/cycle, the pulse time interval is 0.02s, 15s, 0.05s and 30s, namely, the injection of reactant is 0.02 s+the cleaning reaction residue 15 s+the injection of reactant is 0.015 s+the cleaning reaction residue 15s, and the cycle process is one.
In the steps S1 and S2, a bottom electrode layer and a resistance change function layer are deposited by a pulse laser deposition method, so that the thin film can be precisely controlled and optimized, and the quality and the growth rate of the thin film can be optimized by limiting the technological condition parameters, thereby improving the performance of the thin film; in the step S3, the atomic layer deposition method is adopted to deposit the dielectric layer, so that the thickness and uniformity of the dielectric layer can be accurately controlled, the insulation performance of the device and the stability of signal transmission are improved, and the accurate adjustment of the performance of the dielectric layer can be realized by further optimizing the deposition parameters.
Compared with the prior art, the topological phase change memristor with the controllable conductive wire forming area and the preparation method thereof have the following beneficial effects:
(1) The invention is realized by the method in BM-SXO 2.5 Upper interface introduction A of (resistive function layer) a O b (dielectric layer) to form laminated structure, and constructing top electrode layer/A a O b / BM-SXO 2.5 / La 1-y Sr y MnO 3 Heterogeneous thin film memristors, simultaneously for a a O b Performing electric forming operation of the conductive wires to obtain first conductive wires, wherein the first conductive wires can serve as a limiting area for directional growth of second conductive wires (namely PV-SXO conductive wires) of the resistive function layer, thereby being beneficial to forming and breaking orderliness of the PV-SXO conductive wires and promoting the storage window of the device;
(2) In the invention, the dielectric layer is made of binary or multi-element oxide material, and oxygen vacancy conducting wires generated by oxide electroforming are utilized to limit the forming area of the PV-SXO conducting wires in the memristor, thereby increasing the selectivity of the dielectric layer material and promoting the memristor structure to have universality; the resistive switching functional layer adopts pure phase BM-SXO 2.5 The material is deposited with a dielectric layer on the interface of the resistive function layer by an atomic layer deposition method, on the one hand, the pure phase BM-SXO 2.5 The material is used as a functional layer, so that the resistance is larger, and the performance optimization in the aspects of device power consumption, multivalue characteristics and switching ratio is facilitated; on the other hand, compared with the anoxic functional layer generated by means of metal oxygen absorption in the prior art, the pure phase BM-SXO is directly adopted 2.5 The PV-SXO conductive wire formed by the materials through the dielectric layer isolation has better structural stability;
(3) In the invention, lanthanum strontium manganese oxide film is used as a bottom electrode material, which is matched with BM-SXO 2.5 The lattice matching degree between the lanthanum, strontium, manganese and oxygen is higher, and the oxygen migration capability of lanthanum, strontium, manganese and oxygen is weaker, so that BM-SXO is promoted 2.5 The conductive wires are less affected by the bottom electrode when formed, and the stability of the PV-SXO conductive wires is further improved.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic structural diagram of a topological phase-change memristor prepared in embodiment 2 of the present invention;
FIG. 2 is a TEM image of the SRO/BM-SFO interface of example 1 of the present invention;
FIG. 3 is a diagram illustrating the structure of the topological phase-change memristor prepared in example 2 before and after the bias operation;
FIG. 4 is a TEM image of the LMSO/BM-SFO interface of example 2 of the present invention;
FIG. 5 is an I-V graph of a 50-turn DC voltage sweep cycle of a topological phase change memristor prepared in example 2 of the present invention;
FIG. 6 is a diagram illustrating the structure of a topological phase-change memristor prepared in example 3 before and after a bias operation;
FIG. 7 is an I-V graph of a 50-turn DC voltage sweep cycle of the topological phase change memristor prepared in example 3 of the present invention;
FIG. 8 is an I-V graph of a 50-turn DC voltage sweep cycle of the topological phase change memristor prepared in example 4 of the present invention;
fig. 9 is a surface SEM image of the topological phase-change memristor prepared in example 5 of the present invention.
Detailed Description
The following description of the embodiments of the present invention will clearly and fully describe the technical aspects of the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, are intended to fall within the scope of the present invention.
Example 1
The embodiment provides a topology phase-change memristor with a controllable conductive wire forming area and a preparation method thereof, and the topology phase-change memristor comprises the following steps:
s1, respectively cleaning STO (SrTiO) in acetone, ethanol and deionized water by using ultrasonic waves 3 ) A substrate, each solution being cleaned for 15 minutes;
s2, epitaxially growing SRO (SrRuO) on the substrate in the step S1 by using a pulse laser deposition device 3 ) Bottom electrode with thickness of 35nm, temperature of 650deg.C, chamber atmosphere of oxygen, air pressure of 15 Pa, laser energy of 300 mJ, laser frequency of 5 Hz, and vacuum degree of 1×10 -6 Pa, the distance between the substrate and the target is 50 mm;
s3, after the step S2 is completed, the BM-SFO (SrFeO) is deposited 2.5 ) The film has a thickness of 40nm, a temperature of 700 ℃, an atmosphere of oxygen, a gas pressure of 0.6 Pa, a laser energy of 300 mJ, a laser frequency of 4Hz, and a vacuum degree of 1×10 - 6 Pa, the distance between the substrate and the target is 50 mm;
s4, depositing Al on the thin film in the step S3 by using an atomic layer deposition (Atomic Layer Deposition, ALD) 2 O 3 The dielectric layer, the deposition source is trimethylaluminum and deionized water,the atmosphere of the cavity is nitrogen, the deposition speed is 0.1nm/cycle, the pulse time interval is 0.02s, 30s, 0.015s and 30s, and the deposited Al 2 O 3 The thickness of the dielectric layer was 3 nm.
S5, carrying out photoetching treatment on the film after the step S4 is finished, wherein the photoetching pattern and size are 80 multiplied by 80 mu m 2 Square electrodes of (a);
s6, preparing a Pt top electrode on the heterogeneous film prepared in the step S5 by using magnetron sputtering, wherein the thickness of the top electrode is 85nm, the temperature is 25 ℃, the deposition speed is 0.6A/S, and the deposition time is 2000S. The electrode structure of the device prepared by the preparation method is Pt/Al 2 O 3 /BM-SFO/ SRO。
Example 2
The embodiment provides a topology phase change memristor with a controllable conductive wire forming area and a preparation method thereof, and the operation steps are the same as those of embodiment 1, and the difference is that: in step S2, epitaxial growth is performed on the substrate described in step S1 using a pulsed laser deposition apparatusA bottom electrode. The electrode structure of the device prepared by the preparation method is thatThe device structure is shown in fig. 1.
Example 3
The embodiment provides a topology phase change memristor with a controllable conductive wire forming area and a preparation method thereof, and the operation steps are the same as those of embodiment 2, and the difference is that: without step S4, i.e. without insertion of Al 2 O 3 A dielectric layer. The electrode structure of the device prepared by the preparation method is Pt/BM-SFO/LSMO.
Example 4
The embodiment provides a topology phase change memristor with a controllable conductive wire forming area and a preparation method thereof, and the operation steps are the same as those of embodiment 2, and the difference is that: al in step S4 2 O 3 The thickness of the dielectric layer was 2nm. The electrode structure of the device prepared by the preparation method is Pt/Al 2 O 3 /BM-SFO/ LSMO。
Example 5
The embodiment provides a topology phase change memristor with a controllable conductive wire forming area and a preparation method thereof, and the operation steps are the same as those of embodiment 2, and the difference is that: al in step S4 2 O 3 The thickness of the dielectric layer was 4nm. The electrode structure of the device prepared by the preparation method is Pt/Al 2 O 3 /BM-SFO/ LSMO。
Example 6
The embodiment provides a topology phase-change memristor with a controllable conductive wire forming area and a preparation method thereof, and the topology phase-change memristor comprises the following steps:
s1, respectively cleaning STO (SrTiO) in acetone, ethanol and deionized water by using ultrasonic waves 3 ) A substrate, each solution being cleaned for 15 minutes;
s2, epitaxially growing LSMO (La) on the substrate in the step S1 by using pulse laser deposition equipment 0.7 Sr 0.3 MnO 3 ) A bottom electrode with a thickness of 20nm, a temperature of 680 deg.C, an atmosphere of oxygen, a gas pressure of 18Pa, a laser energy of 250mJ, a laser frequency of 1Hz, and a vacuum degree of 1×10 -7 Pa, the distance between the substrate and the target is 40 mm;
s3, after the step S2 is completed, the BM-SFO (SrFeO) is deposited 2.5 ) The film has a thickness of 30nm, a temperature of 650 ℃, an atmosphere of oxygen in the cavity, a gas pressure of 1.2 Pa, a laser energy of 250mJ, a laser frequency of 1Hz, and a vacuum degree of 1×10 - 7 Pa, the distance between the substrate and the target is 40 mm;
s4, depositing Al on the thin film in the step S3 by using an atomic layer deposition (Atomic Layer Deposition, ALD) 2 O 3 The medium layer, the deposition source is trimethylaluminum and deionized water, the cavity atmosphere is nitrogen, the deposition speed is 0.08nm/cycle, the pulse time interval is 0.02s, 30s, 0.015s and 30s, the deposited Al 2 O 3 The thickness of the dielectric layer was 3 nm.
S5, carrying out photoetching treatment on the film after the step S4 is finished, wherein the photoetching pattern and size are 80 multiplied by 80 mu m 2 Square electrodes of (a);
s6, preparing the heterogeneous film after photoetching in the step S5 by using an electron beam evaporation technologyThe Au top electrode was prepared at a thickness of 70nm, a temperature of 25℃and a deposition rate of 2.5 nm/min for 40min. The electrode structure of the device prepared by the preparation method is Au/Al 2 O 3 /BM-SFO/ LSMO。
Example 7
The embodiment provides a topology phase-change memristor with a controllable conductive wire forming area and a preparation method thereof, and the topology phase-change memristor comprises the following steps:
s1, respectively cleaning STO (SrTiO) in acetone, ethanol and deionized water by using ultrasonic waves 3 ) A substrate, each solution being cleaned for 15 minutes;
s2, epitaxially growing LSMO (La) on the substrate in the step S1 by using pulse laser deposition equipment 0.7 Sr 0.3 MnO 3 ) A bottom electrode with a thickness of 50nm, a temperature of 700 ℃, an atmosphere of oxygen in the cavity, a gas pressure of 20Pa, a laser energy of 450mJ, a laser frequency of 8 Hz, and a vacuum degree of 9×10 -6 Pa, the distance between the substrate and the target is 60 mm;
s3, after the step S2 is completed, the BM-SCO (SrCoO) is deposited 2.5 ) The film has a thickness of 50nm, a temperature of 700 ℃, an atmosphere of oxygen in the cavity, a gas pressure of 2 Pa, a laser energy of 450mJ, a laser frequency of 8 Hz, and a vacuum degree of 9×10 - 6 Pa, the distance between the substrate and the target is 60 mm;
s4, depositing Al on the thin film in the step S3 by using an atomic layer deposition (Atomic Layer Deposition, ALD) 2 O 3 The medium layer, the deposition source is trimethylaluminum and deionized water, the cavity atmosphere is nitrogen, the deposition speed is 0.12nm/cycle, the pulse time interval is 0.02s, 30s, 0.015s and 30s, the deposited Al 2 O 3 The thickness of the dielectric layer was 4nm.
S5, carrying out photoetching treatment on the film after the step S4 is finished, wherein the photoetching pattern and size are 80 multiplied by 80 mu m 2 Square electrodes of (a);
s6, preparing a Pt top electrode on the heterogeneous film prepared in the step S5 by using magnetron sputtering, wherein the thickness of the Pt top electrode is 100nm, the temperature is 25 ℃, the deposition speed is 0.3A/S, and the deposition time is 1500S. The preparation method comprisesThe electrode structure of the prepared device is Pt/Al 2 O 3 /BM-SCO/ LSMO。
Comparative example 1
The comparative example provides a self-forming topological phase-change nano memory device structure and a preparation method thereof, and the specific operation steps are as follows:
s1, respectively ultrasonically cleaning a SrTiO3 substrate in acetone and ethanol for 5min;
s2, preparing SrRuO on the substrate in the step (1) by using a pulse laser deposition device 3 The film lower electrode layer comprises the following technological conditions: the temperature is 700 ℃, the atmosphere of the cavity is oxygen, the air pressure is 3Pa, the laser energy is 450mJ, the laser frequency is 4Hz, and the vacuum degree is 5×Pa, wherein the distance between the substrate and the target is 55mm; the deposition time was 3600s.
S3, preparing a SrFeOm (m is more than or equal to 2.85 and less than 3) film functional layer on the lower electrode film in the step S2 by using pulse laser deposition equipment, wherein the process conditions are as follows: the temperature is 650 ℃, the atmosphere of the cavity is oxygen, the air pressure is 7Pa, the laser energy is 250mJ, the laser frequency is 4Hz, and the vacuum degree is 5×Pa, wherein the distance between the substrate and the target is 55mm; the deposition time was 1000s.
S4, dispersing 5g of polystyrene nano-microspheres in 100mL of deionized water, adding 60mL of ethanol as a dispersing agent, and finally performing further ultrasonic dispersion on the diluted and dispersed polystyrene nano-microspheres to obtain a uniform ethanol-dispersed polystyrene nano-microsphere mixed solution. The slides were inserted at an angle of about 30 ° into a petri dish in which deionized water was placed. And slowly dripping the polystyrene sphere mixed solution on an inclined glass slide, uniformly spreading the polystyrene sphere on the surface of deionized water through drainage of the glass slide, and dripping 2 drops of sodium dodecyl sulfate (aqueous solution of SDS) with the concentration of 3wt% after the solution is completely spread, so that the surface tension of the polystyrene sphere is further enhanced, and the polystyrene sphere film is more compact. After the above steps are completed, the substrate obtained in step S3 is inserted under the polystyrene sphere film with tweezers so that the sphere film is transferred to the surface of the substrate. And placing the substrate coated with the polystyrene sphere film solution in a clean culture dish, drying at room temperature, and completely attaching the self-assembled polystyrene sphere film on the surface of the substrate after the solvent is completely volatilized.
And S5, depositing metal Al on the film in the step S4 by using electron beam evaporation equipment, wherein the temperature is room temperature, the growth rate is 0.1 nm/S, and the deposition time is 200S.
S6, sequentially placing the substrate obtained in the step S5 in toluene, acetone, isopropanol and deionized water to remove the polystyrene nano microspheres on the surface and remove redundant metal Al; when metal Al is deposited on the surface of the single-layer laid polystyrene nano-microsphere by adopting an electron beam evaporation process, the metal Al is only deposited between the single-layer laid polystyrene nano-microsphere and the microsphere, even if excessive metal is deposited, the single-layer laid polystyrene nano-microsphere can be cleaned along with the polystyrene microsphere during cleaning, and only single-layer nano-metal particles distributed in a patterned array are left on the film functional layer.
S7, depositing metal Pt as a top electrode layer on the substrate obtained in the step S6 by using a magnetron sputtering device, wherein the process conditions are as follows: the temperature was room temperature, the deposition rate was 2000s deposition time.
S8, applying 3V positive bias voltage on the Pt top electrode layer obtained in the step S7 to enable the functional layer to generate topological phase change insideA barrier layer.
Performance detection
The Agilent B1500 is adopted to detect the electrical properties of the topological phase change memristors prepared in examples 1-7 and comparative example 1, 100I-V scanning cycle tests are carried out on the memristors, the resistance value under the voltage of 10 mV is extracted, and the degree of dispersion of the resistance value under the high-low resistance state under the voltage is counted and used as a standard for judging the cycling stability of the device. The lower the degree of dispersion, the better the device cycling stability. The detection results are shown in Table 1.
TABLE 1
Fig. 2 shows a TEM image of the SRO/BM-SFO interface of example 1, and it can be seen from the figure that SRO has a poor epitaxial effect of BM-SFO due to a low lattice adaptation with SFO, and affects the ordered growth of PV-SFO conductive filaments (i.e. the second conductive filaments).
Fig. 3 shows the structural change before and after the bias operation of the topological phase-change memristor after the introduction of the dielectric layer in embodiment 2, and it can be seen from the figure that after the bias operation is applied, the first conductive wire is formed in the dielectric layer, the resistive function layer forms the second conductive wire (i.e., the region indicated by the black dotted line frame in the figure), and the second conductive wire corresponds to the first conductive wire, i.e., the second conductive wire is limited in the region formed by the first conductive wire in the dielectric layer.
Fig. 4 shows a TEM image of the LMSO/BM-SFO interface of example 2, from which it is clear that LSMO is highly epitaxial with BM-SFO, the coherent structure is clearly visible, and no PV-SFO buffer layer is generated, without affecting the ordered growth of the PV-SFO conductive filaments due to free oxygen ions at the lower interface.
FIG. 5 shows an I-V plot of a 50-turn DC voltage sweep cycle for a topological phase-change memristor fabricated in example 2. It can be seen that, at the introduction of 3 nm Al 2 O 3 After the dielectric layer, the cycling stability of the device is enhanced.
FIG. 6 shows that example 3 does not incorporate Al 2 O 3 Structural changes before and after the memristor of the dielectric layer is applied with bias voltage, and the graph shows that Al is not introduced 2 O 3 And in the dielectric layer, the structure formed by the conductive wires in the SFO is disordered.
FIG. 7 shows an I-V plot of a 50-turn DC voltage sweep cycle of a topological phase change memristor prepared in example 3, with no Al introduced 2 O 3 And when the dielectric layer is formed, the circulation stability of the device is poor, and the fluctuation of the I-V curve is large.
FIG. 8 shows an I-V plot of a 50-turn DC voltage sweep cycle for a topological phase-change memristor fabricated in example 4. It can be seen that when Al is introduced at 2nm 2 O 3 Medium (D)After the layer, the cycling stability of the device was enhanced, but the memory window of the device was reduced compared to example 2 due to Al 2 O 3 The dielectric layer becomes thinner, resulting in a weaker confinement capability for the second conductive filaments.
FIG. 9 shows a surface SEM image of a topological phase-change memristor prepared in example 5, with device cell dimensions of 80×80 μm 2 Using Al 2 O 3 The dielectric layer performs limited-area regulation and control, and can control the switching of the device on the nanometer scale.
As can be seen from table 1, comparing example 2 with comparative example 1, compared with the prior art, the topological phase change memristor prepared by the technical scheme provided by the invention can obviously improve the stability of the device; example 2 in comparison with examples 1, 3, it can be seen that LSMO is used as the bottom electrode and Al is introduced 2 O 3 The synergistic effect of the dielectric layers promotes the stability of the prepared topological phase change memristor to be better; example 2 is compared with examples 4 and 5, and it can be seen that Al 2 O 3 The thickness of the dielectric layer can influence the stability of the topological phase-change memristor; example 2 compared to examples 6 and 7, it can be seen that the manufacturing process parameters also have an effect on the stability of the topological phase-change memristor.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, alternatives, and improvements that fall within the spirit and scope of the invention.
Claims (10)
1. The utility model provides a topology phase transition memristor that conducting wire forms regional controllable which characterized in that: the topological phase change memristor comprises a bottom electrode layer, a resistance change functional layer, a dielectric layer and a top electrode layer from bottom to top;
after voltage is applied, a conductive channel is formed between the bottom electrode layer and the top electrode layer, and the conductive channel conducts the top electrode layer and the bottom electrode layer;
the conductive channel comprises a first conductive wire and a second conductive wire, the first conductive wire is formed in the dielectric layer, the second conductive wire is formed in the resistive function layer, and the forming area of the second conductive wire is limited by the first conductive wire; the forming area of the second conductive wire corresponds to the forming area of the first conductive wire, and the width of the second conductive wire is smaller than or equal to the width of the first conductive wire so as to limit the formation of the second conductive wire through the first conductive wire.
2. The topological phase change memristor with controllable conductive wire formation area of claim 1, wherein: after negative voltage is applied, the dielectric layer is subjected to conductive wire electroforming treatment to form a first conductive wire; and (5) applying a positive bias voltage of 1-5V again, wherein the resistance change function layer forms a second conductive wire.
3. The topological phase change memristor with controllable conductive wire formation area of claim 1, wherein: the thickness of the bottom electrode layer is 20-50 nm, and the material of the bottom electrode layer is La 1-y Sr y MnO 3 Wherein y is less than or equal to 1; the thickness of the top electrode layer is 70-100 nm, and the top electrode layer is a Pt or Au electrode.
4. The topological phase change memristor with controllable conductive wire formation area of claim 1, wherein: the thickness of the dielectric layer is 2-4 nm, and the material of the dielectric layer is A a O b Wherein A is any one of Al, hf, ta, zr, biFe and BaTi, and a and b are both greater than 0.
5. The topological phase change memristor with controllable conductive wire formation region as claimed in claim 4, wherein: the dielectric layer is Al 2 O 3 、HfO 2 、TaO 2 、ZrO 2 、BiFeO 3 And BaTiO 3 Any one of the following.
6. The topological phase change memristor with controllable conductive wire formation area of claim 1, wherein: the thickness of the resistance change functional layer is 30-50 nm, and the material of the resistance change functional layer is SrFeO 2.5 Or SrCoO 2.5 。
7. The method for manufacturing the topological phase-change memristor with controllable conductive wire formation area according to any one of claims 1 to 6, is characterized by comprising the following steps: the method comprises the following steps:
s1, depositing a bottom electrode layer on the surface of a substrate;
s2, depositing a resistance change function layer on the surface of the bottom electrode layer;
s3, depositing a dielectric layer on the surface of the resistance change functional layer by adopting an atomic layer deposition method;
and S4, carrying out photoetching treatment on the dielectric layer, and then preparing a top electrode layer on the surface of the photoetched dielectric layer by a magnetron sputtering or electron beam evaporation method.
8. The method for manufacturing the topological phase-change memristor with the controllable conductive wire forming area as claimed in claim 7, wherein the method is characterized by comprising the following steps: in the step S1 and the step S2, a pulse laser deposition method is adopted for deposition, and the deposition process conditions comprise: the temperature is 650-700 ℃, the atmosphere of the cavity is oxygen, the laser energy is 250-450 mJ, the laser frequency is 1-8 Hz, and the vacuum degree is 1X 10 -7 ~ 9×10 -6 Pa, the distance between the substrate and the target is 40-60 mm.
9. The method for manufacturing the topological phase-change memristor with the controllable conductive wire forming area as claimed in claim 8, wherein the method is characterized by comprising the following steps: the air pressure deposited in the step S1 is 15-20 Pa, and the air pressure deposited in the step S2 is 0.6-2 Pa.
10. The method for manufacturing the topological phase-change memristor with the controllable conductive wire forming area as claimed in claim 7, wherein the method is characterized by comprising the following steps: the process conditions of the atomic layer deposition method in step S3 include: the atmosphere of the cavity is nitrogen, and the deposition speed is 0.08-0.12 nm/cycle.
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