CN117528758A - Improved OM timing synchronization method for low-complexity reception - Google Patents

Improved OM timing synchronization method for low-complexity reception Download PDF

Info

Publication number
CN117528758A
CN117528758A CN202311735943.4A CN202311735943A CN117528758A CN 117528758 A CN117528758 A CN 117528758A CN 202311735943 A CN202311735943 A CN 202311735943A CN 117528758 A CN117528758 A CN 117528758A
Authority
CN
China
Prior art keywords
signal
timing
timing synchronization
improved
synchronization method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311735943.4A
Other languages
Chinese (zh)
Inventor
毛瑞源
李建国
冯晰宇
郭宇轩
杨凯
卜祥元
安建平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Institute of Technology BIT
Original Assignee
Beijing Institute of Technology BIT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Institute of Technology BIT filed Critical Beijing Institute of Technology BIT
Priority to CN202311735943.4A priority Critical patent/CN117528758A/en
Publication of CN117528758A publication Critical patent/CN117528758A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/0035—Synchronisation arrangements detecting errors in frequency or phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/004—Synchronisation arrangements compensating for timing error of reception due to propagation delay
    • H04W56/005—Synchronisation arrangements compensating for timing error of reception due to propagation delay compensating for timing error by adjustment in the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0024—Carrier regulation at the receiver end
    • H04L2027/0026—Correction of carrier offset
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0083—Signalling arrangements
    • H04L2027/0097—Adaptive synchronisation signals
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Abstract

The invention discloses an improved OM timing synchronization method for low-complexity receiving, and belongs to the technical field of high-speed wireless communication. The implementation method of the invention comprises the following steps: interpolating zero for time domain sampling signal with low oversampling multiple, and storing in buffer; controlling and reading signals in the buffer according to the mNCO control quantity m to finish timing frequency offset compensation; performing N-point fast Fourier transform, and completing matched filtering in a frequency domain; generating a twiddle factor according to the mNCO control quantity delta, multiplying the twiddle factor by a frequency domain signal, and finishing timing phase offset compensation; transform it to time domain by IFFT; calculating an OM timing error estimated value by using the signal through a Gridel algorithm; and (3) feeding the timing error estimated value into a mNCO (mNCO) for accumulation through a first-order proportional integral filter, generating control quantities delta and m, and feeding back to the two-step cyclic processing of the timing frequency offset and the phase offset compensation to finish timing synchronization. The invention can complete timing synchronization under low oversampling multiple, saves ADC bandwidth and saves hardware resources.

Description

Improved OM timing synchronization method for low-complexity reception
Technical Field
The invention relates to a timing error detection and compensation method in a digital communication system, in particular to a timing synchronization method in high-speed digital communication, and belongs to the technical field of high-speed wireless communication.
Technical Field
Timing errors are common in communication systems due to the effects of different sources of transmit and receive clocks. The timing error can affect the received signal in two aspects, on one hand, the amplitude of the sampling point can be affected, and the signal-to-noise ratio is deteriorated; on the other hand, the impulse response of the communication system is destroyed, and inter-code crosstalk is introduced. Timing synchronization is therefore an integral part of the system. The timing synchronization method commonly used at present comprises an external synchronization method and a self synchronization method. The external synchronization method refers to a method that a transmitting end periodically inserts auxiliary data, a receiving end extracts the auxiliary data to obtain timing information, and the method comprises a pilot auxiliary synchronization method and a pseudo code auxiliary synchronization method, is simple and easy to implement, but occupies signal bandwidth and causes low efficiency. The self-synchronization method is a method for estimating and compensating timing deviation by directly using characteristics of a baseband signal without any auxiliary information. The self-synchronization method also comprises a feedforward type and a feedback type, wherein the feedforward type uses an unbiased estimation algorithm of timing errors to directly estimate the timing errors of a section of signals and then compensate the timing errors. The feedback type completes timing synchronization by continuously comparing the error between the local clock sampling value and the ideal sampling value and compensating. In general, the self-synchronization method has higher implementation complexity than the external synchronization method, but saves signal bandwidth for transmitting information, and the implementation complexity is negligible along with the continuous development of electronic technology, so that the self-synchronization method is mostly adopted in the high-speed digital communication timing synchronization at present.
In the existing self-synchronization method, the classical feedback algorithm is the Gardner algorithm, which only requires twice over-sampling for baseband symbols, but has low convergence rate and is greatly affected by noise. The classical feed-forward algorithm is OM algorithm, which is an unbiased estimation of the signal, can directly compensate the error without waiting for convergence, but requires four times of baseband symbol oversampling, otherwise the estimation performance will be rapidly deteriorated, and this certainly restricts the further improvement of the communication rate under the condition of limited ADC sampling rate. Under the condition, the receiving end samples the signal which is lower than four times of oversampling, the four times and more of oversampling times are achieved through a time domain zero filling mode, and then the OM algorithm is used for timing synchronization, so that the limit of the oversampling times can be broken through, and the higher code rate can be realized; on the basis, the method adopts the Griter algorithm (Goertzel Algorithm) to simplify OM timing error estimation, reduces the complexity of the system, saves resources, and is an effective way for timing synchronization of high-speed digital communication signals.
Disclosure of Invention
The invention discloses an improved OM timing synchronization method for low complexity reception, which aims to: interpolation 0 is carried out on a time domain sampling signal with low oversampling multiple, then an interpolation signal of a time domain is obtained through matched filtering, the oversampling multiple is improved, and the timing offset of the signal is estimated through a classical OM algorithm; on the basis, the method adopts the Gridel algorithm to simplify OM timing error estimation, effectively solves the problem of poor performance of the traditional OM timing synchronization method under low oversampling multiple, saves cost and improves the bandwidth utilization rate of the ADC; and the method adopts the Gridel algorithm to simplify OM timing error estimation, reduce the complexity of the system and save hardware resources.
In order to achieve the above purpose, the invention adopts the following technical scheme:
the invention discloses an improved OM timing synchronization method for low-complexity receiving, which comprises the following steps ofThe signal is sampled by multiplying the oversampling rate, and after digital down-conversion, the sampled signal is subjected to Q-time interpolation by 0 and then stored in a buffer. Continuously reading N signal points by using an overlap retention method according to a start address controlled by mNCO control quantity m, wherein the N signal points comprise N/2 points of the last processing period and N/2 new points, and finishing timing frequency offset compensation in the process; feeding inPerforming N-point fast Fourier transform (Fast Fourier Transform, FFT), and multiplying the N-point fast Fourier transform by a pre-stored N-point FFT matched filter frequency domain value to finish matched filtering; multiplying the frequency domain value by a twiddle factor e according to the mNCO output value delta -j2πkδ/N The timing phase error correction is completed, the corrected value is subjected to N-point inverse fast fourier transform (Inverse Fast Fourier Transform, IFFT), and the value of the N/2 point after the correction is retained as an output, which is a P-times oversampled baseband signal. Calculating timing error for the output value using OM algorithm, which in its implementation, squares the signal term +.>The computation of discrete fourier transform (Discrete Fourier Transform, DFT) values at this point uses the guerre algorithm to reduce the number of computations. And (3) sending the timing error estimated value to mNCO through a first-order proportional integral filter to accumulate the integral value, generating control amounts delta and m, feeding back to the timing frequency offset compensation and timing phase offset compensation steps, and circularly processing to finish timing synchronization, thereby effectively solving the problem of poor performance of the traditional OM timing synchronization method under the condition of low oversampling multiple, reducing the complexity of the system and saving hardware resources.
The invention discloses an improved OM timing synchronization method for low-complexity receiving, which comprises the following steps:
step one, the receiver takes the oversampling rate of the received signalI.e. the sampling rate is +.>Sampling is performed.
The receiver receives a signal represented as:
wherein a is n To transmit a symbol, T is the symbol period, ε (T) is the timing errorDifference, g T (t) represents a shaping filter, n (t) is Gaussian white noise;
at a sampled rate ofThe received signal expression becomes:
the sampling rate and baseband signal bandwidth meet the following requirements:
where α represents the shaping coefficient and B represents the baseband signal bandwidth.
And step two, carrying out Q times interpolation on the sampled signals so as to accurately estimate the timing error.
The interpolated signal is expressed as:
step three, the signal interpolated in the step two is cached in a buffer, and then the control word m output in the previous period is outputted according to mNCO k-1 The signal of length N is read using the overlap-save method.
The overlapping reservation method comprises the following steps: and reading N/2 sampling points of the previous period and N/2 new sampling points, and outputting only the last N/2 sampling points when outputting, thereby counteracting the aliasing influence caused by the subsequent substitution of frequency domain multiplication for linear convolution.
The initial address of the buffer in the kth processing period under the control of the control word m is as follows:
and fourthly, carrying out N-point FFT after zero padding of the digital matched filter, and carrying out N-point FFT on the read N-point signal sequence, and multiplying the N-point signal sequence and the N-point signal sequence to finish frequency domain matched filtering.
The FFT expression of the kth N-point data sequence is as follows:
the symbol length of the digital matched filter is span, the oversampling multiple is span, the total length is span, the span is span+1, after the tail zero padding is carried out to the length of N points, N points FFT is carried out, and the calculated value is stored in ROM after being calculated in advance, so that the real-time calculated amount is saved.
The recording result is H (l)
The matched filter output result is:
Y k (l)＝X k (l)H(l)
step five, according to the control signal delta of the last period output by mNCO k-1 And generating a twiddle factor, multiplying the twiddle factor with the frequency domain signal, and finishing timing error phase compensation.
The expression of the twiddle factor is:
the form of the piecewise function occurs due to the difference in the output data arrangement of the FFT and DFT.
The result after the frequency domain timing phase error compensation is completed is:
S k (l)＝W(l,δ k-1 )Y k (l)
and step six, performing N-point IFFT on the data subjected to frequency domain timing phase compensation, and then taking the data of the post N/2 as output.
Step seven, according to classical OM algorithm, obtaining output signal by means of module squareThe discrete Fourier transform value is used for solving the argument of the result and dividing the argument by-2 pi to obtain the unbiased estimation of the residual timing error after compensation.
The signal with the length of N/2 is expressed as:
in which g (r) =g T (r)*g R (r) shows the convolution of the transmit shaping filter and the receive matched filter.
In the middle ofRepresenting the number of code symbols contained in the sequence.
Where epsilon (t) is reduced to a short-term stationary random process, the residual timing error is considered to be constant epsilon during the kth M long symbol period k 。
Taking the timing error estimate after squaring the signal modulo:
is epsilon k Is an unbiased estimate of (1).
The method for solving the discrete Fourier transform value is described as follows:
according to the discrete fourier transform formula:
unfolding the composite material:
order theThen there are:
order theThen there are:
and so on, get x n Is as follows:
then
From this iteration, the discrete Fourier transform of the signal is foundA value at. The algorithm needs 2MP+1 times of real addition and MP+2 times of real multiplication, and compared with the traditional DFT, the algorithm has the advantage that the operation amount is obviously reduced.
Step eight, calculating the timing error estimated valueBy means of the loop-integrating filter,obtaining integral value epsilon k 。
The transfer function of the loop integrating filter is:
wherein C is 1 ,C 2 And selecting according to the actual engineering requirements.
Step nine, the timing error epsilon outputted by the loop filter k The control quantity m and delta are output by the numerical control oscillator in the improved numerical control oscillator mNCO.
The specific implementation method of the numerical control oscillator comprises the following steps:
step 9.1: accumulating values of loop filter
δ′ k ＝δ′ k-1 +ε k
Step 9.2: determining m and delta based on whether overflow occurs or not and the overflow direction
And step ten, returning the loop filter outputs m and delta to the step three and the step five, so as to circularly process the input data until the timing synchronization is completed.
The beneficial effects are that:
1. the improved OM timing synchronization method for low complexity receiving disclosed by the invention has the advantages that through time domain interpolation of the received signal with low oversampling multiple and then through OM timing error estimation, compared with the method for directly and completely sampling the signal with four times or more of oversampling multiple, the timing error estimation is carried out, the required ADC bandwidth is greatly reduced, and the communication cost is reduced.
2. The improved OM timing synchronization method for low-complexity receiving utilizes the Gridel algorithm to replace discrete Fourier transform to calculate the OM timing error value, reduces the calculation complexity and saves hardware resources.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will briefly introduce the drawings that are required to be used in the embodiments or the prior art descriptions, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of an improved OM timing synchronization method for low complexity reception of the present invention;
FIG. 2 is a processing block diagram of an improved OM timing synchronization method for low complexity reception in accordance with the present invention;
fig. 3 is a graph showing the comparison between the error rate curve and the theoretical value after the timing error compensation in embodiment 1 of the present invention.
Detailed Description
For a better description of the objects and advantages of the present invention, the following description will be given with reference to the accompanying drawings and examples.
Example 1:
as shown in fig. 1, the embodiment discloses an improved OM timing synchronization method based on a guerre algorithm, which specifically comprises the following implementation steps:
step one, a receiver uses an oversampling rate to a signal with a symbol rate of 4Gsps and a modulation mode of 16QAMI.e. the sampling rate is 5 GHz.
The receiver receives a signal represented as:
wherein a is n For transmitting symbols, i.e. 16QAM, T is the symbol period, isEpsilon (t) is the timing error, g T (t) represents a shaping filter,the shaping filter adopts a root raised cosine filter, the roll-off coefficient is 0.2, and n (t) is Gaussian white noise;
sampled rate f s Digital sampling at 5GHz, the received signal expression becomes:
and step two, 4 times of interpolation is carried out on the sampled signals so as to accurately estimate the timing error.
The interpolated signal may be expressed as:
step three, the signal interpolated in the step two is cached in a buffer, and then the control word m output in the previous period is outputted according to mNCO k-1 The signal with length 250 is read using the overlap-save method.
The overlapping reservation method comprises the following steps: the sampling points of the previous period of 125 are read, and the sampling points of the new period of 125 are read, and only the last 125 sampling points are output when the sampling points are output, so that the aliasing influence caused by the subsequent substitution of frequency domain multiplication for linear convolution is counteracted.
The initial address of the buffer in the kth processing period under the control of the control word m is as follows:
addr k ＝addr k-1 +125+m k-1
and fourthly, carrying out 250-point FFT after zero filling of the digital matched filter, and carrying out 250-point FFT on the read 250-point signal, and multiplying the 250-point signal to finish frequency domain matched filtering.
The FFT expression of the kth segment 250 point data sequence is:
X k (l)＝FFT(x′(r)),l,r＝125k,125k+1,…,125*(k+2)-1
the symbol length of the digital matched filter is 10, the oversampling multiple is 5, the total length is 51, after the length from zero padding at the end to 250 points, the FFT is carried out at 250 points, and the calculated value can be stored in ROM after being calculated in advance, so that the real-time calculated amount can be saved. The recording result is H (l)
The matched filter output result is:
Y k (l)＝X k (l)H(l)
step five, according to the control signal delta of the last period output by mNCO k-1 And generating a twiddle factor, multiplying the twiddle factor with the frequency domain signal, and finishing timing error phase compensation.
The expression of the twiddle factor is:
the result after the frequency domain timing phase error compensation is completed is:
S k (l)＝W(l,δ k-1 )Y k (l)
and step six, performing 250-point IFFT on the data subjected to frequency domain timing phase compensation, and taking the data of 125 points as output.
Step seven, according to classical OM algorithm, obtaining output signal by means of module squareThe discrete Fourier transform value is used for solving the argument of the result and dividing the argument by-2 pi to obtain the unbiased estimation of the residual timing error after compensation.
The length 125 signal is expressed as:
in which g (r) =g T (r)*g R (r) shows the convolution of the transmit shaping filter and the receive matched filter.
Where m=25, represents the number of code symbols included in the sequence.
In the formula, epsilon (t) is assumed to be a short-time stable random process, and the residual timing error is regarded as constant epsilon in the kth M long symbol period k 。
Taking the timing error estimate after squaring the signal modulo:
is epsilon k Is an unbiased estimate of (1).
The method for solving the discrete Fourier transform value is described as follows:
let x n The method comprises the following steps:
then
Step eight, calculating the timing error estimated valueObtaining integral value epsilon by loop integral filter k
The transfer function of the loop integrating filter is:
wherein C is 1 ＝2,
Step nine, timing the output of the loop filterError epsilon k The control quantity m and delta are output by the numerical control oscillator in the improved numerical control oscillator mNCO.
The specific implementation method of the numerical control oscillator comprises the following steps:
step 9.1: accumulating values of loop filter
δ′ k ＝δ′ k-1 +ε k
Step 9.2: determining m and delta based on whether overflow occurs or not and the overflow direction
And step ten, returning the loop filter outputs m and delta to the step three and the step five, so as to circularly process the input data until the timing synchronization is completed.
As shown in FIG. 3, the data information bits after timing synchronization are compared with the transmitted data information bits, and the error rate curve is drawn and compared with the theoretical value.
While the foregoing detailed description is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims (7)

1. An improved OM timing synchronization method for low complexity reception, characterized by: comprises the following steps of the method,
step one, the receiver takes the oversampling rate of the received signalI.e. the sampling rate is +.>Sampling;
the receiver receives a signal represented as:
wherein a is n To transmit a symbol, T is the symbol period, ε (T) is the timing error, g T (t) represents a shaping filter, n (t) is Gaussian white noise;
at a sampled rate ofThe received signal expression becomes:
the sampling rate and baseband signal bandwidth meet the following requirements:
wherein alpha represents a shaping coefficient, and B represents a baseband signal bandwidth;
step two, carrying out Q times interpolation on the sampled signals so as to accurately estimate timing errors;
the interpolated signal is expressed as:
step three, the signal interpolated in the step two is cached in a buffer, and then the control word m output in the previous period is outputted according to mNCO k-1 Reading a signal of length N using an overlap-save method;
step four, carrying out N-point FFT after zero padding of the digital matched filter, and carrying out N-point FFT on the read N-point signal sequence, and multiplying the N-point signal sequence and the N-point signal sequence to finish frequency domain matched filtering;
step five, according to the control signal delta of the last period output by mNCO k-1 Generating a twiddle factor, multiplying the twiddle factor with the frequency domain signal, and finishing timing error phase compensation;
step six, performing N-point IFFT on the data subjected to frequency domain timing phase compensation, and then taking the data of the post N/2 as output;
step seven, according to classical OM algorithm, obtaining output signal by means of module squareThe discrete Fourier transform value is used for solving the argument of the result and dividing the argument by-2 pi to obtain an unbiased estimate of the residual timing error after compensation;
step eight, calculating the timing error estimated valueObtaining integral value epsilon by loop integral filter k ；
Step nine, the timing error epsilon outputted by the loop filter k Inputting the control quantity m and delta into an improved numerical control oscillator mNCO;
and step ten, returning the loop filter outputs m and delta to the step three and the step five, so as to circularly process the input data until the timing synchronization is completed.
2. An improved OM timing synchronization method for low complexity reception as claimed in claim 1, wherein: in the third step, the first step is performed,
the overlapping reservation method comprises the following steps: reading N/2 sampling points of the previous period and N/2 new sampling points, and outputting only the last N/2 sampling points when outputting, thereby counteracting the aliasing influence caused by the subsequent substitution of frequency domain multiplication for linear convolution;
the initial address of the buffer in the kth processing period under the control of the control word m is as follows:
3. an improved OM timing synchronization method for low complexity reception as claimed in claim 2, wherein: the realization method of the fourth step is that,
the FFT expression of the kth N-point data sequence is as follows:
the symbol length of the digital matched filter is span, the oversampling multiple is span, the total length is span, the span is sps+1, after the tail zero padding is carried out to the length of N points, N points FFT is carried out, and the calculated value is stored in ROM after being calculated in advance, so that the real-time calculated amount is saved; the recording result is H (l)
The matched filter output result is:
Y k (l)＝X k (l)H(l)
4. an improved OM timing synchronization method for low complexity reception as claimed in claim 3, wherein: in the fifth step, the first step is to carry out the process,
the expression of the twiddle factor is:
the result after the frequency domain timing phase error compensation is completed is as follows:
S k (l)＝W(l,δ k-1 )Y k (l)
5. an improved OM timing synchronization method for low complexity reception as claimed in claim 4, wherein: in the seventh step, the first step is performed,
the signal with the length of N/2 is expressed as:
in which g (r) =g T (r)*g R (r) represents the convolution of the transmit shaping filter and the receive matched filter;
in the middle ofRepresenting the number of code symbols contained in the sequence;
where epsilon (t) is reduced to a short-term stationary random process, the residual timing error is considered to be constant epsilon during the kth M long symbol period k ；
Taking the timing error estimate after squaring the signal modulo:
is epsilon k Is an unbiased estimate of (1);
the method for solving the discrete Fourier transform value is described as follows:
according to the discrete fourier transform formula:
unfolding the composite material:
order theThen there are:
order theThen there are:
and so on, get x n Is as follows:
then
From this iteration, the discrete Fourier transform of the signal is foundA value at; this algorithm requires 2MP+1 real additions and MP+2 real multiplications.
6. An improved OM timing synchronization method for low complexity reception as claimed in claim 7, wherein: in the step eight, the step of,
the transfer function of the loop integrating filter is:
wherein C is 1 ,C 2 And selecting according to the actual engineering requirements.
7. An improved OM timing synchronization method for low complexity reception as claimed in claim 6, wherein: in the step nine of the method,
the specific implementation method of the numerical control oscillator comprises the following steps:
step 9.1: accumulating values of loop filter
δ′ k ＝δ′ k-1 +ε k
Step 9.2: determining m and delta based on whether overflow occurs or not and the overflow direction
CN202311735943.4A 2023-12-15 2023-12-15 Improved OM timing synchronization method for low-complexity reception Pending CN117528758A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311735943.4A CN117528758A (en) 2023-12-15 2023-12-15 Improved OM timing synchronization method for low-complexity reception

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311735943.4A CN117528758A (en) 2023-12-15 2023-12-15 Improved OM timing synchronization method for low-complexity reception

Publications (1)

Publication Number Publication Date
CN117528758A true CN117528758A (en) 2024-02-06

Family

ID=89759205

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311735943.4A Pending CN117528758A (en) 2023-12-15 2023-12-15 Improved OM timing synchronization method for low-complexity reception

Country Status (1)

Country Link
CN (1) CN117528758A (en)

Similar Documents

Publication Publication Date Title
US5909384A (en) System for dynamically adapting the length of a filter
KR100925672B1 (en) Adaptive equalizer operating at a sampling rate asynchronous to the data rate
CN1719818B (en) Apparatus and method for processing sampling frequency deviation tracking signal in orthogonal frequency division multiplex system
US7184468B2 (en) Method and system for implementing a conditional one's complement of partial address
CN102065043B (en) Frequency domain parallel demodulation method in high-speed communication system
CN106911624B (en) Channel compensation calibration method and system
JPH08265383A (en) Multirate receiver with single interpolation adjustment filter and its method
CN111884973B (en) Data receiving method for receiving end of single carrier frequency domain equalization system
CN111490866B (en) Timing recovery method in high-speed parallel demodulation structure and digital communication system
CN111194077B (en) Timing synchronization method under low sampling rate
CN116232558B (en) IQ delay compensation method and device, electronic equipment and storage medium
CN114938255A (en) High-speed time domain parallel timing synchronization method based on O & M algorithm
CN101404633B (en) Carrier wave tracing method for single carrier system based on block transmission
US20100182899A1 (en) OFDM Time Basis Matching With Pre-FFT Cyclic Shift
CN102204196A (en) Channel estimation in OFDM receivers
CN117528758A (en) Improved OM timing synchronization method for low-complexity reception
US7920649B2 (en) Recovering precoded data using a Mueller-Müller recovery mechanism
US10735010B1 (en) CDR-based timing skew calibration
JP2000101544A (en) Time error compensation device and multi-carrier modem including the device
CN109714144B (en) Timing synchronization recovery method and system
CN111726308B (en) Orthogonal matching pursuit channel estimation method based on frequency response pre-interpolation
CN110708039B (en) Coefficient fitting method of FARROW filter
CN111294302A (en) Synchronization method, device, equipment and storage medium of MSK modulation signal
CN106789797B (en) Symbol synchronization method for wireless burst communication PSK signal
CN111106925B (en) Timing synchronization method for reducing steady-state error

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination