CN117527026A - Front-end circuit of millimeter wave anti-interference CMOS integrated receiver - Google Patents
Front-end circuit of millimeter wave anti-interference CMOS integrated receiver Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
- H04B7/0837—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using pre-detection combining
- H04B7/0842—Weighted combining
- H04B7/086—Weighted combining using weights depending on external parameters, e.g. direction of arrival [DOA], predetermined weights or beamforming
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/1027—Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal
Abstract
The invention discloses a millimeter wave anti-interference CMOS integrated receiver front-end circuit, which comprises: the low-noise transconductance amplifier comprises a low-noise transconductance amplifier circuit Gm, a passive mixer, a transimpedance amplifier and a local oscillator signal driver. The invention adopts LNA pre-architecture, and comprises a low noise transconductance circuit, an N-path mixer, a transimpedance amplifier and other circuits, wherein the working frequency range of the work is 21-32GHz, the low noise transconductance circuit adopts a noise elimination structure, so that the low noise transconductance circuit shows extremely low noise coefficient at the output end, and MOS transistors in the N-path mixer work at approximately Vth+0.7A LO Under the bias condition of (1), the problem of interference between I/Q baseband is effectively solved, the anti-interference capability of the receiver is improved, the baseband part adopts a two-stage design, a four-order Butterworth low-pass filter is obtained, the out-of-band attenuation degree is up to 80dB/dec, and the anti-interference capability of the receiver is effectively improved.
Description
Technical Field
The invention belongs to the field of radio frequency integrated circuits, and particularly relates to a front-end circuit of a millimeter wave anti-interference CMOS integrated receiver.
Background
Digital beamforming is a key technology for millimeter wave phased arrays and multiple input multiple output (M IMO) systems in wireless communications, aimed at improving signal transmission efficiency and system reliability, which adjusts and controls the direction of the transmitted signal by means of sophisticated Digital Signal Processing (DSP) to optimize channel capacity. However, implementing digital beamforming requires a highly linear Receiver (RX) because it relies on digital signal processing to process the interference and optimize the signal, with the result that the interference signal often causes saturated interference distortion to the channel of the microwave analog front end, and thus passive mixer (Pass mixer) pre-architecture is proposed, but this receiver has poor noise performance due to no gain before down-conversion, another is a Low Noise Amplifier (LNA) +active mixer (Act mixer) architecture, a low noise figure being particularly attractive, but anti-blocking capability being poor.
As shown in fig. 1, in document [ 1 ], the structure adopts a mixer pre-architecture, and comprises an N-path mixer, a transimpedance amplifier and the like, and the innovation is that the whole architecture uses the N-path mixer, and the blocking suppression is realized by using adjustable frequency, so that the linearity is better, but the cost is higher NF, and the value of NF is as high as 12.5-15.7 dB.
On the other hand, the structure in document [ 2 ] adopts an Act iveM ixer and LNA architecture, which has the advantage of realizing a low noise figure, but is poor in terms of anti-interference, and the B1dB value is-28.5 dBm.
The existing receiver is poor in general noise coefficient or anti-blocking, and the out-of-band attenuation degree of the baseband is low, so that the receiving end is easily affected by out-of-band interference, and the signal quality is easily affected.
To sum up, we provide a front-end circuit of a millimeter wave anti-interference CMOS integrated receiver.
Disclosure of Invention
The invention aims to provide a front-end circuit of a millimeter wave anti-interference CMOS integrated receiver, which solves the existing problems.
In order to achieve the above purpose, the present invention provides the following technical solutions:
a millimeter wave anti-interference CMOS integrated receiver front-end circuit comprising: the low-noise transconductance amplifying circuit Gm, the passive mixer, the transimpedance amplifier and the local oscillation signal driver;
the low noise transconductance amplifying circuit includes: PMOS tube M 1 NMOS tube M 2 NMOS tube M 3 NMOS tube M 4 Capacitance C 1 Transformer T 1 Resistance R 6 ；
The transimpedance amplifier comprises a first stage and a second stage which are identical in structure, and the transimpedance amplifier comprises: capacitor C TIA1 Capacitance C TIA2 Capacitance C TIA3 Capacitance C TIA4 Capacitance C F1 Capacitance C F2 Resistance R TIA2 Resistance R TIA1 Resistance R TIA3 Resistance R TIA4 Resistance R 1 Resistance R 2 Resistance R 3 Resistance R 4 First and second baseband TIA units;
the passive mixer comprises a first passive mixer and a second passive mixer;
the passive mixers have the same structure and all comprise: NMOS tube M 18 NMOS tube M 19 NMOS tube M 21 NMOS tube M 21 Capacitance C 6 Capacitance C 7 Resistance R 7 Resistance R 8 ；
The local oscillator signal driver comprises a quadrature mixer QH and an LO driver;
the input radio frequency signal is transmitted through the port V IN Single ended input via low noise transconductanceThe amplifying circuit converts the two differential current signals; the input local oscillation signal is formed by a port LO IN Single-ended input, obtaining two paths of orthogonal local oscillation signals through an orthogonal mixer, and waiting for two paths of differential local oscillation signal sources after the two paths of orthogonal local oscillation signals respectively pass through a group of LO drivers; the first path of differential current signal is multiplied by the input local oscillation signals LO0 and LO1 through the input end of the first passive mixer to obtain an intermediate frequency voltage signal, and then the intermediate frequency voltage signal is subjected to a transimpedance amplifier to obtain a baseband voltage signal BB_I output by the first path of differential current signal; similarly, the second differential current signal is driven by the local oscillation signals LO2 and LO3 through the second passive mixer and the second transimpedance amplifier to obtain a baseband voltage signal bb_q output by the second path.
Preferably, the input end of the low noise transconductance amplifying circuit Gm is V IN The first path positive output end V of the low-noise transconductance amplifying circuit Gm O1+ Input terminal V of first and second passive mixers in2 Connecting; the first path of negative output end V of the low-noise transconductance amplifying circuit Gm O1- Input terminal V of first and second passive mixers in1 And (5) connection.
Preferably, the resistor R 6 One end of (a) is connected with NMOS tube M 2 Gate terminal of (C) and PMOS tube M 1 Gate terminal of (d) and NMOS transistor M 4 Is connected with the gate terminal of the low noise transconductance amplifying circuit as the input terminal V IN The resistance R 6 The other end of (2) is connected with NMOS tube M 2 Drain terminal of (C) and PMOS tube M 1 Drain terminal of (2) and NMOS transistor M 3 Is connected with the gate end of the NMOS tube M 2 The source end of the PMOS tube M is grounded 1 The NMOS tube M is connected with the source terminal of the power supply voltage VDD 3 Is grounded, the NMOS tube M 3 Is not limited by the leakage terminal of the transformer T 1 Is connected with the end a of the transformer T 1 Is connected with the power supply voltage VDD, the transformer T 1 C-terminal of (2) and NMOS tube M 4 Is connected with the drain terminal of the NMOS tube M 4 Is grounded, the transformer T 1 E terminal of (C) and resistor C 1 One end of the output terminal V is connected with the output terminal V as a low-noise transconductance amplifying circuit O+ The transformer T 1 D-terminal of (d) and resistor C 1 Is connected as low to the other end ofOutput terminal V of noise transconductance amplifying circuit O- 。
Preferably, the forward input end of the first-stage baseband TIA unit and the capacitor C TIA2 And a resistor R TIA2 And the output terminal V of the mixer out2 And capacitor C F1 Is connected to one end of the first stage transimpedance amplifier and serves as an input terminal V of the first stage transimpedance amplifier in3 The reverse input end of the first-stage baseband TIA unit and a capacitor C TIA1 And a resistor R TIA1 And the output terminal V of the mixer out1 And capacitor C F1 Is connected with the other end of the first stage trans-impedance amplifier and is used as the input end V of the first stage trans-impedance amplifier in4 The forward output end V of the first-stage baseband TIA unit out3 Respectively and capacitance C TIA1 And the other end of (2) and the resistor R TIA1 And the other end of (2) and the resistor R 1 Is connected with one end of the first-stage baseband TIA unit reverse output end V out4 Respectively at the capacitor C TIA2 And the other end of (2) and the resistor R TIA2 And the other end of (2) and the resistor R 2 Is connected with one end of the resistor R 2 And the other end of (C) and the capacitor C F2 And a resistor R TIA4 And a resistor R 4 Is connected with one end of the resistor R 1 And the other end of (C) and the capacitor C F2 And the other end of (2) and the resistor R TIA3 And a resistor R 3 Is connected with one end of the resistor R 3 The other end of (2) and the negative input end V of the second-stage baseband TIA unit in6 And capacitor C TIA3 Is connected with one end of the resistor R 4 The other end of the (B) and the negative and positive input end V of the second-stage baseband TIA unit in5 And capacitor C TIA4 One end of the second baseband TIA unit is connected with the negative output end V ou6 Respectively and capacitance C TIA4 And the other end of (2) and the resistor R TIA4 The other end of the second-stage baseband TIA unit is connected with the positive output end V of the second-stage baseband TIA unit ou5 Respectively and capacitance C TIA3 And the other end of (2) and the resistor R TIA3 Is connected with the other end of the connecting rod,
preferably, the first and second baseband TIA units have the same structure, and each include: PMOS tube M 7 PMOS tube M 8 PMOS tube M 9 PMOS tube M 14 PMOS tube M 15 NMOS tube M 10 NMOS tube M 11 NMOS tube M 12 NMOS tube M 13 NMOS tube M 16 NMOS tube M 17 Capacitance C 2 Capacitance C 3 Resistance R 9 Resistance R 10 Resistance R 11 Resistance R 12 。
Preferably, the PMOS tube M 7 Is connected with the power supply voltage V DD PMOS tube M 7 Is connected with the bias voltage V b1 The PMOS tube M 7 Drain terminal of (C) and PMOS tube M 8 Source end of (1) and PMOS tube M 9 Is connected with the source end of the PMOS tube M 8 Gate terminal of (a) is used as input terminal V of baseband TIA unit in4 PMOS tube M 8 Drain terminal of (d) and resistor R 9 And NMOS tube M 10 Drain terminal of (2) and NMOS transistor M 13 Drain terminal of (2) and NMOS transistor M 12 Gate terminal of (d) and NMOS transistor M 16 Gate terminal of (C) and capacitor C 2 Is connected as the output terminal V of the baseband TIA unit o4 The NMOS tube M 10 Source terminal of (2) and NMOS tube M 11 The source end of the NMOS tube M is connected with the ground 10 Gate terminal of (2) and NMOS transistor M 11 Gate terminal of (d) and resistor R 9 And the other end of (2) and the resistor R 10 Is connected with one end of the NMOS tube M 11 Drain terminal of (d) and resistor R 10 And the other end of the PMOS tube M 9 Drain terminal of (2) and NMOS transistor M 12 Drain terminal of (2) and NMOS transistor M 13 Gate terminal of (d) and NMOS transistor M 17 Gate terminal of (C) and capacitor C 3 Is connected as an output terminal V of the baseband TIA unit o3 The NMOS tube M 12 Source terminal of (2) and NMOS tube M 13 The source end of the PMOS tube M is connected with the ground 9 Gate terminal of (1) is used as input terminal V of baseband TIA unit in3 The NMOS tube M 16 Source terminal of (2) and NMOS tube M 17 The source ends of the NMOS tube M are respectively grounded 17 Drain terminal of (C) and capacitor C 2 And the other end of (2) and the resistor R 11 One end of (2) and PMOS tube M 15 Is connected with the drain terminal of the PMOS tube M 15 Gate terminal of (C) and PMOS tube M 14 Gate terminal of (d) and resistor R 11 And the other end of (2) and the resistor R 12 Is connected with one end of the PMOS tube M 15 Source end of (1) and PMOS tube M 14 The source terminals of the PMOS tube M are respectively connected with the power supply voltage VDD 14 Drain terminal of (d) and resistor R 12 And the other end of (C) and the capacitor C 3 And NMOS tube M 16 Is connected with the drain terminal of the capacitor.
Preferably, the NMOS tube M 18 Source terminal of (2) and NMOS tube M 19 Is connected as the output terminal V of the passive mixer out1 . The NMOS tube M 18 Gate terminal of (C) and capacitor C 6 And a resistor R 8 And NMOS tube M 21 Is connected with the gate terminal of the capacitor C 6 The other end of the resistor R is connected with the local oscillation signal input LO1 8 Is connected with the other end of the bias voltage V N The NMOS tube M 18 Drain terminal of (2) and NMOS tube M 20 Is connected as input terminal V of the mixer in1 The NMOS tube M 19 Gate terminal of (C) and capacitor C 7 And a resistor R 7 And NMOS tube M 20 Is connected with the gate terminal of the capacitor C 7 The other end of the resistor R is connected with the local oscillation signal input LO0 7 Is connected with the other end of the bias voltage V P The NMOS tube M 19 Drain terminal of (2) and NMOS tube M 21 Is connected as input terminal V of the mixer in2 The NMOS tube M 20 Source terminal of (2) and NMOS tube M 21 Is connected as the output terminal V of the passive mixer out2 。
Further, by the method of V P /V N Is set such that the bias voltage Vgs of the transistor switch is set at vth+0.7a LO When the frequency mixer is nearby, the mixer switches of the I path and the Q path are sequentially opened without overlapping under the sequential excitation of LO0, LO2, LO1 and LO3, so that the interference between I/Q baseband of the receiver is avoided.
Preferably, the input sinusoidal signal passes through the LO of the quadrature mixer QH IN An input, the a end of the quadrature mixer QH passes through a resistor Z 1 The two paths of differential quadrature driving signals generated by the quadrature mixer QH are respectively connected with two groups of LO drivers, and the positive output end LO of the LO driver of the first group I+ Connected to the input LO1 of the first mixer, the LO drivers of the first groupNegative output terminal LO I- Connected to the input LO0 of the first mixer, the positive output LO of the second set of LO drivers Q+ Connected to the input LO3 of the second mixer, the negative outputs LO of the second set of LO drivers Q- Is connected to the input LO2 of the second mixer.
As described above, the front-end circuit of the millimeter wave anti-interference CMOS integrated receiver of the invention has the following beneficial effects:
the low-noise transconductance amplifier adopts a noise elimination structure of the transformer, and has lower noise.
The invention uses an N-path mixer, the optimized bias condition of the MOS transistor is approximately Vth+0.7A LO The interference problem between the I/Q base bands is effectively solved, and the anti-interference capability is improved.
In the baseband transimpedance amplifier, a single-stage operational amplifier is adopted to reduce the number of poles so as not to influence the bandwidth, and a fusion structure of negative resistance and negative miller capacitance is provided to improve the gain and the bandwidth, the baseband is formed by two stages to realize a four-order Butterworth low-pass filter, the front end of the whole receiver realizes the baseband bandwidth of 200MHz, and the high out-of-band attenuation slope of 80dB/dec is shown.
The front end structure of the receiver is realized by CMOS integration. In addition to the electrical performance advantages given above, there are also advantages of low cost.
The LNA front-end architecture and the noise elimination method can obtain better noise coefficients; the special switching mode of the N-path mixer solves the problem of I/Q path signal interference; the baseband of the two stages obtains higher out-of-band attenuation degree and shows excellent B1dB and I IP3 anti-interference performance.
The invention adopts LNA pre-architecture, and comprises a low noise transconductance circuit, an N-path mixer, a transimpedance amplifier and other circuits, wherein the working frequency range of the work is 21-32GHz, the low noise transconductance circuit adopts a noise elimination structure, so that the low noise transconductance circuit shows extremely low noise coefficient at the output end, and MOS transistors in the N-path mixer work at approximately Vth+0.7A LO Under the bias condition, the problem of interference between I/Q baseband is effectively solved, and the receiver is improvedThe anti-interference capability is achieved, the baseband part adopts a two-stage design, a four-order Butterworth low-pass filter is obtained, the out-of-band attenuation degree is up to 80dB/dec, and the anti-interference capability of the receiver is effectively improved.
Drawings
FIG. 1 is a diagram of the front end of an N-path mixer front-end architecture receiver;
FIG. 2 is a diagram of the front end architecture of an LNA front end+active mixer architecture receiver;
FIG. 3 is a schematic diagram of the present invention;
FIG. 4 is a schematic diagram of a low noise transconductance amplifier circuit according to the present invention;
FIG. 5 is a schematic diagram of a transimpedance amplifier of the present invention;
FIG. 6 is a schematic diagram of a mixer according to the present invention;
fig. 7 is a schematic diagram of an LO driver according to the present invention;
FIG. 8 shows the input matching characteristic S of the present invention 11 A schematic diagram;
FIG. 9 is a schematic diagram of noise figure of the present invention;
FIG. 10 is a graph of the maximum gain at different LO frequencies for the present invention;
FIG. 11 is a graph of gain bandwidth at 26GHz in accordance with the present invention;
FIG. 12 is a diagram illustrating the IIP3 at different binaural signal intervals according to the present invention;
fig. 13 is a schematic diagram of B1dB for the present invention at different frequency offsets.
Detailed Description
The present invention will be further explained below with reference to the drawings in order to facilitate understanding of technical contents of the present invention to those skilled in the art.
As shown in fig. 1-13, the present invention discloses a front-end circuit of a millimeter wave anti-interference CMOS integrated receiver, comprising: the low-noise transconductance amplifying circuit Gm, the passive mixer, the transimpedance amplifier and the local oscillation signal driver;
the low noise transconductance amplifying circuit includes: PMOS tube M 1 NMOS tube M 2 NMOS tube M 3 NMOS tube M 4 Capacitance C 1 Transformer T 1 Resistance R 6 ；
The transimpedance amplifier comprises a first stage and a second stage which are identical in structure, and the transimpedance amplifier comprises: capacitor C TIA1 Capacitance C TIA2 Capacitance C TIA3 Capacitance C TIA4 Capacitance C F1 Capacitance C F2 Resistance R TIA2 Resistance R TIA1 Resistance R TIA3 Resistance R TIA4 Resistance R 1 Resistance R 2 Resistance R 3 Resistance R 4 First and second baseband TIA units;
the passive mixer comprises a first passive mixer and a second passive mixer;
the passive mixers have the same structure and all comprise: NMOS tube M 18 NMOS tube M 19 NMOS tube M 21 NMOS tube M 21 Capacitance C 6 Capacitance C 7 Resistance R 7 Resistance R 8 ；
The local oscillator signal driver includes a quadrature mixer QH and an LO driver.
The low noise transconductance amplifier circuit of the present invention obtains a lower noise figure at the output by utilizing its own noise cancellation structure, by employing the main/auxiliary path, in which the noise cancellation structure is based on the inverter structure M 1 、M 2 Is eliminated; it is assumed that part of the noise current alpha In will pass through the resistor R 6 And internal resistance of signal source R S To ground, the magnitude of α is defined by R 6 And R is S The noise current is determined at the drain terminal V of the inverter D And gate end V G Generating noise voltages of the same phase and different magnitudes of
Due to the difference in amplitude, M is required 3 And M 4 Is adjusted to meet noise cancellation, additionally due to the transformer T 1 The primary side tap is arranged at the center of the inductorThus, without considering the impedance of the primary inductor and then reducing the noise by differential combining, then I need to meet the following equation to achieve noise cancellation
V G g m4 ＝V D g m3 (2)
Finally obtain M 3 And M 4 The transconductance value of (2) needs to satisfy the following condition
Correspondingly, the low noise amplifier can obtain low noise figure, and the high signal-to-noise ratio performance of the receiver is ensured.
In the receiver architecture of the GHz band, digital frequency dividers are commonly used to provide a 25% duty cycle local oscillator clock to drive the operation of the receiver. Particularly, because the I/Q two paths of base bands cannot be conducted simultaneously, interference between the I/Q two paths of base bands is avoided, and the gain noise is guaranteed not to be degraded. But in the millimeter wave band, it becomes difficult to generate a pulse clock by using a digital frequency divider, and the slope of the waveform is greatly damaged by the rising and falling delays of the pulse due to the influence of parasitic capacitance, which makes the I/Q baseband receiving based on a passive mixer difficult to implement. The structure of the active mixer is adopted in the document 2, but power consumption and anti-blocking interference tend to be affected. In particular, the invention still adopts a passive mixer structure, but proposes to use optimized transistor bias to avoid the interference problem between the I/Q baseband; referring to fig. 6, it can be seen that the four-way sine wave exhibits orthogonal differential characteristics, and it is noted that by comparing V P /V N Setting the bias voltage Vgs of the transistor switch at vth+0.7a LO Near, at t 1 LO0 opens the switch of the I-path at t 2 In (2), LO2 turns on the switch of the Q-way, the on-time t of the mixer switching tube 1 ，t 2 The interference between the I/Q baseband is avoided without overlapping, and of course, the local oscillation circuit is required to provide large signal driving, so the local oscillation signal amplifying circuit is arranged as shown in fig. 6.
Furthermore, the invention provides a single-stage operational amplifier structure, even avoids extra poles generated by a conventional sleeve structure, in order to overcome low gain, a negative resistance structure is introduced here to improve the equivalent impedance of an output node, the gain can be effectively improved, simulation shows that the open loop gain of the operational amplifier can reach 40dB, meanwhile, in order to overcome the limitation of parasitic capacitance of the operational amplifier output node on bandwidth, an extra negative Miller capacitance generating circuit is introduced, corresponding parasitic capacitance is counteracted at the output node, the 3dB bandwidth of the operational amplifier can reach 500MHz, in order to ensure enough interference blocking inhibition capability, a baseband is designed with a two-stage filter amplifying structure, and the single-stage operational amplifier structure is used as a core unit; as shown in fig. 5, the first stage is an RC feedback transimpedance amplifier structure; the second stage is a voltage filtering and amplifying structure, and the whole cascade is a fourth-order Butterworth filtering structure, so that 80dB/dec out-of-band attenuation is provided; the optimized Q value of the first-stage transimpedance amplification filter is 1.3, and the optimized Q value of the second-stage voltage filter is 0.6, so that the cascade baseband gain flatness is ensured.
The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver is realized by adopting a 65nm standard CMOS process design, the power supply voltage is 1.2V, the low-noise transconductance amplifier consumes 5.5mA, the two-stage baseband consumes 3.6mA, the local oscillation amplifying circuit is 5mA, the mixer does not generate power consumption, and in addition, the input power of a local oscillation port is near 6 dBm.
The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver provided by the invention has a simplified topological structure shown in fig. 3, and detailed circuit topology structures are shown in fig. 4-7; FIG. 8 shows the input matching characteristic S of the circuit 11 To see S in the 21-32GHz band 11 Are all less than-10 dB. FIG. 9 shows simulation results of the noise figure NF of the circuit, and it can be seen that the noise figure is about 3dB in the 23-29GHz range, which presents a significant advantage over document [ 1 ]; FIG. 10 shows the maximum RX gain measured at different LO frequencies between 21-31 GHz; fig. 11 shows the simulation results of the gain bandwidth of the circuit at 26GHz, with a 3dB bandwidth of about 200MHz, and a gain of up to 40dB at low frequencies. FIG. 12 shows a graph of the results of IIP3 modeling of the circuit at different ΔfIt can be seen that at Δf greater than 130MHz, IIP3 is above 0dBm, approaching 14dBm at large frequency offsets; fig. 13 shows B1dB for the circuit at different frequency offsets, and B1dB is higher than 0dBm for Δf greater than 250MHz, with B1dB being higher than-20 dBm overall, a result significantly better than document [ 2 ].
Literature materials:
literature [ 1 ]:
in "10-35ghz passive mixer-first mixer +14dBmin-bandIIP3for digital beam-forming arrays,"2020IEEERadioFrequencyIntegratedCircuitsSymposium (RFIC), losAngeles, CA, USA,2020, pp.275-278 ", the structure adopts a mixer front-end architecture.
Literature [ 2 ]:
m. Y.Huang, T.Chi, S.Li, T. Y. Huangand H.Wang, "A24.5-43.5-GHzultra-CompactCMOSReactive front EndWithCalif. it is an active Mixer and LNA architecture for its structure in" InIEEEJosonafsolid-StateCircuit, vol.55, no.5, pp.1177-1186, may2020.
Claims (8)
1. A millimeter wave anti-interference CMOS integrated receiver front-end circuit, comprising: the low-noise transconductance amplifying circuit Gm, the passive mixer, the transimpedance amplifier and the local oscillation signal driver;
the low noise transconductance amplifying circuit includes: PMOS tube M 1 NMOS tube M 2 NMOS tube M 3 NMOS tube M 4 Capacitance C 1 Transformer T 1 Resistance R 6 ；
The transimpedance amplifier comprises a first stage and a second stage which are identical in structure, and the transimpedance amplifier comprises: capacitor C TIA1 Capacitance C TIA2 Capacitance C TIA3 Capacitance C TIA4 Capacitance C F1 Capacitance C F2 Resistance R TIA2 Resistance R TIA1 Resistance R TIA3 Resistance R TIA4 Resistance R 1 Electric powerR resistance 2 Resistance R 3 Resistance R 4 The first and second baseband TIA units;
the passive mixer comprises a first passive mixer and a second passive mixer;
the passive mixers have the same structure and all comprise: NMOS tube M 18 NMOS tube M 19 NMOS tube M 21 NMOS tube M 21 Capacitance C 6 Capacitance C 7 Resistance R 7 Resistance R 8 ；
The local oscillator signal driver includes a quadrature mixer QH and an LO driver.
2. The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver according to claim 1, wherein the input end of the low noise transconductance amplifier circuit Gm is V IN The first path positive output end V of the low-noise transconductance amplifying circuit Gm O1+ Input terminal V of first and second passive mixers in2 Connecting; the first path of negative output end V of the low-noise transconductance amplifying circuit Gm O1- Input terminal V of first and second passive mixers in1 And (5) connection.
3. The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver of claim 1, wherein the resistor R 6 One end of (a) is connected with NMOS tube M 2 Gate terminal of (C) and PMOS tube M 1 Gate terminal of (d) and NMOS transistor M 4 Is connected with the gate terminal of the low noise transconductance amplifying circuit as the input terminal V IN The resistance R 6 The other end of (2) is connected with NMOS tube M 2 Drain terminal of (C) and PMOS tube M 1 Drain terminal of (2) and NMOS transistor M 3 Is connected with the gate end of the NMOS tube M 2 The source end of the PMOS tube M is grounded 1 The NMOS tube M is connected with the source terminal of the power supply voltage VDD 3 Is grounded, the NMOS tube M 3 Is not limited by the leakage terminal of the transformer T 1 Is connected with the end a of the transformer T 1 Is connected with the power supply voltage VDD, the transformer T 1 C-terminal of (2) and NMOS tube M 4 Is connected with the drain terminal of the NMOS tube M 4 Is grounded, the transformer T 1 E terminal of (C) and resistor C 1 One end of the output terminal V is connected with the output terminal V as a low-noise transconductance amplifying circuit O+ The transformer T 1 D-terminal of (d) and resistor C 1 The other end of the output terminal V is connected with the output terminal V as a low-noise transconductance amplifying circuit O- 。
4. The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver as claimed in claim 1, wherein said first stage baseband TIA unit has a forward input terminal and a capacitor C TIA2 And a resistor R TIA2 And the output terminal V of the mixer out2 And capacitor C F1 Is connected to one end of the first stage transimpedance amplifier and serves as an input terminal V of the first stage transimpedance amplifier in3 The reverse input end of the first-stage baseband TIA unit and a capacitor C TIA1 And a resistor R TIA1 And the output terminal V of the mixer out1 And capacitor C F1 Is connected with the other end of the first stage trans-impedance amplifier and is used as the input end V of the first stage trans-impedance amplifier in4 The forward output end V of the first-stage baseband TIA unit out3 Respectively and capacitance C TIA1 And the other end of (2) and the resistor R TIA1 And the other end of (2) and the resistor R 1 Is connected with one end of the first-stage baseband TIA unit, and the reverse output end V of the first-stage baseband TIA unit out4 Respectively at the capacitor C TIA2 And the other end of (2) and the resistor R TIA2 And the other end of (2) and the resistor R 2 Is connected with one end of the resistor R 2 And the other end of (C) and the capacitor C F2 And a resistor R TIA4 And a resistor R 4 Is connected with one end of the resistor R 1 And the other end of (C) and the capacitor C F2 And the other end of (2) and the resistor R TIA3 And a resistor R 3 Is connected with one end of the resistor R 3 The other end of the second-stage baseband TIA unit negative input end V in6 And capacitor C TIA3 Is connected with one end of the resistor R 4 The other end of the second stage baseband TIA unit is connected with the negative and positive input end V of the second stage baseband TIA unit in5 And capacitor C TIA4 One end of the second-stage baseband TIA unit is connected with the negative output end V ou6 Respectively and capacitance C TIA4 And the other end of (2) and the resistor R TIA4 Is connected to the other end of the second-stage baseWith TIA unit forward output V ou5 Respectively and capacitance C TIA3 And the other end of (2) and the resistor R TIA3 Is connected with the other end of the connecting rod.
5. The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver of claim 4, wherein the first and second baseband TIA units have the same structure, and each of the first and second baseband TIA units comprises: PMOS tube M 7 PMOS tube M 8 PMOS tube M 9 PMOS tube M 14 PMOS tube M 15 NMOS tube M 10 NMOS tube M 11 NMOS tube M 12 NMOS tube M 13 NMOS tube M 16 NMOS tube M 17 Capacitance C 2 Capacitance C 3 Resistance R 9 Resistance R 10 Resistance R 11 Resistance R 12 。
6. The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver of claim 5, wherein the PMOS tube M 7 Is connected with the power supply voltage V DD PMOS tube M 7 Is connected with the bias voltage V b1 The PMOS tube M 7 Drain terminal of (C) and PMOS tube M 8 Source end of (1) and PMOS tube M 9 Is connected with the source end of the PMOS tube M 8 Gate terminal of (a) is used as input terminal V of baseband TIA unit in4 PMOS tube M 8 Drain terminal of (d) and resistor R 9 And NMOS tube M 10 Drain terminal of (2) and NMOS transistor M 13 Drain terminal of (2) and NMOS transistor M 12 Gate terminal of (d) and NMOS transistor M 16 Gate terminal of (C) and capacitor C 2 Is connected as the output terminal V of the baseband TIA unit o4 The NMOS tube M 10 Source terminal of (2) and NMOS tube M 11 The source end of the NMOS tube M is connected with the ground 10 Gate terminal of (2) and NMOS transistor M 11 Gate terminal of (d) and resistor R 9 And the other end of (2) and the resistor R 10 Is connected with one end of the NMOS tube M 11 Drain terminal of (d) and resistor R 10 And the other end of the PMOS tube M 9 Drain terminal of (2) and NMOS transistor M 12 Drain terminal of (2) and NMOS transistor M 13 Gate terminal of (d) and NMOS transistor M 17 Gate terminal of (C) and capacitor C 3 Is connected with one end ofAs output terminal V of baseband TIA unit o3 The NMOS tube M 12 Source terminal of (2) and NMOS tube M 13 The source end of the PMOS tube M is connected with the ground 9 Gate terminal of (a) is used as input terminal V of baseband TIA unit in3 The NMOS tube M 16 Source terminal of (2) and NMOS tube M 17 The source ends of the NMOS tube M are respectively grounded 17 Drain terminal of (C) and capacitor C 2 And the other end of (2) and the resistor R 11 One end of (2) and PMOS tube M 15 Is connected with the drain terminal of the PMOS tube M 15 Gate terminal of (C) and PMOS tube M 14 Gate terminal of (d) and resistor R 11 And the other end of (2) and the resistor R 12 Is connected with one end of the PMOS tube M 15 Source end of (1) and PMOS tube M 14 The source terminals of the PMOS tube M are respectively connected with the power supply voltage VDD 14 Drain terminal of (d) and resistor R 12 And the other end of (C) and the capacitor C 3 And NMOS tube M 16 Is connected with the drain terminal of the capacitor.
7. The front-end circuit of the millimeter wave anti-interference CMOS integrated receiver according to claim 1, wherein the NMOS transistor M 18 Source terminal of (2) and NMOS tube M 19 Is connected as the output terminal V of the passive mixer out1 . The NMOS tube M 18 Gate terminal of (C) and capacitor C 6 And a resistor R 8 And NMOS tube M 21 Is connected with the gate terminal of the capacitor C 6 The other end of the resistor R is connected with the local oscillation signal input LO1 8 Is connected with the other end of the bias voltage V N The NMOS tube M 18 Drain terminal of (2) and NMOS tube M 20 Is connected as input terminal V of the mixer in1 The NMOS tube M 19 Gate terminal of (C) and capacitor C 7 And a resistor R 7 And NMOS tube M 20 Is connected with the gate terminal of the capacitor C 7 The other end of the resistor R is connected with the local oscillation signal input LO0 7 Is connected with the other end of the bias voltage V P The NMOS tube M 19 Drain terminal of (2) and NMOS tube M 21 Is connected as input terminal V of the mixer in2 The NMOS tube M 20 Source terminal of (2) and NMOS tube M 21 Is connected as the output of a passive mixerOutput end V out2 。
8. The front-end circuit of a millimeter wave anti-interference CMOS integrated receiver according to claim 1, wherein the input sinusoidal signal passes through the LO of the quadrature mixer QH IN An input, the a end of the quadrature mixer QH passes through a resistor Z 1 The two paths of differential quadrature driving signals generated by the quadrature mixer QH are respectively connected with two groups of LO drivers, and the positive output end LO of the LO driver of the first group I+ Connected to the input LO1 of the first mixer, the negative output LO of the first set of LO drivers I- Connected to the input LO0 of the first mixer, the positive output LO of the second set of LO drivers Q+ Connected to the input LO3 of the second mixer, the negative outputs LO of the second set of LO drivers Q- Is connected to the input LO2 of the second mixer.
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| CN202311488733.XA CN117527026A (en) | 2023-11-09 | 2023-11-09 | Front-end circuit of millimeter wave anti-interference CMOS integrated receiver |
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| CN202311488733.XA CN117527026A (en) | 2023-11-09 | 2023-11-09 | Front-end circuit of millimeter wave anti-interference CMOS integrated receiver |
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