CN117521594B - Superconducting quantum chip simulation verification method and device, electronic equipment and medium - Google Patents
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Abstract
The present disclosure provides a superconducting quantum chip parameter determining method, apparatus, electronic device, computer readable storage medium and computer program product, and relates to the field of quantum computers, in particular to the technical field of superconducting quantum chips. The implementation scheme is as follows: determining the frequency design values of the superconducting quantum chip and the reading cavity of the superconducting quantum chip to be subjected to parameter determination; changing the frequency value of a preset pulse signal according to a first preset step length in a first preset range to determine a scattering parameter S21 corresponding to a reading line under each frequency value; determining a first reading cavity frequency based on the obtained scattering parameter S21 spectral line; changing the frequency value of the preset pulse signal according to a second preset step length in a second preset range to determine a scattering parameter S21 corresponding to the reading line under each frequency value; and determining the frequency of the second reading cavity based on the S21 spectral line of the current scattering parameter, and taking the frequency value of the reading cavity obtained through simulation.
Description
Technical Field
The present disclosure relates to the field of quantum computers, and in particular, to the technical field of superconducting quantum chips, and more particularly, to a superconducting quantum chip simulation verification method, apparatus, electronic device, computer-readable storage medium, and computer program product.
Background
In recent years, with the continuous updating and iteration of the chip manufacturing process, the traditional chip has entered the "post-molar age" from the "molar age", and the computing power of the traditional chip reaches the bottleneck. Quantum computing relies on its own unique characteristics, which breaks through the restriction of the process on computing power and becomes the key point of research in academia and industry. Compared with traditional calculation, quantum calculation has obvious advantages in treating the problem of complex quantum systems; in addition, the method has great significance in the leading-edge scientific research fields such as artificial intelligence, quantum chemistry, biopharmaceuticals and the like. The development of high potential quantum applications has greatly driven the development of quantum hardware. Through decades of exploration, the physical implementation modes of quantum computing hardware mainly comprise various technical routes such as ion traps, light quanta, superconducting circuits and the like. Compared with other systems, the superconducting circuit is easier to expand, and the mature micro-nano processing technology is easier to scale, so that the superconducting circuit is considered as a technical scheme for realizing practical quantum computation most likely to be carried out first.
Disclosure of Invention
The present disclosure provides a superconducting quantum chip simulation verification method, apparatus, electronic device, computer readable storage medium and computer program product.
According to an aspect of the present disclosure, there is provided a superconducting quantum chip simulation verification method, including: determining a superconducting quantum chip to be subjected to parameter determination, wherein the superconducting quantum chip comprises a quantum bit and a reading cavity, and the reading cavity is used for reading the state of the quantum bit through a reading line; acquiring a preset frequency design value of the reading cavity; changing the frequency value of a preset pulse signal according to a first preset step length within a first preset range to determine a scattering parameter S21 corresponding to the reading line under each frequency value, wherein the scattering parameter S21 represents transmission loss of the preset pulse signal after entering the reading line from the input end of the reading line and being transmitted through the reading line to the output end of the reading line, and the difference value between the frequency value within the first preset range and the frequency design value is smaller than a first preset error value; determining a first reading cavity frequency based on a first change curve of the scattering parameter S21 along with frequency values in the first preset range, wherein the first reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the first change curve; changing the frequency value of the preset pulse signal according to a second preset step length within a second preset range to determine a scattering parameter S21 corresponding to the reading line under each frequency value, wherein the difference between the frequency value within the second preset range and the frequency of the first reading cavity is smaller than a second preset error value; and determining a second reading cavity frequency based on a second change curve of the scattering parameter S21 along with the frequency value in the second preset range, wherein the second reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the second change curve, and the second reading cavity frequency is used as the frequency value of the reading cavity obtained through simulation.
According to another aspect of the present disclosure, there is provided a super-simulation verification apparatus for a superconducting quantum chip, including: a first determination unit configured to determine a superconducting quantum chip to be subjected to parameter determination, wherein the superconducting quantum chip comprises a quantum bit and a reading cavity, and the reading cavity is used for reading a state of the quantum bit through a reading line; an acquisition unit configured to acquire a frequency design value of the reading cavity given in advance; a second determining unit configured to change a frequency value of a preset pulse signal according to a first preset step length within a first preset range to determine a scattering parameter S21 corresponding to the reading line at each frequency value, where the scattering parameter S21 represents a transmission loss of the preset pulse signal after entering the reading line from an input end of the reading line and being transmitted through the reading line to an output end of the reading line, and differences between the frequency value and the frequency design value within the first preset range are smaller than a first preset error value; a third determining unit, configured to determine a first reading cavity frequency based on a first variation curve of the scattering parameter S21 along with a frequency value in the first preset range, where the first reading cavity frequency is determined based on a frequency value corresponding to a minimum point of the first variation curve; a fourth determining unit, configured to change the frequency value of the preset pulse signal according to a second preset step length within a second preset range, so as to determine a scattering parameter S21 corresponding to the reading line under each frequency value, where the difference between the frequency value within the second preset range and the frequency of the first reading cavity is smaller than a second preset error value; and a fifth determining unit, configured to determine a second reading cavity frequency based on a second variation curve of the scattering parameter S21 along with a frequency value in the second preset range, as a frequency value of the reading cavity obtained by simulation, where the second reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the second variation curve.
According to another aspect of the present disclosure, there is provided an electronic device including: at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the methods described in the present disclosure.
According to another aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the method described in the present disclosure.
According to another aspect of the present disclosure, there is provided a computer program product comprising a computer program which, when executed by a processor, implements the method described in the present disclosure.
According to one or more embodiments of the present disclosure, by simulating the curve of the scattering parameter S21 in the frequency domain, the efficiency of obtaining the frequency value of the reading cavity and the accuracy of the obtained frequency value are improved, and the method has important guiding and inspiring significance for the design and verification of the reading cavity in the superconducting quantum chip.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the disclosure, nor is it intended to be used to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following specification.
Drawings
The accompanying drawings illustrate exemplary embodiments and, together with the description, serve to explain exemplary implementations of the embodiments. The illustrated embodiments are for exemplary purposes only and do not limit the scope of the claims. Throughout the drawings, identical reference numerals designate similar, but not necessarily identical, elements.
FIG. 1 illustrates a flow chart of a superconducting quantum chip emulation verification method in accordance with an embodiment of the present disclosure;
FIG. 2 illustrates a superconducting quantum chip layout schematic in accordance with an embodiment of the present disclosure;
3-5 show S21_dB spectral line diagrams in accordance with embodiments of the present disclosure;
FIG. 6 illustrates a block diagram of a superconducting quantum chip emulation verification device according to an embodiment of the present disclosure; and
Fig. 7 illustrates a block diagram of an exemplary electronic device that can be used to implement embodiments of the present disclosure.
Detailed Description
Exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present disclosure to facilitate understanding, and should be considered as merely exemplary. Accordingly, one of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
In the present disclosure, the use of the terms "first," "second," and the like to describe various elements is not intended to limit the positional relationship, timing relationship, or importance relationship of the elements, unless otherwise indicated, and such terms are merely used to distinguish one element from another. In some examples, a first element and a second element may refer to the same instance of the element, and in some cases, they may also refer to different instances based on the description of the context.
The terminology used in the description of the various illustrated examples in this disclosure is for the purpose of describing particular examples only and is not intended to be limiting. Unless the context clearly indicates otherwise, the elements may be one or more if the number of the elements is not specifically limited. Furthermore, the term "and/or" as used in this disclosure encompasses any and all possible combinations of the listed items.
Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.
To date, various types of computers in use are based on classical physics as the theoretical basis for information processing, known as traditional or classical computers. Classical information systems store data or programs using binary data bits that are physically easiest to implement, each binary data bit being represented by a 0 or a1, called a bit or a bit, as the smallest unit of information. Classical computers themselves have the inevitable weakness: first, the most basic limitation of energy consumption in the calculation process. The minimum energy required by the logic element or the memory cell should be more than several times of kT to avoid malfunction under thermal expansion; secondly, information entropy and heating energy consumption; thirdly, when the wiring density of the computer chip is large, the uncertainty of momentum is large when the uncertainty of the electronic position is small according to the uncertainty relation of the Hessenberg. Electrons are no longer bound and there is a quantum interference effect that can even destroy the performance of the chip.
Quantum computers (QWs) are a class of physical devices that perform high-speed mathematical and logical operations, store and process quantum information, following quantum mechanical properties, laws. When a device processes and calculates quantum information and a quantum algorithm is operated, the device is a quantum computer. Quantum computers follow unique quantum dynamics (particularly quantum interferometry) to achieve a new model of information processing. For parallel processing of computational problems, quantum computers have an absolute advantage in speed over classical computers. The transformation implemented by the quantum computer on each superposition component is equivalent to a classical computation, all of which are completed simultaneously and are superimposed according to a certain probability amplitude to give the output result of the quantum computer, and the computation is called quantum parallel computation. Quantum parallel processing greatly improves the efficiency of quantum computers so that they can perform tasks that classical computers cannot do, such as factorization of a large natural number. Quantum coherence is essentially exploited in all quantum ultrafast algorithms. Therefore, quantum parallel computation with quantum state instead of classical state can reach incomparable operation speed and information processing function of classical computer, and save a large amount of operation resources.
Quantum computation is one of the landmark technologies in the post-molar age, and is attracting attention from academia and industry. Compared with traditional calculation, quantum calculation has remarkable advantages in solving the problems of large number decomposition and the like, and provides a new thought for leading edge research, such as quantum multimer, quantum chemical simulation and the like. These potential quantum applications have also greatly driven the development of quantum hardware. The quantum chip is a hardware device for performing quantum computation and quantum information processing as the most core part of a quantum computer. Superconducting circuits, ion traps, diamond NV color centers, nuclear magnetic resonance, optical quantum systems, etc. are all one of the quantum computing hardware candidates.
In recent years, a great deal of research work is being carried out on superconducting quantum chips based on superconducting circuits by students at home and abroad. The superconducting circuit has the advantages of long decoherence time, easy operation/reading, strong expandability and the like as one of the strongest prospects. It can be seen that the development of superconducting quantum chips has become a core technology in the field of quantum computing. With the progress of micro-nano processing technology, the large-scale integration of the quantum bits is also the future development direction of the quantum chip. Along with the increase of the number of the quantum bits, the design difficulty of the quantum chip is correspondingly improved.
The superconducting quantum chip is a core component for realizing quantum computation and consists of quantum bits, a reading cavity and the like. The qubit is used as a calculation unit, and the reading cavity is used for reading the state of the qubit. After the chip design is completed, the performance index of the chip must be verified in a simulation way, and the performance verification of the reading cavity is one of important parts. Core performance metrics of the read chamber include, for example, frequency and quality factor (Q value). The frequency is the embodiment of the resonant mode of the reading cavity, and the Q value reflects the magnitude of the energy leakage rate of the reading cavity and the coupling degree of the reading cavity and the external environment. For the design of the read cavity frequency, it is necessary to ensure that it is offset from the frequency of the qubit by some amount to achieve dispersion reading. For the design of the Q value, it can be used to balance the relationship between the energy protection of the read cavity for the qubit and the qubit state read efficiency. Therefore, efficient and accurate simulation verification of the core performance index of the read chamber is essential.
Generally, modeling analysis of coplanar waveguide can be performed on a two-dimensional section of the reading cavity based on a conformal transformation (also called conformal mapping) method, so as to analyze and calculate equivalent capacitance and inductance in unit length, and thus predict the frequency and Q value of the reading cavity. Modeling the reading cavity as an ideal coplanar waveguide, and having larger error with the actual layout; in addition, some parameters required in the method, such as dynamic inductance in unit length, cannot be obtained through analysis and calculation, and still need to be obtained through fitting by using electromagnetic simulation results. The method is therefore mainly used for the approximate estimation of the design of the reading cavity with less high requirements on the early accuracy.
In addition, an intrinsic mode solving method in electromagnetic simulation software can be utilized to perform electromagnetic simulation on the layout containing the reading cavity, and find the resonance mode of the reading cavity. The eigenmodes of the simulated read cavity in the dissipative environment will get a complex frequency, whose real part corresponds to the frequency of the read cavity and whose imaginary part corresponds to the dissipation (Q value). However, the eigenmode solving method needs to find all resonance modes in the chip layout, so that a large amount of computing resources are needed to be consumed for accurately obtaining the simulation frequency and the Q value, and the convergence speed is low. In addition, the eigenmode solving method is not favorable for multi-node parallel acceleration and is not suitable for large-scale chip layout simulation.
Thus, embodiments according to the present disclosure provide a superconducting quantum chip simulation verification method. Fig. 1 shows a flow chart of a superconducting quantum chip simulation verification method according to an embodiment of the present disclosure, wherein method 100 includes: determining a superconducting quantum chip to be parametrized, wherein the superconducting quantum chip comprises a qubit and a read cavity for reading a state of the qubit through a read line (step 110); acquiring a preset frequency design value of the reading cavity (step 120); changing the frequency value of a preset pulse signal according to a first preset step length within a first preset range to determine a scattering parameter S21 corresponding to the reading line under each frequency value, wherein the difference between the frequency value within the first preset range and the frequency design value is smaller than a first preset error value (step 130); determining a first reading cavity frequency based on a first variation curve of the scattering parameter S21 along with frequency values in the first preset range, wherein the first reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the first variation curve (step 140); changing the frequency value of the preset pulse signal according to a second preset step length within a second preset range to determine a scattering parameter S21 corresponding to the reading line under each frequency value, wherein the difference between the frequency value within the second preset range and the frequency of the first reading cavity is smaller than a second preset error value (step 150); and determining a second reading cavity frequency based on a second variation curve of the scattering parameter S21 along with the frequency values in the second preset range, wherein the second reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the second variation curve, and the second reading cavity frequency is used as the frequency value of the reading cavity obtained through simulation (step 160).
The superconducting quantum chip is a physical carrier for realizing quantum computation, and in order to realize accurate control of quantum information, effective design of a chip layout is required, and a core component comprises quantum bits, a reading cavity and the like. The reading cavity is directly coupled with the superconducting qubit to form a dispersion coupling relationship, namely the frequency difference between the qubit and the reading cavity is far greater than the coupling strength between the qubit and the reading cavity. Dispersive coupling results in a dispersion shift { χ=g 2/Δ } between the qubit and the read cavity, where Δ is the amount of detuning of the qubit and the read cavity and g is the coupling strength of the qubit and the read cavity. Thus, the relevant information of the qubit can be obtained by reading the state change of the cavity, i.e. the dispersion shift amount thereof. And, dispersive coupling can reduce decoherence of the qubits.
The core performance index of the read cavity includes a frequency, which is a manifestation of the read cavity resonance mode. For the design of the read cavity frequency, it is necessary to ensure that it is offset from the frequency of the qubit by some amount to achieve dispersion reading. An important parameter commonly used in experiments to evaluate the performance of a reading chamber is the scattering parameter S21, which represents the transmission loss of a microwave signal after it has entered the circuit from the input port of the transmission line, after transmission and reflection inside the reading line, to the output port. By measuring the scattering parameter S21 of the read line, important parameters such as the frequency of the read chamber can be obtained. The scattering parameter S21 has a direct relation to the frequency of the reading chamber, and when the reading chamber frequency matches the signal frequency, the scattering parameter S21 reaches a minimum value, at which time an optimal signal reading can be achieved.
Therefore, in the embodiment according to the disclosure, by simulating the curve of the scattering parameter S21 in the frequency domain, the acquisition efficiency of the frequency value of the reading cavity and the accuracy of the acquired frequency value are improved, and the method has important guiding and inspiring significance for the design and verification of the reading cavity in the superconducting quantum chip.
The scattering parameter S21, i.e. S21 parameter, refers to the scattering parameter (SCATTERING PARAMETERS) in the microwave device, also referred to as matrix parameter (Matrix parameters). These parameters are used to describe the scattering and transmission of microwave signals between the different ports. The S21 parameter is one of the important parameters, and describes the signal strength of the input signal output from the second port after passing through the microwave device. The S21 parameter is often used to describe gain and loss in microwave transmission systems. It is a complex number, consisting of two parts, amplitude (insertion loss) and phase (phase shift). The amplitude portion represents the relative strength of the output signal and the phase portion represents the relative phase of the output signal. In general, the amplitude of the S21 parameter is expressed in decibels (dB) and the phase is expressed in degrees (°).
The S21 parameter of the microwave device is affected by many factors, such as signal frequency, device structure, circuit layout, etc. The frequency effect is one of the most common influencing factors, and the S21 parameter of the device changes along with the change of the frequency, and the change can be represented by a frequency response curve of the S21 parameter. The frequency response curve may exhibit gain and loss variations over a range of frequencies for the device. In addition, the physical structure of the device will also have an effect on the S21 parameter. For example, the length, width, material, etc. of the microstrip line will affect the value of the S21 parameter. The circuit layout can improve S21 parameters by reducing noise and interference.
In the present disclosure, it is understood that the scattering parameter S21 (i.e., S21 parameter) represents a transmission loss after the preset pulse signal enters the read line from the input end of the read line and is transmitted through the read line to the output end of the read line. In the present disclosure, the scattering parameter S21 is used to refer to the relative intensity, i.e. the amplitude portion, of the output signal.
It is understood that the values of the S21 parameter may be obtained by experimental measurement or simulation calculation. For example, experimental measurements are typically performed using a vector network analyzer (Vector Network Analyzer), to which the device under test is connected, and the values of the S21 parameters are obtained by analyzing the power relationship of the input and output ports. The simulation calculation is to model the device to be tested by using electromagnetic simulation software, and simulate the scattering and transmission conditions of the input signal after passing through the device, so as to obtain the numerical value of the S21 parameter.
It will be appreciated that in the present disclosure, the magnitude of the scattering parameter S21 may be obtained using any suitable measurement or simulation software, and will not be described in detail herein.
In some embodiments, the core performance index of the read chamber includes a Q value in addition to the frequency, where the frequency is an indication of the resonant mode of the read chamber, and the Q value reflects the magnitude of the read chamber energy leakage rate and the degree of coupling of the read chamber to the external environment. As mentioned above, for the design of the read cavity frequency, it is necessary to ensure that it is offset from the frequency of the qubit by some amount to achieve dispersion reading. For the Q-value design, it is necessary to balance the relationship between the energy protection of the qubit by the read cavity and the qubit state reading efficiency. The read chamber Q contribution has two sources, the inner Q and the outer Q. The internal Q value represents the magnitude of the loss of the reading chamber itself, i.e. the decay rate of the energy within the chamber, which determines the lifetime of the reading chamber and the degree of decay of the internal energy. In general, the internal Q is affected by various factors such as material loss, geometry, and surface loss. The external Q value represents the coupling strength of the read chamber to the external environment, i.e., the leakage rate of the energy outside the chamber. The external Q value is related to the design of the cavity, the manner of packaging, and the characteristics of the external environment. The high external Q value indicates weak coupling with the external environment, so that the protection capability on the quantum bit is stronger, but the reading efficiency is also reduced; conversely, a low external Q value indicates a strong coupling to the external environment and a weak protection of the qubit, but also improves the reading efficiency. Therefore, the frequency and Q of the read chamber are two key indicators for evaluating the performance of the read chamber, and need to be comprehensively considered and balanced in designing and optimizing the read chamber.
In some examples, the Q value of the read cavity may be obtained by fitting the relevant parameters of the scattering parameter S21. Thus, according to some embodiments, further comprising: performing a function fit based on a correspondence between the scattering parameter S21 and frequency values within the second preset range, according to the following formula, to determine an inner Q value and an outer Q value of the reading cavity based on a fitting result,
Wherein,For the inverse of the scattering parameter S21, Q i is the inner Q value, Q c is the outer Q value, Φ is a phase angle, δx= (f-f 0)/f0, where f is a frequency value within a second preset range, f 0 is a frequency value of the reading cavity, where the inner Q value represents an energy leakage rate of the reading cavity, and the outer Q value represents a coupling degree of the reading cavity and an external environment.
In particular, considering a read line coupled to the read chamber, near the read chamber resonant frequency f 0 (i.e., read chamber frequency), its S21 parameter can be expressed as:
Wherein, Representing the inverse of the S21 parameter; q i is the internal Q value of the reading cavity; q c is the external Q value of the reading cavity; phi is a phase angle due to impedance mismatch, a known quantity; δx= (f-f 0)/f0, which measures the distance between the frequency f of the pulse signal used to input the read line and the read chamber frequency f 0. Usually, the S21 parameter is expressed in decibel (dB) units, here denoted s21_ dB., where s21_db tends to 0 when the frequency is far from the read chamber frequency, and when the frequency f of the pulse signal is close to the read chamber frequency f 0, the s21_db exhibits an absorption peak with the curve of the frequency f, where the minimum value is the read chamber frequency, and where the value of the S21 parameter is denoted s21_db_min.
According to some embodiments, a method according to the present disclosure may further comprise: an inner Q value and an outer Q value of the read chamber are determined based on the second variation curve. The inner Q value represents the energy leakage rate of the reading cavity, and the outer Q value represents the coupling degree of the reading cavity and the external environment.
According to some embodiments, the outer Q value Q c may be determined based on the following equation:
Wherein f 0 is the frequency value of the reading cavity, Is the frequency difference between two intersecting points of the second change curve and a first straight line, wherein the first straight line is a straight line corresponding to a half power point. As described above, the scattering parameter S21 is expressed in decibels (dB) and the half power point is at-3 dB.
According to some embodiments, the internal Q value Q i may be determined based on the following equation:
Wherein, For the frequency difference between the two points of intersection of the second curve and the second line,
Wherein the second straight line is a straight line corresponding to a point 3dB greater than the minimum point.
According to some embodiments, a method according to the present disclosure may further comprise: determining a total Q value of the read chamber, wherein the total Q value is determined based on the following equation,
Q＝1/(1/Qi+1/Qc)
Wherein, Q represents the total Q value, which is used to represent the energy leakage rate of the reading cavity and the coupling degree of the reading cavity and the external environment.
In some embodiments, the Q value of the read cavity may also be derived by data post-processing based on s21_db frequency spectrum, i.e.:
The above formula can calculate the external Q value or the internal Q value, and only needs to bring the corresponding half-peak bandwidth Δf 3db. When the external Q value is calculated, Δf 3db is the distance between two frequency points when S21_dB is equal to a half power point (namely-3 dB), and the difference between the half power point and the value of |S 21 | of the frequency at infinity is 2 times; in calculating the internal Q value, Δf 3db is the spacing between the two frequency points when S21_dB equals (S21_dB_min+3 dB), where S21_dB_min+3dB differs by a factor of 2 from the value of |S 21 | at the resonance of the read cavity frequency. Therefore, by frequency scanning the parameters of the reading line S21 and performing post-processing on the absorption peak based on the spectral line, the frequency and the Q value of the reading cavity can be obtained.
According to some embodiments, the second preset step size is smaller than the first preset step size. The method comprises the steps of performing coarse scanning within a first preset range and fine scanning within a second preset range, so that experimental efficiency is guaranteed, accurate spectral lines of S21 parameters near cavity frequency can be obtained, and the accuracy of the determined read cavity parameters is improved.
According to some embodiments, the first preset error value is greater than the second preset error value. That is, the first preset range is a large range, and the second preset range is a small range. Thus, a wide range of frequency sweeps (e.g., coarse sweeps) are performed around the read chamber frequency design values to obtain the approximate frequency of the read chamber; a small range of frequency sweeps (e.g. fine sweeps) are then performed around the approximate frequency of the read chamber, thereby ensuring experimental efficiency.
It can be appreciated that when the frequency scanning is performed within the first preset range, if the obtained S21 parameter spectrum line does not have an absorption peak, the frequency scanning range needs to be further enlarged, that is, the first preset range is further enlarged, so that the S21 parameter spectrum line has an absorption peak.
In one exemplary embodiment according to the present disclosure, a superconducting quantum chip layout to be emulated is first input, which contains a qubit-read cavity-read line structure therein. When electromagnetic simulation is performed, a simulation mode of electromagnetic simulation software can be selected as a driving mode, and excitation ports are arranged at two ends of a reading line to simulate and obtain scattering parameters S21 of an input-output port. It should be noted that in order to obtain a more accurate simulation result, a denser initial grid division may be set at the positions of the reading line and the reading cavity layout, so that the electromagnetic simulation better identifies the resonance mode of the reading cavity. Then, the following operations are performed:
Firstly, performing rough frequency scanning in a large range near a designed frequency value of a reading cavity, and performing electromagnetic simulation analysis to obtain S21 parameter values at different frequency points, wherein an absorption peak of an S21_dB spectral line (namely a variation curve of a scattering parameter S21 along with a pulse signal frequency value) is the approximate frequency of the reading cavity. And (3) carrying out fine scanning of a small range of frequency at the position of roughly estimating the frequency of the reading cavity in the last step, and carrying out electromagnetic simulation analysis to obtain S21_dB accurate spectral line near the frequency of the reading cavity. The frequency at the absorption peak (i.e., minimum point) of the S21_dB spectral line is the frequency f 0 of the read cavity, and the value of |S 21 | at this point is recorded as S21_dB_min.
Further, a half-peak bandwidth Δf 3db is obtained on the s21_db line, and the formula is reused:
The inner Q value and the outer Q value of the reading cavity can be calculated, and then the total Q value of the reading cavity can be obtained.
Specifically, the spacing between two frequency points at which the S21_dB line intersects the-3 dB line is noted asTo calculate the external Q value of the read chamber: the spacing between two frequency points at which the S21_dB line intersects the (S21_dB_min+3) dB line is noted as To calculate the internal Q value of the read chamber: The total Q of the read chamber is equal to the inverse of the sum of the internal and external Q values, i.e. q=1/(1/Q i+1/Qc).
It will be appreciated that any one or more of the inner Q, the outer Q, and the total Q may be obtained by an experimenter as desired, without limitation.
To better demonstrate the effectiveness of the method according to embodiments of the present disclosure, in one example, the method is applied to a superconducting quantum chip containing a qubit-reading cavity-reading line, the chip layout is as shown in fig. 2: the gray part in the chip layout is a metal layer, and the white part is an etched part. The upper part of the layout is a qubit-coupler-qubit structure, the left and right bending serpentine structure in the middle of the layout is a reading cavity, and the tail part of the reading cavity is coupled with a reading line below the reading cavity.
After the chip layout is input, necessary simulation settings, such as solving modes, excitation ports and the like, can be performed first. Then frequency coarse scanning is carried out: the design frequency of the two reading cavities is about 7.85GHz, so that the frequency coarse scanning can be carried out in a larger frequency range (7.75-7.95 GHz), and S21_dB spectral lines are shown in FIG. 3. As can be seen from fig. 3, there are two absorption peaks at 7.807GHz and 7.863GHz, indicating that the resonance modes of the two reading cavities are identified. Then, frequency fine scanning is continued near the frequencies corresponding to the two absorption peaks, respectively, thereby obtaining fine spectral lines S21_dB near the frequencies of the two reading cavities as shown in FIGS. 4 and 5, respectively.
Taking the first reading cavity as an example, as shown in fig. 4, the reading cavity frequency f 0 = 7.8072GHz can be obtained at the absorption peak of the s21_db fine line, and s21_db_min is obtained as-40.31 dB. Further, in order to calculate the external Q value, two frequency points where the s21_db line intersects the-3 dB line are shown in fig. 4, thereby obtaining:
further, the external Q value can be calculated:
For the calculation of the internal Q value, two frequency points are shown in fig. 4 where the s21_db spectral line intersects the (s21_db_min+3 db= -37.31 dB) line, resulting in:
Further, the internal Q value can be calculated:
And, the total Q value is equal to: 1/(1/Q i+1/Qc) =14195. Similarly, the frequency and Q of the second read chamber can be obtained.
In order to verify the correctness of the scheme according to the above embodiment, electromagnetic simulation based on eigenmode solution is also performed on the above quantum chip layout, and the pair of results of the two schemes are shown in table 1:
TABLE 1
As can be seen from table 1, the frequency of the read chamber and the Q value of the two schemes are very close to each other, which demonstrates the effectiveness and correctness of the present scheme. However, the eigenmode solving mode can only give the total Q value of the reading cavity, and the scheme can respectively give the internal Q value and the external Q value of the reading cavity and give more physical information, thereby being beneficial to further analysis and iteration of the design of the reading cavity. In addition, in the eigenmode solving mode, in order to obtain the same precision as the scheme, fine grid division and multiple iterations are required to be performed on the layout, so that a large memory is consumed, and a long convergence time is required. The scheme adopts a driving solving mode, simulates the curve of the S21 parameter in the frequency domain, and can independently carry out simulation analysis at different frequency points, thereby being very suitable for parallel acceleration of multiple nodes, and being more beneficial to the simulation of a large-scale chip layout.
According to the embodiment of the disclosure, a simulation scheme for describing the performance index of the reading cavity efficiently and accurately is provided, specifically, the advantage of parallelism can be fully utilized for scanning of a frequency domain, and the simulation efficiency is greatly improved; the fitting accuracy to the S21 curve can be improved by increasing the number of scanning points to the frequency domain (reducing the frequency interval). The S21 curve obtained by simulation can be compared and analyzed with actual measurement and control data, and is favorable for analysis and iteration of the chip.
As shown in fig. 6, there is also provided a super-simulation verification apparatus 600 for a superconducting quantum chip, including: a first determining unit 610 configured to determine a superconducting quantum chip to be subjected to parameter determination, wherein the superconducting quantum chip includes a qubit and a reading cavity for reading a state of the qubit through a reading line; an obtaining unit 620, configured to obtain a frequency design value of the reading cavity; a second determining unit 630 configured to change a frequency value of a preset pulse signal according to a first preset step length within a first preset range to determine a scattering parameter S21 corresponding to the read line at each frequency value, where the scattering parameter S21 represents a transmission loss after the preset pulse signal enters the read line from an input end of the read line and is transmitted through the read line to an output end of the read line, and differences between the frequency value and the frequency design value within the first preset range are smaller than a first preset error value; a third determining unit 640, configured to determine a first reading cavity frequency based on a first variation curve of the scattering parameter S21 with frequency values in the first preset range, where the first reading cavity frequency is determined based on a frequency value corresponding to a minimum point of the first variation curve; a fourth determining unit 650 configured to change the frequency value of the preset pulse signal according to a second preset step length within a second preset range to determine a scattering parameter S21 corresponding to the reading line at each frequency value, where the difference between the frequency value within the second preset range and the frequency of the first reading cavity is smaller than a second preset error value; and a fifth determining unit 660 configured to determine, based on a second variation curve of the scattering parameter S21 with frequency values in the second preset range, a second reading cavity frequency as a frequency value of the reading cavity obtained by simulation, where the second reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the second variation curve.
Here, the operations of the above units 610 to 660 of the superconducting quantum chip super-simulation verification apparatus 600 are similar to the operations of the steps 110 to 160 described above, respectively, and are not repeated here.
According to embodiments of the present disclosure, there is also provided an electronic device, a readable storage medium and a computer program product.
Referring to fig. 7, a block diagram of an electronic device 700 that may be a server or a client of the present disclosure, which is an example of a hardware device that may be applied to aspects of the present disclosure, will now be described. Electronic devices are intended to represent various forms of digital electronic computer devices, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the disclosure described and/or claimed herein.
As shown in fig. 7, the electronic device 700 includes a computing unit 701 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 702 or a computer program loaded from a storage unit 708 into a Random Access Memory (RAM) 703. In the RAM 703, various programs and data required for the operation of the electronic device 700 may also be stored. The computing unit 701, the ROM 702, and the RAM 703 are connected to each other through a bus 704. An input/output (I/O) interface 705 is also connected to bus 704.
Various components in the electronic device 700 are connected to the I/O interface 705, including: an input unit 706, an output unit 707, a storage unit 708, and a communication unit 709. The input unit 706 may be any type of device capable of inputting information to the electronic device 700, the input unit 706 may receive input numeric or character information and generate key signal inputs related to user settings and/or function control of the electronic device, and may include, but is not limited to, a mouse, a keyboard, a touch screen, a trackpad, a trackball, a joystick, a microphone, and/or a remote control. The output unit 707 may be any type of device capable of presenting information and may include, but is not limited to, a display, speakers, video/audio output terminals, vibrators, and/or printers. Storage unit 708 may include, but is not limited to, magnetic disks, optical disks. The communication unit 709 allows the electronic device 700 to exchange information/data with other devices through computer networks, such as the internet, and/or various telecommunications networks, and may include, but is not limited to, modems, network cards, infrared communication devices, wireless communication transceivers and/or chipsets, such as bluetooth devices, 802.11 devices, wiFi devices, wiMax devices, cellular communication devices, and/or the like.
The computing unit 701 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of computing unit 701 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 701 performs the various methods and processes described above, such as method 100. For example, in some embodiments, the method 100 may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as the storage unit 708. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 700 via the ROM 702 and/or the communication unit 709. When the computer program is loaded into RAM 703 and executed by computing unit 701, one or more steps of method 100 described above may be performed. Alternatively, in other embodiments, the computing unit 701 may be configured to perform the method 100 by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), complex Programmable Logic Devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), the internet, and blockchain networks.
The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server incorporating a blockchain.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps recited in the present disclosure may be performed in parallel, sequentially or in a different order, provided that the desired results of the disclosed aspects are achieved, and are not limited herein.
Although embodiments or examples of the present disclosure have been described with reference to the accompanying drawings, it is to be understood that the foregoing methods, systems, and apparatus are merely exemplary embodiments or examples, and that the scope of the present invention is not limited by these embodiments or examples but only by the claims following the grant and their equivalents. Various elements of the embodiments or examples may be omitted or replaced with equivalent elements thereof. Furthermore, the steps may be performed in a different order than described in the present disclosure. Further, various elements of the embodiments or examples may be combined in various ways. It is important that as technology evolves, many of the elements described herein may be replaced by equivalent elements that appear after the disclosure.
Claims (15)
1. A superconducting quantum chip simulation verification method comprises the following steps:
Determining a superconducting quantum chip to be subjected to parameter determination, wherein the superconducting quantum chip comprises a quantum bit and a reading cavity, and the reading cavity is used for reading the state of the quantum bit through a reading line;
Acquiring a preset frequency design value of the reading cavity;
Changing the frequency value of a preset pulse signal according to a first preset step length within a first preset range to determine a scattering parameter S21 corresponding to the reading line under each frequency value, wherein the scattering parameter S21 represents transmission loss of the preset pulse signal after entering the reading line from the input end of the reading line and being transmitted through the reading line to the output end of the reading line, and the difference value between the frequency value within the first preset range and the frequency design value is smaller than a first preset error value;
Determining a first reading cavity frequency based on a first change curve of the scattering parameter S21 along with frequency values in the first preset range, wherein the first reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the first change curve;
Changing the frequency value of the preset pulse signal according to a second preset step length within a second preset range to determine a scattering parameter S21 corresponding to the reading line under each frequency value, wherein the difference between the frequency value within the second preset range and the frequency of the first reading cavity is smaller than a second preset error value; and
And determining a second reading cavity frequency based on a second change curve of the scattering parameter S21 along with the frequency value in the second preset range, wherein the second reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the second change curve, and the second reading cavity frequency is used as the frequency value of the reading cavity obtained through simulation.
2. The method of claim 1, further comprising: performing a function fit based on a correspondence between the scattering parameter S21 and frequency values within the second preset range, according to the following formula, to determine an inner Q value and an outer Q value of the reading cavity based on a fitting result,
Wherein,For the inverse of the scattering parameter S21, Q i is the inner Q value, Q c is the outer Q value, Φ is a phase angle, δx= (f-f 0)/f0, where f is a frequency value within a second preset range, f 0 is a frequency value of the reading cavity, where the inner Q value represents an energy leakage rate of the reading cavity, and the outer Q value represents a coupling degree of the reading cavity and an external environment.
3. The method of claim 1, further comprising: determining an inner Q value and an outer Q value of the read chamber based on the second change curve, wherein the inner Q value represents an energy leakage rate of the read chamber, the outer Q value represents a degree of coupling of the read chamber to an external environment, wherein,
The outer Q value Q c is determined based on the following formula: Wherein f 0 is the frequency value of the reading cavity, Is the frequency difference between two intersecting points of the second change curve and a first straight line, wherein the first straight line is a straight line corresponding to a half power point; and
The internal Q value Q i is determined based on the following equation: Wherein, Is the frequency difference between two points of intersection of the second change curve and a second line, wherein the second line is the line corresponding to a point 3dB greater than the minimum point.
4.A method as claimed in claim 2 or 3, further comprising: determining a total Q value of the read chamber, wherein the total Q value is determined based on the following equation,
Q＝1/(1/Qi+1/Qc)
Wherein, Q represents the total Q value, which is used to represent the energy leakage rate of the reading cavity and the coupling degree of the reading cavity and the external environment.
5. The method of claim 1, wherein the second preset step size is smaller than the first preset step size.
6. The method of claim 1 or 5, wherein the first preset error value is greater than the second preset error value.
7. A superconducting quantum chip super-simulation verification device, comprising:
a first determination unit configured to determine a superconducting quantum chip to be subjected to parameter determination, wherein the superconducting quantum chip comprises a quantum bit and a reading cavity, and the reading cavity is used for reading a state of the quantum bit through a reading line;
An acquisition unit configured to acquire a frequency design value of the reading cavity given in advance;
A second determining unit configured to change a frequency value of a preset pulse signal according to a first preset step length within a first preset range to determine a scattering parameter S21 corresponding to the reading line at each frequency value, where the scattering parameter S21 represents a transmission loss of the preset pulse signal after entering the reading line from an input end of the reading line and being transmitted through the reading line to an output end of the reading line, and differences between the frequency value and the frequency design value within the first preset range are smaller than a first preset error value;
A third determining unit, configured to determine a first reading cavity frequency based on a first variation curve of the scattering parameter S21 along with a frequency value in the first preset range, where the first reading cavity frequency is determined based on a frequency value corresponding to a minimum point of the first variation curve;
a fourth determining unit, configured to change the frequency value of the preset pulse signal according to a second preset step length within a second preset range, so as to determine a scattering parameter S21 corresponding to the reading line under each frequency value, where the difference between the frequency value within the second preset range and the frequency of the first reading cavity is smaller than a second preset error value; and
And a fifth determining unit, configured to determine a second reading cavity frequency based on a second variation curve of the scattering parameter S21 along with the frequency value in the second preset range, where the second reading cavity frequency is determined based on a frequency value corresponding to a minimum value point of the second variation curve, as a frequency value of the reading cavity obtained through simulation.
8. The apparatus of claim 7, further comprising a sixth determination unit configured to:
performing a function fit based on a correspondence between the scattering parameter S21 and frequency values within the second preset range, according to the following formula, to determine an inner Q value and an outer Q value of the reading cavity based on a fitting result,
Wherein,For the inverse of the scattering parameter S21, Q i is the inner Q value, Q c is the outer Q value, Φ is a phase angle, δx= (f-f 0)/f0, where f is a frequency value within a second preset range, f 0 is a frequency value of the reading cavity, where the inner Q value represents an energy leakage rate of the reading cavity, and the outer Q value represents a coupling degree of the reading cavity and an external environment.
9. The apparatus of claim 7, further comprising a seventh determination unit configured to:
determining an inner Q value and an outer Q value of the read chamber based on the second change curve, wherein the inner Q value represents an energy leakage rate of the read chamber, the outer Q value represents a degree of coupling of the read chamber to an external environment, wherein,
The outer Q value Q c is determined based on the following formula: Wherein f 0 is the frequency value of the reading cavity, Is the frequency difference between two intersecting points of the second change curve and a first straight line, wherein the first straight line is a straight line corresponding to a half power point; and
The internal Q value Q i is determined based on the following equation: Wherein, Is the frequency difference between two points of intersection of the second change curve and a second straight line, wherein the second straight line is the straight line corresponding to a point 3db greater than the minimum point.
10. The apparatus according to claim 8 or 9, further comprising an eighth determination unit configured to:
determining a total Q value of the read chamber, wherein the total Q value is determined based on the following equation,
Q＝1/(1/Qi+1/Qc)
Wherein, Q represents the total Q value, which is used to represent the energy leakage rate of the reading cavity and the coupling degree of the reading cavity and the external environment.
11. The apparatus of claim 7, wherein the second preset step size is smaller than the first preset step size.
12. The apparatus of claim 7 or 11, wherein the first preset error value is greater than the second preset error value.
13. An electronic device, comprising:
At least one processor; and
A memory communicatively coupled to the at least one processor; wherein the method comprises the steps of
The memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.
14. A non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the method of any one of claims 1-6.
15. A computer program product comprising a computer program, wherein the computer program, when executed by a processor, implements the method of any of claims 1-6.
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