CN117519605A - Read-write efficiency improving method and related equipment - Google Patents
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G06—COMPUTING; CALCULATING OR COUNTING
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/067—Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
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- H04L69/16—Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
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Abstract
A method for improving read-write efficiency and related equipment. The method comprises the following steps: the main core analyzes a read-write request sent by a client based on an iSCSI protocol to obtain an analysis result; the master core determines a target core based on a load balancing strategy, and forwards the analysis result to the target core, wherein the target core is one of the master core or the slave core; and the target core sends the analysis result to a storage engine so that the storage engine can perform read-write operation based on the analysis result. By the method and the device, the hardware resource capacity of the iSCSI Target gateway can be fully utilized, so that the reading and writing efficiency is greatly improved.
Description
Technical Field
The application relates to the technical field of storage, in particular to a read-write efficiency improving method and related equipment.
Background
As internet data grows, storage systems become critical. The block storage scene has higher utilization rate in practical application, and the block storage is most widely applied by the iSCSI protocol.
However, the limitation of the iSCSI protocol itself results in that after a client establishes a TCP connection with the iSCSI Target gateway, the iSCSI Target gateway can only have one thread to process SCSI requests on the link, i.e. only one core capability can be exerted. However, in reality, when the cluster is planned, a plurality of cores are allocated to the iSCSI Target gateway, and the implementation can only play the multi-core capability when a plurality of clients are connected at the same time; when a single client is connected, only one core can be used, and the hardware resource capability owned by the iSCSI Target gateway is not fully exerted.
Disclosure of Invention
The application provides a read-write efficiency improving method and related equipment, which can solve the technical problem that the hardware resource capacity of an iSCSI Target gateway cannot be fully utilized when a single client is connected in the prior art.
In a first aspect, an embodiment of the present application provides a method for improving read/write efficiency, where the method for improving read/write efficiency is applied to an iSCSI Target gateway, where the iSCSI Target gateway includes a master core and at least one slave core, and the method for improving read/write efficiency includes:
the main core analyzes a read-write request sent by a client based on an iSCSI protocol to obtain an analysis result;
the master core determines a target core based on a load balancing strategy, and forwards the analysis result to the target core, wherein the target core is one of the master core or the slave core;
and the target core sends the analysis result to a storage engine so that the storage engine can perform read-write operation based on the analysis result.
With reference to the first aspect, in an implementation manner, the parsing result includes a pointer, an offset address, and a storage device identifier.
With reference to the first aspect, in one implementation manner, the load balancing policy is a polling policy.
With reference to the first aspect, in one implementation manner, after the step that the target core sends the analysis result to the storage engine for the storage engine to perform a read-write operation based on the analysis result, the method further includes:
the target core receives a read-write operation result fed back by the storage engine;
the target core sends the read-write operation result to the main core;
and the main core sends the read-write operation result to the client.
With reference to the first aspect, in one implementation manner, after the main core parses a read-write request sent by a client based on an iSCSI protocol to obtain a parsing result, the method further includes:
detecting whether the frequency of sending read-write requests by a client based on an iSCSI protocol is greater than a preset frequency;
and if the analysis result is larger than the target core, executing the steps that the main core determines the target core based on the load balancing strategy and forwarding the analysis result to the target core.
In a second aspect, embodiments of the present application provide an iSCSI Target gateway, the iSCSI Target gateway comprising a master core and at least one slave core, wherein:
the main core is used for analyzing the read-write request sent by the client based on the iSCSI protocol to obtain an analysis result; determining a target core based on a load balancing strategy, and forwarding the analysis result to the target core, wherein the target core is one of a master core or a slave core;
and the target core is used for sending the analysis result to the storage engine so that the storage engine can perform read-write operation based on the analysis result.
With reference to the second aspect, in one implementation manner, the parsing result includes a pointer, an offset address, and a storage device identifier.
With reference to the second aspect, in one embodiment, the load balancing policy is a polling policy.
In a third aspect, an embodiment of the present application provides a device for improving read/write efficiency, where the device for improving read/write efficiency includes a processor, a memory, and a read/write efficiency improving program stored on the memory and executable by the processor, where the method for improving read/write efficiency is implemented when the program is executed by the processor.
In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, where a read-write efficiency improvement program is stored on the computer readable storage medium, where the read-write efficiency improvement program, when executed by a processor, implements the steps of the read-write efficiency improvement method according to the first aspect.
The beneficial effects that technical scheme that this application embodiment provided include:
in the embodiment of the application, the main core analyzes a read-write request sent by a client based on an iSCSI protocol to obtain an analysis result; the master core determines a target core based on a load balancing strategy, and forwards the analysis result to the target core, wherein the target core is one of the master core or the slave core; and the target core sends the analysis result to a storage engine so that the storage engine can perform read-write operation based on the analysis result. According to the method and the device for processing the read-write request, the main core is utilized to analyze the read-write request, the analysis result is forwarded to the Target core determined based on the load balancing strategy, and finally the Target core sends the analysis result to the storage engine, namely, the read-write request initiated by the client is processed through the cores included in the iSCSI Target gateway, so that the hardware resource capacity of the iSCSI Target gateway can be fully utilized, and the read-write efficiency is greatly improved.
Drawings
FIG. 1 is a schematic flow chart of an embodiment of a method for improving the read/write efficiency of the present application;
FIG. 2 is a schematic diagram of an iSCSI Target gateway according to an embodiment of the present application;
fig. 3 is a schematic hardware structure of a read-write efficiency improving device according to an embodiment of the present application.
Detailed Description
In order to make the present application solution better understood by those skilled in the art, the following description will clearly and completely describe the technical solution in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
In a first aspect, an embodiment of the present application provides a method for improving read/write efficiency. The read-write efficiency improving method is applied to an iSCSI Target gateway, and the iSCSI Target gateway comprises a master core and at least one slave core.
In an embodiment, referring to fig. 1, fig. 1 is a flowchart illustrating an embodiment of a method for improving read/write efficiency of the present application. As shown in fig. 1, the read-write efficiency improving method includes:
step S10, the main core analyzes a read-write request sent by a client based on an iSCSI protocol to obtain an analysis result;
in this embodiment, the client establishes a TCP connection with the iSCSI Target gateway. The client sends a read-write request to the iSCSI Target gateway based on the iSCSI protocol through a TCP connection.
And the master core in the iSCSI Target gateway analyzes the read-write request sent by the client based on the iSCSI protocol, so as to obtain an analysis result. The method can be realized based on a message parsing technology, and detailed description is omitted.
The iSCSI Target gateway comprises at least two cores, wherein one of the cores is used as a master core, and the other cores are used as slave cores in a preset mode.
Further, in an embodiment, the parsing result includes a pointer, an offset address, and a storage device identifier.
In this embodiment, the analysis result is information on which the storage engine performs the read-write operation, and the analysis result includes a pointer, an offset address, and a storage device identifier. Wherein the pointer describes the location of the data in the memory, and identifies an entity occupying the memory space, and the relative distance value at the start position of the space. In the C/c++ language, a pointer is generally considered as a pointer variable, the content of which stores the first address of an object to which it points, and the object to which it points may be a variable (pointer variable is also a variable), an array, a function, or the like, which occupies an entity of a memory space.
The offset address is an offset relative to a first address in the storage device.
The storage device identification is used to indicate which storage device the current read and write operation is performed on. The distributed storage cluster comprises a plurality of storage devices, and the identifiers of different storage devices are different.
For the storage engine, after receiving the pointer, the offset address and the storage device identifier, the storage engine can perform read-write operation.
It should be noted that, the content included in the analysis result may be flexibly increased or decreased based on the pointer, the offset address and the storage device identifier according to actual needs, which is merely a schematic description of the content included in the analysis result, and does not limit the content included in the analysis result.
Step S20, a main core determines a target core based on a load balancing strategy, and forwards the analysis result to the target core, wherein the target core is one of the main core or a slave core;
in the conventional technology, a master core analyzes a read-write request sent by a client based on an iSCSI protocol, after an analysis result is obtained, the master core directly sends the analysis result to a storage engine, that is, the work of analyzing the read request and sending the analysis result to the storage engine is completed by the master core, and a slave core does not participate, so that the hardware resource capacity of the slave core is wasted.
In this embodiment, the master core parses a read-write request sent by a client based on an iSCSI protocol, determines a Target core from all cores included in an iSCSI Target gateway based on a load balancing policy after obtaining a parsing result, and forwards the parsing result to the Target core, so that the Target core performs a task of sending the parsing result to a storage engine.
The load balancing policy is used for determining that the target core can be the load of each core included in the computing gateway, and the core with the lowest load is selected as the target core.
It is easy to understand that, for the scenario that the client sends the read-write request at high frequency, if the processing is performed according to the conventional technology, the processing pressure of the main core is high, and when the processing efficiency of the main core is not up to the frequency that the client sends the read-write request, the read-write request sent later is put aside, thereby affecting the overall read-write efficiency and causing bad experience for the client at the client.
According to the mode provided by the embodiment, aiming at the scene that the client sends the read-write request at high frequency, the processing of the read-write request is completed by the master core and the slave core, the hardware resource capacity of the iSCSI Target gateway can be fully utilized, the situation that the read-write request is put aside is avoided to a certain extent, and the whole read-write efficiency is ensured.
Further, in an embodiment, after step S10, the method further includes:
detecting whether the frequency of sending read-write requests by a client based on an iSCSI protocol is greater than a preset frequency;
if so, step S20 is performed.
In this embodiment, the preset frequency is set based on the actual requirement, for example, the preset frequency is one hundred times per second. Here, the preset frequency is merely a schematic illustration, and the preset frequency is not limited.
When it is detected that the frequency of sending the read-write request by the client based on the iSCSI protocol is greater than one hundred times per second, if the processing is still performed according to the conventional technology (that is, the read request is parsed and the parsing result is sent to the storage engine and is completed by the main core), the situation that the processing efficiency of the main core does not keep up with the frequency of sending the read-write request by the client may occur, thereby affecting the overall read-write efficiency. To avoid this, when the frequency of sending read-write requests by the client based on iSCSI protocol is greater than the preset frequency, step 20 is performed, i.e. the slave core is caused to participate in the read-write request processing.
It is easy to understand that when the frequency of sending the read-write request by the client based on the iSCSI protocol is not greater than the preset frequency, it is indicated that the processing pressure of the current read-write request is not great, and in this case, the processing can still be performed by the conventional technology.
Step S30, the target core sends the analysis result to a storage engine so that the storage engine can perform read-write operation based on the analysis result.
In this embodiment, after receiving the analysis result, the target core forwards the analysis result to the storage engine, so that the storage engine performs the read-write operation based on the analysis result.
In the embodiment of the application, the main core analyzes a read-write request sent by a client based on an iSCSI protocol to obtain an analysis result; the master core determines a target core based on a load balancing strategy, and forwards the analysis result to the target core, wherein the target core is one of the master core or the slave core; and the target core sends the analysis result to a storage engine so that the storage engine can perform read-write operation based on the analysis result. According to the method and the device for processing the read-write request, the main core is utilized to analyze the read-write request, the analysis result is forwarded to the Target core determined based on the load balancing strategy, and finally the Target core sends the analysis result to the storage engine, namely, the read-write request initiated by the client is processed through the cores included in the iSCSI Target gateway, so that the hardware resource capacity of the iSCSI Target gateway can be fully utilized, and the read-write efficiency is greatly improved.
Further, in an embodiment, the load balancing policy is a polling policy.
In this embodiment, a polling policy is used as a load balancing policy, for example, an iSCSI Target gateway includes four cores, where core 0 is a master core and cores 1 to 3 are slave cores, and each analysis result is sent to each core in a polling manner. For example, the first analysis result is sent to core 0 (in this case, since the analysis result is obtained by analyzing the read/write request by the master core, the sending action may be omitted); the analysis result obtained in the second time is sent to the core 1; the analysis result obtained in the third time is sent to the core 2; the analysis result obtained in the fourth time is sent to the core 3; the analysis result obtained in the fifth time is sent to the core 0; the analysis result obtained in the sixth time is sent to the core 1, and so on.
The polling strategy is adopted as a load balancing strategy, namely, when the analysis result is forwarded between the cores, the communication between the master core and the slave core is a ring queue. The bottom layer of the annular queue is realized as an array, and the subscript can be directly used for accessing one element in the array, so that the processes of searching and searching indexes are omitted, the cost is low, and the main core resource is hardly occupied by the forwarding of the analysis result.
Further, in an embodiment, after step S30, the method further includes:
the target core receives a read-write operation result fed back by the storage engine;
the target core sends the read-write operation result to the main core;
and the main core sends the read-write operation result to the client.
In this embodiment, after performing the read-write operation based on the analysis result, the storage engine feeds back the read-write operation result to the target core; after receiving the read-write operation result fed back by the storage engine, the target core sends the read-write operation result to the main core; the main core further sends the read-write operation result to the client; thus, the whole processing flow of a read-write request is completed.
It is easy to understand that in the conventional technology, interaction between the iSCSI Target gateway and the storage engine is only completed by one core on the iSCSI Target gateway, but in this embodiment, the analysis result is distributed among a plurality of cores based on the load balancing policy, and interaction with the storage engine is completed by the Target core, so that the hardware resource capability of the iSCSI Target gateway is fully utilized.
In a second aspect, embodiments of the present application further provide a read-write efficiency promoting iSCSI Target gateway.
In one embodiment, referring to fig. 2, fig. 2 is a schematic diagram illustrating an architecture of an iSCSI Target gateway according to an embodiment of the present application. As shown in fig. 2, the iSCSI Target gateway comprises a master core and at least one slave core, wherein:
the main core is used for analyzing the read-write request sent by the client based on the iSCSI protocol to obtain an analysis result; determining a target core based on a load balancing strategy, and forwarding the analysis result to the target core, wherein the target core is one of a master core or a slave core;
and the target core is used for sending the analysis result to the storage engine so that the storage engine can perform read-write operation based on the analysis result.
Further, in an embodiment, the parsing result includes a pointer, an offset address, and a storage device identification.
Further, in an embodiment, the load balancing policy is a polling policy.
Further, in an embodiment, the target core is configured to:
receiving a read-write operation result fed back by a storage engine;
the read-write operation result is sent to a main core;
and the main core is used for sending the read-write operation result to the client.
Further, in an embodiment, the iSCSI Target gateway further includes a detection module configured to:
detecting whether the frequency of sending read-write requests by a client based on an iSCSI protocol is greater than a preset frequency;
if the analysis result is larger than the target core, the main core determines the target core based on the load balancing strategy, and forwards the analysis result to the target core.
The specific embodiment of the iSCSI Target gateway corresponds to each step in the embodiment of the read-write efficiency improving method, and the functions and implementation processes thereof are not described herein in detail.
In a third aspect, an embodiment of the present application provides a read/write efficiency improving device, which may be a device having a data processing function, such as a personal computer (personal computer, PC), a notebook computer, a server, or the like.
Referring to fig. 3, fig. 3 is a schematic hardware structure of a read-write efficiency improving device according to an embodiment of the present application. In this embodiment of the present application, the read/write efficiency improving device may include a processor, a memory, a communication interface, and a communication bus.
The communication bus may be of any type for implementing the processor, memory, and communication interface interconnections.
The communication interfaces include input/output (I/O) interfaces, physical interfaces, logical interfaces, and the like for implementing device interconnection inside the read/write efficiency improving apparatus, and interfaces for implementing interconnection of the read/write efficiency improving apparatus with other apparatuses (e.g., other computing apparatuses or user apparatuses). The physical interface may be an ethernet interface, a fiber optic interface, an ATM interface, etc.; the user device may be a Display, a Keyboard (Keyboard), or the like.
The memory may be various types of storage media such as random access memory (randomaccess memory, RAM), read-only memory (ROM), nonvolatile RAM (non-volatileRAM, NVRAM), flash memory, optical memory, hard disk, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (electrically erasable PROM, EEPROM), and the like.
The processor may be a multi-core processor, and the multi-core processor may call a read-write efficiency improving program stored in the memory and execute the read-write efficiency improving method provided by the embodiment of the present application. The method executed when the read/write efficiency enhancing program is called may refer to various embodiments of the read/write efficiency enhancing method of the present application, and will not be described herein.
Those skilled in the art will appreciate that the hardware configuration shown in fig. 3 is not limiting of the application and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
In a fourth aspect, embodiments of the present application also provide a computer-readable storage medium.
The computer readable storage medium stores a read-write efficiency improving program, wherein when the read-write efficiency improving program is executed by a processor, the steps of the read-write efficiency improving method are realized.
The method implemented when the read/write efficiency enhancing program is executed may refer to various embodiments of the read/write efficiency enhancing method of the present application, which are not described herein again.
It should be noted that, the foregoing embodiment numbers are merely for describing the embodiments, and do not represent the advantages and disadvantages of the embodiments.
The terms "comprising" and "having" and any variations thereof in the description and claims of the present application and in the foregoing drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus. The terms "first," "second," and "third," etc. are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order, and are not limited to the fact that "first," "second," and "third" are not identical.
In the description of embodiments of the present application, "exemplary," "such as," or "for example," etc., are used to indicate an example, instance, or illustration. Any embodiment or design described herein as "exemplary," "such as" or "for example" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary," "such as" or "for example," etc., is intended to present related concepts in a concrete fashion.
In the description of the embodiments of the present application, unless otherwise indicated, "/" means or, for example, a/B may represent a or B; the text "and/or" is merely an association relation describing the associated object, and indicates that three relations may exist, for example, a and/or B may indicate: the three cases where a exists alone, a and B exist together, and B exists alone, and in addition, in the description of the embodiments of the present application, "plural" means two or more than two.
In some of the processes described in the embodiments of the present application, a plurality of operations or steps occurring in a particular order are included, but it should be understood that these operations or steps may be performed out of the order in which they occur in the embodiments of the present application or in parallel, the sequence numbers of the operations merely serve to distinguish between the various operations, and the sequence numbers themselves do not represent any order of execution. In addition, the processes may include more or fewer operations, and the operations or steps may be performed in sequence or in parallel, and the operations or steps may be combined.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) as described above, comprising several instructions for causing a terminal device to perform the method described in the various embodiments of the present application.
The foregoing description is only of the preferred embodiments of the present application, and is not intended to limit the scope of the claims, and all equivalent structures or equivalent processes using the descriptions and drawings of the present application, or direct or indirect application in other related technical fields are included in the scope of the claims of the present application.
Claims (10)
1. A method for improving the read-write efficiency, wherein the method for improving the read-write efficiency is applied to an iscsi target gateway, the iscsi target gateway includes a master core and at least one slave core, and the method for improving the read-write efficiency includes:
the main core analyzes a read-write request sent by a client based on an iSCSI protocol to obtain an analysis result;
the master core determines a target core based on a load balancing strategy, and forwards the analysis result to the target core, wherein the target core is one of the master core or the slave core;
and the target core sends the analysis result to a storage engine so that the storage engine can perform read-write operation based on the analysis result.
2. The method for improving read/write efficiency according to claim 1, wherein the parsing result includes a pointer, an offset address, and a storage device identifier.
3. The method of claim 1, wherein the load balancing policy is a polling policy.
4. The method for improving read/write efficiency according to claim 1, further comprising, after the step of sending the analysis result to a storage engine by the target core for the storage engine to perform a read/write operation based on the analysis result:
the target core receives a read-write operation result fed back by the storage engine;
the target core sends the read-write operation result to the main core;
and the main core sends the read-write operation result to the client.
5. The method for improving read-write efficiency as in any one of claims 1 to 4, wherein after the master core parses a read-write request sent by a client based on an iSCSI protocol to obtain a parsing result, further comprising:
detecting whether the frequency of sending read-write requests by a client based on an iSCSI protocol is greater than a preset frequency;
and if the analysis result is larger than the target core, executing the steps that the main core determines the target core based on the load balancing strategy and forwarding the analysis result to the target core.
6. An iscsi target gateway comprising a master core and at least one slave core, wherein:
the main core is used for analyzing the read-write request sent by the client based on the iSCSI protocol to obtain an analysis result; determining a target core based on a load balancing strategy, and forwarding the analysis result to the target core, wherein the target core is one of a master core or a slave core;
and the target core is used for sending the analysis result to the storage engine so that the storage engine can perform read-write operation based on the analysis result.
7. The iscsi target gateway of claim 6, wherein the parsing result comprises a pointer, an offset address, and a storage device identification.
8. The iscsi target gateway of claim 6, wherein the load balancing policy is a polling policy.
9. A read-write efficiency promoting device comprising a processor, a memory, and a read-write efficiency promoting program stored on the memory and executable by the processor, wherein the read-write efficiency promoting program, when executed by the processor, implements the steps of the read-write efficiency promoting method according to any one of claims 1 to 5.
10. A computer-readable storage medium, wherein a read-write efficiency improvement program is stored on the computer-readable storage medium, wherein the read-write efficiency improvement program, when executed by a processor, implements the steps of the read-write efficiency improvement method according to any one of claims 1 to 5.
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| CN202311694710.4A CN117519605A (en) | 2023-12-08 | 2023-12-08 | Read-write efficiency improving method and related equipment |
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