CN117517913A - Semiconductor test apparatus - Google Patents
Semiconductor test apparatus Download PDFInfo
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- CN117517913A CN117517913A CN202311368719.6A CN202311368719A CN117517913A CN 117517913 A CN117517913 A CN 117517913A CN 202311368719 A CN202311368719 A CN 202311368719A CN 117517913 A CN117517913 A CN 117517913A
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- 238000012360 testing method Methods 0.000 title claims abstract description 150
- 239000004065 semiconductor Substances 0.000 title claims abstract description 92
- 230000002093 peripheral effect Effects 0.000 claims abstract description 14
- 238000004040 coloring Methods 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 abstract description 12
- 238000005259 measurement Methods 0.000 abstract description 7
- 230000001360 synchronised effect Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 7
- 239000000523 sample Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 230000008901 benefit Effects 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention discloses semiconductor test equipment, in particular to the technical field of semiconductor test, which comprises a base for supporting, wherein a test assembly is arranged on the base, the test assembly comprises a peripheral baffle for supporting, and the peripheral baffle is arranged on one side of the top of the base. The invention can avoid the falling or inaccurate test caused by the shift or shake of the semiconductors during the transmission and test by the corresponding matching of each structure, is convenient for electrifying the semiconductors to ensure the correct transmission and measurement of signals, can realize the synchronous transmission and test of the semiconductors, can adapt to semiconductors with different sizes, and improves the diversity and convenience of the device during the use.
Description
Technical Field
The present invention relates to the field of semiconductor testing technology, and more particularly, to a semiconductor testing apparatus.
Background
Semiconductor test equipment is equipment for testing and inspecting semiconductor devices, which are commonly used to verify the performance, reliability and consistency of semiconductor devices, and uses various test methods and techniques, such as electrical performance testing, functional testing, reliability testing and packaging testing, to ensure that the semiconductor devices meet specifications and quality requirements.
Among other things, the patent of patent application number CN201821463301.8 discloses a semiconductor test apparatus comprising: the appearance testing device comprises an appearance testing cavity, an image acquisition instrument and a cover, wherein the appearance testing cavity comprises a first top plate, a first opening penetrating through the first top plate is formed in the first top plate, the image acquisition instrument is positioned in the appearance testing cavity and comprises a probe, the probe faces to the first opening, the image acquisition instrument is suitable for carrying out image acquisition on a chip above the probe, and the cover is positioned in the appearance testing cavity and surrounds the probe; the cover comprises an annular cover side plate and a cover bottom plate connected with the annular cover side plate, a cover opening is formed by a space surrounded by the annular cover side plate and the cover bottom plate, a cover hole penetrating through the cover bottom plate is formed in the cover bottom plate, the cover opening faces the first opening, the probe extends into the cover through the cover hole, and the inner wall of the cover hole is in contact with the bottom area in the probe;
this structure is when using, the cover package probe for the image acquisition appearance is carrying out image acquisition's in-process to the chip, if the chip drops through first opening, the chip can drop in the cover, avoid the chip to drop to the electric circuit structure around the image acquisition appearance in, do benefit to the image acquisition appearance to the chip carry out the collection of graphic information, improved the accuracy that the image acquisition appearance gathered image information, but this structure is when using, can't realize going on in step and detecting the conveying of component, causes detection efficiency low.
Disclosure of Invention
In order to overcome the above-mentioned drawbacks of the prior art, the present invention provides a semiconductor test apparatus, which aims to solve the problems set forth in the above-mentioned background art.
In order to achieve the above purpose, the present invention provides the following technical solutions: a semiconductor test apparatus includes a base for supporting, the base having a test assembly disposed thereon;
the test assembly includes;
the peripheral baffle is used for supporting and is arranged on one side of the top of the base;
the host machine is used for controlling and is arranged at one side of the top of the base;
the first display screen is used for displaying and is arranged on one side of the top of the host;
the control button is used for controlling and is arranged on one side of the first display screen;
the second display screen is used for displaying and is arranged on one side of the top of the host;
the positioning plate is used for supporting and is arranged on one side of the peripheral baffle;
extension boards which can be used for supporting, and are respectively arranged at one side of the positioning board and one side of the host machine;
two clamping plates for supporting, wherein each clamping plate is respectively arranged at one end of the corresponding extension plate;
the plurality of belt pulley groups are used for conveying the semiconductors, and each belt pulley group is respectively arranged on the corresponding extension plate and the corresponding clamping plate;
two upper pressing plates for supporting the semiconductors, wherein each upper pressing plate is respectively arranged at the top of the corresponding clamping plate;
the first top plate can be displaced up and down and is arranged between the two clamping plates;
the clamping plates are used for supporting, and are respectively arranged on two sides of the top of the first top plate;
the cross bars are used for supporting and are arranged at the tops of the two clamping plates side by side;
the output end of the first cylinder penetrates through the base and extends to the bottom of the first top plate to be detachably connected with the first top plate;
the two motors are used for driving, and the motors are respectively arranged at the bottoms of the extension plate and the clamping plate;
the output ends of the motors extend to the belt pulley sets to which the clamping plates and the extension plates belong respectively;
according to the technical scheme, the top of the semiconductor is limited through the upper pressing plate, and meanwhile, the first cylinder is started to drive the first top plate to move upwards, so that the top of the cross rod can be contacted with the bottom of the semiconductor, the stability of the semiconductor when the semiconductor is conveyed on the device is ensured, and falling or inaccurate testing caused by shifting or shaking of the semiconductor when the semiconductor is conveyed and tested is avoided;
a second top plate which is movable up and down, the second top plate being disposed between the two extension plates;
a pair of plates for supporting, the pair of plates being disposed at one side of the second top plate;
the second air cylinder is used for driving, is arranged at the top of the plate, and the output end of the second air cylinder extends to the bottom of the first test plate and is detachably connected with the first test plate;
a first test plate for support, the first test plate being disposed on top of the plate;
the second test board is used for supporting, is arranged on the top of the board and is connected with the board in a sliding manner;
the output end of the third cylinder extends to the second test plate and is detachably connected with the second test plate;
the two plug pin bases are used for supporting, and each plug pin base is respectively arranged on the test plug pins of the second test board and the first test board;
the test pins are used for testing, and are respectively arranged on one side of the tops of the second test plate and the first test plate;
the test pins are arranged horizontally, and the test pins are arranged vertically;
in the above technical scheme, the second cylinder drives the test pins on the first test board to be in contact with the bottom of the semiconductor copper sheet, the fourth cylinder drives the second top plate to move upwards, and the third cylinder drives the second test board to move, so that the test pins on the second test board can be in contact with the side surface of the semiconductor copper sheet, when in test, test parameters are set by the host preferentially, and according to test requirements and specifications, parameters such as voltage, current, frequency and the like are set, and the response of the test pins is observed and recorded by applying voltage, current or signals to the tested device through each test pin;
the two guide rails are used for supporting, and the guide rails are respectively arranged at one side of the peripheral baffle and one side of the host machine;
the traction rod is used for supporting and is arranged at one end of the tops of the two guide rails;
the two contact blocks are used for lifting, and each contact block is arranged on one side of the traction rod;
the plurality of conductive columns are used for testing and are respectively arranged on the corresponding contact blocks;
the sliding columns are used for supporting, are respectively arranged on the corresponding guide rails and are in sliding connection with the guide rails;
the tops of the two sliding columns are respectively provided with a first electric push rod for driving, and the output ends of the first electric push rods respectively extend to the end parts of the traction rods and are detachably connected with the traction rods;
a rotating shaft is arranged between two belt pulley groups which are oppositely arranged, a guide groove for guiding is formed in the outer side of the rotating shaft, sliding blocks which are in sliding connection with the guide groove are respectively arranged on the belt pulley groups which are close to the extension plate of the locating plate and the clamping plate, and a second electric push rod for driving the clamping plate to move is arranged on one side of the locating plate;
according to the technical scheme, the second electric push rod is used for starting to drive the displacement of one side of the positioning plate, the distance between the two clamping plates and the extension plate is adjusted, so that the device can adapt to semiconductors of different sizes when in use, and through the arrangement of the rotating shaft and the guide grooves, each belt pulley group can continuously rotate when the extension plate and the clamping plates are displaced, convenience of the device when in use is ensured, the traction rod is downwards displaced, the conductive column can be in contact with the semiconductors, and the semiconductors can be conveniently electrified to ensure correct transmission and measurement of signals;
the invention has the technical effects and advantages that:
1. when the device is used, the top of a semiconductor is limited through the upper pressing plate, and meanwhile, the first cylinder is started to drive the first top plate to move upwards, so that the top of the cross rod can be contacted with the bottom of the semiconductor, the stability of the semiconductor when the semiconductor is conveyed on the device is ensured, and the falling or inaccurate test caused by shifting or shaking of the semiconductor when the semiconductor is conveyed and tested is avoided;
2. the output end of the first electric push rod drives the traction rod to displace downwards, and the conductive column can be in contact with the semiconductor, so that the semiconductor is conveniently electrified to ensure correct transmission and measurement of signals, and the response of the semiconductor is observed and recorded by applying voltage, current or signals to a tested device through each test contact pin;
3. in the test, the first electric push rod drives the traction rod to move upwards so that the semiconductors can be conveyed to the belt pulley group to which the extension plate belongs for conveying, and the traction rod is reset and conveyed by the conductive column on the extension plate, so that the conveying and the test of the semiconductors are synchronously carried out;
4. according to the invention, the second top plate is driven to move upwards through the fourth air cylinder, and the second test plate is driven to move through the third air cylinder, so that the test pins on the second test plate and the first test plate can be contacted with the side surface or the bottom of the semiconductor copper sheet, and the diversity and the convenience in semiconductor test are realized;
5. the invention can also adjust the interval between the two clamping plates and the extension plate so as to be convenient for the device to adapt to semiconductors with different sizes when in use;
in summary, the semiconductor device has the advantages of simple overall design and reasonable structure, and can avoid falling or inaccurate test caused by shifting or shaking when the semiconductor is transmitted and tested through corresponding matching of each structure, so that the semiconductor device is conveniently electrified to ensure correct transmission and measurement of signals, the transmission and test of the semiconductor device can be synchronously carried out, meanwhile, the semiconductor device can also adapt to semiconductors of different sizes, and the diversity and convenience of the device in use are improved.
Drawings
In order to more clearly illustrate the technical solutions of the present disclosure, the drawings that need to be used in some embodiments of the present disclosure will be briefly described below, and it is apparent that the drawings in the following description are only drawings of some embodiments of the present disclosure, and other drawings may be obtained according to these drawings to those of ordinary skill in the art. Furthermore, the drawings in the following description may be regarded as schematic diagrams, not limiting the actual size of the products, the actual flow of the methods, the actual timing of the signals, etc. according to the embodiments of the present disclosure.
Fig. 1 is a schematic diagram of the overall structure of the present invention.
Fig. 2 is a top view of the overall structure of the present invention.
Fig. 3 is a cross-sectional view of the overall structure of the present invention.
Fig. 4 is a front view of a test assembly of the present invention.
Fig. 5 is a front view of the structures on the second top plate of the present invention.
Fig. 6 is a front view of various structures on the drawbar of the invention.
Fig. 7 is a front view showing a partial structure of the extension plate and the rotation shaft of the present invention.
The reference numerals are: 1. a base; 101. a peripheral shield; 102. a host; 103. a first display screen; 104. a control button; 105. a second display screen;
2. a positioning plate; 201. an extension plate; 202. a clamping plate; 203. a belt pulley set; 204. an upper press plate; 205. a first top plate; 206. a clamping plate; 207. a cross bar; 208. a first cylinder; 209. a motor;
3. a second top plate; 301. a plate is arranged; 302. a second cylinder; 303. a first test plate; 304. a second test plate; 305. a third cylinder; 306. a pin holder; 307. a test pin; 308. a fourth cylinder;
4. a guide rail; 401. a traction rod; 402. a touch block; 403. a conductive post; 404. a spool; 405. a first electric push rod; 406. a second electric push rod; 407. a rotating shaft; 408. a guide groove.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terms "first," "second," "third," and the like in the embodiments of the present application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "first," "second," and "third" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In the embodiment, as shown in fig. 1-7, through the test assembly arranged on the base, the semiconductor can be prevented from falling or inaccurate test due to displacement or jitter during the transmission and test of the semiconductor, the semiconductor can be conveniently electrified to ensure the correct transmission and measurement of signals, the transmission and test of the semiconductor can be synchronously carried out, meanwhile, the semiconductor test device can also adapt to semiconductors of different sizes, the diversity and convenience of the device during the use are improved, and the specific structure of the assembly is as follows;
the test assembly includes;
a peripheral block 101 for supporting, the peripheral block 101 being arranged on one side of the top of the base 1;
a host 102 for control, the host 102 being disposed on a top side of the base 1;
a first display screen 103 for displaying, the first display screen 103 being disposed on a top side of the host 102;
a control button 104 for control, the control button 104 being provided on one side of the first display screen 103;
a second display screen 105 for displaying, the second display screen 105 being disposed on a top side of the host 102;
a positioning plate 2 for supporting, the positioning plate 2 being disposed at one side of the peripheral barrier 101;
extension boards 201 which can be used for supporting, and each extension board 201 is respectively arranged at one side of the positioning board 2 and the host 102;
two clamping plates 202 for supporting, and each clamping plate 202 is respectively arranged at one end of the corresponding extension plate 201;
a plurality of belt wheel sets 203 for conveying the semiconductors, wherein each belt wheel set 203 is respectively arranged on the corresponding extension plate 201 and the clamping plate 202;
two upper pressing plates 204 for supporting the semiconductor, and each upper pressing plate 204 is respectively disposed on top of a corresponding clamping plate 202;
a first top plate 205 that can be displaced up and down, the first top plate 205 being disposed between the two clamping plates 202;
two clamping plates 206 for supporting, wherein each clamping plate 206 is respectively arranged at two sides of the top of the first top plate 205;
a plurality of crossbars 207 for supporting, each crossbar 207 being arranged side by side on top of two clamping plates 206;
the first cylinder 208 is used for driving, the first cylinder 208 is arranged at the bottom of the base 1, and the output end of the first cylinder 208 penetrates through the base 1 and extends to the bottom of the first top plate 205 to be detachably connected with the first top plate 205;
two motors 209 for driving, and each motor 209 is provided at the bottoms of the extension plate 201 and the clamping plate 202, respectively;
wherein, the output end of each motor 209 extends to the belt pulley group 203 to which the clamping plate 202 and the extension plate 201 belong respectively;
a second top plate 3 that can be displaced up and down, the second top plate 3 being disposed between the two extension plates 201;
a pair of plates 301 for support, the pair of plates 301 being provided on one side of the second top plate 3;
a second cylinder 302 for driving, the second cylinder 302 being disposed on the top of the plate 301, the output end of the second cylinder 302 extending to the bottom of the first test plate 303 and being detachably connected to the first test plate 303;
a first test board 303 for supporting, the first test board 303 being disposed on top of the board 301;
a second test board 304 for supporting, the second test board 304 being disposed on top of the board 301 and slidably connected to the board 301;
a third cylinder 305 for driving, the third cylinder 305 being disposed at one side of the second test plate 304, the output end of the third cylinder 305 extending onto the second test plate 304 and being detachably connected to the second test plate 304;
two pin holders 306 for supporting, and each pin holder 306 is respectively disposed on the test pins 307 to which the second test board 304 and the first test board 303 belong;
a plurality of test pins 307 for testing, wherein each test pin 307 is respectively arranged at one side of the top of the second test board 304 and the first test board 303;
wherein the test pins 307 belonging to the test pins 307 are horizontally arranged, and the test pins 307 belonging to the first test board 303 are vertically arranged;
two guide rails 4 for supporting, and each guide rail 4 is respectively arranged at one side of the peripheral block 101 and the host 102;
a traction bar 401 for supporting, the traction bar 401 being provided at one end of the top of the two guide rails 4;
two contact blocks 402 for lifting, and each contact block 402 is disposed at one side of the traction bar 401;
a plurality of conductive pillars 403 for testing, wherein each conductive pillar 403 is disposed on a corresponding contact block 402;
two sliding columns 404 for supporting, wherein each sliding column 404 is respectively arranged on the corresponding guide rail 4 and is in sliding connection with the guide rail 4;
the tops of the two sliding columns 404 are respectively provided with a first electric push rod 405 for driving, and the output ends of the first electric push rods 405 respectively extend to the end parts of the traction rods 401 and are detachably connected with the traction rods 401;
a rotating shaft 407 is arranged between two opposite belt pulley sets 203, a guide groove 408 for guiding is formed in the outer side of the rotating shaft 407, sliding blocks which are in sliding connection with the guide groove 408 are respectively arranged on the belt pulley sets 203 which are close to the extension plate 201 of the locating plate 2 and the clamping plate 202, and a second electric push rod 406 for driving the clamping plate 202 to move is arranged on one side of the locating plate 2.
According to the structure, when the device is used, a worker installs the device at a designated position, and when a semiconductor to be tested is tested, the worker places the semiconductor on the belt pulley group 203 to which the clamping plate 202 belongs, limits the top of the semiconductor through the upper clamping plate 204, and starts the device through the first cylinder 208 to drive the first top plate 205 to move upwards, and enables the top of the cross rod 207 to be in contact with the bottom of the semiconductor, so that the stability of the semiconductor when the semiconductor is conveyed on the device is ensured, and dropping or inaccurate test caused by shifting or shaking of the semiconductor when the semiconductor is conveyed and tested is avoided;
when the semiconductor is tested, the traction rod 401 is driven to move downwards through the output end of the first electric push rod 405, the conductive column 403 can be in contact with the semiconductor, the semiconductor is conveniently electrified to ensure correct transmission and measurement of signals, meanwhile, the semiconductor and the structure on the traction rod 401 are driven to move synchronously when the belt pulley group 203 on the clamping plate 202 is driven to rotate by the motor 209, after the semiconductor is tested, the traction rod 401 is driven to move upwards by the first electric push rod 405, so that the semiconductor can be conveyed to the belt pulley group 203 to which the extension plate 201 belongs for conveying, and a follow-up staff pushes the traction rod 401 back to the original position, and continuous testing and conveying of the semiconductor can be realized by repeating the steps;
and when the semiconductor is tested and conveyed, the test pins 307 on the first test board 303 are driven by the second air cylinder 302 to be contacted with the bottom of the semiconductor copper sheet, the second top board 3 is driven by the fourth air cylinder 308 to be upwards displaced, the second test board 304 is driven by the third air cylinder 305 to be displaced, so that the test pins 307 on the second test board 304 are contacted with the side surface of the semiconductor copper sheet, when the test is performed, test parameters are preferably set by the host 102, and the responses of the test pins 307 are observed and recorded by applying voltages, currents or signals to the tested device according to the test requirements and specifications, setting parameters such as voltages, currents, frequencies and the like;
and when the device is used, the clamping plate 202 on one side of the driving positioning plate 2 can be started to move through the second electric push rod 406, the distance between the two clamping plates 202 and the extension plate 201 is adjusted, so that the device can adapt to semiconductors with different sizes when in use, and through the arrangement of the rotating shaft 407 and the guide groove 408, each belt pulley group 203 can continuously rotate when the extension plate 201 and the clamping plate 202 are moved, and convenience of the device when in use is ensured.
The application discloses semiconductor test equipment, through the corresponding cooperation of each structure, can avoid the semiconductor to convey and appear shifting or shake and take place to drop or cause the test inaccurate when testing, be convenient for carry out the circular telegram with ensureing the correct transmission and the measurement of signal to the semiconductor, can realize that the conveying and the test of semiconductor go on in step, can also adapt to the semiconductor of equidimension simultaneously, improve the diversity and the convenience of device when using.
The foregoing is only illustrative of the preferred embodiments of the present invention and is not to be construed as limiting the invention, but rather as various modifications, equivalent arrangements, improvements, etc., within the spirit and principles of the present invention.
Claims (8)
1. Semiconductor test apparatus comprising a base (1) for support, characterized in that: the base (1) is provided with a test assembly in a coloring pair;
the test assembly includes;
the peripheral baffle (101) is used for supporting, and the peripheral baffle (101) is arranged on one side of the top of the base (1);
a host machine (102) for control, wherein the host machine (102) is arranged on one side of the top of the base (1);
the positioning plate (2) is used for supporting, and the positioning plate (2) is arranged on one side of the peripheral baffle (101);
extension boards (201) which can be used for supporting, and each extension board (201) is respectively arranged at one side of the positioning board (2) and one side of the host machine (102);
two clamping plates (202) for supporting, and each clamping plate (202) is respectively arranged at one end of a corresponding extension plate (201);
a second top plate (3) that can be displaced up and down, the second top plate (3) being disposed between the two extension plates (201);
-a pair of plates (301) for support, said pair of plates (301) being arranged on one side of the second top plate (3);
a first test board (303) for supporting, the first test board (303) being arranged on top of the board (301);
a second test board (304) for supporting, the second test board (304) being disposed on top of the board (301) and being slidably connected to the board (301);
and the test pins (307) are used for testing, and each test pin (307) is respectively arranged on one side of the top of the second test plate (304) and one side of the top of the first test plate (303).
2. The semiconductor test apparatus according to claim 1, wherein: the test assembly further comprises;
a first display screen (103) for displaying, the first display screen (103) being arranged on the top side of the host (102);
a control button (104) for control, the control button (104) being provided on one side of the first display screen (103);
and a second display screen (105) for displaying, wherein the second display screen (105) is arranged on one side of the top of the host (102).
3. The semiconductor test apparatus according to claim 1, wherein: the test assembly further comprises;
a plurality of belt wheel sets (203) for conveying the semiconductors, wherein each belt wheel set (203) is respectively arranged on a corresponding extension plate (201) and a clamping plate (202);
two upper pressing plates (204) for supporting the semiconductors, and each upper pressing plate (204) is respectively arranged on the top of a corresponding clamping plate (202);
a first top plate (205) that is displaceable up and down, the first top plate (205) being disposed between two clamping plates (202);
two clamping plates (206) for supporting, wherein each clamping plate (206) is respectively arranged at two sides of the top of the first top plate (205);
a plurality of crossbars (207) for supporting, and each crossbar (207) is arranged on top of two clamping plates (206) side by side.
4. A semiconductor test apparatus according to claim 3, wherein: the test assembly further comprises;
the first air cylinder (208) is used for driving, the first air cylinder (208) is arranged at the bottom of the base (1), and the output end of the first air cylinder (208) penetrates through the base (1) and extends to the bottom of the first top plate (205) to be detachably connected with the first top plate (205);
two motors (209) for driving, and each motor (209) is respectively arranged at the bottoms of the extension plate (201) and the clamping plate (202);
wherein the output end of each motor (209) extends to the belt pulley group (203) to which the clamping plate (202) and the extension plate (201) belong respectively.
5. The semiconductor test apparatus according to claim 1, wherein: the test assembly further comprises;
a second air cylinder (302) for driving, wherein the second air cylinder (302) is arranged at the top of the plate (301), and the output end of the second air cylinder (302) extends to the bottom of the first test plate (303) and is detachably connected with the first test plate (303);
a third air cylinder (305) for driving, wherein the third air cylinder (305) is arranged on one side of the second test plate (304), and the output end of the third air cylinder (305) extends to the second test plate (304) and is detachably connected with the second test plate (304);
two pin holders (306) for supporting, and each pin holder (306) is respectively arranged on a test pin (307) to which the second test board (304) and the first test board (303) belong;
wherein the test pins (307) belonging to the test pins (307) are horizontally arranged, and the test pins (307) belonging to the first test board (303) are vertically arranged.
6. The semiconductor test apparatus according to claim 1, wherein: the test assembly further comprises;
two guide rails (4) for supporting, wherein each guide rail (4) is respectively arranged at one side of the peripheral baffle (101) and one side of the host machine (102);
a traction rod (401) for supporting, wherein the traction rod (401) is arranged at one end of the tops of the two guide rails (4);
two contact blocks (402) for lifting, wherein each contact block (402) is arranged on one side of the traction rod (401);
a plurality of conductive columns (403) for testing, wherein each conductive column (403) is respectively arranged on a corresponding contact block (402);
two sliding columns (404) for supporting, and each sliding column (404) is respectively arranged on the corresponding guide rail (4) and is in sliding connection with the guide rail (4).
7. The semiconductor test apparatus according to claim 6, wherein: the tops of the two sliding columns (404) are respectively provided with a first electric push rod (405) for driving, and the output end of each first electric push rod (405) extends to the end part of the traction rod (401) and is detachably connected with the traction rod (401).
8. The semiconductor test apparatus according to claim 1, wherein: a rotating shaft (407) is arranged between two opposite belt pulley sets (203), a guide groove (408) for guiding is formed in the outer side of the rotating shaft (407), sliding blocks which are in sliding connection with the guide groove (408) are respectively arranged on the belt pulley sets (203) which are close to the extension plate (201) of the locating plate (2) and the clamping plate (202), and a second electric push rod (406) for driving the clamping plate (202) to move is arranged on one side of the locating plate (2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311368719.6A CN117517913A (en) | 2023-10-20 | 2023-10-20 | Semiconductor test apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311368719.6A CN117517913A (en) | 2023-10-20 | 2023-10-20 | Semiconductor test apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117517913A true CN117517913A (en) | 2024-02-06 |
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ID=89750340
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311368719.6A Withdrawn CN117517913A (en) | 2023-10-20 | 2023-10-20 | Semiconductor test apparatus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117517913A (en) |
-
2023
- 2023-10-20 CN CN202311368719.6A patent/CN117517913A/en not_active Withdrawn
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20240206 |
|
| WW01 | Invention patent application withdrawn after publication |