CN117498822A - Surface acoustic wave device and its regulating method - Google Patents

Surface acoustic wave device and its regulating method Download PDF

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Publication number
CN117498822A
CN117498822A CN202210871673.9A CN202210871673A CN117498822A CN 117498822 A CN117498822 A CN 117498822A CN 202210871673 A CN202210871673 A CN 202210871673A CN 117498822 A CN117498822 A CN 117498822A
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electrode
acoustic wave
surface acoustic
wave device
transistor
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郭威
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BOE Technology Group Co Ltd
Beijing BOE Technology Development Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Technology Development Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/02535—Details of surface acoustic wave devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/25—Constructional features of resonators using surface acoustic waves
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46—Filters
    • H03H9/64—Filters using surface acoustic waves

Abstract

The present disclosure provides a surface acoustic wave device and a method for controlling the same, which belong to the technical field of micro-electro-mechanical systems. The surface acoustic wave device includes a piezoelectric substrate; the metal electrode is arranged on one side of the piezoelectric substrate and comprises a first electrode and a second electrode; and the transistor is positioned on one side of the piezoelectric substrate and between the first electrode and the second electrode, and is used for regulating and controlling the propagation characteristic of the surface acoustic wave device. The surface acoustic wave device is simple in structure, convenient to manufacture and wide in application range.

Description

Surface acoustic wave device and its regulating method
Technical Field
The present disclosure relates to the field of microelectromechanical technology, and in particular, to a surface acoustic wave device and a method for controlling the same.
Background
SAW (surface acoustic wave ) technology is widely used in the fields of biosensing, communication, quantum transport, etc., and the principle thereof is to convert an electric excitation signal into mechanical vibration by using a piezoelectric material.
SAW devices are special-purpose devices for filtering, which are manufactured by utilizing the piezoelectric effect of piezoelectric materials such as quartz crystals and piezoelectric ceramics and the physical characteristics of surface wave propagation. SAW devices are required to have a corresponding specific frequency in different application scenarios. At present, the regulation mode of the SAW device has larger limitation.
The above information disclosed in the background section is only for enhancement of understanding of the background of the disclosure and therefore it may include information that does not form the prior art that is already known to a person of ordinary skill in the art.
Disclosure of Invention
The invention aims to provide a surface acoustic wave device and a regulating method thereof, and the surface acoustic wave device has the advantages of simple structure, convenient manufacture and wide application range.
In order to achieve the above purpose, the present disclosure adopts the following technical scheme:
according to a first aspect of the present disclosure, there is provided a surface acoustic wave device comprising:
a piezoelectric substrate;
the metal electrode is arranged on one side of the piezoelectric substrate and comprises a first electrode and a second electrode;
and the transistor is positioned on one side of the piezoelectric substrate and between the first electrode and the second electrode, and is used for regulating and controlling the propagation characteristic of the surface acoustic wave device.
In an exemplary embodiment of the present disclosure, the wave speed difference after and before the surface acoustic wave device is adjusted satisfies the following first relation:
wherein Deltav is the wave speed difference of the surface acoustic wave device after and before adjustment; v oc Phase velocity at which the transistor channel is fully depleted; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Intrinsic conductivity at maximum attenuation of surface acoustic wave device。
In an exemplary embodiment of the present disclosure, the amplitude of the surface acoustic wave device satisfies the following second relational expression:
wherein Γ is the amplitude of the surface acoustic wave device; k is the wave vector before the adjustment of the surface acoustic wave device; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Is the intrinsic conductivity at which the maximum attenuation of the surface acoustic wave device occurs.
In an exemplary embodiment of the present disclosure, the switching ratio of the transistor is 10 3 -10 7 。
In an exemplary embodiment of the present disclosure, the surface acoustic wave device further includes:
the orthographic projection of the source-drain electrode layer on the piezoelectric substrate is positioned between orthographic projections of the first electrode and the second electrode on the piezoelectric substrate, the source-drain electrode layer comprises a source electrode and a drain electrode of the transistor, and the source-drain electrode layer and the metal electrode are arranged on the same layer;
the active layer is arranged on one side of the source-drain electrode layer, which is far away from the piezoelectric substrate, and comprises a channel region of the transistor;
the grid insulation layer is arranged on one side, far away from the piezoelectric substrate, of the active layer, and the surface of the active layer is covered by the grid insulation layer;
and the grid electrode layer is arranged on one side of the grid electrode insulating layer, which is far away from the piezoelectric substrate, and comprises a grid electrode of the transistor.
In an exemplary embodiment of the present disclosure, the surface acoustic wave device further includes:
an active layer disposed on one side of the piezoelectric substrate, the orthographic projection of the active layer on the piezoelectric substrate being located between orthographic projections of both the first electrode and the second electrode on the piezoelectric substrate, the active layer including a channel region of the transistor;
the source-drain electrode layer is arranged on one side of the active layer, far away from the piezoelectric substrate, and comprises a source electrode and a drain electrode of the transistor;
the grid insulation layer is arranged on one side of the source-drain electrode layer, which is far away from the piezoelectric substrate, and covers the surface of the source-drain electrode layer;
and the grid electrode layer is arranged on one side of the grid electrode insulating layer, which is far away from the piezoelectric substrate, and comprises a grid electrode of the transistor.
In one exemplary embodiment of the present disclosure, the material of the active layer includes carbon nanotubes.
In an exemplary embodiment of the present disclosure, the first electrode and the second electrode are each an interdigital electrode, and include a plurality of interdigital fingers, wherein a width of each interdigital finger is 12.5±1 μm, and a distance between two adjacent interdigital fingers is 12.5±1 μm.
According to a second aspect of the present disclosure, there is provided a method for tuning a surface acoustic wave device, the surface acoustic wave device having the structure as described in the first aspect;
the regulating and controlling method of the surface acoustic wave device comprises the following steps:
and applying voltage to the grid electrode of the transistor, and regulating the propagation characteristic of the surface acoustic wave device by regulating the magnitude of the voltage applied to the grid electrode of the transistor.
According to a third aspect of the present disclosure, there is provided a method of manufacturing a surface acoustic wave device, comprising:
providing a piezoelectric substrate;
forming a metal electrode and a transistor on one side of the piezoelectric substrate, wherein the metal electrode comprises a first electrode and a second electrode; the transistor is positioned between the first electrode and the second electrode, and is used for regulating and controlling the propagation characteristic of the surface acoustic wave device.
According to a fourth aspect of the present disclosure, there is provided an electronic apparatus including the surface acoustic wave device as set forth in the first aspect.
The surface acoustic wave device comprises a piezoelectric substrate, and a metal electrode and a transistor which are arranged on one side of the piezoelectric substrate. Wherein, the transistor can regulate and control the propagation characteristic of the sound surface wave on the surface of the piezoelectric substrate. Therefore, the regulation and control of the propagation characteristics of the surface acoustic wave device can be realized, and the requirement that the surface acoustic wave device can be applied in a plurality of scenes is met. The surface acoustic wave device is simple in structure, convenient to manufacture and wide in application range.
Drawings
The above and other features and advantages of the present disclosure will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
Fig. 1 is a schematic structural view of a surface acoustic wave device in an exemplary embodiment of the present disclosure;
FIG. 2 is a schematic cross-sectional view of the A-A plane of FIG. 1;
FIG. 3 is a schematic diagram of a metal electrode structure in an exemplary embodiment of the present disclosure;
fig. 4 is a schematic diagram of a transistor structure in another exemplary embodiment of the present disclosure;
fig. 5 is a transistor characteristic transfer curve in an exemplary embodiment of the present disclosure.
The main element reference numerals in the drawings are explained as follows:
100-a piezoelectric substrate; a 200-transistor; 210-a source drain layer; 220-an active layer; 230-a gate insulation layer; 240-gate layer; 310-a first electrode; 320-a second electrode; 301-interdigital; 302-first interdigital; 303-second finger.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure.
In the drawings, the thickness of regions and layers may be exaggerated for clarity. The same reference numerals in the drawings denote the same or similar structures, and thus detailed descriptions thereof will be omitted.
The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the disclosed aspects may be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the main technical ideas of the present disclosure.
When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.
The terms "a," "an," "the" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. in addition to the listed elements/components/etc. The terms "first" and "second" and the like are used merely as labels, and are not intended to limit the number of their objects.
SAW (surface acoustic wave) is an elastic wave that is generated and propagated on the surface of a piezoelectric substrate material, and whose amplitude decreases rapidly with increasing depth into the substrate material. SAW devices are devices made using the piezoelectric effect of piezoelectric materials such as quartz crystals and piezoelectric ceramics and the physical properties of surface wave propagation. SAW wave devices come in a variety of types and may include SAW filters, resonators, delay lines, correlators, convolvers, phase shifters, memories, and the like.
The basic structure of the SAW device is to make two electroacoustic transducer-interdigital transducers (Interdigital Transducer, IDT) on a polished surface of a substrate material having piezoelectric characteristics, serving as a transmitting transducer and a receiving transducer, respectively. The transmitting transducer converts the electrical signal into a surface acoustic wave, propagates on the surface of the substrate, and after a certain delay, the receiving transducer converts the acoustic signal into an electrical signal for output.
The SAW device needs to have a specific frequency under different application scenarios, for example, when the SAW device is used as an acoustic tweezer in the microfluidic field, the frequency needs to be accurately set according to the size of the control cell. In the related art, SAW control is achieved by changing the electrical and mechanical properties of the piezoelectric material itself or by precisely designing an interdigital transducer (interdigital electrode array), which has a relatively large limitation. Firstly, the requirements of the device manufacturing process are high, an interdigital electrode array and a piezoelectric material substrate are required to be accurately manufactured according to design values, and different designs are required to be performed under different applications, so that redundant workload is increased; secondly, when the manufactured SAW device is integrated on a chip, the frequency of the SAW device is changed due to micro-change of the integral structure, so that the problem is brought to practical application.
As shown in fig. 1, a surface acoustic wave device is provided in an embodiment of the present disclosure, including a piezoelectric substrate 100, a metal electrode, and a transistor 200. The metal electrode is disposed on one side of the piezoelectric substrate 100 and includes a first electrode 310 and a second electrode 320; the transistor 200 is disposed on one side of the piezoelectric substrate 100 and between the first electrode 310 and the second electrode 320, and the transistor 200 is used to regulate the propagation characteristics of the surface acoustic wave device.
The surface acoustic wave device provided by the present disclosure includes a piezoelectric substrate 100, and a metal electrode and a transistor 200 provided on one side of the piezoelectric substrate 100. The transistor 200 can regulate the propagation characteristics of the acoustic surface wave on the surface of the piezoelectric substrate 100. Therefore, the regulation and control of the propagation characteristics of the SAW device can be realized, and the requirements of the SAW device applicable in a plurality of scenes are met. The surface acoustic wave device is simple in structure, convenient to manufacture and wide in application range.
The following describes in detail each component of the surface acoustic wave device provided in the embodiment of the present disclosure with reference to the accompanying drawings:
as shown in fig. 1, the surface acoustic wave device provided by the present disclosure includes a piezoelectric substrate 100, and a metal electrode and a transistor 200 provided on one side of the piezoelectric substrate 100.
The piezoelectric substrate 100 may be made of a piezoelectric material. The piezoelectric material has a piezoelectric effect. The piezoelectric effect can be classified into a positive piezoelectric effect and a negative piezoelectric effect. Some dielectrics, when deformed by external forces in a certain direction, have polarization inside them, while having opposite charges on opposite surfaces. When the external force is removed, it returns to an uncharged state, a phenomenon known as the positive piezoelectric effect. When the direction of the force changes, the polarity of the charge changes. Conversely, when an electric field is applied in the polarization direction of the dielectrics, these dielectrics are deformed, and after the electric field is removed, the deformation of the dielectrics is eliminated, and this phenomenon is called the inverse piezoelectric effect. That is, if pressure is applied to the piezoelectric material, it generates a potential difference (referred to as positive piezoelectric effect), whereas if voltage is applied, mechanical stress (referred to as inverse piezoelectric effect) is generated. If the pressure is a high frequency vibration, a high frequency current is generated, and a high frequency electrical signal is applied to the piezoelectric material, thereby generating a high frequency acoustic signal. The piezoelectric material may be mechanically deformed to generate an electric field or may be mechanically deformed by an electric field.
The present disclosure does not limit the material of the piezoelectric substrate 100, and may be, for example, a single crystal such as lithium niobate, quartz, bismuth germanate, and lithium tantalate; or a Z-axis oriented zinc oxide film deposited on a substrate of a non-piezoelectric material such as glass, or a piezoelectric ceramic, etc. In one embodiment, the piezoelectric substrate 100 may be a YX-128 LiNbO3 substrate.
As shown in fig. 1, 2 and 3, a metal electrode is disposed on one side of the piezoelectric substrate 100, and the metal electrode includes a first electrode 310 and a second electrode 320, and the first electrode 310 can be used as a transmitting transducer, and can convert an electrical signal into a surface acoustic wave. The second electrode 320 can be used as a receiving transducer, and can convert the surface acoustic wave into an electrical signal for output. In one embodiment, the piezoelectric substrate 100 is a substantially rectangular substrate, the first electrode 310 is located at one end of the piezoelectric substrate 100, and the second electrode 320 is located at one side of the first electrode 310 along the first direction X. The first electrode 310 and the second electrode 320 are both interdigital electrodes, e.g., finger-like or comb-like electrodes having a periodic pattern in the face thereof, which can be used to generate a capacitance associated with an electric field that can penetrate the material sample and the sensitive coating. In the present disclosure, each of the first electrode 310 and the second electrode 320 includes a plurality of fingers 301, the plurality of fingers 301 are spaced apart along the first direction, each finger 301 has a width of 12.5±1 μm, and a gap between two adjacent fingers 301 is 12.5±1 μm. Each of the fingers 301 has a length of 1mm±1 μm. Further, the width of the finger 301 is equal to the interval between two adjacent fingers 301. The plurality of fingers 301 may include a plurality of first fingers 302 and a plurality of second fingers 303, the first fingers 302 and the second fingers 303 being arranged to cross. The single first finger 302 and the single second finger 303 form a pair of finger pairs. The number of the interdigital pairs included in the first electrode 310 and the second electrode 320 is not limited in this disclosure, and may be specifically set according to practical application requirements.
In the present disclosure, the material of the metal electrode may include a metal material or a metal alloy material, such as nickel (Ni), gold (Au), or the like. The metal electrode may have a single-layer structure or a multilayer stacked structure. In one embodiment, the metal electrode may be a multi-layered metal layer formed of Ni/Au.
The transistor 200 is located between the first electrode 310 and the second electrode 320. The number of the transistors 200 may be one or more, preferably one, to avoid interference with each other, affecting the propagation characteristics of the saw device. The spacing L2 between the transistor 200 and the first electrode 310 is 1mm±1 μm. In one embodiment, the spacing L2 between the transistor 200 and the first electrode 310 is 1mm. Accordingly, the pitch between the transistor 200 and the second electrode 320 is 1mm±1 μm. The transistor 200 is used to regulate the propagation characteristics of the acoustic surface wave at the surface of the piezoelectric substrate 100. Specifically, the conductivity of its own channel region can be regulated by applying a voltage to the gate of the transistor 200, thereby regulating the propagation characteristics of the surface acoustic wave device.
In the present disclosure, the wave speed difference after and before the surface acoustic wave device is adjusted satisfies the following first relational expression:
wherein Deltav is the wave speed difference of the surface acoustic wave device after and before adjustment; v oc Phase velocity at which the transistor channel is fully depleted; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Is the intrinsic conductivity at which the maximum attenuation of the surface acoustic wave device occurs.
The Δv is the difference between the wave speed of the surface acoustic wave device after and before the adjustment, that is, the difference between the wave speed of the surface acoustic wave device after the adjustment by the transistor 200 and the wave speed of the surface acoustic wave device before the adjustment by the transistor 200. The wave velocity of the surface acoustic wave device before being adjusted by the transistor 200 is understood as the wave velocity of the surface acoustic wave device that does not include the transistor 200. In one embodiment, the saw device frequency without adding the transistor 200 is 80MHz, and according to the relationship between the wave speed, the wavelength and the frequency, for a wave of a specific wavelength, the corresponding wave speed can be obtained according to the frequency.
σ d The conductivity of the channel region for transistor 200 may be adjusted by applying a voltage to the gate of transistor 200. The adjustment range of the conductivity of the channel region of the transistor 200 can be referred to as the switching ratio of the transistor 200, which reflects the current regulation capability of the transistor 200, and is the ratio of the on-state current to the off-state current of the transistor 200. The larger the switching ratio range, the larger the adjustable range of the conductivity of the channel region of the transistor 200.
In the field effect transistor 200, the ratio of the source-drain current measured when the gate voltage (gate voltage) is applied to the gate without the gate voltage is referred to as the "on-off ratio" and can be used to measure the ability of the gate voltage to control the conduction of the channel region of the transistor 200. That is, by changing the magnitude of the gate applied voltage, the conductivity of the channel region of the transistor 200 is changed, and thus the magnitude is changed, the wave speed of the surface acoustic wave device is adjusted.
In one embodiment, the characteristic transfer curve of the transistor 200 is shown in fig. 5, in which the abscissa represents the gate voltage and the ordinate represents the source leakage current. The on-off ratio of the transistor 200 is about 10 4 . Of course, the switching ratio of transistor 200 is alsoOther values are possible, such as 10 3 -10 7 。
v oc The value corresponding to the saw device is approximately a constant value when the structure of the transistor 200 is fixed, for the phase velocity at which the channel of the transistor 200 is fully depleted. K (K) eff The coupling factor, which is related to the material of the piezoelectric substrate 100, is 5.6% for YX-128 LiNbO 3. Sigma (sigma) m The intrinsic conductivity at which the maximum attenuation of a surface acoustic wave device occurs is constant for a particular device.
In the present disclosure, the magnitude of Δv is changed by changing the magnitude of the gate applied voltage, thereby changing the conductivity of the channel region of the transistor 200, and accordingly, the wave speed of the surface acoustic wave device is adjusted. According to the relation among the wavelength, the wave speed and the frequency, the adjustable frequency range of the surface acoustic wave device can be obtained. The adjusting mode is simple. The adjustment range is wide, one device can realize the application of various scenes, and after the device is integrated, even if the structure is changed, the transistor 200 can regulate and control to realize the required propagation characteristics.
In the present disclosure, the amplitude of the surface acoustic wave device satisfies the following second relational expression:
wherein Γ is the amplitude of the surface acoustic wave device; k is the wave vector before the adjustment of the surface acoustic wave device; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Is the intrinsic conductivity at which the maximum attenuation of the surface acoustic wave device occurs.
In this formula, similarly to the first relational expression, σ d The conductivity of the channel region for transistor 200 may be adjusted by applying a voltage to the gate of transistor 200. The adjustment range of the conductivity of the channel region of the transistor 200 can be referred to as the switching ratio of the transistor 200, which reflects the current regulation capability of the transistor 200, and is the ratio of the on-state current to the off-state current of the transistor 200. The larger the switching ratio range, the larger the adjustable range of the conductivity of the channel region of the transistor 200.
In the field effect transistor 200, the ratio of the source-drain current measured when the gate voltage (gate voltage) is applied to the gate without the gate voltage is referred to as the "on-off ratio" and can be used to measure the ability of the gate voltage to control the conduction of the channel region of the transistor 200. That is, by changing the magnitude of the gate applied voltage, the conductivity of the channel region of the transistor 200 is changed, and thus the amplitude of the surface acoustic wave device is changed, changing the attenuation characteristic of the surface acoustic wave device.
In this disclosure, the structure of the transistor 200 may be various, such as a top gate top contact structure or a top gate bottom contact structure.
As shown in fig. 2, in an embodiment of the present disclosure, the saw device further includes a source/drain layer 210, an active layer 220, a gate insulating layer 230, and a gate layer 240. The source-drain electrode layer 210 is disposed on one side of the piezoelectric substrate 100, the orthographic projection of the source-drain electrode layer 210 on the piezoelectric substrate 100 is located between the orthographic projections of both the first electrode 310 and the second electrode 320 on the piezoelectric substrate 100, the source-drain electrode layer 210 includes a source electrode and a drain electrode of the transistor 200, and the source-drain electrode layer 210 is disposed on the same layer as the metal electrode. The arrangement of the same layer means that the same material and the same process are adopted for manufacturing. The materials of the source and drain electrode layer 210 and the metal electrode may include nickel (Ni) and gold (Au). The source/drain electrode layer 210 may be a single-layer or multi-layer laminated structure, and in one embodiment, the source/drain electrode layer 210 is a laminated structure of Ni/Au, and has a thickness of 5/50nm.
The active layer 220 is disposed on a side of the source-drain layer 210 remote from the piezoelectric substrate 100, and the active layer 220 includes a channel region of the transistor 200. In an embodiment, the material of the active layer 220 includes Carbon Nanotubes (CNT), and in addition, the material of the active layer 220 may be other materials, such as polysilicon, etc., which is not limited in this disclosure.
The gate insulating layer 230 is disposed on a side of the active layer 220 away from the piezoelectric substrate 100, and the gate insulating layer 230 covers a surface of the active layer 220. The material of the gate insulating layer 230 may include an insulating material such as silicon oxide, silicon nitride, or the like. The gate layer 240 is disposed on a side of the gate insulating layer 230 remote from the piezoelectric substrate 100, and the gate layer 240 includes the gate of the transistor 200. The material of the gate layer 240 may include various metal materials or metal alloy materials, for example, the material of the gate layer 240 may include titanium (Ti), aluminum (Al), etc. The gate layer 240 may have a single-layer structure or a multilayer stacked structure. For example, the gate layer 240 may be a multi-layered stack formed of Ti/Al/Ti, and may have a thickness of 5/50/20nm.
As shown in fig. 4, in another embodiment of the present disclosure, the surface acoustic wave device further includes an active layer 220, a source drain layer 210, a gate insulating layer 230, and a gate layer 240. The active layer 220 is disposed on one side of the piezoelectric substrate 100, and the orthographic projection of the active layer 220 on the piezoelectric substrate 100 is located between the orthographic projections of both the first electrode 310 and the second electrode 320 on the piezoelectric substrate 100, the active layer 220 including the channel region of the transistor 200. The source-drain electrode layer 210 is disposed on a side of the active layer 220 away from the piezoelectric substrate 100, and the source-drain electrode layer 210 includes a source electrode and a drain electrode of the transistor 200. The gate insulating layer 230 is disposed on a side of the source/drain layer 210 away from the piezoelectric substrate 100, and the gate insulating layer 230 covers the surface of the source/drain layer 210. The gate layer 240 is disposed on a side of the gate insulating layer 230 remote from the piezoelectric substrate 100, and the gate layer 240 includes the gate of the transistor 200. The materials contained in each film layer can refer to the above embodiments, and are not described in detail herein.
The present disclosure also provides a method for tuning a surface acoustic wave device, the structure of the surface acoustic wave device being as in any one of the above embodiments, the method comprising applying a voltage to a gate of the transistor 200, tuning a propagation characteristic of the surface acoustic wave device by tuning the magnitude of the voltage applied to the gate of the transistor 200.
Specifically, the wave speed difference after and before the adjustment of the surface acoustic wave device satisfies the following first relational expression:
wherein Deltav is the wave speed difference of the surface acoustic wave device after and before adjustment; v oc Phase velocity at which the transistor channel is fully depleted; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Is the intrinsic conductivity at which the maximum attenuation of the surface acoustic wave device occurs.
The amplitude of the surface acoustic wave device satisfies the following second relational expression:
wherein Γ is the amplitude of the surface acoustic wave device; k is the wave vector before the adjustment of the surface acoustic wave device; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Is the intrinsic conductivity at which the maximum attenuation of the surface acoustic wave device occurs.
From the above, the conductivity of the channel region of the transistor 200 is changed by adjusting the voltage applied to the gate, and thus the wave speed and amplitude of the surface acoustic wave device are changed, and the propagation characteristics of the surface acoustic wave device are changed.
As shown in fig. 1, 2 and 4, the present disclosure further provides a method for manufacturing a surface acoustic wave device, including:
as shown in fig. 2, step S100, a piezoelectric substrate 100 is provided;
step S200, forming a metal electrode and a transistor 200 on one side of the piezoelectric substrate 100, wherein the metal electrode includes a first electrode 310 and a second electrode 320; the transistor 200 is located between the first electrode 310 and the second electrode 320, and the transistor 200 is used to regulate the propagation characteristics of the saw device.
In some embodiments, step S200 includes:
in step S210, a metal electrode and a source/drain layer 210 are formed on one side of the piezoelectric substrate 100. The metal electrode and the source/drain electrode layer 210 may have a single-layer or multi-layer laminated structure, for example, the metal electrode and the source/drain electrode layer 210 have a laminated structure of Ni/Au, and have a thickness of 5/50nm. Specifically, a whole layer of photoresist is first spin-coated on the piezoelectric substrate 100, then patterned by exposure and development, and then the growth of the Ni/Au stack is completed, and the excess metal and photoresist are removed using an organic solvent.
In step S220, an active layer 220 is formed on the side of the source/drain layer 210 away from the piezoelectric substrate 100. The material of the active layer 220 may include Carbon Nanotubes (CNTs). Specifically, the structure obtained in step S210 is placed in the dispersed carbon tube solution, left for 2 hours, washed with toluene and deionized water, and then baked, and the channel region of the transistor 200 is formed by photolithography and etching.
In step S230, a gate insulating layer 230 is formed on a side of the active layer 220 away from the piezoelectric substrate 100. The material of the gate insulating layer 230 may be silicon nitride, silicon oxide, silicon oxynitride, or the like. Specifically, a layer of SiO is formed as the gate insulating layer 230 on the side of the channel region of the transistor 200 away from the piezoelectric substrate 100, and the thickness may be 100nm.
In step S240, a gate layer 240 is formed on a side of the gate insulating layer 230 away from the piezoelectric substrate 100. The gate layer 240 may be a single-layer or multi-layer stacked structure. For example, the gate layer 240 may be a Ti/Al/Ti stacked structure. Specifically, a Ti/Al/Ti laminated structure, i.e., a gate layer 240, is formed on the side of the gate insulating layer 230 remote from the piezoelectric substrate 100.
As shown in fig. 4, in other embodiments, step S200 includes:
in step S210, an active layer 220 is formed on one side of the piezoelectric substrate 100. The material of the active layer 220 may include Carbon Nanotubes (CNTs). Specifically, the piezoelectric substrate 100 is placed in the dispersed carbon tube solution, left for 2 hours, washed with toluene and deionized water, and then baked, and a channel region of the transistor 200 is formed by photolithography and etching.
In step S220, the source/drain layer 210 is formed on the side of the active layer 220 away from the piezoelectric substrate 100, and the metal electrode is formed on the side of the piezoelectric substrate 100. The metal electrode and the source/drain electrode layer 210 may have a single-layer or multi-layer laminated structure, for example, the metal electrode and the source/drain electrode layer 210 have a laminated structure of Ni/Au, and have a thickness of 5/50nm. Specifically, a metal material layer, which is a structure formed by stacking Ni/Au, may be formed on one side of the piezoelectric substrate 100 and the active layer 220, and then patterned to form a metal electrode and a source/drain electrode of the transistor 200.
In step S230, a gate insulating layer 230 is formed on the side of the source/drain layer 210 away from the piezoelectric substrate 100. The material of the gate insulating layer 230 may be silicon nitride, silicon oxide, silicon oxynitride, or the like. Specifically, a layer of SiO is formed as the gate insulating layer 230 on the side of the source/drain layer 210 away from the piezoelectric substrate 100, and the thickness may be 100nm.
In step S240, a gate layer 240 is formed on a side of the gate insulating layer 230 away from the piezoelectric substrate 100. The gate layer 240 may be a single-layer or multi-layer stacked structure. For example, the gate layer 240 may be a Ti/Al/Ti stacked structure. Specifically, a Ti/Al/Ti laminated structure, i.e., a gate layer 240, is formed on the side of the gate insulating layer 230 remote from the piezoelectric substrate 100.
The disclosure also provides an electronic device including the surface acoustic wave device in any one of the above embodiments. The electronic equipment can be a mobile phone, a computer, various sensors and the like.
It should be noted that although the steps of the methods of the present disclosure are described herein in a particular order, this does not require or imply that the steps must be performed in that particular order or that all of the illustrated steps be performed in order to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step to perform, and/or one step decomposed into multiple steps to perform, etc., all are considered part of the present disclosure.
It is to be understood that the disclosure is not limited in its application to the details of construction and the arrangement of components set forth in the disclosure. The disclosure is capable of other embodiments and of being practiced and carried out in various ways. The foregoing variations and modifications are within the scope of the present disclosure. It should be understood that the present disclosure disclosed and defined herein extends to all alternative combinations of two or more of the individual features mentioned or evident from the text and/or drawings. All of these different combinations constitute various alternative aspects of the present disclosure. Embodiments of the present disclosure describe the best mode known for carrying out the disclosure and will enable one skilled in the art to utilize the disclosure.

Claims (11)

1. A surface acoustic wave device, comprising:
a piezoelectric substrate;
the metal electrode is arranged on one side of the piezoelectric substrate and comprises a first electrode and a second electrode;
and the transistor is positioned on one side of the piezoelectric substrate and between the first electrode and the second electrode, and is used for regulating and controlling the propagation characteristic of the surface acoustic wave device.
2. The surface acoustic wave device according to claim 1, wherein a wave speed difference after and before the surface acoustic wave device is adjusted satisfies the following first relational expression:
wherein Deltav is the wave speed difference of the surface acoustic wave device after and before adjustment; v oc Phase velocity at which the transistor channel is fully depleted; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Is the intrinsic conductivity at which the maximum attenuation of the surface acoustic wave device occurs.
3. The surface acoustic wave device according to claim 1, wherein the amplitude of the surface acoustic wave device satisfies the following second relational expression:
wherein Γ is the amplitude of the surface acoustic wave device; k is the wave vector before the adjustment of the surface acoustic wave device; k (K) eff Is a coupling factor; sigma (sigma) d Is the conductivity of the channel region of the transistor; sigma (sigma) m Is the intrinsic conductivity at which the maximum attenuation of the surface acoustic wave device occurs.
4. The surface acoustic wave device according to claim 1, wherein a switching ratio of the transistor is 10 3 -10 7 。
5. The surface acoustic wave device according to claim 1, characterized in that the surface acoustic wave device further comprises:
the orthographic projection of the source-drain electrode layer on the piezoelectric substrate is positioned between orthographic projections of the first electrode and the second electrode on the piezoelectric substrate, the source-drain electrode layer comprises a source electrode and a drain electrode of the transistor, and the source-drain electrode layer and the metal electrode are arranged on the same layer;
the active layer is arranged on one side of the source-drain electrode layer, which is far away from the piezoelectric substrate, and comprises a channel region of the transistor;
the grid insulation layer is arranged on one side, far away from the piezoelectric substrate, of the active layer, and the surface of the active layer is covered by the grid insulation layer;
and the grid electrode layer is arranged on one side of the grid electrode insulating layer, which is far away from the piezoelectric substrate, and comprises a grid electrode of the transistor.
6. The surface acoustic wave device according to claim 1, characterized in that the surface acoustic wave device further comprises:
an active layer disposed on one side of the piezoelectric substrate, the orthographic projection of the active layer on the piezoelectric substrate being located between orthographic projections of both the first electrode and the second electrode on the piezoelectric substrate, the active layer including a channel region of the transistor;
the source-drain electrode layer is arranged on one side of the active layer, far away from the piezoelectric substrate, and comprises a source electrode and a drain electrode of the transistor;
the grid insulation layer is arranged on one side of the source-drain electrode layer, which is far away from the piezoelectric substrate, and covers the surface of the source-drain electrode layer;
and the grid electrode layer is arranged on one side of the grid electrode insulating layer, which is far away from the piezoelectric substrate, and comprises a grid electrode of the transistor.
7. The surface acoustic wave device according to claim 5 or 6, wherein the material of the active layer comprises carbon nanotubes.
8. The surface acoustic wave device according to claim 1, wherein the first electrode and the second electrode are each an interdigital electrode including a plurality of interdigital fingers, the interdigital fingers having a width of 12.5±1 μm, and a spacing between adjacent two of the interdigital fingers being 12.5±1 μm.
9. A method of tuning a surface acoustic wave device, characterized in that the surface acoustic wave device has a structure as claimed in any one of claims 1 to 8;
the regulating and controlling method of the surface acoustic wave device comprises the following steps:
and applying voltage to the grid electrode of the transistor, and regulating the propagation characteristic of the surface acoustic wave device by regulating the magnitude of the voltage applied to the grid electrode of the transistor.
10. A method of manufacturing a surface acoustic wave device, comprising:
providing a piezoelectric substrate;
forming a metal electrode and a transistor on one side of the piezoelectric substrate, wherein the metal electrode comprises a first electrode and a second electrode; the transistor is positioned between the first electrode and the second electrode, and is used for regulating and controlling the propagation characteristic of the surface acoustic wave device.
11. An electronic device comprising the surface acoustic wave device according to any one of claims 1 to 8.
CN202210871673.9A 2022-07-22 2022-07-22 Surface acoustic wave device and its regulating method Pending CN117498822A (en)

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