CN117494587A - Spatial relationship management method of chip packaging structure, electronic equipment and storage medium - Google Patents

Spatial relationship management method of chip packaging structure, electronic equipment and storage medium Download PDF

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CN117494587A
CN117494587A CN202311857867.4A CN202311857867A CN117494587A CN 117494587 A CN117494587 A CN 117494587A CN 202311857867 A CN202311857867 A CN 202311857867A CN 117494587 A CN117494587 A CN 117494587A
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Abstract

The application belongs to the technical field of chips, and discloses a spatial relationship management method of a chip packaging structure, which comprises the following steps: and acquiring all the items corresponding to the chip packaging structure, and inserting the items into the nodes based on the tree structure according to the space structure information corresponding to the items, wherein the items are used for representing the space structure information of the packaged material blocks which are cut according to the preset rule based on the chip packaging structure. And obtaining the insertion results of all the items, and determining the spatial relationship of the material blocks in the chip packaging structure according to the target tree structure generated by the insertion results. Therefore, according to the method and the device, all the items corresponding to the spatial position relation of the chip packaging structure can be obtained according to the characteristics of the chip packaging structure, so that the spatial relation of the chip packaging structure with low overlapping rate can be reasonably generated for subsequent application or external inquiry can be carried out after the chip packaging is completed based on the spatial relation according to the processing of the insertion nodes of the tree structure algorithm.

Description

Spatial relationship management method of chip packaging structure, electronic equipment and storage medium
Technical Field
The present disclosure relates to the field of chip technologies, and in particular, to a method for managing spatial relationships of a chip package structure, an electronic device, and a computer readable storage medium.
Background
The efficient tree structure algorithm mainly represents a B tree algorithm (one-dimensional information), an R tree algorithm (high-dimensional information), an R tree algorithm and the like, and the data with hierarchical relationship can be organized at reasonable positions in the tree structure by utilizing a core algorithm of the tree structure, and the positions can be rapidly positioned when being searched outside.
Many complex microstructures are required to be combined in a chip package structure, so it should be considered by those skilled in the art how to reasonably generate spatial relationships of microstructures in a chip package structure for use using a tree structure algorithm.
Disclosure of Invention
In view of the above technical problems, the present application provides a spatial relationship management method, an electronic device, and a computer readable storage medium for a chip package structure, so as to quickly and reasonably generate a spatial relationship of a microstructure in the chip package structure for application.
In order to solve the above technical problem, a first aspect of the present application provides a spatial relationship management method of a chip package structure, including: and acquiring all the items corresponding to the chip packaging structure, and inserting the items into the nodes based on the tree structure according to the space structure information corresponding to the items, wherein the items are used for representing the space structure information of the packaged material blocks which are cut according to the preset rule based on the chip packaging structure. And obtaining the insertion results of all the items, and determining the spatial relationship of the material blocks in the chip packaging structure according to the target tree structure generated by the insertion results.
Optionally, the step of obtaining all the entries corresponding to the chip package structure and inserting the entries into the nodes based on the tree structure according to the spatial structure information corresponding to the entries includes: and ordering all the items corresponding to the chip packaging structure according to a preset ordering rule, and sequentially inserting the items into the nodes based on the tree structure according to the ordering result.
Optionally, the spatial structure information includes spatial position and geometric information corresponding to the packaged material block. Ordering according to a preset ordering rule, including: the entries or nodes are ordered by spatial location. Or, the items or nodes are ordered by spatial position, and for at least two items or nodes that have a conflict in the ordering by spatial position, the at least two items or nodes are ordered by geometric information.
Optionally, the spatial location comprises a first directional coordinate. Ordering all the items corresponding to the chip packaging structure according to a preset ordering rule, and sequentially inserting the items into the nodes based on the tree structure according to the ordering result, wherein the step comprises the following steps: determining a first direction coordinate corresponding to each item, and sorting all items corresponding to the chip packaging structure according to a first direction coordinate sorting rule to obtain a first sorting result. Or determining first direction coordinates and geometric information corresponding to each item, sorting all items corresponding to the chip packaging structure according to a first direction coordinate sorting rule, sorting at least two items which have conflict when being sorted according to the first direction coordinate sorting rule, and sorting the at least two items according to the geometric information to obtain a first sorting result. Wherein the first direction coordinates comprise a first direction maximum coordinate and/or a first direction minimum coordinate and the geometric information comprises a volume parameter.
Optionally, the step of sorting all the entries corresponding to the chip package structure according to the first direction coordinate sorting rule, and sorting at least two entries having a conflict when sorting according to the first direction coordinate sorting rule according to the geometric information to obtain a first sorting result includes: and sequencing all the items preferentially according to the maximum coordinates in the first direction, sequencing at least two items with sequencing conflict on the maximum coordinates in the first direction according to the minimum coordinates in the first direction of the at least two items and/or sequencing according to a geometric information sequencing rule so as to obtain a first sequencing result. Or, all the items are preferably sorted according to the minimum coordinates in the first direction, at least two items with sorting conflict on the minimum coordinates in the first direction are sorted according to the maximum coordinates in the first direction of at least two items and/or sorted according to the geometric information sorting rule, and a first sorting result is obtained.
Optionally, the step of obtaining all the entries corresponding to the chip package structure and inserting the entries into the nodes based on the tree structure according to the spatial structure information corresponding to the entries includes: and after detecting that the entry to be inserted is inserted, determining the node of the tree structure with the overflow as an overflow node when the node of the tree structure with the overflow appears in the insertion overflow. And performing reinsertion operation or node splitting operation according to the overflow insertion rule and the object under the overflow node. Wherein the object comprises an entry or node.
Optionally, the reinsertion operation is performed according to the overflow insertion rule and the object under the overflow node, including: when the first overflow occurs at the depth of the tree structure where the overflow node is located, determining the reject object under the overflow node. Sorting the removed objects according to a preset sorting rule, and reinserting the removed objects into the nodes of the tree structure according to the space structure information corresponding to the removed objects in sequence. Wherein the reject object comprises a reject entry or a reject node.
Optionally, determining the culling object under the overflow node includes: and ordering all objects under the overflow node according to a preset ordering rule to obtain a second ordering result. And taking the object with the rejection attribute meeting the rejection condition as the rejection object based on the second sorting result. The rejecting attribute comprises an object type, a node space utilization rate after rejecting the object and/or a node rejecting number.
Optionally, the case that the rejection attribute meets the rejection condition includes: the object type is an orphan entry or orphan node. And/or the node space utilization rate after eliminating the eliminating object is increased or unchanged compared with the node space utilization rate before eliminating. And/or the node eliminating quantity after eliminating the eliminating objects does not reach the preset quantity.
Optionally, the step of performing node splitting operation according to the overflow insertion rule and the object under the overflow node includes: when non-first overflow occurs in the depth of the tree structure where the overflow node is located, all objects under the overflow node are ordered according to a preset ordering rule, and the overflow node is split into at least two new nodes according to an ordering result.
Optionally, when non-first overflow occurs in the depth of the tree structure where the overflow node is located, sorting all objects under the overflow node according to a preset sorting rule, and splitting the overflow node into at least two new nodes according to a sorting result, including: and ordering all objects under the overflow node according to a preset ordering rule to obtain a third ordering result. And acquiring at least one split combination based on a third sequencing result, wherein each split combination comprises at least two quasi-split nodes, and the spatial positions of objects under each quasi-split node are adjacent in sequence. The node volume margins of all split combinations are obtained. And taking the splitting combination with the smallest node volume allowance as a target splitting combination to split so as to obtain at least two new nodes.
Optionally, when non-first overflow occurs in the depth of the tree structure where the overflow node is located, sorting all objects under the overflow node according to a preset sorting rule, and splitting the overflow node into at least two new nodes according to the sorting result, including: when the depth of the tree structure of the upper node of the overflow node overflows for the first time, taking the upper node as a new overflow node, and performing reinsertion operation or node splitting operation according to an overflow insertion rule and an object under the overflow node.
A second aspect of the present application provides an electronic device, comprising: the spatial relationship management system comprises a memory and a processor, wherein the memory stores a computer program, and the computer program realizes the spatial relationship management method when being executed by the processor.
A third aspect of the present application provides a readable storage medium having stored thereon a computer program which, when executed by a processor, implements a spatial relationship management method as in any of the above.
The application provides a spatial relationship management method of a chip packaging structure, electronic equipment and a computer readable storage medium. The spatial relationship management method of the chip packaging structure comprises the following steps: and acquiring all the items corresponding to the chip packaging structure, and inserting the items into the nodes based on the tree structure according to the space structure information corresponding to the items, wherein the items are used for representing the space structure information of the packaged material blocks which are cut according to the preset rule based on the chip packaging structure. And obtaining the insertion results of all the items, and determining the spatial relationship of the material blocks in the chip packaging structure according to the target tree structure generated by the insertion results. Therefore, according to the characteristics of the chip packaging structure, all the entries corresponding to the spatial position relation of the chip packaging structure can be obtained, so that the spatial relation of the chip packaging structure with low overlapping rate can be reasonably generated for subsequent application or external inquiry can be carried out after the chip packaging is completed based on the spatial relation according to the processing of the insertion node of the tree structure algorithm (such as R tree).
Optionally, according to the method and the device, reasonable item ordering can be quickly obtained according to the first direction coordinate ordering priority rule according to the characteristics of the chip packaging structure, so that items are sequentially inserted into the tree structure according to the item ordering, and the spatial relationship of the chip packaging structure with low overlapping rate is quickly and reasonably generated for subsequent application or external query is performed after chip packaging is completed based on the spatial relationship according to the insertion node processing, reinsertion processing and splitting processing of a tree structure algorithm (such as R-tree).
Optionally, the method and the device can perform reading processing based on the packaging model of the preselected design so as to quickly acquire individual material blocks containing geometric information and material information, and further improve the efficiency of the whole spatial relationship generation process.
Optionally, when the insertion overflow is detected, and the reinsertion operation is performed, all the items under the overflow node can be ordered according to the first direction coordinate ordering priority rule based on the characteristics of the chip packaging structure, so that the removal judgment is performed according to the ordered result and the items, and therefore, the appropriate removal items can be quickly found, the reinsertion operation can be efficiently performed, and the efficiency of the whole spatial relationship generation process can be further improved.
Optionally, in the reinsertion operation, the method and the device select the rejected items through at least one reject condition, so that the reinsertion operation can be realized by selecting a reasonable number of rejected items, and the rationality and the overlapping degree of the whole spatial relationship generation process can be improved, so that the chip packaging structure obtained based on the generated spatial relationship can quickly complete the external query operation in the follow-up process.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a first flow chart of a spatial relationship management method of a chip package structure according to a first embodiment of the present application.
Fig. 2 is a schematic diagram of an entry hierarchy corresponding to a chip package structure in the first embodiment of the present application.
Fig. 3 is a first directional coordinate prioritization schematic of an entry hierarchy in a first embodiment of the present application.
Fig. 4 is a schematic diagram of a tree structure in a first embodiment of the present application.
Fig. 5 is a schematic diagram of a selection process of a non-leaf node shown in the first embodiment of the present application.
Fig. 6 is a schematic diagram of a leaf node selection process shown in the first embodiment of the present application.
Fig. 7 is a schematic diagram of an insertion path selection process shown in the first embodiment of the present application.
Fig. 8 is a schematic diagram showing a procedure of the reinsertion operation according to the first embodiment of the present application.
Fig. 9 is a schematic diagram of an entry hierarchy under a node shown in the first embodiment of the present application.
Fig. 10 is a first schematic diagram illustrating under-node entry culling according to a first embodiment of the present application.
Fig. 11 is a second schematic diagram illustrating under-node entry culling according to the first embodiment of the present application.
Fig. 12 is a schematic diagram of a node splitting operation of a leaf node according to the first embodiment of the present application.
Fig. 13 is a schematic diagram of a node splitting operation of a non-leaf node shown in the first embodiment of the present application.
Fig. 14 is a schematic diagram of a node splitting operation of a parent node shown in the first embodiment of the present application.
Fig. 15 is a second flow chart of a spatial relationship management method of a chip package structure according to the first embodiment of the present application.
Fig. 16 is a schematic structural diagram of an electronic device according to a second embodiment of the present application.
The realization, functional characteristics and advantages of the present application will be further described with reference to the embodiments, referring to the attached drawings. Specific embodiments thereof have been shown by way of example in the drawings and will herein be described in more detail. These drawings and the written description are not intended to limit the scope of the inventive concepts in any way, but to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the element defined by the phrase "comprising one … …" does not exclude the presence of additional identical elements in a process, method, article, or apparatus that comprises the element, and alternatively, elements having the same name in different embodiments of the present application may have the same meaning or may have different meanings, a particular meaning of which is to be determined by its interpretation in this particular embodiment or further in connection with the context of this particular embodiment.
It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, these information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope herein. The word "if" as used herein may be interpreted as "at … …" or "at … …" or "responsive to a determination", depending on the context. Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "including" specify the presence of stated features, steps, operations, elements, components, items, categories, and/or groups, but do not preclude the presence, presence or addition of one or more other features, steps, operations, elements, components, items, categories, and/or groups. The terms "or" and/or "as used herein are to be construed as inclusive, or meaning any one or any combination. Thus, "A, B or C" or "A, B and/or C" means "any of the following: a, A is as follows; b, a step of preparing a composite material; c, performing operation; a and B; a and C; b and C; A. b and C). An exception to this definition will occur only when a combination of elements, functions, steps or operations are in some way inherently mutually exclusive.
It should be understood that, although the steps in the flowcharts in the embodiments of the present application are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited in order and may be performed in other orders, unless explicitly stated herein. Moreover, at least some of the steps in the figures may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, the order of their execution not necessarily occurring in sequence, but may be performed alternately or alternately with other steps or at least a portion of the other steps or stages.
It should be noted that, in this document, step numbers such as S11 and S12 are adopted, and the purpose of the present invention is to more clearly and briefly describe the corresponding content, and not to constitute a substantial limitation on the sequence, and those skilled in the art may execute S12 first and then execute S11 when implementing the present invention, which is within the scope of protection of the present application.
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In the following description, suffixes such as "module", "component", or "unit" for representing elements are used only for facilitating the description of the present application, and are not of specific significance per se. Thus, "module," "component," or "unit" may be used in combination.
First embodiment
For a clear description of the spatial relationship management method of the chip package structure provided in the first embodiment of the present application, reference may be made to fig. 1 to 15.
Referring to fig. 1, a first embodiment of the present application provides a method for managing a spatial relationship of a chip package structure, including:
s11: and acquiring all the items corresponding to the chip packaging structure, and inserting the items into the nodes based on the tree structure according to the space structure information corresponding to the items.
The entries and nodes of the tree structure can be used for representing the space structure of the packaged material blocks cut according to a preset rule based on the chip packaging structure. A tree structure is a data structure, consisting of a set of n nodes in a hierarchical relationship.
In one embodiment, in step S11: obtaining all the items corresponding to the chip packaging structure, and inserting the items into the nodes based on the tree structure according to the space structure information corresponding to the items, including but not limited to: and packaging each material block corresponding to the chip packaging structure into an item with a preset shape, and inserting the item into a node of a corresponding tree structure according to the space structure information represented by the item. Wherein, the item of packing the material block into the preset shape refers to the material block which is represented by a graph of the smallest preset shape which can wrap the material block. The nodes of the tree structure represent space structures determined based on the space positions of the items in the preset range, namely the space structures represented by the nodes of the tree structure are space ranges formed by wrapping all the items under the nodes, and all the items under the nodes are wrapped through the space ranges of the minimum preset shape; or, the spatial structure represented by the node of the tree structure is a spatial range formed by wrapping the lower node of the node, and the lower node wrapping the node refers to wrapping all the nodes below the node through the minimum preset spatial range.
In an embodiment, the nodes of the tree structure may include at least one non-leaf node, a leaf node, wherein the spatial structure represented by the non-leaf node is formed by wrapping a non-leaf node of a next level of the non-leaf node, and the spatial structure represented by the leaf node is formed by wrapping a leaf node of a next level of the non-leaf node.
In one embodiment, the predetermined shape may be, but is not limited to, a cuboid or other polygonal body. The material blocks are packaged into preset shapes, and the material blocks with any shapes can be supported. The packaged material block is used for representing the shape and the volume in the space structure information of the material block, wherein the material block can be represented by a preset shape, the volume of the preset shape capable of containing the complete material block is represented by the volume of the material block, the packaged material block forms an item, for example, the packaging process of the material block is to find the smallest cuboid capable of completely containing the volume of the material block, and the cuboid is the item shape after the material block is packaged. The wrapping of the entries or nodes is the same as the wrapping of the material blocks.
In an embodiment, the spatial location corresponding to the material blocks is determined based on the packaged shape and volume, and the spatial structure information includes the spatial location corresponding to each material block in the chip package structure. The items packed on the basis of the material pieces can correspond to the spatial positions of the material pieces, i.e. the items can represent the spatial positions of the material pieces, see for example the item hierarchy in fig. 2.
In one embodiment, prior to the step of packaging each piece of material corresponding to the chip package structure as a pre-shaped item, including, but not limited to: and reading the chip packaging model, and dividing the chip packaging model to obtain at least one material block and space structure information. The method and the device can read based on the chip packaging structure information of the preselected design so as to quickly acquire individual material blocks containing geometric information and material information, and further improve the efficiency of the whole spatial relationship generation process. Wherein the spatial structure information of the entry includes geometric information and spatial locations, and the spatial structure information of the node also includes geometric information and spatial locations.
In an embodiment, the step of reading the chip package model to obtain at least one material block may include reading a structure file of the chip package structure; at least one material block is acquired based on the structure file. The structure file records at least one material block forming the chip packaging model, and each material block corresponds to space structure information and material information, wherein the space structure information comprises the shape (such as cuboid) of the material block and the space position, volume parameter, sectional area and the like corresponding to the material block in the chip packaging structure, and the material information comprises material properties, material parameters required by subsequent simulation, such as thermal conductivity required by thermal simulation, electrical conductivity required by electrical simulation and the like.
In one embodiment, the spatial position of the chip package structure is represented by its coordinates in a coordinate system that includes three coordinate directions, an X-axis direction, a Y-axis direction, and a Z-axis direction. Referring to fig. 2, one of the structural features of the chip package structure is that each material block is layered at a first direction coordinate as seen in a cross-sectional view of the chip package structure, and the layering includes a through layering of the first direction coordinate, and a partial layering of the first direction coordinate. Alternatively, the first direction may be an X-axis direction, a Y-axis direction, or a Z-axis direction. The Z-axis direction is generally used to indicate the height of the chip package structure, that is, to indicate the height position of each material block in the chip package structure, and due to the structural characteristics of the chip package, it is preferable that the first direction is the Z-axis direction, that is, the height direction of the chip package structure.
In other embodiments, before the step of packaging each material block corresponding to the chip packaging structure into an entry of a preset shape, the obtained at least one material block and spatial structure information may also be obtained after the input operation is performed manually.
In one embodiment, S11: obtaining all the items corresponding to the chip packaging structure, and inserting the items into the nodes based on the tree structure according to the space structure information corresponding to the items, including but not limited to: and ordering all the items corresponding to the chip packaging structure according to a preset ordering rule, and sequentially inserting the items into the nodes based on the tree structure according to the ordering result. Therefore, in this embodiment, all the entries corresponding to the chip package structure may be directly inserted into the node based on the tree structure according to the spatial structure information corresponding to each entry, or may be further ordered according to a preset ordering rule, so as to obtain a reasonable insertion ordering result capable of reducing the overlapping rate of the tree structure, and then each entry is inserted into the node based on the tree structure based on the ordering result.
In an embodiment, sequentially inserting entries into nodes based on a tree structure according to the ordering result may include, but is not limited to: sequentially inserting the items into the nodes based on the tree structure by taking the single items as a unit based on the sorting result; alternatively, the nodes are inserted into the nodes based on the tree structure in turn by taking the nodes as units, wherein the nodes comprise at least one item.
In one embodiment, the entries and nodes each correspond to spatial structure information. The foregoing preset ordering rules may be applied to ordering items and nodes. Ordering according to a preset ordering rule, including but not limited to: sorting the entries or nodes by spatial location; or, the items or nodes are ordered by spatial position, and for at least two items or nodes that have a conflict in the ordering by spatial position, the at least two items or nodes are ordered by geometric information.
In one embodiment, the spatial location may be represented by a first directional coordinate.
In one embodiment, the entry is in units of insertion. Sorting all the items corresponding to the chip packaging structure according to a preset sorting rule, and sequentially inserting the items into the nodes based on the tree structure according to the sorting result, including but not limited to:
Determining a first direction coordinate corresponding to each item object, and sorting all items corresponding to the chip packaging structure according to a first direction coordinate sorting rule to obtain a first sorting result; or alternatively, the first and second heat exchangers may be,
determining first direction coordinates and geometric information corresponding to each item, sorting all items corresponding to the chip packaging structure according to a first direction coordinate sorting rule, sorting at least two items which have conflict when being sorted according to the first direction coordinate sorting rule, and sorting the at least two items according to the geometric information to obtain a first sorting result.
Wherein the first direction coordinates comprise a first direction maximum coordinate and/or a first direction minimum coordinate and the geometric information comprises a volume parameter. Alternatively, the first direction maximum coordinate may be a coordinate of a side of the entry away from the origin of coordinates, and the first direction minimum coordinate may be a coordinate of a side of the entry close to the origin of coordinates; vice versa.
In an embodiment, the preset ordering rule preferably orders the items according to the first direction coordinates, and based on the structural characteristics of the first direction layering of the chip packaging model, the items can be ordered reasonably rapidly, so that the efficiency of outputting the spatial relationship of the tree structure algorithm can be improved effectively, and the folding degree of the spatial relationship can be reduced.
In an embodiment, the step of sorting all the entries corresponding to the chip package structure according to the first direction coordinate sorting rule, and sorting at least two entries having a conflict when sorting according to the first direction coordinate sorting rule according to the geometric information to obtain the first sorting result includes, but is not limited to:
sequencing all the items preferentially according to the maximum coordinates in the first direction, sequencing at least two items with sequencing conflict on the maximum coordinates in the first direction according to the minimum coordinates in the first direction of the at least two items and/or sequencing according to a geometric information sequencing rule so as to obtain a first sequencing result; or alternatively, the first and second heat exchangers may be,
and sequencing all the items preferentially according to the minimum coordinates in the first direction, sequencing at least two items with sequencing conflict of the minimum coordinates in the first direction according to the maximum coordinates in the first direction of the at least two items and/or sequencing according to a geometric information sequencing rule so as to obtain a first sequencing result.
In an embodiment, when the entries obtained based on the chip package structure are all through-layered with the first direction coordinates, the preset ordering rule may be ordering according to the first direction maximum coordinates to obtain the first ordering result, or ordering according to the first direction minimum coordinates to obtain the first ordering result. Therefore, when the entries obtained based on the chip packaging structure are all through layering of the first direction coordinates, the entries can be ordered reasonably and rapidly, so that the efficiency of the output spatial relationship of the tree structure algorithm can be effectively improved, and the folding degree of the spatial relationship can be reduced.
In one embodiment, for at least two entries that are in conflict with respect to ordering according to the first direction coordinates, the at least two entries are ordered according to the geometric parameter. Specifically, when all the entries obtained based on the chip packaging structure include partial layering and through layering, the preset ordering rule may be to order preferentially according to the first direction coordinates, and when ordering conflict exists (for example, when the first direction maximum coordinates of two entries are the same and/or the first direction minimum coordinates are the same), then according to the geometric parameter information.
In one embodiment, at least two entries having a first-direction maximum coordinate in which ordering conflicts occur, e.g., the first-direction maximum coordinate of one entry is the same as the first-direction maximum coordinate of another one or more entries. At least two entries for which the first-direction minimum coordinates are in a sorting conflict, e.g., the first-direction minimum coordinates of one entry are the same as the first-direction minimum coordinates of another one or more entries.
In one embodiment, the preferred geometric information is a volumetric parameter. The geometric information may also be surface area, cross-sectional area in one of the predetermined directions, etc. The step of sorting all the items preferentially according to the maximum coordinates in the first direction, sorting at least two items with sorting conflicts occurring in the maximum coordinates in the first direction according to the minimum coordinates in the first direction of the at least two items and/or sorting according to the sorting rule of the geometric information to obtain a first sorting result may include: the method comprises the steps of firstly sorting all items according to the maximum coordinates in the first direction, and sorting at least two items with sorting conflicts of the maximum coordinates in the first direction according to the minimum coordinates in the first direction of the at least two items to obtain a first sorting result; or, sorting all the items according to the maximum coordinates in the first direction preferentially, and sorting at least two items with sorting conflicts of the maximum coordinates in the first direction according to the volume parameters to obtain a first sorting result; or, the at least two items with the first direction maximum coordinates in all the items are preferably sorted, at least two items with the first direction maximum coordinates in the sorting conflict are sorted according to the first direction minimum coordinates of the at least two items, and at least two items with the first direction coordinates in the sorting conflict are sorted according to the volume parameter to obtain a first sorting result, wherein the at least two items with the first direction coordinates in the sorting conflict, for example, the first direction minimum coordinates of one item are the same as the first direction minimum coordinates of another item or another items, or the first direction minimum coordinates and the first direction maximum coordinates of one item are the same as the first direction minimum coordinates and the first direction maximum coordinates of another item or another items.
In an embodiment, at least two items with the largest coordinates in the first direction in all the items are preferably ordered according to the largest coordinates in the first direction, at least two items with the largest coordinates in the first direction are ordered according to the smallest coordinates in the first direction, when at least two items with the smallest coordinates in the first direction are ordered according to the volume parameter to obtain a first ordering result, for example, referring to fig. 3, based on the item structure obtained by the chip package structure, the first four items penetrating through the layering are preferably ordered according to the largest coordinates in the first direction to obtain items 1, 2, 3 and 4 in sequence, three items with the same largest coordinates in the first direction exist after the item 4, then the first item is ordered according to the smallest coordinates in the first direction to obtain item 5, two items with the same largest coordinates in the first direction exist at two sides of the item 5, then the two items are ordered according to the volume parameter to obtain items 6 and 7 (the volume of the item 6 is larger than the item 7 or the volume of the item 6 is smaller than the item 7), and all items are ordered according to the volume parameter to obtain the first item 16.
In an embodiment, at least two items with sorting conflict according to the first direction minimum coordinates in all items are sorted preferentially, sorting is performed according to the first direction maximum coordinates of the at least two items, and when at least two items with sorting conflict according to the first direction maximum coordinates, sorting is performed on the at least two items according to a geometric parameter sorting rule to obtain a first sorting result, and the specific embodiment of the technical feature can refer to the above and will not be repeated herein.
In one embodiment, the tree structure includes leaf nodes and at least one non-leaf node. In an embodiment, the first spatial extent of each non-leaf node comprises a second spatial extent of at least one leaf node, or the first spatial extent of each non-leaf node comprises a first spatial extent of at least one non-leaf node of a next depth; the second spatial range of each leaf node includes at least one entry. Wherein the spatial extent represented by the non-leaf node is formed by wrapping the non-leaf node at the next depth or the first spatial extent of the non-leaf node is formed by wrapping the leaf node under the non-leaf node and the second spatial extent represented by the leaf node is formed by wrapping the entry under the leaf node.
In an embodiment, the present embodiment may preset parameters for the tree structure according to the scale of the chip package structure, where the set parameters include a node depth, a maximum node number, and/or a maximum entry number. Where the node depth of the tree structure represents the distance that the lower level node extends from the root node (i.e., the non-leaf node of the uppermost level), the maximum node number of the tree structure represents the maximum number of nodes that can be accommodated by each node depth under the root node, and the maximum entry number of the tree structure represents the maximum number of entries that can be accommodated by the leaf node. For example, referring to fig. 4, the parameters set in the tree structure in step S12 include a node depth of 3 (counted from 0 down from Root node shape Root (Root translated to Root range), a depth of 0, a depth of 1, a depth of 2), a maximum node number, and a maximum entry number of M (m=3), so that the set tree structure includes leaf nodes (bottommost nodes) and non-leaf nodes. Each non-leaf node has a base spatial extent Shape (translated into a range or outline, the same applies below), and one or more pointers to its child nodes; each leaf node also has a basic spatial extent Shape, and one or more pointers (data structures to entries or child nodes) to the "entries" it contains; the spatial structure information of the material block characterized by the item refers to data to be inserted obtained after the material block is packaged, and the item also has a spatial range, typically a minimum range which just contains the spatial position of the packaged material block. It should be appreciated that the node depth, maximum node number, and maximum entry number M of the tree structure may be, but are not limited to, equal to 3, and may be greater than 3 or less than 3, respectively.
In an embodiment, when the node depth of the tree structure is greater than 3, there are at least two nodes distributed with different depths as non-leaf nodes, wherein the depth of the non-leaf node with the lower node as the leaf node is the lowest depth; the lower level node is the non-leaf node and the non-leaf node furthest from the depth of the leaf node (e.g., root node) is the highest depth.
In an embodiment, after sorting according to a preset sorting rule, inserting all the entries corresponding to the chip package structure into the tree structure-based nodes, including but not limited to: based on the first ordering result, all the entries are sequentially inserted into the tree structure-based nodes.
In one embodiment, all entries are inserted sequentially into a tree-structure based node, including but not limited to: determining a target non-leaf node according to the space structure information of the item to be inserted and the first space range of the non-leaf node; determining a target leaf node to be inserted with an entry according to a second spatial range of the leaf node contained in the first spatial range of the target non-leaf node; the entry to be inserted is inserted into the target leaf node.
In one embodiment, the step of determining the target non-leaf node based on the spatial structure information of the entry to be inserted and the first spatial extent of the non-leaf node includes, but is not limited to: and determining the non-leaf node to be inserted of each depth as a target non-leaf node according to the space structure information of the entry to be inserted and the first space range of the non-leaf node of each depth.
In one embodiment, the step of determining the non-leaf node to be inserted for each depth according to the spatial structure information of the entry to be inserted and the first spatial range of the non-leaf node for each depth includes, but is not limited to: for each depth of the tree structure, obtaining a first geometric increment of each non-leaf node of which an item to be inserted is respectively inserted into the current depth of the tree structure, so as to obtain at least one first geometric increment; and determining the non-leaf node with the smallest first geometric increment when the entry to be inserted is inserted as the non-leaf node to be inserted with the current depth. Since the first spatial extent of the non-leaf node is formed by wrapping the leaf node, the spatial extent represented by the non-leaf node may change when a new entry is inserted, i.e., a first geometric delta is generated, and when the geometric delta is minimal, the target non-leaf node is inserted as an entry.
In one embodiment, the step of determining the target leaf node to be inserted with the entry according to the second spatial range of the leaf node included in the first spatial range of the target non-leaf node includes: obtaining second geometric increment of each leaf node of which the item to be inserted is respectively inserted into the target non-leaf node, so as to obtain at least one second geometric increment; and determining the leaf node with the smallest second geometric increment when the entry to be inserted is inserted as the target leaf node. Since the second spatial extent of the leaf node is formed by wrapping the entry, the spatial extent represented by the leaf node may change when a new entry is inserted, i.e., a second geometric delta is generated, and when the geometric delta is the smallest, the target leaf node is inserted as an entry.
Wherein the geometric increment includes, but is not limited to, an area increment or a volume increment. In an embodiment, all entries are inserted into a node based on a tree structure, for example, by a ChooseSubTree (translated into a selection child node) algorithm of an R-tree, i.e. for selecting the node to which the entry to be inserted belongs. Its main operation is to start from the root node and descend to the leaf nodes layer by layer, finding the most suitable child node to accommodate the new entry at each depth. The criteria for selecting the most suitable nodes at each layer are:
(1) For the case of determining the target non-leaf node, selecting the child node with the smallest area (2-dimensional)/volume (3-dimensional) increment, optionally, obtaining a geometric increment (such as an area increment or a volume increment) of each non-leaf node of the tree structure, in which an item to be inserted is respectively inserted, namely packaging the non-leaf node and the item to be inserted, so as to obtain at least one first geometric increment; the entry is inserted into the target non-leaf node with the smallest first geometric increment. For example, referring to fig. 5, an example of area (2-dimensional) area increment is selected: when a non-leaf node is selected for insertion, the area before the insertion of an item is 10 when the node A is inserted into the item to be inserted, the area after the insertion of the item is 16, the area increment is 6, the area before the insertion of the item is 18 when the node B is inserted into the item to be inserted, and the area after the insertion of the item is 40, the area increment is 22, so that the node B with the smallest area increment after the insertion is selected;
(2) For the case of determining the target leaf node, the child node with the smallest overlap area (2-dimensional)/volume (3-dimensional) increment is selected. Optionally, obtaining a second geometric increment (for example, an area increment or a volume increment) of each leaf node of the target non-leaf node of the tree structure, in which an item to be inserted is inserted into the target non-leaf node, namely, wrapping the leaf node and the item to be inserted to obtain at least one second geometric increment; the entry is inserted into the target leaf node with the smallest second geometric increment. For example, referring to fig. 6, an area (2-dimensional) area increment is selected for illustration: when a leaf node is selected for insertion, the overlap area increment is 35 when the area before the entry is inserted into the entry to be inserted is 5 when the node D is inserted into the entry to be inserted, the overlap area increment is 1.6 when the area before the entry is inserted into the entry to be inserted is 1.2 when the area after the entry is inserted into the entry to be inserted is 2.8, and the overlap area increment is 4 when the area before the entry is inserted into the entry to be inserted is 6.2 when the area after the entry is inserted into the entry to be inserted into the node F is 10.2, so that the node E with the smallest overlap area increment after the insertion is selected.
Based on the above determination of the target non-leaf node and the determination logic of the target leaf node, a reasonable insertion path of each item can be determined (see fig. 7), so that all items can be reasonably inserted into the nodes based on the tree structure, the overlapping degree of the tree structure is reduced as much as possible, and the spatial relationship of the chip packaging structure with low overlapping rate is reasonably generated.
In one embodiment, S11: the step of obtaining all the entries corresponding to the chip package structure and inserting the entries into the nodes based on the tree structure according to the spatial structure information corresponding to the entries may include: and when detecting that the node where the entry to be inserted is located overflows after the entry to be inserted is inserted, performing reinsertion operation or node splitting operation.
In one embodiment, detecting that the node where the entry to be inserted is located after insertion overflows includes: and judging that the insertion overflow occurs if the number of the entries of the node where the entries to be inserted are inserted is larger than the preset maximum number of the entries. And/or recording the overflow times of the depth of the tree structure where the inserted node is located. For example, the maximum number of entries in the node of the tree structure is M, after the entries to be inserted are inserted into the node of the tree structure, the number of entries contained in the inserted node exceeds the maximum number of entries limit M, generally m+1, and at this time, it is determined that the inserted node has insertion overflow, and at the same time, the number of overflow times of the depth of the tree node where the inserted node is located may also be recorded.
It should be appreciated that the reinsertion operation may represent reinsertion of the tree structure after an entry or node in the tree structure is culled, and the node splitting operation may represent splitting of the original node to assign the entry or node under the original node under the new node after the splitting. Thus, the basis of the reinsertion operation, the node splitting operation, may be an entry, or a node, and thus, for ease of description and understanding, an "entry or node" is referred to below by an "object".
In one embodiment, when detecting that the node where the entry to be inserted is located after being inserted has overflow, the step of performing reinsertion operation or node splitting operation includes but is not limited to: after detecting that an entry to be inserted is inserted, determining that the node of the tree structure with overflow is an overflow node when the node of the tree structure with overflow appears in insertion overflow; and performing reinsertion operation or node splitting operation according to the overflow insertion rule and the object under the overflow node. The node where the overflow occurs may be a leaf node or a non-leaf node after a reinsertion operation or a node splitting operation.
The overflow insertion rule includes, but is not limited to, reinsertion operation when first overflow occurs at the depth of the tree structure where the overflow node is located, and node splitting operation when non-first overflow occurs at the depth of the tree structure where the overflow node is located.
In one embodiment, reinsertion operations are performed according to overflow insertion rules and objects under overflow nodes, including but not limited to: when the depth of the tree structure where the overflow node is located overflows for the first time, determining a reject object under the overflow node; sorting the removed objects according to a preset sorting rule, and reinserting the removed objects into the nodes of the tree structure according to the space structure information corresponding to the removed objects in sequence. Wherein the reject object comprises a reject entry or a reject node.
In an embodiment, the preset ordering rule may be specifically referred to above, and will not be described herein.
In other embodiments, reinsertion operations are performed according to overflow insertion rules and objects under overflow nodes, including but not limited to: when the depth of the tree structure where the overflow node is located overflows for the first time, determining a reject object under the overflow node; and reinserting the eliminating object into the nodes of the tree structure according to the space structure information corresponding to the eliminating object. Therefore, the node of the tree structure can be directly reinserted based on the spatial structure information corresponding to the reject object.
In one embodiment, the first overflow occurs at the depth of the tree structure where the overflow node is located, including but not limited to: when detecting that the depth of the tree structure where the overflow node is located overflows, accumulating and recording the overflow times of the depth of the tree structure where the overflow node is located; when the overflow times are equal to 1, judging that the first overflow occurs; otherwise, when the overflow times are larger than 1, the overflow is judged to not occur for the first time.
In one embodiment, the culling object under the overflow node is determined, including but not limited to: ordering all objects under the overflow node according to a preset ordering rule to obtain a second ordering result; and taking the object with the rejection attribute meeting the rejection condition as the rejection object based on the second sorting result. Therefore, when the occurrence of the insertion overflow is detected and the reinsertion operation is performed, all objects under the node where the overflow occurs can be ordered according to the preset ordering rule based on the characteristics of the chip packaging structure, so that the reject judgment can be performed according to the ordering result and the reject attribute of the object, and therefore, a proper reject object can be quickly found, the reinsertion operation can be efficiently performed, and the efficiency of the whole spatial relationship generation process can be further improved.
In other embodiments, the culling object under the overflow node is determined, including but not limited to: and regarding all objects under the overflow node, taking the object with the rejection attribute meeting the rejection condition as the rejection object. Therefore, the embodiment can also directly sequence all objects under the overflow node without according to a preset sequencing rule.
The eliminating attribute comprises, but is not limited to, an object type, a node space utilization rate after eliminating the eliminating object and/or a node eliminating number.
In an embodiment, in the process of inserting an item to be inserted once, after the item to be inserted is inserted into a leaf node, if the number of the items of the leaf node exceeds the maximum number of the items, overflow occurs, if the depth of the tree structure where the leaf node is located is overflowed for the first time, the rejected item under the leaf node is determined, the rejected item is reselected to be inserted into the leaf node, at this time, after the item to be inserted is reinserted into a new leaf node, if the new inserted leaf node is overflowed, the depth of the tree structure where the new leaf node is located is the same as that of the previous insertion, so that non-first-time overflow occurs to the depth of the tree structure, the leaf node is split into two new leaf nodes, and the items under the original leaf node are split into the two new leaf nodes respectively. If the number of the nodes of the non-leaf nodes which the leaf nodes belong to exceeds the maximum number of the nodes after the leaf nodes are split, overflow occurs, if the depth of the tree structure where the non-leaf nodes are located is overflowed for the first time, a reject node under the non-leaf nodes is determined, a new non-leaf node to be inserted into the reject node is reselected, at this time, after the reject leaf node is inserted into the reselected non-leaf node, if the inserted non-leaf node overflows for the first time, the depth of the tree structure where the non-leaf nodes are located is overflowed for the first time, the non-leaf node is split into two new non-leaf nodes, and the leaf nodes under the original non-leaf nodes are split into the two new non-leaf nodes respectively.
In an embodiment, the case where the rejection attribute satisfies the rejection condition includes: the object type is an orphan entry or orphan node; and/or, the node space utilization rate after eliminating the eliminating object is increased or unchanged compared with the node space utilization rate before eliminating; and/or the node eliminating quantity after eliminating the eliminating objects does not reach the preset quantity. Wherein there is no contact between the orphaned entry and the spatial location of other entries under the overflow node.
In one embodiment, an isolated entry has a coordinate point where its graphical coordinates or spatial locations do not coincide with those of other entries of the overflow node, and from the perspective of the entry structure below the overflow node, the entry does not have any side in contact with other entries. Optionally, the spatial position corresponding to each material block includes a graphic coordinate composed of coordinates in three directions; the isolated entry corresponds to an isolated block of material, and the graphical coordinates of the isolated block of material do not have coincident coordinate points with the graphical coordinates of other blocks of material corresponding to other entries below the overflow node.
In one embodiment, there is no contact between the orphaned node and the spatial locations of other nodes below the overflow node. In one embodiment, the isolated node has a coordinate point where its graphical coordinates or spatial positions do not coincide with those of other nodes of the overflow node, and from the point of view of the node structure below the overflow node, the node does not have any side in contact with other nodes.
In one embodiment, the non-isolated item has a coordinate point whose graphical coordinates or spatial locations coincide with the graphical coordinates or spatial locations of other items under the node to which the item belongs. In one embodiment, there is a coordinate point where the graphical coordinates or spatial locations of a non-isolated node coincide with the graphical coordinates or spatial locations of other nodes under the parent node of the node.
In an embodiment, the preset rejection condition is that the rejected objects reach a preset number, for example, referring to fig. 8, when the node D overflows for the first time (the current number of entries is m+1> the maximum number of entries M, and the number of overflows is equal to 1), all the entries under the node D are sorted to obtain a second sorting result, and based on the second sorting result and the preset rejection condition, all the entries under the node D are divided into two parts, wherein the first part is the least relevant entry, and includes P rejected entries (i.e., the preset number is P); the remaining entries remain for the second portion, in an amount of m+1-p. And eliminating and reinserting the p elimination items, thereby improving the stability of the tree structure or reducing the folding rate of the tree structure.
In one embodiment, the step of taking the object whose rejection attribute satisfies the rejection condition as the rejection object based on the second sorting result includes: and taking the isolated object as a reject object based on the second sorting result. And/or, removing the non-isolated objects one by one from the sequence tail based on the second sorting result, and obtaining node space utilization information and/or removing quantity of nodes corresponding to the removed non-isolated objects each time, so as to determine removed objects according to the node space utilization information and/or removing quantity, wherein the sequence tail refers to the last bit of the sorting result, and takes 2 dimensions as an example, the node space utilization (2 dimensions) after removing a non-isolated object is=the sum of areas of the remaining objects under the nodes/the current total area of the remaining objects accommodated by the nodes. In an embodiment, the isolated object is taken as the eliminating object based on the second sorting result, for example, referring to fig. 9, the node a includes the items A1 to A6, wherein, from the view point of the item structure under the node a, the item A5 and the item A6 have no side in contact with other items, and therefore, the item A5 and the item A6 are isolated items and can be classified into the least relevant part in the node a.
In an embodiment, the eliminating object can be determined according to the node space utilization information and/or the eliminating quantity for the non-isolated object. Optionally, non-isolated objects with node space utilization information and/or rejection number meeting rejection conditions are taken as rejection objects. The case where the rejection attribute satisfies the rejection condition includes: the node space utilization rate after the non-isolated objects are removed is increased or unchanged compared with the node space utilization rate before the non-isolated objects are removed; and/or the number of the removed non-isolated objects is not up to the preset number. Therefore, in the reinsertion operation, the method and the device select the rejected objects through at least one reject condition, so that the reinsertion operation can be realized by selecting a reasonable number of rejected objects, the rationality of the whole spatial relationship generation process can be improved, the overlapping degree can be reduced, the chip packaging structure obtained based on the generated spatial relationship can quickly finish the external query operation in the follow-up process, and the information of other material blocks around the target material block can be quickly checked.
In an embodiment, the step of taking the object whose rejection attribute satisfies the rejection condition as the rejection object based on the second sorting result includes: and removing the non-isolated objects one by one from the sequence tail based on the second sequencing result, and acquiring the removing attribute corresponding to each removed non-isolated object, wherein the non-isolated object with the removing attribute meeting the removing condition is taken as the removing object. For example, referring to fig. 10, the result of sorting the entries under the node a includes entries A1 to A6, wherein the entry A6 is an isolated entry as a culled entry, so that based on the sorting result, the entries A1 to A5 are left, judging from the end of the order, assuming that the entry A5 is culled, culling is implemented if the node space utilization is found to be increased and the culling number does not reach a preset number P (for example, p=2), and the entries A1 to A4 are left; further, starting from the sequence tail, judging, assuming that the item A4 is removed, finding that the node space utilization rate is reduced and the removal quantity reaches the preset quantity P, removing invalidity, and finally performing node inserting operation on the removed items A5 and A6; or further, referring to fig. 11, starting from the tail of the sequence, assuming that the item A4 is rejected, if the space utilization rate is found to be increased but the number of rejected items reaches the preset number P (p=2), the rejection is invalid, and finally, the rejected items A5 and A6 are subjected to the node inserting operation.
In an embodiment, the reinsertion operation can be implemented by a forcedresert (translating into forceful reinsertion) algorithm of an R tree, that is, forceful reinsertion processing, which solves the strong correlation between a tree structure and an object insertion sequence, and can reinsert a part of unreasonable objects, make up for the strong correlation between a part of insertion sequence and the tree structure, and meanwhile, when the objects are first introduced, all the objects are ordered according to a first direction coordinate ordering priority rule, so that an acceptable and reasonable structure can be built, and the pressure of a plurality of ill-conditioned structures is relieved for forceful reinsertion, thereby improving the efficiency of generating a spatial relationship. For example, based on all objects under the node where overflow occurs for the first time, taking the object whose rejection attribute satisfies the rejection condition as a rejection object, so as to obtain at least one rejection object, and re-performing the operation of inserting the node based on the tree structure.
In one embodiment, the overflow node is a leaf node. According to the overflow insertion rule and the object under the overflow node, the node splitting operation includes, but is not limited to: when non-first overflow occurs in the depth of the tree structure where the overflow node is located, all objects under the overflow node are ordered according to a preset ordering rule, and the overflow node is split into at least two new nodes according to an ordering result. For example, when the entry is inserted to cause the leaf node to overflow for the first time, splitting the leaf node into at least two new leaf nodes; when the upper non-leaf node of the leaf node overflows for the first time after the leaf node is increased, splitting the upper non-leaf node of the leaf node into at least two new upper non-leaf nodes; when the upper non-leaf node of the leaf node increases to cause the upper two-level non-leaf node of the leaf node (namely, the upper non-leaf node of the leaf node) to overflow for the first time, the upper two-level non-leaf node of the leaf node is split into at least two new upper two-level non-leaf nodes.
Therefore, when the number of the entries exceeds the maximum number of the entries and overflows before the depth of the tree structure of the leaf node to which the entries belong, the leaf node is an overflow node, so that after all the entries under the leaf node are ordered according to a preset ordering rule, the entries in the leaf node are split according to an ordering result to form at least two new leaf nodes; in addition, in this embodiment, when a new next level child node (for example, a leaf node) is added after a next level child node under a non-leaf node in a tree structure depth is split, so that the non-leaf node in the tree structure depth exceeds the maximum node number, the non-leaf node is used as a new overflow node, and when overflow occurs before the depth of the tree structure in which the non-leaf node is located, the depth of the tree structure in which the non-leaf node is located is overflowed for the first time, so that after all child nodes under the non-leaf node are ordered according to a preset ordering rule, the child nodes in the non-child nodes are split according to an ordering result to form at least two new non-leaf nodes. If a split occurs at the uppermost non-leaf node (root node), the tree structure forms a new uppermost non-leaf node from the split uppermost non-leaf node, with the depth of the tree structure being one more level.
In an embodiment, when non-first overflow occurs in the depth of the tree structure where the overflow node is located, sorting all objects under the overflow node according to a preset sorting rule, and splitting the overflow node into at least two new nodes according to a sorting result, including: ordering all objects under the overflow node according to a preset ordering rule to obtain a third ordering result; acquiring at least one split combination based on the third sorting result, wherein each split combination comprises at least two quasi-split nodes, and the spatial positions of objects under each quasi-split node are adjacent in sequence; acquiring node volume allowance of all split combinations; and taking the splitting combination with the smallest node volume allowance as a target splitting combination to split so as to obtain at least two new nodes. For example, when a non-first overflow occurs in the depth of the tree structure where the leaf node is located, the entries under the leaf node where the overflow occurs are ordered according to a first direction coordinate ordering rule, after the ordering, 5 entries exist, 4 splitting attempts are performed to obtain 4 splitting combinations, each splitting combination can include two splitting-off nodes, the allocation of the entries in the two splitting-off nodes can be respectively entry 1, entry 2-5, entry 1-2, entry 3-5, entry 1-3, entry 4-5, entry 1-4 and entry 5, and the volume allowance is calculated for each splitting-off node in each splitting combination to obtain the overall volume allowance corresponding to each splitting combination, so that the splitting combination with the minimum overall volume allowance is selected as the target splitting combination to split, and two new leaf nodes are obtained. For example, when the depth of the tree structure where the non-leaf node is located is overflowed for the first time, the sub-nodes under the overflowed non-leaf node are ordered according to a first direction coordinate ordering rule, 4 sub-nodes exist after the ordering, 3 splitting attempts are performed to obtain 3 splitting combinations, each splitting combination can include two to-be-split nodes, the sub-node allocation in the two to-be-split nodes can be respectively sub-node 1, sub-node 2-4, sub-node 1-2, sub-node 3-4, sub-node 1-3 and sub-node 4, and the volume allowance is calculated for each to-be-split node in each splitting combination to obtain the whole volume allowance corresponding to each splitting combination, so that the splitting combination with the smallest whole volume allowance is selected as a target splitting combination to be split, and two new non-leaf nodes are obtained.
In an embodiment, the volume margin may refer to the volume of space of a node itself minus the remaining volume of the volume of space of the child node it contains. A child node may be a node or entry of the next level of the node. What is actually reflected is that the larger the volume margin is, the more space is not utilized, and the lower the utilization is.
In an embodiment, when non-first overflow occurs in the depth of the tree structure where the overflow node is located, all objects under the overflow node are ordered according to a preset ordering rule, and after the step of splitting the overflow node into at least two new nodes according to the ordering result, the method includes but is not limited to: when the depth of the tree structure of the upper node of the overflow node overflows for the first time, the upper node is used as a new overflow node, the step of reinserting operation is carried out according to the overflow insertion rule and the object under the overflow node, or when the depth of the tree structure of the upper node of the overflow node overflows, the upper node is used as a new overflow node, and the step of reinserting operation or node splitting operation is carried out according to the overflow insertion rule and the object under the overflow node is carried out. For example, according to the overflow insertion rule and the object under the overflow node, performing reinsertion operation, namely when the depth of the tree structure where the upper node of the overflow node is located overflows for the first time, taking the upper node as a new overflow node, determining the rejection nodes under the new overflow node, and sorting the rejection nodes according to a preset sorting rule, so as to reinsert the rejection nodes into the nodes of the tree structure according to the space structure information corresponding to the rejection nodes in sequence. Therefore, in this embodiment, when a child node increases and causes a parent node to exceed a maximum node tree (a parent node is an upper node of the child node, the child node may be a node or an entry), and no overflow occurs before the depth of the tree structure where the parent node is located (the first overflow), at least one parent node is increased or the original parent node is split into at least two new parent nodes at the depth of the tree structure where the parent node is located, and based on the sorting result of the sorting rule determined for all nodes under the original parent node, the nodes of the tree structure are sequentially inserted until all nodes under the original parent node are inserted into at least two new parent nodes, so that the reinsertion operation for non-leaf nodes can be implemented, so that a target tree structure with low overlapping rate is formed more quickly, and therefore, the efficiency of the whole spatial relationship generating process is improved.
In other embodiments, the step of performing a node splitting operation according to the overflow insertion rule and the object under the overflow node includes, but is not limited to: when non-first overflow occurs in the depth of the tree structure where the overflow node is located, the overflow node is split into at least two new nodes based on all objects under the overflow node.
In other embodiments, when a non-first overflow occurs at the depth of the tree structure where the overflow node is located, the step of splitting the overflow node into at least two new nodes based on all objects under the overflow node includes, but is not limited to: acquiring at least one splitting combination according to all objects under the overflow node, wherein each splitting combination comprises at least two quasi-splitting nodes, and the spatial positions of the objects under each quasi-splitting node are adjacent in sequence; acquiring node volume allowance of all split combinations; and taking the splitting combination with the smallest node volume allowance as a target splitting combination to split so as to obtain at least two new nodes.
Therefore, in other implementations of this embodiment, when the node splitting operation is performed according to the overflow insertion rule and the objects under the overflow node, at least one splitting combination may be directly obtained according to the spatial structure information of all the objects under the overflow node, without ordering according to the preset ordering rule.
In other embodiments, when a non-first overflow occurs in a depth of a tree structure where an overflow node is located, after the step of splitting the overflow node into at least two new nodes based on all objects under the overflow node, the method includes: and when the depth of the tree structure of the upper node of the overflow node is overflowed for the first time, taking the upper node as a new overflow node, returning the object according to the overflow insertion rule and the overflow node, and performing reinsertion operation or node splitting operation. In an embodiment, when the overflow is detected to not occur for the first time, performing node splitting operation, and implementing upward recursion splitting processing through a Split algorithm of an R-tree; the operations it does may be: after reinsertion using the R tree ChooseSubTree algorithm (translated as a selection child node), referring to fig. 12, the number of entries contained in a certain leaf node (e.g., node D) exceeds the maximum limit M, typically m+1, when the node is said to overflow, and when the depth of the tree structure in which the leaf node is located is not overflowed for the first time, the leaf node is split into two, and m+1 entries are allocated to the two nodes in the most suitable manner (see the embodiment described above for details); or referring to fig. 13, a certain non-leaf node (e.g., node a) contains a number of leaf nodes exceeding the maximum number limit M, typically m+1, when it is said that an overflow occurs in the non-leaf node, and when the depth of the tree structure in which the non-leaf node is located is not overflowed for the first time, the non-leaf node is split into two, and m+1 leaf nodes are distributed to two target non-leaf nodes in the most appropriate manner (see the embodiment described above for details). Referring to fig. 14, after the allocation is completed, since the number of non-leaf nodes increases by 1 after the splitting, it is necessary to check whether the parent node Father of the non-leaf node (which is herein translated as an upper node, such as a root node) needs a splitting operation.
S13: and obtaining the insertion results of all the items, and determining the spatial relationship of the material blocks in the chip packaging structure according to the tree structure generated by the insertion results.
Based on the above technical concept, the following examples are given for reference to fig. 15, which illustrate the following steps of a spatial relationship management method of a chip package structure:
s11': acquiring all items corresponding to the chip packaging structure;
s12a, sorting all the items corresponding to the chip packaging structure according to a preset sorting rule to obtain a first sorting result;
s12b: selecting an item to be inserted based on the first sorting result;
s12c: inserting the selected entry to be inserted into a node of the tree structure;
s12d: detecting whether insertion overflow occurs;
if no insert overflow occurs, step S12e is performed: judging whether the remaining items to be inserted exist or not; if not, then step S13 is executed: obtaining the insertion results of all the items, and generating a spatial relationship according to the insertion results; if yes, return to step S12b;
if the insertion overflow occurs, step S12f is performed: checking the overflow times of the depth of the tree of the corresponding node to judge whether reinsertion operation is carried out or not;
if the reinsertion operation is confirmed, step S12g is executed: performing reinsertion operation;
If the reinsertion operation is not performed, step S12i is performed: the node splitting operation is performed and returns to step S12e.
After the space relation is generated based on the chip packaging structure, the chip packaging structure can be quickly inquired through a quick positioning algorithm. When other material blocks around the material block A need to be inquired, six faces of a cuboid item formed by packaging the material block A in the chip packaging structure are extracted, and neighbors of the material block A are positioned in contact items normal to the 6 faces; the 6 faces are sequentially queried by a tree structure algorithm (such as R tree query), and the range can be rapidly reduced due to the data structure of the tree structure algorithm, wherein the query algorithm specifically comprises: starting from the root node, if the inquired node is not a leaf node, judging whether the shape of each child node is contacted with the space surface in the outer normal direction of the space surface, and if so, continuing to recursively inquire downwards from the child node; if the queried node is a leaf node, judging whether the shape of each item is contacted with the space surface in the outer normal direction of the space surface, and if so, putting the item into a result queue.
A series of items can be obtained through a quick positioning algorithm, if all the material blocks are cuboid, the shapes of the items are completely attached to the material blocks, and then the material blocks corresponding to all the items are all neighbors, so that the query efficiency can be greatly improved. The entries in the spatial relationship are obtained after the real information is packaged, so that an input structure with any shape is supported, irregular structures such as a silicon channel TSV, various Bumps for connecting a chip and a base and the like under an advanced process packaging structure are adapted, and the irregular structures do not influence the stability of a tree structure and also cannot deteriorate the query efficiency. Aiming at the structural characteristics of the first direction of the chip packaging structure, the tree structure algorithm is optimized, so that the overlapping part is reduced as much as possible, the stability of the tree structure algorithm is improved, and the query efficiency is improved.
In an embodiment, the tree structure of the present application may be, but not limited to, applicable to R tree algorithm, and may also be in a dynamic organization form such as r+ tree, R tree, etc.
The spatial relationship management method of a chip packaging structure provided in the first embodiment of the present application includes: s11: acquiring all the items corresponding to the chip packaging structure, and inserting the items into the nodes S12 based on the tree structure according to the space structure information corresponding to the items: and obtaining the insertion results of all the items, and determining the spatial relationship of the material blocks in the chip packaging structure according to the target tree structure generated by the insertion results. Therefore, according to the characteristics of the chip packaging structure, all initial entries corresponding to the spatial position relation of the chip packaging structure can be obtained, so that the spatial relation of the chip packaging structure with low overlapping rate can be reasonably generated for subsequent application or external inquiry can be carried out after the chip packaging is completed based on the spatial relation according to the processing of the insertion node, the reinsertion processing and/or the splitting processing of the tree structure algorithm (such as R-tree).
Second embodiment:
fig. 16 is a schematic structural diagram of an electronic device according to a second embodiment of the present application. For a clear description of the electronic device 1 provided in the second embodiment of the present application, please refer to fig. 16.
The electronic device 1 provided in the second embodiment of the present application includes: the processor E101 and the memory E201, optionally, the processor E101 are configured to execute a computer program E6 stored in the memory E201 to implement the steps of the spatial relationship management method of the chip package structure as described in the first embodiment.
Alternatively, the electronic device 1 provided in the present embodiment may include at least one processor E101 and at least one memory E201. Alternatively, the at least one processor E101 may be referred to as a processing unit E1 and the at least one memory E201 may be referred to as a storage unit E2. Optionally, the storage unit E2 stores a computer program E6, which when executed by the processing unit E1, causes the electronic device 1 provided in the present embodiment to implement the steps of the spatial relationship management method of the chip package structure as described in the first embodiment, for example, step S11 shown in fig. 1: acquiring all the items corresponding to the chip packaging structure, and inserting the items into the nodes based on the tree structure according to the space structure information corresponding to the items; s12: and obtaining the insertion results of all the items, and determining the spatial relationship of the material blocks in the chip packaging structure according to the target tree structure generated by the insertion results.
Alternatively, the electronic apparatus 1 provided in the present embodiment may include a plurality of memories E201 (simply referred to as a storage unit E2).
Alternatively, the storage unit E2 may be a volatile memory or a nonvolatile memory, and may include both volatile and nonvolatile memories. Alternatively, the nonvolatile Memory may be a Read Only Memory (ROM), a programmable Read Only Memory (PROM, programmable Read-Only Memory), an erasable programmable Read Only Memory (EPROM, erasable Programmable Read-Only Memory), an electrically erasable programmable Read Only Memory (EEPROM, electrically Erasable Programmable Read-Only Memory), a magnetic random access Memory (FRAM, ferromagnetic random access Memory), a Flash Memory (Flash Memory), a magnetic surface Memory, an optical disk, or a compact disk Read Only (CD-ROM, compact Disc Read-Only Memory); the magnetic surface memory may be a disk memory or a tape memory. The volatile memory may be random access memory (RAM, random Access Memory), which acts as external cache memory. By way of example, and not limitation, many forms of RAM are available, such as static random access memory (SRAM, static Random Access Memory), synchronous static random access memory (SSRAM, synchronous Static Random Access Memory), dynamic random access memory (DRAM, dynamic Random Access Memory), synchronous dynamic random access memory (SDRAM, synchronous Dynamic Random Access Memory), double data rate synchronous dynamic random access memory (ddr SDRAM, double Data Rate Synchronous Dynamic Random Access Memory), enhanced synchronous dynamic random access memory (ESDRAM, enhanced Synchronous Dynamic Random Access Memory), synchronous link dynamic random access memory (SLDRAM, syncLink Dynamic Random Access Memory), direct memory bus random access memory (DRRAM, direct Rambus Random Access Memory). The memory cell A2 described in the embodiments of the present application is intended to comprise, without being limited to, these and any other suitable types of memory.
Optionally, the electronic device 1 further comprises a bus connecting the different components (e.g. the processor E101 and the memory E201, the input device E3, etc.).
Optionally, the electronic device 1 in the present embodiment may further include a communication interface (e.g., an I/O interface E4), which may be used to communicate with an external device.
Optionally, the electronic apparatus 1 provided in the present embodiment may further include a communication device E5.
The electronic device 1 provided in the second embodiment of the present application includes a memory E101 and a processor E201, and the processor E101 is configured to execute the computer program E6 stored in the memory E201 to implement the steps of the spatial relationship management method of the chip package structure as described in the first embodiment, so that the electronic device 1 provided in the present embodiment can implement fast and reasonable generation of the spatial relationship of the microstructure in the chip package structure for use or enable fast external query after the chip package is completed based on the spatial relationship.
The second embodiment of the present application also provides a computer-readable storage medium storing a computer program E6, which when executed by the processor E101 implements steps of a spatial relationship management method of a chip package structure as described in the first embodiment, such as the steps shown in fig. 1, or such as the steps shown in fig. 14.
Alternatively, the computer-readable storage medium that can be provided by the present embodiment may include any entity or device capable of carrying computer program code, a recording medium, such as ROM, RAM, magnetic disk, optical disk, flash memory, and so forth.
The computer program E6 stored in the computer readable storage medium according to the second embodiment of the present application can implement fast and reasonable generation of spatial relationships of microstructures in a chip package structure when executed by the processor E101, so as to enable fast external query after the chip package is completed or based on the spatial relationships.
Optionally, in the embodiments of the electronic device and the computer readable storage medium provided in the present application, all technical features of each embodiment of the spatial relationship management method of the chip package structure are included, and the expansion and explanation contents of the description are basically the same as those of each embodiment of the spatial relationship management method of the chip package structure, which is not repeated herein.
The present embodiments also provide a computer program product comprising computer program code which, when run on a computer, causes the computer to perform the method in the various possible implementations as above.
The embodiments also provide a chip including a memory for storing a computer program and a processor for calling and running the computer program from the memory, so that a device on which the chip is mounted performs the method in the above possible embodiments.
The foregoing embodiment numbers of the present application are merely for describing, and do not represent advantages or disadvantages of the embodiments.
The steps in the method of the embodiment of the application can be sequentially adjusted, combined and deleted according to actual needs.
The units in the device of the embodiment of the application can be combined, divided and pruned according to actual needs.
In this application, the same or similar term concept, technical solution, and/or application scenario description will generally be described in detail only when first appearing, and when repeated later, for brevity, will not generally be repeated, and when understanding the content of the technical solution of the present application, etc., reference may be made to the previous related detailed description thereof for the same or similar term concept, technical solution, and/or application scenario description, etc., which are not described in detail later.
In this application, the descriptions of the embodiments are focused on, and the details or descriptions of one embodiment may be found in the related descriptions of other embodiments.
The technical features of the technical solutions of the present application may be arbitrarily combined, and for brevity of description, all possible combinations of the technical features in the above embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the present application.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) as above, including several instructions for causing an electronic device (which may be a mobile phone, a computer, a server, a controlled terminal, or a network device, etc.) to perform the method of each embodiment of the present application.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions in accordance with embodiments of the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line), or wireless (e.g., infrared, wireless, microwave, etc.). Computer readable storage media can be any available media that can be accessed by a computer or data storage devices, such as servers, data centers, etc., that contain an integration of one or more available media. Usable media may be magnetic media (e.g., floppy disks, storage disks, magnetic tape), optical media (e.g., DVD), or semiconductor media (e.g., solid State Disk (SSD)), among others.
The foregoing description is only of the preferred embodiments of the present application, and is not intended to limit the scope of the claims, and all equivalent structures or equivalent processes using the descriptions and drawings of the present application, or direct or indirect application in other related technical fields are included in the scope of the claims of the present application.

Claims (14)

1. The spatial relationship management method of the chip packaging structure is characterized by comprising the following steps of:
acquiring all items corresponding to a chip packaging structure, and inserting the items into nodes based on a tree structure according to space structure information corresponding to the items, wherein the items are used for representing space structure information of packaged material blocks which are cut according to a preset rule based on the chip packaging structure;
and obtaining the insertion results of all the items, and determining the spatial relationship of the material blocks in the chip packaging structure according to the target tree structure generated by the insertion results.
2. The spatial relationship management method according to claim 1, wherein the step of obtaining all the entries corresponding to the chip package structure, inserting the entries into the tree structure-based nodes according to the spatial structure information corresponding to the entries, comprises:
and ordering all the items corresponding to the chip packaging structure according to a preset ordering rule, and sequentially inserting the items into the nodes based on the tree structure according to the ordering result.
3. The spatial relationship management method according to claim 2, wherein the spatial structure information includes spatial positions and geometric information corresponding to the packaged material blocks;
the sorting according to the preset sorting rule comprises the following steps:
ordering the entries or the nodes by spatial location; or alternatively, the first and second heat exchangers may be,
the entries or the nodes are ordered by spatial position, and for at least two entries or nodes that have a conflict in the ordering by spatial position, the at least two entries or nodes are ordered by geometric information.
4. A spatial relationship management method according to claim 3, wherein the spatial location comprises a first direction coordinate;
sorting all the items corresponding to the chip packaging structure according to a preset sorting rule, and sequentially inserting the items into the nodes based on the tree structure according to the sorting result, wherein the step comprises the following steps:
determining a first direction coordinate corresponding to each item, and sorting all items corresponding to the chip packaging structure according to a first direction coordinate sorting rule to obtain a first sorting result; or alternatively, the first and second heat exchangers may be,
determining first direction coordinates and geometric information corresponding to each item, sorting all items corresponding to the chip packaging structure according to a first direction coordinate sorting rule, sorting at least two items which have conflict when being sorted according to the first direction coordinate sorting rule, and sorting the at least two items according to the geometric information to obtain a first sorting result;
Wherein the first direction coordinates comprise a first direction maximum coordinate and/or a first direction minimum coordinate, and the geometric information comprises a volume parameter.
5. The method of claim 4, wherein the step of sorting all the entries corresponding to the chip package structure according to a first direction coordinate sorting rule, and sorting at least two entries having a conflict when sorted according to the first direction coordinate sorting rule according to geometric information to obtain a first sorting result comprises:
the method comprises the steps of firstly sorting all the items according to the maximum coordinates in the first direction, sorting at least two items with sorting conflict on the maximum coordinates in the first direction according to the minimum coordinates in the first direction of the at least two items and/or sorting according to a geometric information sorting rule so as to obtain a first sorting result; or alternatively, the first and second heat exchangers may be,
and sequencing all the items preferentially according to the minimum coordinates in the first direction, sequencing at least two items with sequencing conflict on the minimum coordinates in the first direction according to the maximum coordinates in the first direction of the at least two items and/or sequencing according to a geometric information sequencing rule so as to obtain a first sequencing result.
6. A method of spatial relationship management according to claim 1 or 3, wherein the step of obtaining all the entries corresponding to the chip package structure, inserting the entries into the tree structure-based nodes according to the spatial structure information corresponding to the entries, comprises:
after detecting that an entry to be inserted is inserted, determining that the node of the tree structure with overflow is an overflow node when the node of the tree structure with overflow appears in insertion overflow;
reinsertion operation or node splitting operation is carried out according to the overflow insertion rule and the object under the overflow node;
wherein the object comprises an entry or node.
7. The spatial relationship management method according to claim 6, wherein the reinsertion operation is performed according to an overflow insertion rule and an object under an overflow node, comprising:
when the depth of the tree structure where the overflow node is located overflows for the first time, determining a reject object under the overflow node;
sorting the removed objects according to a preset sorting rule, and reinserting the removed objects into nodes of a tree structure according to space structure information corresponding to the removed objects in sequence;
wherein the reject object comprises a reject entry or a reject node.
8. The spatial relationship management method according to claim 7, wherein determining the culling object under the overflow node comprises:
Ordering all objects under the overflow node according to a preset ordering rule to obtain a second ordering result;
taking the object with the rejection attribute meeting the rejection condition as the rejection object based on the second sorting result;
the rejecting attribute comprises an object type, a node space utilization rate after rejecting the object and/or a node rejecting number.
9. The spatial relationship management method according to claim 8, wherein the case where the rejection attribute satisfies a rejection condition includes:
the object type is an orphan entry or orphan node; and/or the number of the groups of groups,
the node space utilization rate after eliminating the eliminating object is increased or unchanged compared with the node space utilization rate before eliminating; and/or the number of the groups of groups,
the node eliminating quantity after eliminating the eliminating objects does not reach the preset quantity.
10. The method of claim 6, wherein the step of performing a node splitting operation according to the overflow insertion rule and the object under the overflow node comprises:
when non-first overflow occurs in the depth of the tree structure where the overflow node is located, all objects under the overflow node are ordered according to a preset ordering rule, and the overflow node is split into at least two new nodes according to an ordering result.
11. The spatial relationship management method according to claim 10, wherein the step of sorting all objects under the overflow node according to a preset sorting rule when non-first overflow occurs at the depth of the tree structure where the overflow node is located, and splitting the overflow node into at least two new nodes according to the sorting result comprises:
ordering all objects under the overflow node according to a preset ordering rule to obtain a third ordering result;
acquiring at least one split combination based on the third sorting result, wherein each split combination comprises at least two quasi-split nodes, and the spatial positions of objects under each quasi-split node are adjacent in sequence;
acquiring node volume allowance of all split combinations;
and taking the splitting combination with the smallest node volume allowance as a target splitting combination to split so as to obtain at least two new nodes.
12. The spatial relationship management method according to claim 10, wherein, when non-first overflow occurs in the depth of the tree structure where the overflow node is located, all objects under the overflow node are ordered according to a preset ordering rule, and after the step of splitting the overflow node into at least two new nodes according to the ordering result, the method comprises:
When the first overflow occurs in the depth of the tree structure of the upper node of the overflow node, the upper node is used as a new overflow node, and reinsertion operation is carried out according to the overflow insertion rule and the object under the overflow node.
13. An electronic device, the electronic device comprising: a memory, a processor, wherein the memory has stored thereon a computer program which, when executed by the processor, implements the spatial relationship management method of a chip package structure as claimed in any one of claims 1 to 12.
14. A readable storage medium, characterized in that the readable storage medium has stored thereon a computer program which, when executed by a processor, implements the spatial relationship management method of a chip package structure according to any one of claims 1 to 12.
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Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6484172B1 (en) * 1999-12-24 2002-11-19 Electronics And Telecommunications Research Institute Concurrency control method for high-dimensional index structure using latch and lock
US20050015378A1 (en) * 2001-06-05 2005-01-20 Berndt Gammel Device and method for determining a physical address from a virtual address, using a hierarchical mapping rule comprising compressed nodes
US20090182837A1 (en) * 2008-01-11 2009-07-16 Rogers J Andrew Spatial Sieve Tree
CN104412266A (en) * 2012-06-29 2015-03-11 诺基亚公司 Method and apparatus for multidimensional data storage and file system with a dynamic ordered tree structure
CN104426770A (en) * 2013-09-09 2015-03-18 中兴通讯股份有限公司 Routing lookup method, routing lookup device and method for constructing B-Tree tree structure
CN106095907A (en) * 2016-06-08 2016-11-09 江西理工大学 Based on the laser point cloud data management method that Octree is integrated with three-dimensional R star tree
CN108052514A (en) * 2017-10-12 2018-05-18 南京航空航天大学 A kind of blending space Indexing Mechanism for handling geographical text Skyline inquiries
CN108134739A (en) * 2016-12-01 2018-06-08 深圳市中兴微电子技术有限公司 A kind of method for searching route and device based on index trie
CN110347980A (en) * 2019-07-08 2019-10-18 北京英贝思科技有限公司 A kind of tree structure automatic generation method, plug-in unit, electronic equipment and computer readable storage medium based on Unity3D
CN112989732A (en) * 2020-12-30 2021-06-18 北京迪浩永辉技术有限公司 Packaging design manufacturability analysis method, system, medium, equipment and application
US20210255793A1 (en) * 2020-02-13 2021-08-19 Samsung Electronics Co., Ltd. System and method for managing conversion of low-locality data into high-locality data
CN114330180A (en) * 2021-12-30 2022-04-12 广东芯聚能半导体有限公司 Chip packaging method and device, computer equipment and storage medium
US20230215091A1 (en) * 2021-09-25 2023-07-06 Intel Corporation Apparatus and method for tree structure data reduction
CN116522844A (en) * 2023-07-04 2023-08-01 杭州行芯科技有限公司 Circuit dividing method, circuit node voltage calculating method, terminal and storage medium
CN117034051A (en) * 2023-07-27 2023-11-10 广东省水利水电科学研究院 Water conservancy information aggregation method, device and medium based on BIRCH algorithm
CN117236236A (en) * 2023-11-10 2023-12-15 杭州行芯科技有限公司 Chip design data management method and device, electronic equipment and storage medium

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6484172B1 (en) * 1999-12-24 2002-11-19 Electronics And Telecommunications Research Institute Concurrency control method for high-dimensional index structure using latch and lock
US20050015378A1 (en) * 2001-06-05 2005-01-20 Berndt Gammel Device and method for determining a physical address from a virtual address, using a hierarchical mapping rule comprising compressed nodes
US20090182837A1 (en) * 2008-01-11 2009-07-16 Rogers J Andrew Spatial Sieve Tree
CN104412266A (en) * 2012-06-29 2015-03-11 诺基亚公司 Method and apparatus for multidimensional data storage and file system with a dynamic ordered tree structure
CN104426770A (en) * 2013-09-09 2015-03-18 中兴通讯股份有限公司 Routing lookup method, routing lookup device and method for constructing B-Tree tree structure
CN106095907A (en) * 2016-06-08 2016-11-09 江西理工大学 Based on the laser point cloud data management method that Octree is integrated with three-dimensional R star tree
CN108134739A (en) * 2016-12-01 2018-06-08 深圳市中兴微电子技术有限公司 A kind of method for searching route and device based on index trie
CN108052514A (en) * 2017-10-12 2018-05-18 南京航空航天大学 A kind of blending space Indexing Mechanism for handling geographical text Skyline inquiries
CN110347980A (en) * 2019-07-08 2019-10-18 北京英贝思科技有限公司 A kind of tree structure automatic generation method, plug-in unit, electronic equipment and computer readable storage medium based on Unity3D
US20210255793A1 (en) * 2020-02-13 2021-08-19 Samsung Electronics Co., Ltd. System and method for managing conversion of low-locality data into high-locality data
CN112989732A (en) * 2020-12-30 2021-06-18 北京迪浩永辉技术有限公司 Packaging design manufacturability analysis method, system, medium, equipment and application
US20230215091A1 (en) * 2021-09-25 2023-07-06 Intel Corporation Apparatus and method for tree structure data reduction
CN114330180A (en) * 2021-12-30 2022-04-12 广东芯聚能半导体有限公司 Chip packaging method and device, computer equipment and storage medium
CN116522844A (en) * 2023-07-04 2023-08-01 杭州行芯科技有限公司 Circuit dividing method, circuit node voltage calculating method, terminal and storage medium
CN117034051A (en) * 2023-07-27 2023-11-10 广东省水利水电科学研究院 Water conservancy information aggregation method, device and medium based on BIRCH algorithm
CN117236236A (en) * 2023-11-10 2023-12-15 杭州行芯科技有限公司 Chip design data management method and device, electronic equipment and storage medium

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
LIJUAN LUO, ET AL.: "Parallel Implementation of R-trees on the GPU", 《IEEE》, 9 March 2012 (2012-03-09) *
SUSHIL K. PRASAD, ET AL.: "GPU-based Parallel R-tree Construction and Querying", 《IEEE》, 1 October 2015 (2015-10-01) *
许卓群 等著: "《GIS在区域生态环境信息系统研究中的应用》", 31 July 2004, 中国环境科学出版社, pages: 436 - 437 *
陈力颖 等: "基于55nm工艺的MCU低功耗物理设计", 《天津工业大学学报》, 30 June 2021 (2021-06-30) *

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