CN117492692A - Floating point computing method and in-memory computing architecture - Google Patents

Abstract

The application relates to a floating point computing method and an in-memory computing architecture. The method comprises the following steps: acquiring a first product characterization quantity of the weight data and the activation data; performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain; and performing approximate calculation processing on the second product characterization quantity to obtain an operation result. The method converts the original multiplication calculation into the addition calculation of the logarithmic domain, can enable the excitation data and the weight data to execute the calculation in a bit parallel mode, and does not split the data in a bit mode in the related technology, thereby greatly improving the calculation rate of the memory when complex floating point data are processed.

Description

Floating point computing method and in-memory computing architecture

Technical Field

The present disclosure relates to the field of artificial intelligence, and in particular, to a floating point computing method and an in-memory computing architecture.

Background

With the rapid development of artificial intelligence technology, many algorithms of machine learning (e.g., deep neural network algorithm models) are also updated continuously, which have achieved great achievements in face recognition, automatic driving, and Virtual Reality (VR).

Currently, the deep neural network is applied to various intelligent devices, and mainly performs data storage and calculation of the deep neural network through a memory. However, conventional memories are computationally inefficient in handling floating point operations.

Disclosure of Invention

Accordingly, it is desirable to provide a floating point computing method and an in-memory computing architecture that can improve the computing efficiency in order to solve the above-mentioned problems.

In a first aspect, the present application provides a floating point computing method, including:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

In one embodiment, the first product attribute includes a first mantissa term and an exponent term; performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain, wherein the logarithmic domain comprises the following steps:

performing logarithmic conversion on a first mantissa term in the first product characterization quantity to obtain a second mantissa term of a logarithmic domain;

and determining a second product characterization quantity according to the second mantissa term and the exponent term.

In one embodiment, the performing the approximate calculation on the second product representation amount to obtain an operation result includes:

performing log domain approximation processing on a second mantissa term in the second product characterization quantity to obtain a third mantissa term;

processing the third mantissa item according to a preset approximate function to obtain a fourth mantissa item;

and determining an operation result according to the fourth mantissa term and the exponent term.

In one embodiment, the approximation function includes a first approximation function and a second approximation function, and the processing the third mantissa term according to a preset approximation function to obtain a fourth mantissa term includes:

determining a sum of exponents in the third mantissa term;

under the condition that the sum value is in a first interval range, performing approximation processing on the sum value by using a first approximation function to obtain a fourth mantissa item; the first approximation function includes that the x-square of 2 is equal to the product of 2 and x, x being the sum of exponents in the third mantissa term;

under the condition that the sum value is in a second interval range, performing approximation processing on the sum value by using a second approximation function to obtain a fourth mantissa item; the second approximation function includes that the x-square of 2 is equal to the sum of 1 and x, x being the sum of exponents in the third mantissa term.

In one embodiment, determining the operation result according to the fourth mantissa term and the exponent term includes:

calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products;

performing shifting operation on the partial products to obtain a plurality of shifted partial products;

and carrying out summation operation on the partial products after the shifting to obtain an operation result.

In one embodiment, the method further comprises:

splitting original weight data and original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts;

for each portion of the weight data and the activation data, a first product characterization quantity is performed that obtains the weight data and the activation data.

In a second aspect, the present application also provides a unified architecture that includes a storage array; the storage array comprises a plurality of storage units and an addition tree with preset input;

a storage unit for storing weight data, or storing activation data;

an adder tree for performing the floating point calculation method of the first aspect.

In one embodiment, the memory unit includes a memory circuit, an inverter, and a transmission tube; the input end of the inverter is connected with the output end of the storage circuit, and the output end of the inverter is connected with the input end of the transmission tube;

A storage circuit for storing weight data, or storing activation data;

an inverter for isolating the transfer tube and the memory circuit;

and the transmission tube is used for gating the next memory circuit according to the input excitation signal.

In a third aspect, the present application also provides a floating point computing device, including:

the first characterization quantity acquisition module is used for acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

the second characterization quantity determining module is used for carrying out logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and the operation result determining module is used for performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

In a fourth aspect, the present application also provides a computer device comprising a memory and a processor, the memory storing a computer program, the processor implementing the following steps when executing the computer program:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

In a fifth aspect, the present application also provides a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

In a sixth aspect, the present application also provides a computer program product comprising a computer program which, when executed by a processor, performs the steps of:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

According to the floating point computing method and the in-memory computing architecture, the first product characterization quantity of the weight data and the activation data is obtained, the first product characterization quantity is subjected to logarithmic conversion to obtain the second product characterization quantity of the logarithmic domain, and finally the second product characterization quantity is subjected to approximate computing to obtain an operation result. According to the method and the device for processing the complex floating point data, the original multiplication calculation is converted into the addition calculation of the logarithmic domain, the excitation data and the weight data can be calculated in a bit parallel mode, and the data are not split according to the bit mode in the related technology, so that the calculation rate of a memory when the complex floating point data are processed is greatly improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the embodiments or the related technical descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for a person having ordinary skill in the art.

FIG. 1 is a diagram of an application environment for a floating point computing method in one embodiment;

FIG. 2 is a flow diagram of a floating point computing method in one embodiment;

FIG. 3 is a flow chart of a second product characterization of the logarithmic domain in one embodiment;

FIG. 4 is a flowchart of an embodiment for obtaining an operation result;

FIG. 5 is a flow diagram of a fourth mantissa term in one embodiment;

FIG. 6 is a flow chart of determining an operation result in one embodiment;

FIG. 7 is a flow chart of a method of floating point calculation according to another embodiment;

FIG. 8 is a flow chart of a floating point computing method according to another embodiment;

FIG. 9 is a block diagram of an architecture of a unified architecture in one embodiment;

FIG. 10 is a block diagram of a memory unit in a unified architecture in one embodiment;

FIG. 11 is a block diagram of the overall architecture of a unified architecture in one embodiment;

FIG. 12 is a block diagram of a floating point computing device in one embodiment;

fig. 13 is an internal structural view of a computer device in one embodiment.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.

First, before a technical solution of an embodiment of the present application is specifically described, a description is first given of a technical background on which the embodiment of the present application is based.

With the rapid development of AI (Artificial Intelligence ) and applications, frequent and massive data transfer between central processor and memory circuits via limited bus bandwidth is also recognized as the biggest bottleneck in the current conventional von neumann architecture. The deep neural network is one of the most successful algorithms currently applied to image recognition in the artificial intelligence field, and requires a large number of read-write, multiplication and addition operations on input data and weight data. This also means that a greater number of data transmissions and a greater energy consumption are required. It is noted that under different AI tasks, the energy consumed to read and write data is much greater than the energy to calculate the data. In a deep neural network processor based on a traditional von neumann architecture, whether input data or weight data is needed to be stored in a corresponding memory unit, then the data is sent to a corresponding digital operation unit through a bus to carry out multiplication and addition operation, and finally the operation result is read out. The limited number of memory read interfaces limits the number of MAC (multiply-and-add) operations performed per unit cycle, and further, the overall throughput of the system is greatly affected.

To break this bottleneck in von neumann architecture, CIM (computational-in-Memory) architecture is proposed. By integrating the MAC unit into a memory, such as a Static Random Access Memory (SRAM), the SRAM-CIM architecture is known. The system architecture not only reserves the storage and read-write functions of the storage circuit, but also can support different logic or multiply-add operations, thereby greatly reducing frequent bus interaction between the central processing unit and the storage circuit, further reducing a large amount of data movement and improving the energy consumption efficiency of the system. In the deep neural network processor based on the CIM architecture, the weight data can be directly subjected to MAC operation without being read, and a final multiplication and addition result is directly obtained. The throughput of the system will no longer be limited by the limited memory read interface.

At present, according to different circuit designs of the MAC unit inside the SRAM-CIM, the SRAM-CIM architecture can be divided into two main classes: the first is based on an Analog-to-digital mixed circuit design, called AMS-CIM (Analog-mixed-signal) integrated; the second type is based on an all-digital logic circuit design, called FD-CIM (Full-digital CIM). With the advancement of process nodes, under the advanced wafer-flowing process, chip elements are more susceptible to non-ideal effects (such as process, voltage and temperature), so that the AMS-CIM calculation is error, and the AI task accuracy is affected. In contrast, FD-CIM can almost eliminate many non-ideal effects by using robust digital logic.

In the last two years, industry and academia have focused on FD-CIM chip architecture. Related art an FD-CIM macro unit is disclosed, in which an SRAM memory unit with a 6T structure is used to store 1bit weight data. The FD-CIM contains 256 excitation input signals, 64 MAC output signals, and 256 x 64 4-b weights. It contains 64 columns of sub-units, each sub-unit containing 256 4-b weights, 256 x 4 bit-level multipliers, a parallel addition tree, a section and accumulator, and an SRAM read-write circuit. Each bit-level multiplier is realized by a NOR gate with a 4T structure and is provided with two input interfaces which are respectively connected with a memory cell and an excitation input signal line. To optimize FD-CIM area and power consumption, this work uses full adders interleaved in 28T and 14T structures to form an internal parallel addition tree.

In the computation mode, each stimulus input data is split in bits and fed into the CIM array from high order to low order in a bit-serial manner. For the entire FD-CIM, 256 excitation data are fed simultaneously to the CIM module and MAC computation is done at each CIM subunit, partial sums are generated by the summing tree and accumulated in the partial sum accumulator.

Drawbacks of related art one:

1) FD-CIM introduces a digital addition tree structure with more transistors than AMS-CIM architecture. This work, while optimizing the additive tree circuitry, was found by simulation to still occupy about 73% of the chip area, which greatly reduces the chip area efficiency (computational power per unit area).

2) In the computation mode, each stimulus input data is split in bits and fed into the CIM array from high order to low order in a bit-serial manner. Thus, the computation cycle of the chip increases linearly with the bit width of the stimulus input, i.e. 4 input cycles are required to process the computation of 4-b stimulus data, 8 input cycles are required to process the computation of 8-b stimulus data. However, when dealing with floating point operations required in complex AI tasks in CIM architecture, then higher bit width stimulus inputs need to be handled, e.g. FP16 (half precision floating point number) requires 12 cycles, FP32 (single precision floating point number) requires 25 cycles, which greatly reduces chip performance (operands per unit time).

In order to solve the problem of low area efficiency in the first technology, namely the problem of larger area of the internal addition tree of the FD-CIM. The related art II discloses a chip named DIMC, which adopts an approximate arithmetic unit to reduce the area of an addition tree. Instead of using a 160T structured precision compressor to construct a conventional adder tree, this work designs two approximation compressors, a 96T structured single approximation compressor and a 60T structured double approximation compressor, respectively, thereby greatly reducing the adder tree overhead. In addition, a specially designed full adder of a 12T structure is introduced in the DIMC, and a carry propagation adder is constructed based on the full adder of the 12T structure, so that the area overhead of the full adder in the compressor is further reduced.

Drawbacks of related art two:

the approximate compressors in the DIMC introduce relatively large errors in the calculation, and by counting the root mean square error for them, it can be found that the root mean square error for a single approximate compressor is 4.03% and the root mean square error for a double approximate compressor is 6.76%. These calculation errors can limit, and affect, the accuracy with which they process AI tasks. For example, when a binary convolutional neural network is processed, only 51% of CIFAR-10 recognition accuracy under single approximation and 25% under double approximation can be realized, which is far lower than 90% recognition accuracy under accurate calculation. For practical applications, the DIMC needs to rely on a training algorithm that approximates the perception, tolerating the computational errors of the hardware units by means of the robustness of the neural network. Even if the approximate perception training algorithm is matched, the DIMC can only process a simple AI model to complete a simple AI task, and is insufficient for coping with floating point operations with higher precision in a complex AI model.

Based on this, the application provides a floating point computing method and an in-memory computing architecture, which aim to solve the technical problems.

The floating point calculation method provided by the embodiment of the application can be applied to an application environment shown in fig. 1. The storage array 102 is configured to store the excitation data and the weight data, and transmit the logarithmically converted excitation data and weight data to the addition tree 104 to accumulate the partial products to obtain an operation result. The controller 106 is configured to control the memory array to read and write data according to a clock cycle, and control the adder tree to perform an operation. The controller 106 may be, but not limited to, various personal computers, notebook computers, smart phones, tablet computers, internet of things devices, and portable wearable devices, and the internet of things devices may be smart speakers, smart televisions, smart air conditioners, smart vehicle devices, and the like. The portable wearable device may be a smart watch, smart bracelet, headset, or the like.

In an exemplary embodiment, as shown in fig. 2, a floating point calculation method is provided, and an example of application of the method to the controller in fig. 1 is described, including the following S201 to S203. Wherein:

s201, acquiring a first product characterization quantity of the weight data and the activation data.

The weight data and the activation data are floating point data, and comprise single-precision floating point data, double-precision floating point data, half-precision floating point data and the like. For floating point data, which consists of three parts of a sign term (S), an exponent term (E) and a mantissa term (M), one floating point data W ₀ Can be expressed as formula (1):

W ₀ ＝(-1) ^S0 (1+M) ^W0 ×2 ^E0 (1)

the weight data refers to parameters in the neural network that are used to calculate and estimate the relationship between the input and output samples. The activation data refers to the value processed by the activation function; the activation function refers to a function that runs on neurons of a neural network, typicallyA nonlinear function for mapping the input of the neuron to the output. The activation functions include, but are not limited to, the Tanh (hyperbolic tangent function, hyperbolic tangent) function and the ReLU (Linear rectification function, linear rectification) function. The first product characterization quantity refers to an initial representation form of the product operation of the weight data and the activation data, such as P ₀ ×P ₁ Wherein P is ₀ For weight data, P ₁ Is excitation data.

In the embodiment of the application, the controller firstly maps the weight data to each storage unit in the storage array. And in each clock period, the controller sequentially reads the weight data of each storage unit in the storage array and the activation data corresponding to the weight data.

S202, carrying out logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of the logarithmic domain.

Wherein, logarithmic conversion refers to equivalent conversion of raw data into logarithmic form. The second product characteristic amount refers to an initial representation form in which the logarithmic-converted weight data and the logarithmic-converted activation data are subjected to a product operation, for example,wherein P is ₀ For weight data, P ₁ For motivating data, +.>And the second product characterization quantity.

In this embodiment of the present application, based on the first product attribute obtained in the previous step, the controller may input the first product attribute into the logarithmic conversion function to perform logarithmic equivalent conversion on the sign term, the exponent term, and the mantissa term in the first product attribute, or perform logarithmic equivalent conversion on only the exponent term.

And S203, performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

The operation result is a multiplication and addition result obtained by multiplying and adding the weight data and the activation data.

In this embodiment of the present application, based on the second product characterization value obtained in the previous step, for convenience in calculation, the controller may perform approximate conversion on the second product characterization value, for example, the approximate conversion may be: log (1+P) =p. And then, the controller shifts, accumulates and the like the converted second product characterization quantity in a bit serial form to obtain an operation result.

According to the floating point calculation method, first, the first product characterization quantity of the weight data and the activation data is obtained, then the first product characterization quantity is subjected to logarithmic conversion to obtain the second product characterization quantity of the logarithmic domain, and finally the second product characterization quantity is subjected to approximate calculation to obtain an operation result. According to the method and the device, the original multiplication calculation is converted into the addition calculation of the logarithmic domain, the excitation data and the weight data can be calculated in a bit parallel mode, the data are not split according to the bit mode in the related technology, and the calculation rate of a memory when complex floating point data are processed is greatly improved.

In an exemplary embodiment, as shown in fig. 3, the first product token in the embodiment of the present application includes a first mantissa term and an exponent term; the embodiment of the application relates to a process of performing logarithmic conversion on a first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain, which comprises the following steps S301 to S302. Wherein:

S301, performing logarithmic conversion on a first mantissa term in the first product characterization quantity to obtain a second mantissa term of the logarithmic domain.

Wherein the first mantissa term comprises a mantissa term of the weight data and a mantissa term of the excitation data in the first product token. The second mantissa term refers to a mantissa term obtained by logarithmically converting the first mantissa term.

In this embodiment of the present application, based on the first product characterizing quantity obtained in the foregoing embodiment, the controller performs equivalent logarithmic conversion on the mantissa term including the weight data in the first product characterizing quantity and the mantissa term including the excitation data included in the first product characterizing quantity, to obtain a second mantissa term of the logarithmic domain. For example: the weight data of the floating point type is expressed asThe excitation data is expressed as +.>Then P ₀ The corresponding second mantissa item may be denoted +.>P ₁ The corresponding second mantissa item may be denoted +.>

S302, determining a second product characterization quantity according to the second mantissa term and the exponent term.

In the embodiment of the present application, the second mantissa term is obtained based on the previous step, and the controller performs merging processing on the exponent term of the weight data and the exponent term of the excitation data, and adds the merged exponent term and the second mantissa term to obtain the second product characterization quantity. For example: weight data P ₀ Is of the index ofExcitation data P ₁ The index of->The second product characterization quantity is then equation (2):

wherein P is ₀ ×P ₁ For the first product characterization quantity,the first two-by-two characterization quantities.

According to the embodiment of the application, the mantissa item of the weight data of the floating point type and the mantissa item of the excitation data are subjected to equivalent logarithmic conversion, the multiplication operation of the floating point data in the complex mantissa item is converted into the addition operation on the logarithmic domain, so that the excitation data and the weight data are calculated in a bit parallel mode, the data are not split according to the bit form in the related technology, and the calculation rate of a memory when the complex floating point data are processed is greatly improved.

In an exemplary embodiment, as shown in fig. 4, the embodiment of the present application relates to a process of performing an approximate calculation process on the second product characterization quantity to obtain an operation result, which includes the following S401 to S403. Wherein:

s401, performing log domain approximation processing on the second mantissa item in the second product characterization quantity to obtain a third mantissa item.

In the embodiment of the application, considering that the mantissa item of the weight data and the mantissa item of the excitation data both accord with M E [0,1 ], the following approximate logarithmic domain conversion operation is adopted: log (1+m) =m, when M e [0, 1), therefore, the log domain approximation of the second mantissa term in the second product token can be expressed as formula (3):

Wherein M is ₁ As mantissa term of weight data, M ₀ In order to excite the mantissa items of the data,is the third mantissa term.

S402, processing the third mantissa item according to a preset approximation function to obtain a fourth mantissa item.

Wherein the approximation function refers to a function established based on the mantissa term of the weight data and the mantissa term of the excitation data.

In the embodiment of the present application, consider E ₀ And E is ₁ The exponential term data is in integer format, thereforeCan be realized in hardware by a shift operation, and M ₀ And M is as follows ₁ The exponential term data is in decimal format and cannot be moved simplyBit manipulation implementation. Therefore, the embodiment of the application needs to calculate the third mantissa term by means of the approximation of the exponent for processing, so as to obtain the fourth mantissa term. Wherein the approximation process may convert the third mantissa term into other functional forms.

S403, determining an operation result according to the fourth mantissa term and the exponent term.

Wherein the index term is an index term comprising weight data and an index term of excitation data.

In this embodiment of the present application, based on the fourth mantissa term obtained in the above step, the controller performs merging and adding on the fourth mantissa term, the exponent term of the weight data, and the exponent term of the excitation data, and performs operations such as shifting during the adding process, so as to finally obtain an operation result.

In the embodiment of the application, considering M epsilon [0,1 ], the approximate logarithmic domain transformation operation is adopted to perform approximate calculation processing on the second product characterization quantity, so that the complexity of operation is greatly simplified.

In an exemplary embodiment, as shown in fig. 5, the approximation function in the embodiment of the present application includes a first approximation function and a second approximation function, and the embodiment of the present application relates to a process of processing the third mantissa term according to a preset approximation function to obtain the fourth mantissa term, which includes the following steps S501 to S503. Wherein:

s501, determining the sum value of exponents in the third mantissa item.

Wherein the sum of exponents in the third mantissa term is converted into the sum of mantissa terms of the logarithmic domain.

In the embodiment of the present application, the combination term obtained by performing the approximation processing on the exponent term of the exponent sum weight data and the exponent term of the excitation data in the third mantissa term may be expressed as

Since M ε [0,1 ], for M ₀ +M ₁ When the sum is within a first interval, x e 1,2, the first approximation function can be expressed as equation (4):

2 ^x ＝2x，x∈[1，2)(4)

wherein x is M ₀ +M ₁ 。

When the sum is in the second interval range, x e 0,1, the second approximation function can be expressed as equation (5):

2 ^x ＝x+1，x∈[0，1)(5)

wherein x is M ₀ +M ₁ 。

In the embodiment of the present application, in the case where the sum value is in the first interval range, S502 is executed: performing approximation processing by using the sum value of the first approximation function to obtain a fourth mantissa item; the first approximation function includes that the x-square of 2 is equal to the product of 2 and x, x being the sum of exponents in the third mantissa term.

In the case where the sum value is in the second section range, S503 is executed: performing approximation processing on the sum value by using a second approximation function to obtain a fourth mantissa term; the second approximation function includes that the x-square of 2 is equal to the sum of 1 and x, x being the sum of exponents in the third mantissa term.

Exemplary, if M ₀ 0.00001 and M ₁ 0.00001, M is found ₀ +M ₁ E [0, 1), thus M needs to be ₀ And M ₁ Substituting the second approximation function into the formula to obtain a fourth mantissa term of 2 (M ₀ +M ₁ )＝0.00004.

In the embodiment of the application, considering the value range of the sum of the mantissa term of the weight data and the mantissa term of the excitation data, according to the approximate function of the sum of the exponents in the third mantissa term on the sum of the exponents in the third mantissa term, the data of the exponent term is converted into the form of adding or multiplying the constant and the decimal form, the operation process is greatly simplified, and the sum of the first approximate function can be shifted.

In an exemplary embodiment, as shown in fig. 6, the embodiment of the present application relates to a process of determining an operation result according to a fourth mantissa term and an exponent term, including the following S601 to S603. Wherein:

s601, calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products.

Embodiments of the present applicationIn the fourth mantissa term is 2 (M ₀ +M ₁ ) In the case of (2) and M ₀ +M ₁ And performing multiplication operation to obtain a plurality of partial products.

S602, performing shift operation on the partial products to obtain a plurality of shifted partial products.

In this embodiment of the present application, the controller may send the partial products obtained in the above steps to the shifter to shift the partial products correspondingly, so as to obtain a plurality of shifted partial products.

S603, summing the partial products after the shifting to obtain an operation result.

In the embodiment of the present application, based on the previous step, a plurality of shifted partial products are obtained, and the plurality of shifted partial products are aligned and added to obtain an operation result.

In the embodiment of the application, the shifter is used for carrying out shift processing on the plurality of partial products, and the plurality of partial products can be aligned, so that the shifted partial products are added and summed to obtain an operation result.

In an exemplary embodiment, as shown in fig. 7, the method of the embodiment of the present application further includes the following S701 to S702. Wherein:

s701, splitting the original weight data and the original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts.

In this embodiment of the present application, for each clock cycle, the controller may acquire the original weight data and the original activation data, and split the original weight data and the original activation data according to a set bit value, for example, each 24-b original weight data and the original activation data are divided into 6 parts, to obtain a plurality of weight data of 4-b parts and activation data of the 4-b parts.

S702, for weight data and activation data of each part, a step of acquiring a first product characterization quantity of the weight data and the activation data is performed.

In the embodiment of the present application, based on the weight data and the activation data of each portion obtained in the above step, the step of S201 is performed, and the first product characteristic quantity of the weight data and the activation data is obtained.

According to the embodiment of the application, the original set of original weight data and original activation data are divided into the weight data and the activation data of each part, and one original period is converted into a plurality of periods, so that the input of the addition tree is reduced, the time-division multiplexing addition tree is used, and the area occupation ratio of the addition tree in the whole architecture can be reduced.

In an exemplary embodiment, as shown in fig. 8, the method of the embodiment of the present application further includes the following S801 to S804. Wherein:

s801, splitting original weight data and original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts;

s802, acquiring a first product characterization quantity of the weight data and the activation data for the weight data and the activation data of each part; performing logarithmic conversion on a first mantissa term in the first product characterization quantity to obtain a second mantissa term of a logarithmic domain; determining a second product characterization quantity according to the second mantissa term and the exponent term; performing log domain approximation processing on a second mantissa term in the second product characterization quantity to obtain a third mantissa term;

s803, determining the sum of exponents in the third mantissa item; under the condition that the sum value is in a first interval range, performing approximation processing on the sum value by using a first approximation function to obtain a fourth mantissa item; under the condition that the sum value is in a second interval range, performing approximation processing on the sum value by using a second approximation function to obtain a fourth mantissa item;

s804, calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products; performing shifting operation on the partial products to obtain a plurality of shifted partial products; and carrying out summation operation on the partial products after the shifting to obtain an operation result.

In the embodiment of the application, the original multiplication calculation is converted into the addition calculation of the logarithmic domain, so that the excitation data and the weight data can be calculated in a bit parallel mode, the data is not split according to the bit mode in the related technology, the equivalent logarithmic conversion is carried out on the mantissa item of the weight data of the floating point type and the mantissa item of the excitation data, the multiplication operation of the floating point data in the complex mantissa item is converted into the addition operation on the logarithmic domain, the calculation is carried out according to the bit parallel mode on the excitation data and the weight data, and the data is not split according to the bit mode in the related technology, so that the calculation rate of a memory when the complex floating point data is processed is greatly improved. Further, considering M epsilon [0,1 ], approximate logarithmic domain transformation operation is adopted to perform approximate calculation processing on the second product characterization quantity, and the complexity of operation is greatly simplified. In addition, the embodiment of the application also considers the value range of the sum of the mantissa item of the weight data and the mantissa item of the excitation data, and according to the approximate function of the sum of the exponents in the third mantissa item on the sum of the exponents in the third mantissa item, the data of the exponents are converted into the form of adding or multiplying the constants and the fractions in the decimal format, so that the operation process is greatly simplified, and the sum of the first approximate function can be shifted. Further, in the embodiment of the application, the original set of original weight data and original activation data are divided into the weight data and the activation data of each part, and one original period is converted into a plurality of periods, so that the input of the addition tree is reduced, the time-division multiplexing addition tree is reduced, and the area occupation ratio of the addition tree in the whole architecture can be reduced.

In an exemplary embodiment, as shown in fig. 9, a unified architecture LogDCIM is provided, which comprises a memory array 91, a shifter 92, and an addition tree 93 of preset inputs. Wherein the memory array includes a plurality of memory cells 910. Specifically, the LogDCIM contains 8 sub-arrays, each consisting of 128 x 24 9T-structured memory cells 910, matching one 256 x 4-b input adder tree 93. The excitation data input of 24-b is divided into 6 sub-blocks of 4-b.

Wherein, the storage unit 910 is configured to store weight data, or store activation data. The adder tree 93 is configured to perform the floating point calculation method described above: the addition tree 93 acquires the weight data and the activation data stored in the storage unit and generates a first product characterization quantity, then logarithmically converts the first product characterization quantity to obtain a second product characterization quantity in the logarithmic domain, and finally approximates the second product characterization quantity to obtain an operation result.

According to the integrated architecture for storage and calculation, the addition tree with preset input is adopted, so that the input of the addition tree is reduced, the time-sharing multiplexing addition tree is used, and the area occupation ratio of the addition tree in the integrated architecture can be reduced.

In an exemplary embodiment, as shown in fig. 10, the memory unit 910 in the embodiment of the present application includes a memory circuit 9101, an inverter 9102, and a transfer pipe 9103. An input terminal of the inverter 9102 is connected to an output terminal of the memory circuit 9101, and an output terminal of the inverter 9102 is connected to an input terminal of the transmission pipe 9103.

The storage circuit 9101 is configured to store weight data, or store activation data.

In this embodiment, the storage circuit 9101 is a conventional 6T structure, that is, includes 6 transistors, and can store weight data or store activation data.

The inverter 9102 includes 2 transistors with opposite input levels connected to each other for isolating the transfer tube 9103 from the memory circuit 9101.

In this embodiment of the present application, an inverter is added to the output end of a conventional 6T-structured memory circuit to avoid the transistor in the memory circuit from being turned over by mistake due to the transient discharge of the transmission tube during the turn-on.

A transfer tube 9103 for gating the next memory circuit 9101 according to an input excitation signal.

In the embodiment of the application, the input end of the transmission tube is connected with the output end of the storage circuit, and the corresponding storage unit is gated by the 6-b single thermal code RL.

As shown in fig. 11, on the basis of the storage unit 910, an overall architecture LogDCIM is further constructed. The LogDCIM mainly consists of a Memory array (Memory Cell), an addition Tree (add Tree), a Write Driver (Write Driver), a Precharge (Precharge), and a controller (Control). The memory and calculation integrated architecture LogDCIM has two modes, namely SRAM and CIM. In the SRAM mode, the precharge module charges Bit-lines of the CIM array at a clock high level and the write driver stores data into the corresponding memory cells at a clock low level. In CIM mode, the weight data of 128X 4-b and the excitation data of 128X 4-b are input into the addition tree at the same time through 6-b single-hot code gating to complete addition calculation.

In this embodiment of the present application, the memory cell further includes a memory circuit, an inverter, and a transmission tube, where the inverter is configured to avoid the transmission tube from being turned over by mistake by a transistor in the memory circuit due to an instant discharge during conduction. The transfer tube is controlled by a 6-b read thermal code RL for gating the corresponding memory cell.

It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.

Based on the same inventive concept, the embodiment of the application also provides a floating point computing device for realizing the above-mentioned floating point computing method. The implementation of the solution provided by the apparatus is similar to the implementation described in the above method, so the specific limitation in the embodiments of the floating point computing apparatus provided below may be referred to the limitation of the floating point computing method hereinabove, and will not be repeated here.

In one exemplary embodiment, as shown in FIG. 12, there is provided a floating point computing device 1000 comprising:

a first characterizing quantity obtaining module 1001, configured to obtain a first product characterizing quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

the second token determining module 1002 performs logarithmic conversion on the first product token to obtain a second product token in a logarithmic domain;

the operation result determining module 1003 is configured to perform an approximate calculation process on the second product characterization quantity, to obtain an operation result.

In one embodiment, the second characterization amount determining module 1002 includes:

the second mantissa item determining unit is used for carrying out logarithmic conversion on the first mantissa item in the first product characterization quantity to obtain a second mantissa item of the logarithmic domain;

and the second characterization quantity determining unit is used for determining a second product characterization quantity according to the second mantissa term and the exponent term.

In one embodiment, the operation result determining module 1003 includes:

the third mantissa item determining unit is used for carrying out logarithmic domain approximation processing on the second mantissa item in the second product characterization quantity to obtain a third mantissa item;

a fourth mantissa item determining unit, configured to process the third mantissa item according to a preset approximation function to obtain a fourth mantissa item;

And the operation result determining unit is used for determining an operation result according to the fourth mantissa term and the exponent term.

In one embodiment, the above approximation function includes a first approximation function and a second approximation function, and the fourth mantissa item determination unit includes:

a sum value determination subunit for determining a sum value of exponents in the third mantissa term;

a fourth mantissa term determining subunit, configured to perform approximation processing on the sum value by using a first approximation function when the sum value is in the first interval range, to obtain a fourth mantissa term; the first approximation function includes that the x-square of 2 is equal to the product of 2 and x, x being the sum of exponents in the third mantissa term;

the fourth mantissa item determining subunit is further configured to perform approximation processing on the sum value by using a second approximation function to obtain a fourth mantissa item when the sum value is in the second interval range; the second approximation function includes that the x-square of 2 is equal to the sum of 1 and x, x being the sum of exponents in the third mantissa term.

In one embodiment, the operation result determining unit includes:

the partial product determining subunit is used for calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products;

a shift subunit, configured to perform shift operation on the plurality of partial products, to obtain a plurality of shifted partial products;

And the operation result determining subunit is used for carrying out summation operation on the plurality of shifted partial products to obtain an operation result.

In one embodiment, the apparatus further comprises:

the data determining module is used for splitting original weight data and original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts;

the characterization quantity acquisition module is used for acquiring a first product characterization quantity of the weight data and the activation data for the weight data and the activation data of each part.

The various blocks in the floating point computing device described above may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In an exemplary embodiment, a computer device, which may be a terminal, is provided, and an internal structure thereof may be as shown in fig. 13. The computer device includes a processor, a memory, an input/output interface, a communication interface, a display unit, and an input means. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input/output interface. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The input/output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program, when executed by a processor, implements a floating point calculation method. The display unit of the computer device is used for forming a visual picture, and can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, can also be a key, a track ball or a touch pad arranged on the shell of the computer equipment, and can also be an external keyboard, a touch pad or a mouse and the like.

It will be appreciated by those skilled in the art that the structure shown in fig. 13 is merely a block diagram of a portion of the structure associated with the present application and is not limiting of the computer device to which the present application applies, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.

In one exemplary embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

In one embodiment, the processor when executing the computer program further performs the steps of:

performing logarithmic conversion on a first mantissa term in the first product characterization quantity to obtain a second mantissa term of a logarithmic domain;

and determining a second product characterization quantity according to the second mantissa term and the exponent term.

In one embodiment, the processor when executing the computer program further performs the steps of:

performing log domain approximation processing on a second mantissa term in the second product characterization quantity to obtain a third mantissa term;

processing the third mantissa item according to a preset approximate function to obtain a fourth mantissa item;

and determining an operation result according to the fourth mantissa term and the exponent term.

In one embodiment, the processor when executing the computer program further performs the steps of:

determining a sum of exponents in the third mantissa term;

under the condition that the sum value is in a first interval range, performing approximation processing on the sum value by using a first approximation function to obtain a fourth mantissa item; the first approximation function includes that the x-square of 2 is equal to the product of 2 and x, x being the sum of exponents in the third mantissa term;

under the condition that the sum value is in a second interval range, performing approximation processing on the sum value by using a second approximation function to obtain a fourth mantissa item; the second approximation function includes that the x-square of 2 is equal to the sum of 1 and x, x being the sum of exponents in the third mantissa term.

In one embodiment, the processor when executing the computer program further performs the steps of:

calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products;

Performing shifting operation on the partial products to obtain a plurality of shifted partial products;

and carrying out summation operation on the partial products after the shifting to obtain an operation result.

In one embodiment, the processor when executing the computer program further performs the steps of:

splitting original weight data and original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts;

for each portion of the weight data and the activation data, a first product characterization quantity is performed that obtains the weight data and the activation data.

In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

In one embodiment, the computer program when executed by the processor further performs the steps of:

performing logarithmic conversion on a first mantissa term in the first product characterization quantity to obtain a second mantissa term of a logarithmic domain;

And determining a second product characterization quantity according to the second mantissa term and the exponent term.

In one embodiment, the computer program when executed by the processor further performs the steps of:

performing log domain approximation processing on a second mantissa term in the second product characterization quantity to obtain a third mantissa term;

processing the third mantissa item according to a preset approximate function to obtain a fourth mantissa item;

and determining an operation result according to the fourth mantissa term and the exponent term.

In one embodiment, the computer program when executed by the processor further performs the steps of:

determining a sum of exponents in the third mantissa term;

under the condition that the sum value is in a first interval range, performing approximation processing on the sum value by using a first approximation function to obtain a fourth mantissa item; the first approximation function includes that the x-square of 2 is equal to the product of 2 and x, x being the sum of exponents in the third mantissa term;

under the condition that the sum value is in a second interval range, performing approximation processing on the sum value by using a second approximation function to obtain a fourth mantissa item; the second approximation function includes that the x-square of 2 is equal to the sum of 1 and x, x being the sum of exponents in the third mantissa term.

In one embodiment, the computer program when executed by the processor further performs the steps of:

Calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products;

performing shifting operation on the partial products to obtain a plurality of shifted partial products;

and carrying out summation operation on the partial products after the shifting to obtain an operation result.

In one embodiment, the computer program when executed by the processor further performs the steps of:

splitting original weight data and original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts;

for each portion of the weight data and the activation data, a first product characterization quantity is performed that obtains the weight data and the activation data.

In one embodiment, a computer program product is provided comprising a computer program which, when executed by a processor, performs the steps of:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

In one embodiment, the computer program when executed by the processor further performs the steps of:

Performing logarithmic conversion on a first mantissa term in the first product characterization quantity to obtain a second mantissa term of a logarithmic domain;

and determining a second product characterization quantity according to the second mantissa term and the exponent term.

In one embodiment, the computer program when executed by the processor further performs the steps of:

performing log domain approximation processing on a second mantissa term in the second product characterization quantity to obtain a third mantissa term;

processing the third mantissa item according to a preset approximate function to obtain a fourth mantissa item;

and determining an operation result according to the fourth mantissa term and the exponent term.

In one embodiment, the computer program when executed by the processor further performs the steps of:

determining a sum of exponents in the third mantissa term;

under the condition that the sum value is in a first interval range, performing approximation processing on the sum value by using a first approximation function to obtain a fourth mantissa item; the first approximation function includes that the x-square of 2 is equal to the product of 2 and x, x being the sum of exponents in the third mantissa term;

under the condition that the sum value is in a second interval range, performing approximation processing on the sum value by using a second approximation function to obtain a fourth mantissa item; the second approximation function includes that the x-square of 2 is equal to the sum of 1 and x, x being the sum of exponents in the third mantissa term.

In one embodiment, the computer program when executed by the processor further performs the steps of:

calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products;

performing shifting operation on the partial products to obtain a plurality of shifted partial products;

and carrying out summation operation on the partial products after the shifting to obtain an operation result.

In one embodiment, the computer program when executed by the processor further performs the steps of:

splitting original weight data and original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts;

for each portion of the weight data and the activation data, a first product characterization quantity is performed that obtains the weight data and the activation data.

It should be noted that, the user information (including, but not limited to, user equipment information, user personal information, etc.) and the data (including, but not limited to, data for analysis, stored data, presented data, etc.) referred to in the present application are information and data authorized by the user or sufficiently authorized by each party, and the collection, use, and processing of the related data are required to meet the related regulations.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the various embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magnetic random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (Phase Change Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), and the like. The databases referred to in the various embodiments provided herein may include at least one of relational databases and non-relational databases. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic units, quantum computing-based data processing logic units, etc., without being limited thereto.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.

Claims (10)

1. A method of floating point calculation, the method comprising:

acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

performing logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

2. The method of claim 1, wherein the first product token comprises a first mantissa term and an exponent term; the logarithmic conversion is carried out on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain, and the logarithmic conversion comprises the following steps:

performing logarithmic conversion on a first mantissa term in the first product characterization quantity to obtain a second mantissa term of a logarithmic domain;

and determining the second product characterization quantity according to the second mantissa term and the exponent term.

3. The method of claim 2, wherein the performing the approximate calculation on the second product representation to obtain the operation result includes:

performing log domain approximation processing on the second mantissa item in the second product characterization quantity to obtain a third mantissa item;

processing the third mantissa item according to a preset approximation function to obtain a fourth mantissa item;

and determining the operation result according to the fourth mantissa term and the exponent term.

4. A method according to claim 3, wherein the approximation function comprises a first approximation function and a second approximation function, and the processing the third mantissa term according to the preset approximation function to obtain a fourth mantissa term comprises:

Determining a sum of exponents in the third mantissa term;

when the sum value is in a first interval range, performing approximation processing on the sum value by using the first approximation function to obtain the fourth mantissa term; the first approximation function comprises that the x square of 2 is equal to the product of 2 and x, and x is the sum of exponents in the third mantissa term;

when the sum value is in a second interval range, performing approximation processing on the sum value by using the second approximation function to obtain the fourth mantissa term; the second approximation function includes that the x-square of 2 is equal to the sum of 1 and x, x being the sum of exponents in the third mantissa term.

5. The method of claim 4, wherein said determining the result of the operation from the fourth mantissa term and the exponent term comprises:

calculating according to the fourth mantissa term and the exponent term to obtain a plurality of partial products;

performing shifting operation on the partial products to obtain a plurality of shifted partial products;

and carrying out summation operation on a plurality of shifted partial products to obtain the operation result.

6. The method according to any one of claims 1-5, further comprising:

Splitting original weight data and original activation data respectively to obtain weight data of a plurality of parts and activation data of the plurality of parts;

and executing the step of acquiring the first product characterization quantity of the weight data and the activation data for the weight data and the activation data of each part.

7. A unified architecture, wherein the unified architecture comprises a storage array; the storage array comprises a plurality of storage units and an addition tree with preset input;

the storage unit is used for storing weight data or activating data;

the addition tree is configured to perform the floating point calculation method according to any one of claims 1-6.

8. The architecture of claim 7, wherein the memory cell comprises a memory circuit, an inverter, and a transfer tube; the input end of the inverter is connected with the output end of the storage circuit, and the output end of the inverter is connected with the input end of the transmission tube;

the storage circuit is used for storing the weight data or storing the activation data;

the inverter is used for isolating the transmission tube and the storage circuit;

The transmission tube is used for gating the next storage circuit according to the input excitation signal.

9. A floating point computing device, the device comprising:

the first characterization quantity acquisition module is used for acquiring a first product characterization quantity of the weight data and the activation data; the weight data and the activation data are floating point data;

the second characterization quantity determining module is used for carrying out logarithmic conversion on the first product characterization quantity to obtain a second product characterization quantity of a logarithmic domain;

and the operation result determining module is used for performing approximate calculation processing on the second product characterization quantity to obtain an operation result.

10. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any one of claims 1 to 8 when the computer program is executed.