CN117492503A

CN117492503A - Low-dropout linear voltage regulator, control method, battery management system and electronic equipment

Info

Publication number: CN117492503A
Application number: CN202311492323.2A
Authority: CN
Inventors: 崔秀伶; 金军贵; 吴春红
Original assignee: Haiguang Information Technology Chengdu Co ltd
Current assignee: Haiguang Information Technology Chengdu Co ltd
Priority date: 2023-11-09
Filing date: 2023-11-09
Publication date: 2024-02-02

Abstract

The application provides a low dropout linear voltage regulator, a control method, a battery management system and electronic equipment, and relates to the technical field of electronic circuits. A low dropout linear regulator comprising: the device comprises a switch array, an analog-to-digital conversion circuit, an undershoot detector and a controller, wherein the input end of the analog-to-digital conversion circuit is connected with the output end of the switch array, and the analog-to-digital conversion circuit is configured to convert the output voltage of the switch array into a digital voltage; the first input end of the undershoot detector is connected with the output end of the switch array, and the undershoot detector is configured to detect the undershoot phenomenon of the output voltage of the switch array to obtain a detection result; the first input end of the controller is configured to receive a preset standard voltage, the second input end of the controller is connected with the output end of the analog-to-digital conversion circuit, the third input end of the controller is connected with the output end of the undershoot detector, the fourth input end of the controller is configured to receive a preset compensation voltage, and the output end of the controller is connected with the control end of the switch array.

Description

Low-dropout linear voltage regulator, control method, battery management system and electronic equipment

Technical Field

The application relates to the technical field of electronic circuits, in particular to a low dropout linear voltage regulator, a control method, a battery management system and electronic equipment.

Background

The low dropout linear regulator has the advantages of low voltage operation capability, wide dynamic adjustment range, and the like, and is generally applied to power management in a System On Chip (SOC) at present. However, a voltage undershoot phenomenon occurs in a control circuit of the low dropout linear voltage regulator, so that the voltage finally output by the low dropout linear voltage regulator is unstable, and a circuit powered by the low dropout linear voltage regulator cannot work normally.

Disclosure of Invention

The application provides a low dropout linear voltage regulator, a control method, a battery management system and electronic equipment, which are used for solving the problem that a circuit powered by the low dropout linear voltage regulator cannot work normally because of unstable voltage finally output by the low dropout linear voltage regulator due to the fact that a voltage undershoot phenomenon occurs in a control circuit of the existing low dropout linear voltage regulator.

In a first aspect, the present application provides a low dropout linear regulator comprising: the device comprises a switch array, an analog-to-digital conversion circuit, an undershoot detector and a controller, wherein the input end of the analog-to-digital conversion circuit is connected with the output end of the switch array, and the analog-to-digital conversion circuit is configured to convert the output voltage of the switch array into a digital voltage; the first input end of the undershoot detector is connected with the output end of the switch array, and the undershoot detector is configured to detect an undershoot phenomenon of the output voltage of the switch array to obtain a detection result; the first input end of the controller is configured to receive a preset standard voltage, the second input end of the controller is connected with the output end of the analog-to-digital conversion circuit, the third input end of the controller is connected with the output end of the undershoot detector, the fourth input end of the controller is configured to receive a preset compensation voltage, and the output end of the controller is connected with the control end of the switch array; the controller is configured to generate a first control signal according to the preset standard voltage, the digital voltage and the preset compensation voltage under the condition that the detection result represents that undershoot occurs, wherein the first control signal is used for controlling the number of on switches in the switch array.

In this embodiment of the present application, whether an undershoot phenomenon occurs is detected by the undershoot detector, and under the condition that the detection result represents that the undershoot phenomenon occurs, the controller generates a first control signal according to a preset standard voltage, a digital voltage, a preset compensation voltage, compensates by using the preset compensation voltage, reduces the influence of the undershoot phenomenon on the first control signal, and further improves the stability of the output voltage of the low dropout linear voltage regulator.

With reference to the foregoing technical solution provided in the first aspect, in some possible implementation manners, the controller is built with a first preset parameter and a second preset parameter; the controller is specifically configured to acquire a voltage difference between the preset standard voltage and the digital voltage; obtaining a proportion signal based on the voltage difference and the first preset parameter; and obtaining an integral signal based on the voltage difference, the second preset parameter and the preset compensation voltage, and obtaining the first control signal based on the proportional signal and the integral signal.

In the embodiment of the application, the voltage difference between the preset standard voltage and the digital voltage is an essential feature for generating the first control signal, so that the first control signal fully considers the difference between the preset standard voltage and the digital voltage, and further the first control signal can control the switch array more accurately, so that the voltage output by the switch array is closer to the preset standard voltage, and the stability of the voltage output by the switch array is improved.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the controller is specifically configured to determine a product of the voltage difference and the second preset parameter to obtain a first initial value; and carrying out addition operation based on the first initial value and the preset compensation voltage to obtain the integrated signal.

In the embodiment of the application, the integral signal is obtained by calculating the preset compensation voltage and the first initial value, so that the compensation of the preset compensation voltage on the first control signal is realized, the influence of the undershoot phenomenon on the first control signal is reduced, and the stability of the output voltage of the low-dropout linear voltage regulator is improved.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, the controller is further configured to perform a multiplication operation based on the voltage difference and the second preset parameter to obtain a first initial value, and determine a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value; and carrying out addition operation based on the second initial value and the preset compensation voltage to obtain the integrated signal.

In the embodiment of the application, the third parameter is determined through the first initial value, and then subtraction operation is performed based on the first initial value and the third parameter, so that the variation amplitude of the integral signal can be limited, and the variation amplitude of the voltage output by the switch array is prevented from being overlarge.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, the controller is specifically configured to perform integration processing based on the first initial value to obtain an analog integrated signal; and generating the third parameter based on the corresponding relation between the analog integrated signal and the preset voltage signal and the output voltage, wherein the third parameter is the voltage signal.

In the embodiment of the application, the change trend of the integral signal is predicted by simulating the integral signal, and the change rule of the integral signal is considered, so that the change amplitude of the integral signal can be accurately limited based on the third parameter generated by the simulated integral signal.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the controller is specifically configured to add the proportional signal and the integral signal to obtain an initial output signal; and determining a control signal corresponding to the initial output signal based on the corresponding relation between the initial output signal and a preset voltage signal and the control signal.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, the first preset parameters include a plurality of first preset parameters, the second preset parameters include a plurality of second preset parameters, different first preset parameters correspond to different voltage differences, different second preset parameters correspond to different voltage differences, and the controller is further configured to determine, based on the voltage differences, the first preset parameters corresponding to the voltage differences and the second preset parameters corresponding to the voltage differences.

In the embodiment of the application, by setting a plurality of first preset parameters and a plurality of second preset parameters, different first preset parameters and second preset parameters can be selected according to the voltage difference, so that the finally generated control signal is more accurate, and the accuracy of the control signal output by the controller is improved.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the controller includes: the digital voltage difference circuit comprises a first subtracting unit, a proportional path, an integral path, a compensating circuit and an output unit, wherein a first input end of the first subtracting unit is configured to receive a preset standard voltage, a second input end of the first subtracting unit is connected with an output end of the analog-to-digital conversion circuit, and the first subtracting unit is configured to obtain a voltage difference based on the preset standard voltage and the digital voltage; the first input end of the proportional path is connected with the output end of the first subtracting unit and is further configured to receive a first preset parameter, and the proportional path is configured to obtain the proportional signal based on the voltage difference and the first preset parameter; a first input end of the integration path is connected with an output end of the first subtracting unit, a second input end of the integration path is connected with an output end of the undershoot detector, a third input end of the integration path is configured to receive a second preset parameter, and the integration path is configured to obtain a first initial value based on the voltage difference and the second preset parameter; the first input end of the compensation circuit is connected with the output end of the integration path, the second input end of the compensation circuit is connected with the output end of the undershoot detector, the third input end of the compensation circuit is configured to receive a preset compensation voltage, and the compensation circuit is configured to obtain the integration signal based on the first initial value and the preset compensation voltage under the condition that the undershoot phenomenon occurs in the detection result representation; the first input end of the output unit is connected with the output end of the proportional path, the second input end of the output unit is connected with the output end of the compensation circuit, the output end of the output unit is connected with the control end of the switch array, and the output unit is configured to obtain the first control signal based on the proportional signal and the integral signal.

In this embodiment of the present application, the voltage difference between the preset standard voltage and the digital voltage is an essential feature of generating the first control signal, and the voltage difference is calculated by the first subtracting unit, so that the first control signal fully considers the difference between the preset standard voltage and the digital voltage, and further, the first control signal can more accurately control the switch array, so that the voltage output by the switch array is closer to the preset standard voltage, and the stability of the voltage output by the switch array is improved.

With reference to the foregoing technical solutions of the first aspect, in some possible implementation manners, the integrating path includes: the first input end of the first multiplication unit is connected with the output end of the first subtraction unit, and the first multiplication unit is configured to receive the voltage difference and perform multiplication operation based on the voltage difference and the second preset parameter to obtain a first initial value.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the compensation circuit includes: the first input end of the first adding unit is connected with the output end of the integrating channel, the output end of the selector is connected with the second input end of the first adding unit, the first input end of the selector is configured to receive the preset compensation voltage, the control end of the selector is connected with the undershoot detector, and the selector is configured to select the preset compensation voltage as the input of the second input end of the first adding unit under the condition that the detection result represents the undershoot phenomenon.

With reference to the foregoing technical solutions of the first aspect, in some possible implementation manners, the integrating channel further includes: an anti-saturation integration circuit through which the first multiplication unit is connected with the compensation circuit, the anti-saturation integration circuit being configured to determine a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value; correspondingly, the compensation circuit is specifically configured to obtain the integrated signal based on the second initial value and the preset compensation voltage.

In the embodiment of the application, the anti-saturation integration circuit determines the third parameter by using the first initial value, and then performs subtraction operation based on the first initial value and the third parameter, so that the variation amplitude of the integrated signal can be limited, and the variation amplitude of the voltage output by the switch array is prevented from being overlarge.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the anti-saturation integrating circuit includes: the first input end of the second subtracting unit is connected with the output end of the first multiplying unit, and the output end of the second subtracting unit is connected with the input end of the compensating circuit; the input end of the analog integrating circuit is connected with the output end of the second subtracting unit, and the analog integrating circuit is configured to simulate an integrated signal output by the compensating circuit based on a signal output by the second subtracting unit to obtain an analog integrated signal; the input end of the feedback circuit is connected with the output end of the analog integrating circuit, the output end of the feedback circuit is connected with the second input end of the second subtracting unit, and the feedback circuit is configured to generate the third parameter based on the corresponding relation between the analog integrating signal and the preset voltage signal and the output voltage; the second subtracting unit is configured to obtain a second initial value based on the third parameter and the signal output by the first multiplying unit.

In the embodiment of the application, the analog integration circuit is used for realizing the analog integration signal to predict the change trend of the integration signal, and the change rule of the integration signal is considered, so that the feedback circuit can accurately limit the change amplitude of the integration signal based on the third parameter generated by the analog integration signal.

With reference to the foregoing technical solution provided in the first aspect, in some possible implementation manners, the feedback circuit includes: the input end of the first threshold unit is connected with the output end of the analog integrating circuit, and the first threshold unit is configured to output an output voltage corresponding to a voltage signal to which a received voltage value belongs according to a preset corresponding relation between the voltage signal and the output voltage; the first input end of the third subtracting unit is connected with the output end of the analog integrating circuit, the second input end of the third subtracting unit is connected with the output end of the first threshold unit, the output end of the third subtracting unit is connected with the second input end of the second subtracting unit, and the third subtracting unit is configured to generate the third parameter based on the analog integrating signal output by the analog integrating circuit and the output voltage output by the first threshold unit, and the third parameter is a voltage signal.

With reference to the foregoing technical solution provided in the first aspect, in some possible implementation manners, the analog integrating circuit includes: a second delay unit, a second addition unit configured to delay the received signal by a preset period of time and output the delayed signal; the first input end of the second adding unit is connected with the output end of the second subtracting unit, the second input end of the second adding unit is connected with the output end of the second delaying unit, and the output end of the second adding unit is connected with the input end of the second delaying unit and the input end of the feedback circuit.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the output unit includes: the first input end of the third adding unit is connected with the output end of the proportional path, the second input end of the third adding unit is connected with the output end of the compensating circuit, and the third adding unit is configured to add the proportional signal and the integral signal to obtain an initial output signal; the input end of the second threshold unit is connected with the output end of the third adding unit, and the second threshold unit is configured to determine a control signal corresponding to the initial output signal according to the initial output signal and a corresponding relation between a preset voltage signal and an output voltage.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the controller further includes: the input end of the query unit is connected with the output end of the first subtracting unit, the first output end of the query unit is connected with the proportional path, the second output end of the query unit is connected with the integral path, a plurality of first preset parameters and a plurality of second preset parameters are arranged in the query unit, different first preset parameters correspond to different voltage differences, different second preset parameters correspond to different voltage differences, the query unit is configured to determine the first preset parameters corresponding to the voltage differences and the second preset parameters corresponding to the voltage differences according to the received voltage differences, output the first preset parameters corresponding to the voltage differences to the proportional path, and output the second preset parameters corresponding to the voltage differences to the integral path.

In the embodiment of the application, the plurality of first preset parameters and the plurality of second preset parameters are set in the query unit, so that different first preset parameters and second preset parameters can be selected according to the voltage difference, the finally generated control signal is more accurate, and the accuracy of the control signal output by the controller is improved.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the analog-to-digital conversion circuit includes: a voltage-to-time converter, a time-to-digital converter, an input of the voltage-to-time converter being connected to an output of the switch array, the voltage-to-time converter being configured to convert an output voltage of the switch array to a time signal, wherein the time signal is positively correlated to the output voltage of the switch array; the input of the time-to-digital converter is connected to the output of the voltage-to-time converter, the output of the time-to-digital converter is connected to the second input of the controller, and the time-to-digital converter is configured to convert the time signal to the digital voltage.

In the embodiment of the application, the analog-to-digital conversion circuit comprising the voltage-to-time converter and the time-to-digital converter can quickly convert the output voltage obtained by sampling into the digital voltage, so that the reaction speed of the low dropout linear voltage regulator can be improved.

With reference to the foregoing technical solution provided by the first aspect, in some possible implementation manners, the time-to-digital converter includes: the input end of the ring oscillator is connected with the output end of the voltage-time converter; the sampling circuit is connected with the output end of each stage in the ring oscillator and is configured to sample the output signal of each stage of the ring oscillator to obtain a sampling signal; the counting circuit is connected with the sampling circuit and is configured to count a specified type of signal in the sampling signals to obtain the digital voltage.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, the undershoot detector is specifically configured to compare a preset comparison voltage with an output voltage output by the switch array to obtain a detection result, where the detection result indicates that an undershoot phenomenon occurs when the output voltage is smaller than the preset comparison voltage.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, the low dropout linear regulator further includes: the device comprises a preset voltage adjusting unit, wherein the input end of the preset voltage adjusting unit is connected with the output end of the undershoot detector, the output end of the preset voltage adjusting unit is connected with the first input end of the controller, and the preset voltage adjusting unit is configured to record the times of the undershoot phenomenon represented by the detection result and adjust the voltage value of the preset standard voltage input into the controller according to the times.

In the embodiment of the application, the frequency of occurrence of the undershoot phenomenon is recorded through the preset voltage adjusting unit, so that the voltage value of the preset standard voltage of the input controller is adjusted based on the frequency, the scheme is suitable for the condition that the voltage received by the input end of the switch array is suddenly changed more, and the frequency of occurrence of the undershoot phenomenon can be effectively reduced.

With reference to the foregoing technical solution of the first aspect, in some possible implementation manners, in a case where the detection result indicates that no undershoot phenomenon occurs, the controller is further configured to generate a second control signal according to the preset standard voltage and the digital voltage, where the second control signal is used to control the number of switches that are turned on in the switch array, and the number of switches that are turned on by the second control signal is smaller than the number of switches that are turned on by the first control signal.

In a second aspect, the present application provides a control method of a low dropout linear regulator, which is applied to the controller in the first aspect and/or in combination with any implementation manner of the first aspect, and the method includes: acquiring digital voltage output by the analog-to-digital conversion circuit, and presetting standard voltage, a detection result sent by the undershoot detector and preset compensation voltage; and under the condition that the detection result represents that undershoot occurs, generating a first control signal according to the preset standard voltage, the digital voltage and the preset compensation voltage, wherein the first control signal is used for controlling the quantity of the conducted switches in the switch array.

In a third aspect, the present application provides a battery management system comprising: a battery and the first aspect and/or the low dropout linear regulator described in connection with any of the embodiments of the first aspect.

In a fourth aspect, the present application provides an electronic device, comprising: the battery management system according to the third aspect.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered limiting the scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a block diagram of a low dropout linear regulator according to an embodiment of the present application;

fig. 2 is a circuit block diagram of an analog-to-digital conversion circuit according to an embodiment of the present application;

FIG. 3 is a block diagram of an undershoot detector shown in an embodiment of the present application;

fig. 4 is a circuit configuration diagram of a first controller according to an embodiment of the present application;

FIG. 5 is a circuit block diagram of a second controller according to an embodiment of the present application;

Fig. 6 is a circuit configuration diagram of a third controller according to an embodiment of the present application;

fig. 7 is a schematic flow chart of a low dropout linear regulator control method according to an embodiment of the present disclosure;

fig. 8 is a block diagram illustrating a battery management system according to an embodiment of the present application.

Detailed Description

The terms "first," "second," "third," and the like are used merely for distinguishing between descriptions and not for indicating a sequence number, nor are they to be construed as indicating or implying relative importance.

The technical solutions of the present application will be described in detail below with reference to the accompanying drawings.

Referring to fig. 1, fig. 1 is a block diagram of a low dropout linear regulator according to an embodiment of the present application, where the low dropout linear regulator includes a switch array, an analog-to-digital conversion circuit, an undershoot detector, and a controller.

The switch array includes a plurality of switches (e.g., transistor switches) configured to control the number of switches that are themselves conductive based on the received control signal.

For example, the control signal may be a string of binary signals, and each bit binary signal in the control signal is used to control the on state of one switch in the switch array, and the bit number of the binary signal corresponds to the switches in the whole row of switches one by one, for example, the switch is 64, and then the bit number of the binary signal may be 64 bits. For example, a binary signal "1" may be set to control the switch on and a binary signal "0" may be set to control the switch off. The examples herein are for ease of understanding only and are not intended as limitations of the present application.

For example, the control signal may be a binary signal, and after the control signal is received, the switches are arranged in an array, and according to a corresponding relation between a preset control signal and the number of conducted switches, the number of conducted switches corresponding to the control signal is determined, and the conduction of the corresponding number of switches is controlled. The examples herein are for ease of understanding only and are not intended as limitations of the present application.

The specific implementation and principles of the switch array are well known to those skilled in the art, and are not described herein for brevity.

An input of the analog-to-digital conversion circuit is connected with an output of the switch array, and the analog-to-digital conversion circuit is configured to convert the voltage output by the switch array into a digital signal.

The analog-to-digital conversion circuit may be any circuit having an analog-to-digital conversion function, and the specific circuit configuration of the analog-to-digital conversion circuit is not limited here.

In one embodiment, the analog-to-digital conversion circuit may be a fast response analog-to-digital conversion circuit in order to increase the speed of the circuit response. The analog-to-digital conversion circuit comprises a voltage-to-time converter and a time-to-digital converter.

The input end of the voltage-time converter is connected with the output end of the switch array, and the voltage-time converter is configured to convert the received voltage signal into a time signal, wherein the larger the received voltage value is, the longer the converted time signal is.

The voltage-to-time converter may be a voltage-to-time converter in the related art, and its specific implementation and principle are well known to those skilled in the art, and will not be described herein for brevity.

The input end of the time-to-digital converter is connected with the output end of the voltage-to-time converter, the output end of the time-to-digital converter is connected with the second input end of the controller, and the time-to-digital converter is configured to convert the received time signal into a digital signal, wherein the digital signal converted by the time-to-digital converter represents the voltage of the input voltage-to-time converter.

In one embodiment, the time-to-digital converter may be any circuit that converts a time signal into a digital signal, and the specific circuit configuration of the time-to-digital converter is not limited.

In yet another embodiment, a time-to-digital converter may include a ring oscillator, a sampling circuit, and a counting circuit.

The input end of the ring oscillator is connected with the output end of the voltage-time converter, the sampling circuit is connected with the output end of each stage of the ring oscillator, and the counting circuit is connected with the output end of the sampling circuit.

The ring oscillator comprises a plurality of stages of inverters, and the signal is inverted by the inverters to have time delay, so the longer the time information is, the more inverters are used for inverting the input signal in the ring oscillator, so the effect of converting the analog voltage into the digital signal can be realized by sampling the signal output by each stage of inverters of the ring oscillator and counting the number of the inverters for inverting the input signal to reflect the magnitude of the input voltage.

The specific circuit structure of the ring oscillator is well known to those skilled in the art, and is not described herein for brevity.

The sampling circuit is configured to sample the output of each stage of the ring oscillator to obtain a sampled signal. For example, in the case where the ring oscillator includes N stages (N is an odd number greater than 1), the sampling circuit samples each stage output signal of the ring oscillator at a time, resulting in an N-bit sampling signal. The examples herein are for ease of understanding only and should not be construed as limiting the present application.

The counting circuit is configured to count a specified type of signal in the sampled signal to obtain a digital voltage. The signal of the appointed type is the signal with the same front K (K is a positive integer greater than or equal to 1) bit in the sampling signal. And the k+1-th bit signal is different from the K-th bit signal.

For example, if the sampling signal includes N (N is an odd number greater than or equal to 1) bits, the front K (K is a positive integer greater than or equal to 1 and less than or equal to N) bit signal is a proportional signal (such as a high level signal or a low level signal), the rear J bit signal is an integral signal (such as a low level signal or a high level signal), and the proportional signal and the integral signal are different, n=j+k. A digital signal corresponding to K may be output to represent the magnitude of the input voltage. The examples herein are for ease of understanding only and are not intended as limitations of the present application.

The voltage-time converter, the sampling circuit and the counting circuit are controlled by the same clock signal, so that the accuracy of the analog-digital conversion circuit is ensured.

For the convenience of understanding the above-mentioned analog-to-digital converter, please refer to fig. 2, and the analog-to-digital conversion circuit shown in fig. 2 is only a specific embodiment of the analog-to-digital conversion circuit provided in the present application, and is not meant to be limiting.

As shown in fig. 2, the analog-to-digital conversion circuit includes a voltage-to-time converter and a time-to-digital converter. The time-to-digital converter comprises a ring oscillator, a sampling circuit and a counting circuit.

The input end (port A shown in FIG. 2) of the voltage-time converter is connected with the output end of the switch array, the output end of the voltage-time converter is connected with the input end of the ring oscillator, the sampling circuit is connected with the output end of each stage in the ring oscillator, the input end of the counting circuit is connected with the output end of the sampling circuit, and the output end (port B shown in FIG. 2) of the counting circuit is connected with the second input end of the controller.

The specific implementation and principles of the voltage-to-time converter, the ring oscillator, the sampling circuit and the counting circuit are described in the foregoing, and are not repeated here for brevity.

The first input end of the undershoot detector is connected with the output end of the switch array, and the undershoot detector is configured to detect the undershoot phenomenon of the output voltage output by the switch array, so that a detection result is obtained.

In one embodiment, the undershoot detector is specifically configured to compare a preset comparison voltage with an output voltage output by the switch array to obtain a detection result, where the detection result indicates that an undershoot phenomenon occurs when the output voltage is less than the preset comparison voltage.

In one embodiment, the undershoot detector includes a comparator. The first input end of the comparator is connected with the output end of the switch array, the second input end of the comparator is configured to receive a preset comparison voltage, the output end of the comparator is connected with the third input end of the controller, and the comparator is configured to obtain a detection result based on the preset comparison voltage and the output voltage output by the switch array. Under the condition that the output voltage is smaller than the preset comparison voltage, the detection result represents that undershoot occurs.

The comparator may be any electronic device having a voltage magnitude comparing function, and the specific structure of the comparator is not limited here.

Optionally, the undershoot detector may also include a fault latch. The output of the comparator is connected to the third input of the controller via the fault latch.

The fault latch may be any type of latch, and the fault latch is triggered by a detection result indicating that an undershoot occurs, and latches the detection result indicating that the undershoot occurs, which is output by the comparator, for a preset latch time length when the fault latch detects the detection result indicating that the undershoot occurs. And after the latch time exceeds the preset latch time length, the normal state is recovered.

Optionally, the undershoot detector may further include a digital-to-analog conversion circuit, and the second input terminal of the comparator receives a preset comparison voltage through the digital-to-analog conversion circuit. Therefore, the preset comparison voltage can be a digital signal, so that the stability of the preset comparison voltage is kept, and the accuracy of the output result of the comparator is further ensured.

The digital-to-analog conversion circuit may be any circuit having a function of converting a digital signal into an analog signal, and the specific configuration of the digital-to-analog conversion circuit is not limited here.

Optionally, the undershoot detector may further include a filter through which the second input terminal of the comparator receives the preset comparison voltage. The filter is used for filtering the preset comparison voltage, so that the influence of interference on the comparison result can be effectively reduced, and the accuracy of the final output result is improved.

The filter may be any existing electronic period with a filtering function, and the specific type of the filter is not limited here.

Alternatively, the filter may be an analog filter.

In the case where the output result of the undershoot detector indicates that the undershoot phenomenon occurs, the switch array controls the number of switches that are turned on by itself based on the output result of the undershoot detector. And the controller generates a control signal according to the preset standard voltage, the digital signal and the preset compensation voltage, and the control signal continuously controls the quantity of the on switches in the switch array.

In order to facilitate understanding of the undershoot detector described above, please refer to fig. 3, and the undershoot detector shown in fig. 3 is merely a specific embodiment of the undershoot detector provided in the present application, which is not to be taken as a limitation of the present application.

As shown in fig. 3, the undershoot detector includes a comparator, a fault latch, a digital-to-analog conversion circuit, and a filter.

The input end of the digital-to-analog conversion circuit is configured to receive a preset comparison voltage, and the output end of the digital-to-analog conversion circuit is connected with the input end of the filter. The output of the filter is connected to the second input of the comparator. The first input end (port C shown in FIG. 3) of the comparator is connected with the output end of the switch array, the output end of the comparator is connected with the input end of the fault latch, and the output end (port D shown in FIG. 3) of the fault latch is respectively connected with the third input end of the controller and the control end of the switch array.

The specific implementation and principles of the comparator, the fault latch, the digital-to-analog conversion circuit and the filter are described in the foregoing, and are not described herein for brevity.

The first input end of the controller is configured to receive a preset standard voltage, the second input end of the controller is connected with the output end of the analog-to-digital conversion circuit, the third input end of the controller is connected with the output end of the undershoot detector, the fourth input end of the controller is configured to receive a preset compensation voltage, and the output end of the controller is connected with the control end of the switch array.

In a first embodiment, the controller is configured to generate a first control signal according to a preset standard voltage, a digital voltage and a preset compensation voltage when the detection result indicates that an undershoot phenomenon occurs, where the first control signal is used for controlling the number of switches turned on in the switch array.

In a second embodiment, the controller is further configured to generate a second control signal according to a preset standard voltage and a digital voltage when the detection result indicates that no undershoot phenomenon occurs, where the second control signal is used for controlling the number of switches turned on in the switch array. The number of the switches turned on by the second control signal is smaller than that of the switches turned on by the first control signal. The controller may be an integrated circuit chip with signal processing capability, a general purpose processor including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The control signal can be generated according to the preset standard voltage, the digital signal and the preset compensation voltage, and the control signal is used for controlling the number of the conducted switches in the switch array.

Alternatively, the controller may be a PID (Proportion Integration Differentiation, proportional-integral-derivative controller) controller.

In the first embodiment, a specific implementation manner of the controller is as follows when the detection result indicates that the undershoot phenomenon occurs.

Optionally, the controller is internally provided with a first preset parameter and a second preset parameter; the controller is specifically configured to acquire a voltage difference between a preset standard voltage and a digital voltage; the proportional signal is obtained based on the voltage difference and a first preset parameter; and obtaining an integrated signal based on the voltage difference, the second preset parameter and the preset compensation voltage, and obtaining a first control signal based on the proportional signal and the integrated signal.

The voltage difference between the preset standard voltage and the digital voltage is an essential feature for generating the first control signal, so that the first control signal fully considers the difference between the preset standard voltage and the digital voltage, and further the first control signal can control the switch array more accurately, the voltage output by the switch array is more close to the preset standard voltage, and the stability of the voltage output by the switch array is improved.

Alternatively, in order to achieve the above functions, the controller may include a first subtracting unit, a proportional path, an integrating path, a compensating circuit, and an output unit. It will be appreciated that each of the units described above may be integrated into one or more units, or may be further split into more units. For ease of understanding, the structure of the controller is shown in fig. 4.

The first input end of the first subtracting unit is configured to receive a preset standard voltage, the second input end of the first subtracting unit is connected with the output end of the analog-to-digital conversion circuit, and the first subtracting unit is configured to obtain a voltage difference based on the preset standard voltage and the digital voltage.

The first subtracting unit may be any electronic device provided with a function of calculating a voltage difference between two input voltages, for example, a common subtracting circuit implemented by an adder, etc., and the specific configuration of the first subtracting unit is not limited here.

The first input of the proportional path is connected with the output of the first subtracting unit and is further configured to receive a first preset parameter, and the proportional path is configured to obtain a proportional signal based on the voltage difference and the first preset parameter.

Alternatively, the proportional path may be a software functional module implemented in software.

Alternatively, the proportional path may be implemented by a hardware device, e.g. the proportional path may comprise a second multiplication unit having a first input connected to the output of the first subtraction unit, the second input of the second multiplication unit being configured to accept a first preset parameter, the second multiplication unit being configured to calculate the product of the voltage difference output by the first subtraction unit and the first preset parameter.

The second multiplying unit may be any electronic device that calculates the product of two input voltages, such as a common multiplier, and the specific configuration of the second multiplying unit is not limited here.

The first input end of the integrating channel is connected with the output end of the first subtracting unit, the second input end of the integrating channel is connected with the output end of the undershoot detector, the third input end of the integrating channel is configured to receive the second preset parameter, and the integrating channel is configured to obtain a first initial value based on the voltage difference and the second preset parameter.

Alternatively, the integrating channel may be a software functional module implemented by software.

Optionally, the controller is specifically configured to determine a product of the voltage difference and the second preset parameter to obtain a first initial value; and carrying out addition operation based on the first initial value and a preset compensation voltage to obtain an integrated signal.

In order for the processor to perform the above functions, in one embodiment, the integration path may be implemented by a hardware device, for example, the integration path of the processor includes a first multiplication unit. For ease of understanding, please refer to fig. 4.

The first input end of the first multiplication unit is connected with the output end of the first subtraction unit, and the first multiplication unit is configured to receive the voltage difference and perform multiplication operation based on the voltage difference and a second preset parameter to obtain a first initial value.

The first multiplication unit may be a software functional module implemented by software, or the first multiplication unit may be any electronic device that is provided with a function of calculating the product of two input voltages, such as a common multiplier, and the specific configuration of the first multiplication unit is not limited here.

The first input end of the compensation circuit is connected with the output end of the integration path, the second input end of the compensation circuit is connected with the output end of the undershoot detector, the third input end of the compensation circuit is configured to receive a preset compensation voltage, the output end of the compensation circuit is connected with the second input end of the output unit, and the compensation circuit is configured to obtain an integration signal based on a first initial value and the preset compensation voltage under the condition that the undershoot phenomenon occurs in the representation of a detection result.

Alternatively, the compensation circuit may be a software functional module implemented by software.

Alternatively, the compensation circuit may be implemented by a hardware device, for example, an embodiment of the compensation circuit may include a first adding unit and a selector.

The first input of the first adding unit is connected with the output of the first multiplying unit.

The first adding unit may be any electronic device provided with a function of calculating the sum of two input signals, such as a common adder or the like, and the specific configuration of the first adding unit is not limited here.

The output end of the selector is connected with the second input end of the first addition unit, the first input end of the selector is configured to receive a preset compensation voltage, the control end of the selector is connected with the undershoot detector, and the selector is configured to select the preset compensation voltage as the input of the second input end of the first addition unit under the condition that the detection result represents the undershoot phenomenon.

The selector may be any electronic device provided with a selection of one input signal output, such as a multiplexer, etc., and the specific configuration of the selector is not limited here.

In order to control the variation amplitude of the voltage output by the switch array, in one embodiment, the specific manner of calculating the integral signal by the controller may also be: multiplying based on the voltage difference and a second preset parameter to obtain a first initial value, and determining a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value; and performing addition operation based on the second initial value and a preset compensation voltage to obtain an integrated signal.

The third parameter is determined through the first initial value, and subtraction operation is further carried out based on the first initial value and the third parameter, so that the variation amplitude of the integral signal can be limited, and the variation amplitude of the voltage output by the switch array is prevented from being overlarge.

Accordingly, to achieve the above-described functionality of the controller, the integrating path of the controller may also include an anti-saturation integrating circuit.

The first multiplication unit of the integration path is connected with the compensation circuit through an anti-saturation integration circuit, and the anti-saturation integration circuit is configured to determine a third parameter based on the first initial value; and performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value.

Accordingly, the compensation circuit is specifically configured to obtain the integrated signal based on the second initial value and a preset compensation voltage.

In one embodiment, the controller is specifically configured to perform integration processing based on a first initial value to obtain an analog integrated signal; and then generating a third parameter based on the corresponding relation between the analog integrated signal and the preset voltage signal and the output voltage, wherein the third parameter is the voltage signal.

In order to facilitate understanding of the specific working principle of the first threshold unit, an embodiment of the correspondence between the preset voltage signal and the output voltage in the first threshold unit is shown in table 1.

TABLE 1

V_ref

<0.6

0.6～0.7

0.7～0.8

0.8～0.9

0.9～1.0

1.0～1.1

>1.1

SatInc_MAX

MAX0

MAX1

MAX2

MAX3

MAX4

MAX5

MAX6

SatInc_MIN

MIN0

MIN1

MIN2

MIN3

MIN4

MIN5

MIN6

As shown in table 1, when the input voltage received by the threshold unit is greater than MIN0 and less than MAX0, the voltage output by the threshold unit is less than 0.6V; similarly, when the input voltage received by the threshold unit is greater than MIN1 and less than MAX1, the voltage output by the threshold unit is greater than 0.6V and less than 0.7V.

Wherein there is no intersection between the different voltage signals, i.e. one input voltage received by the first threshold unit, and there is only one corresponding output voltage.

Alternatively, the anti-saturation integration circuit may be a software functional module implemented in software.

Accordingly, in order to implement the functions of the controller, the anti-saturation integration circuit may be implemented by a hardware device, for example, the anti-saturation integration circuit may include a second subtracting unit, an analog integration circuit, and a feedback circuit. For ease of understanding, please refer to fig. 5.

The first input end of the second subtracting unit is connected with the output end of the first multiplying unit, and the output end of the second subtracting unit is connected with the input end of the compensating circuit. And a second subtracting unit configured to obtain a second initial value based on the third parameter and the signal output by the first multiplying unit.

The second subtracting unit may be any electronic device that calculates a voltage difference between two input voltages, for example, a common subtracting circuit implemented by an adder, and the specific configuration of the second subtracting unit is not limited here.

The input end of the analog integrating circuit is connected with the output end of the second subtracting unit, and the analog integrating circuit is configured to simulate the integrated signal output by the integrating circuit based on the signal output by the second subtracting unit to obtain an analog integrated signal.

Alternatively, the analog integrating circuit may be a software functional module implemented by software.

Alternatively, the analog integrating circuit may be implemented by a hardware device, for example, the analog integrating circuit may include a second delay unit and a second adding unit.

The second delay unit is configured to delay the received signal by a preset period of time to output.

The second delay unit may be any electronic device capable of delaying a signal, such as a latch, an RC delay circuit, etc., and the specific circuit configuration of the second delay unit is not limited herein.

The first input end of the second adding unit is connected with the output end of the second subtracting unit, the second input end of the second adding unit is connected with the output end of the second delay unit, and the output end of the second adding unit is connected with the input end of the second delay unit and the input end of the feedback circuit.

The second adding unit may be any electronic device provided with a function of calculating the sum of two input signals, such as a common adder or the like, and the specific configuration of the second adding unit is not limited here.

The input end of the feedback circuit of the anti-saturation integration circuit is connected with the output end of the analog integration circuit, the output end of the feedback circuit is connected with the second input end of the second subtraction unit, and the feedback circuit is configured to generate a third parameter based on the corresponding relation between the analog integration signal and the preset voltage signal and the output voltage.

Alternatively, the feedback circuit may be a software functional module implemented by software.

Alternatively, the feedback circuit may be implemented by a hardware device, e.g. the feedback circuit comprises a first threshold unit, a third subtracting unit.

The input end of the first threshold unit is connected with the output end of the analog integrating circuit, and the first threshold unit is configured to output the output voltage corresponding to the voltage signal to which the received voltage value belongs according to the corresponding relation between the preset voltage signal and the output voltage.

The specific implementation manner and principle of the corresponding relationship between the voltage signal and the output voltage are already described and are not described again for brevity.

The first input of the third subtracting unit is connected to the output of the analog integrating circuit, the second input of the third subtracting unit is connected to the output of the first threshold unit, the output of the third subtracting unit is connected to the second input of the second subtracting unit, and the third subtracting unit is configured to generate the third parameter based on the analog integrating signal output by the analog integrating circuit and the output voltage output by the first threshold unit.

The third subtracting unit may be any electronic device that calculates a voltage difference between two input voltages, for example, a common subtracting circuit implemented by an adder, and the specific configuration of the third subtracting unit is not limited here.

The first input end of the output unit of the controller is connected with the output end of the proportional path, the second input end of the output unit is connected with the output end of the compensation circuit, the output end of the output unit is connected with the control end of the switch array, and the output unit is configured to obtain a first control signal based on the proportional signal and the integral signal.

In one embodiment, the controller is specifically configured to add the proportional signal and the integral signal to obtain an initial output signal; and determining a control signal corresponding to the initial output signal based on the initial output signal and the corresponding relation between the preset voltage signal and the control signal.

Alternatively, the output unit may be a software functional module implemented by software.

In order to implement the functions of the controller described above, the output unit may alternatively be implemented by a hardware device, for example, the output unit of the controller may include: a third adding unit and a second threshold unit.

The first input end of the third adding unit is connected with the output end of the proportional path, the second input end of the third adding unit is connected with the output end of the integral path, and the third adding unit is configured to add the proportional signal and the integral signal to obtain an initial output signal.

The third adding unit may be any electronic device provided with a function of calculating the sum of two input signals, such as a common adder or the like, and the specific configuration of the third adding unit is not limited here.

The input end of the second threshold unit is connected with the output end of the third adding unit, and the second threshold unit is configured to determine a control signal corresponding to the initial output signal according to the initial output signal and the corresponding relation between the preset voltage signal and the output voltage.

The specific implementation manner and principle of the second threshold unit are the same as those of the first threshold unit, except that the corresponding relationship between the voltage signal and the output voltage stored in the second threshold unit is different from that stored in the first threshold unit, which is not described in detail herein for brevity.

In one embodiment, the first preset parameters include a plurality of first preset parameters, the second preset parameters include a plurality of second preset parameters, the different first preset parameters correspond to different voltage differences, and the different second preset parameters correspond to different voltage differences. The controller is further configured to determine a first preset parameter corresponding to the voltage difference and a second preset parameter corresponding to the voltage difference based on the voltage difference.

By setting a plurality of first preset parameters and a plurality of second preset parameters, different first preset parameters and second preset parameters can be selected according to the voltage difference, so that the finally generated control signal is more accurate, and the accuracy of the control signal output by the controller is improved.

In order to enable the controller to perform the above-mentioned functions, the controller may further comprise a query unit.

The input end of the query unit is connected with the output end of the first subtraction unit, the first output end of the query unit is connected with the proportional path, the second output end of the query unit is connected with the integral path, a plurality of first preset parameters and a plurality of second preset parameters are arranged in the query unit, the different first preset parameters correspond to different voltage differences, the different second preset parameters correspond to different voltage differences, the query unit is configured to determine the first preset parameters corresponding to the voltage differences and the second preset parameters corresponding to the voltage differences according to the received voltage differences, output the first preset parameters corresponding to the voltage differences to the proportional path, and output the second preset parameters corresponding to the voltage differences to the integral path.

Alternatively, the querying element may be any memory device having memory capabilities, such as a register, etc., and the specific type of querying element is not limited herein.

In the second embodiment, the specific implementation manner of the controller is as follows when the detection result indicates that no undershoot phenomenon occurs.

The controller is internally provided with a first preset parameter and a second preset parameter; the controller is specifically configured to acquire a voltage difference between a preset standard voltage and a digital voltage; the proportional signal is obtained based on the voltage difference and a first preset parameter; and obtaining an integral signal based on the voltage difference and a second preset parameter, and obtaining a second control signal based on the proportional signal and the integral signal.

Accordingly, the controller may include a first subtracting unit, a proportional path, an integral path, and an output unit. The specific implementation manners of the first subtracting unit, the proportional path, the integral path and the output unit are already described in the foregoing, and are not described herein for brevity.

Optionally, the controller is specifically configured to determine a product of the voltage difference and the second preset parameter to obtain a first initial value; and performing integral operation based on the first initial value to obtain an integral signal.

Correspondingly, the integrating path of the processor comprises a first multiplying unit and a compensating circuit.

The first input end of the compensation circuit is connected with the output end of the first multiplication unit, the second input end of the compensation circuit is connected with the output end of the undershoot detector, the third input end of the compensation circuit is configured to receive preset compensation voltage, the fourth input end of the compensation circuit is connected with the output end of the compensation circuit, the output end of the compensation circuit is connected with the second input end of the output unit, and the compensation circuit is configured to perform integral operation based on the first initial value to obtain an integral signal under the condition that the detection result represents that the undershoot phenomenon does not occur.

Specifically, the compensation circuit may include a first adding unit, a selector, and a second delay unit.

The first input of the first adding unit is connected with the output of the first multiplying unit. The output end of the selector is connected with the second input end of the first adding unit, the first input end of the selector is configured to receive a preset compensation voltage, the second input end of the selector is connected with the output end of the first adding unit through the second delay unit, the control end of the selector is connected with the undershoot detector, and the selector is configured to select a signal output by the second delay unit as the input of the second input end of the first adding unit under the condition that the detection result represents that the undershoot phenomenon does not occur.

Optionally, the specific manner in which the controller calculates the integral signal may be: multiplying based on the voltage difference and a second preset parameter to obtain a first initial value, and determining a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value; and performing integral operation based on the second initial value to obtain an integral signal.

Accordingly, the integrating path of the controller may also include an anti-saturation integrating circuit. The specific implementation of the anti-saturation integration circuit is clear from the foregoing description, and is not repeated here for brevity.

In order to facilitate understanding of the above-mentioned controller, please refer to fig. 6, and the controller shown in fig. 6 is only one specific embodiment of the controller provided in the present application, and is not meant to be limiting.

As shown in fig. 6, the controller includes a first subtracting unit (SU 1 shown in fig. 6), a proportional path, an integral path, a compensating circuit, an output unit, and an inquiring unit.

The first input (port E shown in fig. 6) of the first subtracting unit is configured to receive a preset standard voltage, the second input (port F shown in fig. 6) of the first subtracting unit is connected to the output of the analog-to-digital conversion circuit, and the output of the first subtracting unit is connected to the input of the query unit.

The proportional path includes a second multiplying unit (Kp shown in fig. 6), and the output unit includes a third adding unit (AD 3 shown in fig. 6) and a second threshold unit (satout shown in fig. 6). The first input end of the second multiplication unit is connected with the output end of the first subtraction unit, and the second input end of the second multiplication unit is connected with the first output end of the query unit. The output end of the second multiplication unit is connected with the first input end of the third addition unit, the output end of the third addition unit is connected with the input end of the second threshold unit, and the output end (a port I shown in fig. 6) of the second threshold unit is connected with the control end of the switch array.

The integration path includes a first multiplication unit (Ki shown in fig. 6) and an anti-saturation integration circuit.

The anti-saturation integration circuit comprises a second subtracting unit (SU 2 shown in fig. 6), an analog integration circuit (comprising a second delay unit (Z shown in fig. 6) ^-1 ) A second addition unit (AD 2 shown in fig. 6)), a feedback circuit (including a first threshold unit (sat_i shown in fig. 6), a third subtraction unit (SU 3 shown in fig. 6)).

The first input end of the first multiplication unit is connected with the output end of the first subtraction unit, the second input end of the first multiplication unit is connected with the output end of the query unit, the output end of the first multiplication unit is connected with the first input end of the second subtraction unit, the input end of the first threshold unit is connected with the output end of the analog integration circuit, the first input end of the third subtraction unit is connected with the output end of the analog integration circuit, the second input end of the third subtraction unit is connected with the output end of the first threshold unit, and the output end of the third subtraction unit is connected with the second input end of the second subtraction unit. The first input end of the second adding unit is connected with the output end of the second subtracting unit, and the second input end of the second adding unit is connected with the output end of the second delaying unit.

The compensation circuit includes a first adding unit (AD 1 shown in FIG. 6), a selector (Sel shown in FIG. 6), and a second delay unit (Z shown in FIG. 6) ^-1 )。

The first input of the first adding unit is connected with the output of the first multiplying unit. The output of the selector is connected to the second input of the first adder unit, the first input of the selector (port H shown in fig. 6) is configured to receive a preset compensation voltage, the second input of the selector is connected to the output of the first adder unit via the second delay unit, and the control of the selector (port G shown in fig. 6) is connected to the undershoot detector.

The specific implementation manners of the first subtracting unit, the proportional path, the integral path, the output unit and the query unit are already described and are not described in detail herein for brevity.

In one embodiment, the low dropout linear regulator further comprises a preset voltage adjusting unit.

The input end of the preset voltage adjusting unit is connected with the output end of the undershoot detector, the output end of the preset voltage adjusting unit is connected with the first input end of the controller, and the preset voltage adjusting unit is configured to record the times of occurrence of undershoot phenomenon represented by the detection result in the preset time length and adjust the voltage value of the preset standard voltage input into the controller according to the times.

In one embodiment, the preset voltage adjusting unit includes a first counter, a second counter, a comparator, a multiplexing circuit, a fourth adding unit, a third delay unit, a third threshold unit, and a fifth adding unit.

The first counter is used for recording time, the output end of the first counter is connected with the reset end of the second counter, and the first counter is used for sending a signal representing reset to the reset end of the second counter after the recording time reaches the preset time length so as to enable the count of the second counter to be zero. The input end of the second counter is connected with the output end of the undershoot detector, and the second counter is used for adding one on the basis of the existing count under the condition that the output result of the undershoot detector, which represents the undershoot phenomenon, is received.

The output end of the second counter is connected with the input end of the comparator, and the comparator is used for comparing the numerical value recorded by the second counter with a preset frequency threshold value. And outputting a first comparison signal representing increasing the preset standard voltage when the value recorded by the second counter is larger than the preset times threshold value. And outputting a second comparison signal representing the reduction of the preset standard voltage under the condition that the value recorded by the second counter is smaller than or equal to a preset frequency threshold value.

Alternatively, the preset number of times threshold may include a first number of times threshold and a second number of times threshold, and the first number of times threshold is greater than the second number of times threshold. In this case, the comparator is configured to output a first comparison signal indicative of an increase in the preset reference voltage when the value recorded by the second counter is greater than the first time threshold. And outputting a second comparison signal representing the reduction of the preset standard voltage when the value recorded by the second counter is smaller than the second time threshold value. And outputting a third comparison signal representing that the preset standard voltage is not modified under the condition that the numerical value recorded by the second counter is larger than or equal to the second time threshold and smaller than or equal to the first time threshold.

The output end of the comparator is connected with the control end of the multi-path selector, the first input end of the multi-path selector is used for receiving the increasing voltage, the second input end of the multi-path selector is used for receiving the decreasing voltage, and the third input end of the multi-path selector is 0 potential. The multiplexer is used for outputting an increasing voltage under the condition that the first comparison signal is received; outputting a reduced voltage upon receipt of the second comparison signal; and when the first comparison signal and the second comparison signal are not received, no voltage is output, namely the current preset standard voltage is kept unchanged.

The first input end of the fourth adding unit is connected with the output end of the multi-path selector, and the second input end of the fourth adding unit is connected with the output end of the fourth adding unit through a third threshold unit and a third delay unit which are connected in sequence. The output end of the third threshold unit is connected with the second input end of the third addition unit.

And after the fourth adding unit receives the modified voltage output by the multi-path gate, adding the modified voltage to the third delay voltage output by the third delay unit, and then determining the voltage value of the fifth adding unit with the output value by the third threshold unit according to the voltage value output by the fourth adding unit and the corresponding relation between the preset voltage signal and the output voltage. The fifth adding unit adds the voltage value output by the third threshold unit with the previous preset standard voltage to obtain a new preset standard voltage, and the preset standard voltage is adjusted.

Based on the same inventive concept, the present application also provides a control method of the low dropout linear regulator, as shown in fig. 7. The control method of the low dropout linear voltage regulator is applied to the controller in the low dropout linear voltage regulator.

S100: and acquiring digital voltage output by the analog-to-digital conversion circuit, and presetting standard voltage, a detection result sent by the undershoot detector and preset compensation voltage.

S200: under the condition that the detection result represents that undershoot occurs, a control signal is generated according to a preset standard voltage, a digital voltage and a preset compensation voltage, and the control signal is used for controlling the quantity of the conducted switches in the switch array.

In one embodiment, a specific implementation manner of S200 may be to obtain a voltage difference between a preset standard voltage and a digital voltage; the proportional signal is obtained based on the voltage difference and a first preset parameter; and obtaining an integrated signal based on the voltage difference, the second preset parameter and the preset compensation voltage, and obtaining a first control signal based on the proportional signal and the integrated signal.

Optionally, the manner of obtaining the integrated signal based on the voltage difference, the second preset parameter and the preset compensation voltage may be: determining the product of the voltage difference and a second preset parameter to obtain a first initial value; and carrying out addition operation based on the first initial value and a preset compensation voltage to obtain an integrated signal.

Optionally, the manner of obtaining the integrated signal based on the voltage difference, the second preset parameter and the preset compensation voltage may further be: multiplying based on the voltage difference and a second preset parameter to obtain a first initial value, and determining a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value; and performing addition operation based on the second initial value and a preset compensation voltage to obtain an integrated signal.

Alternatively, the specific manner of determining the third parameter based on the first initial value may be: performing integration processing based on the first initial value to obtain an analog integrated signal; and then generating a third parameter based on the corresponding relation between the analog integrated signal and the preset voltage signal and the output voltage.

Optionally, based on the proportional signal and the integral signal, a specific manner of obtaining the first control signal may be: adding the proportional signal and the integral signal to obtain an initial output signal; and determining a control signal corresponding to the initial output signal based on the initial output signal and the corresponding relation between the preset voltage signal and the control signal.

Optionally, the first preset parameters include a plurality of second preset parameters, the different first preset parameters correspond to different voltage differences, the different second preset parameters correspond to different voltage differences, and the low dropout linear regulator control method further includes: based on the voltage difference, a first preset parameter corresponding to the voltage difference and a second preset parameter corresponding to the voltage difference are determined.

In one embodiment, in the case that the detection result indicates that no undershoot occurs, the low dropout linear regulator control method further includes: and generating a control signal according to the preset standard voltage and the digital voltage, wherein the control signal is used for controlling the quantity of the conducted switches in the switch array.

Optionally, the specific implementation manner of generating the control signal according to the preset standard voltage and the digital voltage, where the control signal is used to control the number of the switches turned on in the switch array may be: acquiring a voltage difference between a preset standard voltage and a digital voltage; the proportional signal is obtained based on the voltage difference and a first preset parameter; and obtaining an integral signal based on the voltage difference and a second preset parameter, and obtaining a first control signal based on the proportional signal and the integral signal.

Optionally, the manner of obtaining the integrated signal based on the voltage difference and the second preset parameter may be: determining the product of the voltage difference and a second preset parameter to obtain a first initial value; and performing integral operation based on the first initial value to obtain an integral signal.

Optionally, the manner of obtaining the integrated signal based on the voltage difference and the second preset parameter may be: multiplying based on the voltage difference and a second preset parameter to obtain a first initial value, and determining a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value; and performing integral operation based on the second initial value to obtain an integral signal.

Optionally, a specific manner of determining the third parameter based on the first initial value is the same as the foregoing manner, and is not described herein for brevity.

Based on the same inventive concept, the present application also provides a battery management system, as shown in fig. 8, the battery management system 100 including: a battery 110 and a low dropout linear regulator 120.

Wherein the output of the battery 110 is connected to the input of the switch array of the low dropout linear regulator 120.

The battery 110 may be any type of power source having power supply capability, and the specific type of battery 110 is not limited herein.

The specific structure and principle of the low dropout linear regulator 120 are already described and will not be described again here for brevity.

Based on the same inventive concept, the present application also provides an electronic device including the battery management system 100 described above.

The specific implementation and principles of the battery management system 100 have been described above and are not repeated here for brevity.

The electronic device may be a mobile phone, a tablet computer, a mobile power supply, etc., and the specific type of the electronic device is not limited here.

The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A low dropout linear regulator, comprising:

a switch array;

an analog-to-digital conversion circuit, an input end of the analog-to-digital conversion circuit being connected to an output end of the switch array, the analog-to-digital conversion circuit being configured to convert an output voltage of the switch array to a digital voltage;

the first input end of the undershoot detector is connected with the output end of the switch array, and the undershoot detector is configured to detect an undershoot phenomenon of the output voltage of the switch array to obtain a detection result;

the first input end of the controller is configured to receive a preset standard voltage, the second input end of the controller is connected with the output end of the analog-to-digital conversion circuit, the third input end of the controller is connected with the output end of the undershoot detector, the fourth input end of the controller is configured to receive a preset compensation voltage, and the output end of the controller is connected with the control end of the switch array; the controller is configured to generate a first control signal according to the preset standard voltage, the digital voltage and the preset compensation voltage under the condition that the detection result represents that undershoot occurs, wherein the first control signal is used for controlling the number of on switches in the switch array.

2. The low dropout linear regulator according to claim 1, wherein the controller has a first preset parameter and a second preset parameter built therein; the controller is specifically configured to acquire a voltage difference between the preset standard voltage and the digital voltage; obtaining a proportion signal based on the voltage difference and the first preset parameter; and obtaining an integral signal based on the voltage difference, the second preset parameter and the preset compensation voltage, and obtaining the first control signal based on the proportional signal and the integral signal.

3. The low dropout linear regulator according to claim 2, wherein the controller is specifically configured to determine a product of the voltage difference and the second preset parameter to obtain a first initial value; and carrying out addition operation based on the first initial value and the preset compensation voltage to obtain the integrated signal.

4. The low dropout linear regulator according to claim 2, wherein the controller is further configured to multiply the second preset parameter by a first initial value based on the voltage difference, and determine a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value; and carrying out addition operation based on the second initial value and the preset compensation voltage to obtain the integrated signal.

5. The low dropout linear regulator of claim 4, wherein the controller is specifically configured to perform an integration process based on the first initial value to obtain an analog integrated signal; and generating the third parameter based on the corresponding relation between the analog integrated signal and the preset voltage signal and the output voltage, wherein the third parameter is the voltage signal.

6. The low dropout linear regulator of claim 2, wherein the controller is specifically configured to add the proportional signal and the integral signal to obtain an initial output signal; and determining a control signal corresponding to the initial output signal based on the corresponding relation between the initial output signal and a preset voltage signal and the control signal.

7. The low dropout linear regulator according to claim 2, wherein the first preset parameter includes a plurality, the second preset parameter includes a plurality, different first preset parameters correspond to different voltage differences, different second preset parameters correspond to different voltage differences, and the controller is further configured to determine the first preset parameter corresponding to the voltage difference and the second preset parameter corresponding to the voltage difference based on the voltage differences.

8. The low dropout linear regulator according to claim 2, wherein said controller comprises:

a first subtracting unit, wherein a first input end of the first subtracting unit is configured to receive a preset standard voltage, a second input end of the first subtracting unit is connected with an output end of the analog-to-digital conversion circuit, and the first subtracting unit is configured to obtain a voltage difference based on the preset standard voltage and the digital voltage;

a proportional path, a first input of the proportional path being connected to an output of the first subtracting unit and further configured to receive a first preset parameter, the proportional path being configured to derive the proportional signal based on the voltage difference and the first preset parameter;

an integrating path, a first input end of the integrating path is connected with an output end of the first subtracting unit, a second input end of the integrating path is connected with an output end of the undershoot detector, a third input end of the integrating path is configured to receive a second preset parameter, and the integrating path is configured to obtain a first initial value based on the voltage difference and the second preset parameter;

the first input end of the compensation circuit is connected with the output end of the integration path, the second input end of the compensation circuit is connected with the output end of the undershoot detector, the third input end of the compensation circuit is configured to receive a preset compensation voltage, and the compensation circuit is configured to obtain the integration signal based on the first initial value and the preset compensation voltage under the condition that undershoot phenomenon occurs in the detection result representation;

The first input end of the output unit is connected with the output end of the proportional path, the second input end of the output unit is connected with the output end of the compensation circuit, the output end of the output unit is connected with the control end of the switch array, and the output unit is configured to obtain the first control signal based on the proportional signal and the integral signal.

9. The low dropout linear regulator according to claim 8, wherein said compensation circuit comprises:

the first input end of the first adding unit is connected with the output end of the integrating channel;

the output end of the selector is connected with the second input end of the first adding unit, the first input end of the selector is configured to receive the preset compensation voltage, the control end of the selector is connected with the undershoot detector, and the selector is configured to select the preset compensation voltage as the input of the second input end of the first adding unit under the condition that the detection result represents the undershoot phenomenon.

10. The low dropout linear regulator according to claim 8, wherein said integrating path comprises:

The first input end of the first multiplication unit is connected with the output end of the first subtraction unit, and the first multiplication unit is configured to receive the voltage difference and perform multiplication operation based on the voltage difference and the second preset parameter to obtain a first initial value.

11. The low dropout linear regulator according to claim 10, wherein said integrating path further comprises:

an anti-saturation integration circuit through which the first multiplication unit is connected with the compensation circuit, the anti-saturation integration circuit being configured to determine a third parameter based on the first initial value; performing subtraction operation based on the first initial value and the third parameter to obtain a second initial value;

correspondingly, the compensation circuit is specifically configured to obtain the integrated signal based on the second initial value and the preset compensation voltage.

12. The low dropout linear regulator according to claim 11, wherein said anti-saturation integrating circuit comprises:

the first input end of the second subtracting unit is connected with the output end of the first multiplying unit, and the output end of the second subtracting unit is connected with the input end of the compensating circuit;

The input end of the analog integration circuit is connected with the output end of the second subtracting unit, and the analog integration circuit is configured to simulate an integrated signal output by the compensating circuit based on a signal output by the second subtracting unit to obtain an analog integrated signal;

the input end of the feedback circuit is connected with the output end of the analog integrating circuit, the output end of the feedback circuit is connected with the second input end of the second subtracting unit, and the feedback circuit is configured to generate the third parameter based on the corresponding relation between the analog integrating signal and the preset voltage signal and the output voltage, and the third parameter is a voltage signal;

the second subtracting unit is configured to obtain a second initial value based on the third parameter and the signal output by the first multiplying unit.

13. The low dropout linear regulator according to claim 12, wherein said feedback circuit comprises:

the input end of the first threshold unit is connected with the output end of the analog integrating circuit, and the first threshold unit is configured to output voltage corresponding to the voltage signal to which the received voltage value belongs according to the corresponding relation between the preset voltage signal and the output voltage;

The first input end of the third subtracting unit is connected with the output end of the analog integrating circuit, the second input end of the third subtracting unit is connected with the output end of the first threshold unit, the output end of the third subtracting unit is connected with the second input end of the second subtracting unit, and the third subtracting unit is configured to generate the third parameter based on the analog integrating signal output by the analog integrating circuit and the output voltage output by the first threshold unit.

14. The low dropout linear regulator according to claim 12, wherein said analog integrating circuit comprises:

a second delay unit configured to delay a received signal by a preset period of time to output;

15. The low dropout linear regulator according to claim 8, wherein said output unit comprises:

The first input end of the third adding unit is connected with the output end of the proportional path, the second input end of the third adding unit is connected with the output end of the compensating circuit, and the third adding unit is configured to add the proportional signal and the integral signal to obtain an initial output signal;

and the input end of the second threshold unit is connected with the output end of the third adding unit, and the second threshold unit is configured to determine a control signal corresponding to the initial output signal according to the initial output signal and the corresponding relation between the preset voltage signal and the control signal.

16. The low dropout linear regulator according to claim 8, wherein said controller further comprises:

the input end of the query unit is connected with the output end of the first subtracting unit, the first output end of the query unit is connected with the proportional path, the second output end of the query unit is connected with the integral path, a plurality of first preset parameters and a plurality of second preset parameters are arranged in the query unit, different first preset parameters correspond to different voltage differences, different second preset parameters correspond to different voltage differences, the query unit is configured to determine the first preset parameters corresponding to the voltage differences and the second preset parameters corresponding to the voltage differences according to the received voltage differences, output the first preset parameters corresponding to the voltage differences to the proportional path, and output the second preset parameters corresponding to the voltage differences to the integral path.

17. The low dropout linear regulator according to claim 1, wherein said analog-to-digital conversion circuit comprises:

a voltage to time converter having an input connected to the output of the switch array, the voltage to time converter configured to convert the output voltage of the switch array to a time signal, wherein the time signal is positively correlated to the output voltage of the switch array;

and a time-to-digital converter having an input coupled to the output of the voltage-to-time converter, the output of the time-to-digital converter coupled to the second input of the controller, the time-to-digital converter configured to convert the time signal to the digital voltage.

18. The low dropout linear regulator according to claim 17, wherein said time-to-digital converter comprises:

the input end of the ring oscillator is connected with the output end of the voltage-time converter;

the sampling circuit is connected with the output end of each stage in the ring oscillator and is configured to sample the output signal of each stage of the ring oscillator to obtain a sampling signal;

And the counting circuit is connected with the sampling circuit and is configured to count a specified type of signal in the sampling signals to obtain the digital voltage.

19. The low dropout linear regulator of claim 1, wherein the undershoot detector is specifically configured to compare a preset comparison voltage with an output voltage output by the switch array to obtain a detection result, wherein the detection result indicates that an undershoot phenomenon occurs when the output voltage is less than the preset comparison voltage.

20. The low dropout linear regulator according to any one of claims 1 to 19, further comprising:

the device comprises a preset voltage adjusting unit, wherein the input end of the preset voltage adjusting unit is connected with the output end of the undershoot detector, the output end of the preset voltage adjusting unit is connected with the first input end of the controller, and the preset voltage adjusting unit is configured to record the times of the undershoot phenomenon represented by the detection result and adjust the voltage value of the preset standard voltage input into the controller according to the times.

21. The low dropout linear regulator according to claim 1, wherein in case the detection result indicates that no undershoot occurs, the controller is further configured to generate a second control signal according to the preset standard voltage and the digital voltage, the second control signal being used for controlling the number of switches turned on in the switch array, wherein the number of switches turned on by the second control signal is smaller than the number of switches turned on by the first control signal.

22. A method of controlling a low dropout linear regulator, applied to a controller according to any one of claims 1 to 21, the method comprising:

acquiring digital voltage output by the analog-to-digital conversion circuit, and presetting standard voltage, a detection result sent by the undershoot detector and preset compensation voltage;

and under the condition that the detection result represents that undershoot occurs, generating a first control signal according to the preset standard voltage, the digital voltage and the preset compensation voltage, wherein the first control signal is used for controlling the quantity of the conducted switches in the switch array.

23. A battery management system, comprising: a battery and a low dropout linear regulator as defined in any one of claims 1 to 21.

24. An electronic device, comprising:

the battery management system of claim 23.