CN117440514A

CN117440514A - Data processing method and device and computer readable storage medium

Info

Publication number: CN117440514A
Application number: CN202210809371.9A
Authority: CN
Inventors: 赵思聪; 丁昱; 徐敏; 周化雨
Original assignee: Spreadtrum Communications Shanghai Co Ltd
Current assignee: Spreadtrum Communications Shanghai Co Ltd
Priority date: 2022-07-11
Filing date: 2022-07-11
Publication date: 2024-01-23

Abstract

A data processing method and device, computer readable storage medium, the data processing method includes: determining a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth; based on the determined reference synchronization signal block, a time domain position where uplink data transmission is not possible is determined. By adopting the scheme, the probability of collision between uplink transmission and SSB reception can be reduced or the measurement performance can be improved.

Description

Data processing method and device and computer readable storage medium

Technical Field

The present invention relates to the field of wireless communications technologies, and in particular, to a data processing method and apparatus, and a computer readable storage medium.

Background

In the prior art, for reduced capability (RedCap) terminal devices supporting only 20MHz, non-cell-defined synchronization signal blocks (NCD-SSBs) configured by radio resource control (Radio Resource Control, RRC) dedicated signaling in the connected state are introduced. The NCD-SSB may be used for serving cell measurements of the RedCap terminal device. (subsequent standard versions may introduce the NCD-SSB into an inactive state or even an idle state. The NCD-SSB may have different frequency points and periods than a cell-defined synchronization signal block (CD-SSB), the period of the current NCD-SSB being greater than or equal to the CD-SSB.

Furthermore, in the R17 phase, an HD-FDD mechanism is introduced for RedCAP. In HD-FDD mode, the UE is allowed to operate up/down in different frequency bands, but the transmission and reception of data do not require simultaneous performance. Since data transmission and reception cannot be performed simultaneously, collision may occur between uplink transmission and downlink reception due to the existence of uplink/downlink dynamic/semi-static scheduling.

In the event of a collision with a synchronization signal block (Synchronization Signal Block, SSB), the SSB is of higher priority, i.e. the terminal device receives the SSB preferentially in the event of a collision with an uplink transmission. In view of the introduction of the NCD-SSB, for simplicity of processing, it is determined that the collision criteria of the NCD-SSB and the CD-SSB are the same, i.e., the SSB is preferentially received and the upstream transmission is abandoned. From the perspective of the network device, transmitting the NCD-SSB and the CD-SSB simultaneously increases complexity and power consumption, and an offset (offset) may be introduced, so that the NCD-SSB and the CD-SSB are transmitted at different time points.

However, the introduction of NCD-SSB increases the density of SSB within BWP, and the probability of collision with upstream transmissions increases greatly.

Disclosure of Invention

The embodiment of the invention solves the technical problem of high collision probability between SSB and uplink transmission.

In order to solve the above technical problems, an embodiment of the present invention provides a data processing method, including: determining a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth; based on the determined reference synchronization signal block, a time domain position where uplink data transmission is not possible is determined.

Optionally, the determining the reference synchronization signal block includes: defaulting the first type of synchronization signal block to the reference synchronization signal block; or defaulting the second type of synchronization signal block to the reference synchronization signal block; alternatively, the first type synchronization signal block and the second type synchronization signal block are defaulted to the reference synchronization signal block.

Optionally, the determining the reference synchronization signal block includes: and determining the reference synchronous signal block according to the synchronous measurement requirement.

Optionally, the determining the reference synchronization signal block includes: determining the first type of synchronization signal block as the reference synchronization signal block when an offset exists between the first type of synchronization signal block and the second type of synchronization signal block; or when there is an offset between the first type of synchronization signal block and the second type of synchronization signal block, determining the second type of synchronization signal block as the reference synchronization signal block; or when there is an offset between the first type of synchronization signal block and the second type of synchronization signal block, determining the first type of synchronization signal block and the second type of synchronization signal block as the reference synchronization signal block.

Optionally, the determining the reference synchronization signal block includes: and when the first type synchronous signal block and the second type synchronous signal block have offset, and the period of the first type synchronous signal block is larger than that of the second type synchronous signal block, determining the first type synchronous signal block as the reference synchronous signal block.

Optionally, the determining the reference synchronization signal block includes: receiving indication information; and determining the reference synchronous signal block according to the indication information.

The embodiment of the invention also provides another data processing method, which comprises the following steps: determining a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth; and sending indication information, wherein the indication information is used for indicating the reference synchronous signal block.

The embodiment of the invention also provides a data processing device, which comprises: a first determining unit configured to determine a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth; and a second determining unit configured to determine a time domain position where uplink data transmission is impossible based on the determined reference synchronization signal block.

The embodiment of the invention also provides another data processing device, which comprises: a third determining unit configured to determine a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth; and the sending unit is used for sending indication information, wherein the indication information is used for indicating the reference synchronous signal block.

The embodiment of the invention also provides a computer readable storage medium, which is a non-volatile storage medium or a non-transient storage medium, and a computer program is stored on the computer readable storage medium, and the computer program is executed by a processor to execute the steps of any one of the data processing methods.

The embodiment of the invention also provides another data processing device, which comprises a memory and a processor, wherein the memory stores a computer program capable of running on the processor, and the processor executes the steps of any one of the data processing methods when running the computer program.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:

and determining the first type of synchronous signal block or the second type of synchronous signal block as a reference synchronous signal block, and carrying out uplink data transmission on symbols which are not occupied by the reference synchronous signal block. Because only one type of synchronization signal block is selected as the reference synchronization signal block, the number of the synchronization signal blocks in the activated BWP is reduced, so that the number of the synchronization signal blocks which need to be received can be reduced, and the probability of collision of uplink and downlink data transmission is further effectively reduced.

Drawings

FIG. 1 is a flow chart of a data processing method in an embodiment of the invention;

fig. 2 is a schematic diagram of symbol occupation of an active BWP according to the prior art;

fig. 3 is a schematic diagram of a synchronization signal block distribution of an active BWP in an embodiment of the present invention;

fig. 4 is a diagram illustrating a synchronization signal block distribution of another active BWP in an embodiment of the present invention;

fig. 5 is a diagram illustrating a synchronization signal block distribution of still another active BWP in an embodiment of the present invention;

fig. 6 is a diagram illustrating a synchronization signal block distribution of still another active BWP in an embodiment of the present invention;

fig. 7 is a schematic diagram of symbol occupation of an activated BWP in an embodiment of the present invention;

fig. 8 is a symbol occupancy diagram of another activated BWP in an embodiment of the invention;

fig. 9 is a schematic diagram of symbol occupation of still another activated BWP in an embodiment of the present invention;

FIG. 10 is a flow chart of another data processing method in an embodiment of the invention;

FIG. 11 is a schematic diagram of a data processing apparatus according to an embodiment of the present invention;

FIG. 12 is a schematic diagram of another data processing apparatus in an embodiment of the present invention;

fig. 13 is a schematic diagram of a positional relationship between a switching time and a reference synchronization signal block in an embodiment of the present invention.

Detailed Description

As described in the background art above, from the perspective of the network device, the transmission of the NCD-SSB and the CD-SSB at the same time increases complexity and power consumption, and an offset (offset) may be introduced, so that the NCD-SSB and the CD-SSB are transmitted at different time points.

Referring to fig. 2, a symbol occupancy diagram of an active BWP according to the prior art is given. In FIG. 2, there is an offset between NCD-SSB and CD-SSB. In an active BWP, there are multiple SSBs, and the symbol occupied by UL1 collides with the symbol occupied by UL2 and the symbol occupied by SSB, so that uplink transmission cannot be performed.

In the embodiment of the invention, only one type of synchronous signal block is selected as the reference synchronous signal block, so that the number of synchronous signal blocks which need to be received can be reduced, and the probability of collision of uplink and downlink data transmission is further effectively reduced.

In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

First, partial terms related to the embodiments of the present application are explained for easy understanding by those skilled in the art.

1. And a terminal device. The terminal device according to the embodiment of the present invention is a device having a wireless communication function, and may be referred to as a terminal (terminal), a User Equipment (UE), a Mobile Station (MS), a Mobile Terminal (MT), an access terminal device, a vehicle-mounted terminal device, an industrial control terminal device, a UE unit, a UE station, a mobile station, a remote terminal device, a mobile device, a UE terminal device, a wireless communication device, a UE agent, or a UE apparatus. The terminal device may be fixed or mobile. It should be noted that the terminal device may support at least one wireless communication technology, such as LTE, new radio, NR, etc. For example, the terminal device may be a mobile phone, a tablet, a desktop, a notebook, a kiosk, a car-mounted terminal, a Virtual Reality (VR) terminal device, an augmented reality (augmented reality, AR) terminal device, a wireless terminal in an industrial control (industrial control), a wireless terminal in a self-driving (self-driving), a wireless terminal in a teleoperation (remote medical surgery), a wireless terminal in a smart grid, a wireless terminal in a transportation security (transportation safety), a wireless terminal in a smart city, a wireless terminal in a smart home (smart home), a cellular phone, a cordless phone, a session initiation protocol (session initiation protocol, SIP) phone, a wireless local loop (wireless local loop, WLL) station, a personal digital assistant (personal digital assistant, PDA), a handheld device with wireless communication capabilities, a computing device or other processing device connected to a wireless modem, a wearable device, a terminal in a future mobile communication network, or a public land mobile network (public land mobile network) in a future mobile communication network, etc. In some embodiments of the present application, the terminal device may also be a device with a transceiver function, such as a chip system. The chip system may include a chip and may also include other discrete devices.

2. A network device. In the embodiment of the present invention, the network device is a device that provides a wireless communication function for the terminal, and may also be referred to as a radio access network (radio access network, RAN) device, or an access network element, etc. Wherein the network device may support at least one wireless communication technology, e.g., LTE, NR, etc. By way of example, network devices include, but are not limited to: a next generation base station (gNB), an evolved node B (eNB), a radio network controller (radio network controller, RNC), a Node B (NB), a base station controller (base station controller, BSC), a base station receiving station (base transceiver station, BTS), a home base station (e.g., home evolved node B, or home node B, HNB), a baseband unit (BBU), a receiving point (transmitting and receiving point, TRP), a transmitting point (transmitting point, TP), a mobile switching center, and the like in a fifth generation mobile communication system (5 th-generation, 5G). The network device may also be a wireless controller, a Centralized Unit (CU), and/or a Distributed Unit (DU) in the cloud wireless access network (cloud radio access network, CRAN) scenario, or the network device may be a relay station, an access point, an in-vehicle device, a terminal device, a wearable device, and a network device in future mobile communication or a network device in a future evolved PLMN, etc. In some embodiments, the network device may also be an apparatus, such as a system-on-a-chip, having functionality for providing wireless communication for the terminal device. By way of example, the chip system may include a chip, and may also include other discrete devices.

In some embodiments, the network device may also communicate with an internet protocol (Internet Protocol, IP) network, such as the internet, a private IP network, or other data network, among others.

The embodiment of the invention provides a data processing method, and the detailed description is given below through specific steps with reference to fig. 1.

In the embodiment of the present invention, the data processing methods corresponding to the following steps 101 to 102 may be executed by a chip having data processing capability in the terminal device, or by a chip module including the chip having data processing capability in the terminal device. The following description will take a terminal device as an execution body as an example.

Step 101, a reference synchronization signal block is determined.

In a specific implementation, the reference synchronization signal block may be a first type synchronization signal block or a second type synchronization signal block. The reference synchronization signal block may also be a first type synchronization signal block and a second type synchronization signal block, i.e. both the first type synchronization signal block and the second type synchronization signal block are used as reference synchronization signal blocks.

The first type of synchronization signal block and the second type of synchronization signal block are different types of synchronization signal blocks, and the first type of synchronization signal block and the second type of synchronization signal block may be located in the same active partial Bandwidth (BWP).

In the embodiment of the present invention, the first type of synchronization signal block may be a non-cell-defining SSB (NCD-SSB), and the second type of synchronization signal block may be a cell-defining SSB (CD-SSB). Alternatively, the first type of synchronization signal block is a CD-SSB and the second type of synchronization signal block is an NCD-SSB.

For specific definitions and functions corresponding to the NCD-SSB and the CD-SSB, reference may be made to the existing protocol, and the embodiments of the present invention are not described in detail.

In the embodiment of the present invention, when the NCD-SSB and the CD-SSB are simultaneously located in the same active BWP, one of them may be determined as the reference synchronization signal block. Alternatively, it may be determined that both are reference synchronization signal blocks.

In the embodiment of the invention, the first type of synchronization signal block can be regarded as the reference synchronization signal block by default; alternatively, the second type of synchronization signal block may be regarded as the reference synchronization signal block by default. Alternatively, the first type synchronization signal block and the second type synchronization signal block may be used as reference synchronization signal blocks by default.

In specific implementation, the NCD-SSB can be preconfigured or determined as a reference synchronous signal block in advance through a protocol; alternatively, the CD-SSB is preconfigured or determined by a protocol in advance as a reference synchronization signal block. Alternatively, both the NCD-SSB and the CD-SSB are pre-configured or pre-determined by protocol as reference synchronization signal blocks.

In the embodiment of the invention, the reference synchronous signal block can also be determined according to the synchronous measurement requirement. For example, when the first type of synchronization signal block and the second type of synchronization signal block are determined to be reference synchronization signal blocks in SMTC window (SSB-based RRM Measurement Timing Configuration window (SMTC window)), the density of the reference synchronization signal blocks can be increased, the measurement performance can be increased, and the measurement delay can be shortened. Or, a window may be set up before Discontinuous Reception (DRX) starts, in which the first type of synchronization signal block and the second type of synchronization signal block may be considered to be reference synchronization signal blocks, and the terminal may use them to perform Automatic Gain Control (AGC) adjustment, time-frequency tracking, and so on, so as to shorten the wake-up time.

In practice, the period of NCD-SSB may be equal to or greater than the period of CD-SSB.

As shown in fig. 3, a schematic diagram of the distribution of synchronization signal blocks of an active BWP in an embodiment of the present invention is given. In FIG. 3, the period of NCD-SSB is the same as that of CD-SSB, and there is no offset (offset) between NCD-SSB and CD-SSB.

As shown in fig. 4, a schematic diagram of the synchronization signal block distribution of another active BWP in the embodiment of the present invention is given. In FIG. 4, the period of NCD-SSB is greater than the period of CD-SSB.

In a specific implementation, if the requirement for synchronization measurement is low, that is, synchronization measurement is not required to be performed frequently, the NCD-SSB may be determined as the reference synchronization signal block. If the requirement for synchronization measurement is high, that is, synchronization measurement needs to be performed frequently, the CD-SSB may be determined as the reference synchronization signal block. Alternatively, both NCD-SSB and CD-SSB may be determined as reference synchronization signal blocks.

In a specific application, a synchronization measurement number threshold may be set. If the number of times of synchronous measurement requirements is greater than the threshold value, determining that the synchronous measurement requirements are higher; otherwise, if the number of times of synchronous measurement requirements is not greater than the threshold value, determining that the synchronous measurement requirements are lower.

It will be appreciated that other ways of determining whether the synchronous measurement demand is higher or lower may exist. For example, the higher or lower requirements for the synchronization measurement are determined by the type of service currently being performed by the terminal device. Alternatively, the measurement requirements may be determined based on the foregoing measurement windows, e.g., the measurement requirements are higher in the measurement windows, and lower in the measurement windows.

In the embodiment of the present invention, the periods of the NCD-SSB and the CD-SSB may be equal, and if there is an offset (offset) between the NCD-SSB and the CD-SSB, the NCD-SSB may be determined to be the reference synchronization signal block, or the CD-SSB may be determined to be the reference synchronization signal block. Alternatively, the NCD-SSB and the CD-SSB are both determined to be reference synchronization signal blocks.

As shown in fig. 5, a schematic diagram of a synchronization signal block distribution of still another active BWP in an embodiment of the present invention is given. In FIG. 5, the period of NCD-SSB is the same as that of CD-SSB, and there is an offset (offset) between NCD-SSB and CD-SSB.

In embodiments of the present invention, the period of NCD-SSB may be greater than the period of CD-SSB, and there is an offset between NCD-SSB and CD-SSB. At this time, the NCD-SSB may be determined as a reference synchronization signal block or the CD-SSB may be determined as a reference synchronization signal block according to the synchronization measurement requirements.

Referring to fig. 6, a schematic diagram of a synchronization signal block distribution of still another active BWP in an embodiment of the present invention is given. In FIG. 6, the period of NCD-SSB is greater than that of CD-SSB, and there is an offset between NCD-SSB and CD-SSB.

In the embodiment of the present invention, the network device may also send indication information to the terminal device, where the indication information may be used to indicate which type of synchronization signal block is used as the reference synchronization signal block.

For example, the network device sends indication information to the terminal device, the indication information indicating that the NCD-SSB is a reference synchronization signal block.

Step 102, determining a time domain position where uplink data transmission cannot be performed based on the determined reference synchronization signal block.

In the embodiment of the invention, after the reference synchronous signal block is determined, the time domain position where uplink data transmission cannot be performed can be determined based on the determined reference synchronous signal block. And prohibiting uplink data transmission at a time domain position where the uplink data transmission cannot be performed.

In the embodiment of the present invention, the time domain positions where uplink data transmission cannot be performed may include time domain positions corresponding to symbols occupied by the reference synchronization signal block,

the time domain position where uplink data transmission cannot be performed may further include a time domain position corresponding to a symbol occupied by the reference synchronization signal block and a switching time before and after the reference synchronization signal block. Referring to fig. 13, a schematic diagram of a positional relationship between a switching time and a reference synchronization signal block in an embodiment of the present invention is provided.

The switching time 1 may be N _Rx-Tx T _c The switching time 2 may be N _Tx-Rx T _c Wherein N is _Rx-Tx And N _Tx-Rx Can be determined from table 1 below. T (T) _c ＝1/(Δf _max ·N _f ) Wherein Δf _max ＝480·10 ³ Hz，N _f ＝4096.

	FR1	FR2
			N _Tx-Rx	25600	13792
N _Rx-Tx	25600	13792

TABLE 1

After the reference synchronization signal block is determined, when uplink data transmission is performed, if collision between a symbol carrying uplink data and a symbol occupied by the reference synchronization signal block is detected, the uplink data transmission is prohibited on the symbol having the collision.

In the embodiment of the present invention, the collision between the symbol carrying the uplink data and the symbol occupied by the reference synchronization signal block may refer to: the symbols occupied by the reference synchronization signal block overlap with the symbols carrying the uplink data.

In the embodiment of the present invention, the collision between the symbol carrying the uplink data and the symbol occupied by the reference synchronization signal block may also be: the symbols occupied by the reference synchronization signal blocks and the switching time before and after the reference synchronization signal blocks overlap with the symbols carrying uplink data.

As shown in fig. 13, there is a time sequence overlap between the symbol UL1 carrying uplink data and the switching time 1, and there is no time sequence overlap between the symbol UL2 carrying uplink data and the switching time 2.

In the embodiment of the present invention, the prohibition of uplink data transmission at the time domain position where the uplink data transmission cannot be performed may refer to: the uplink data transmission is prohibited at the time domain position where the overlap exists.

Specifically, prohibiting uplink data transmission at a time domain position where there is overlap may mean: uplink resources at the time domain locations where there is overlap are not available. That is, uplink data transmission cannot be performed on the symbol occupied by the reference synchronization signal. Or, at the time domain position occupied by the switching time, the uplink data transmission cannot be performed.

For example, the symbols occupied by the reference synchronization signal block are symbol 2, symbol 3, symbol 4, and symbol 5, and the symbols carrying uplink data are symbol 5, symbol 6, and symbol 7, and at this time, it may be determined that the symbols carrying uplink data collide with the symbols occupied by the reference synchronization signal block. On symbol 5, no upstream data is transmitted. Alternatively, no uplink data is transmitted in any of symbol 5, symbol 6, and symbol 7. (note: if symbol 6 and symbol 7 are transmitted depending on uplink data/channel type, e.g., if symbol 5, symbol 6, symbol 7 are scheduled for uplink control channel (PUCCH) or uplink shared channel (PUSCH) transmission, PUCCH and PUSCH terminate transmission when symbol 5 overlaps SSB, i.e., neither symbol 5, symbol 6, nor symbol 7 transmits uplink, if symbol 5, symbol 6, symbol 7 are scheduled for Sounding Reference Signal (SRS) transmission, only symbol 5 does not transmit SRS when symbol 5 overlaps SSB, and symbol 6, symbol 7 may transmit the remaining SRS).

As another example, if the time domain position where uplink data transmission cannot be performed is considered includes: the time domain position corresponding to the symbol occupied by the reference synchronous signal block and the conversion time before and after the reference synchronous signal block. Symbols occupied by the reference synchronous signal block are symbol 2, symbol 3, symbol 4 and symbol 5, and symbols carrying uplink data are symbol 5, symbol 6 and symbol 7. At this time, it may be determined that the symbol carrying the uplink data collides with the symbol occupied by the reference synchronization signal block. The uplink data is not transmitted at the switching time after the symbol 5 and the symbol 5 (assuming that the length of the switching time is 1 symbol), or the uplink data is not transmitted at any of the symbol 5, the symbol 6, and the symbol 7. (note: whether or not uplink data can be transmitted in non-overlapping symbols depends on the type of uplink data/channel, e.g., if scheduled for uplink control channel (PUCCH) or uplink shared channel (PUSCH) transmission, symbol 5 overlaps with SSB, switching time after SSB overlaps with symbol 6, PUCCH and PUSCH terminate transmission, i.e., neither symbol 5 nor symbol 6 nor symbol 7 transmits uplink, and if symbol 5, symbol 6, or symbol 7 is scheduled for Sounding Reference Signal (SRS) transmission, symbol 5 overlaps with SSB, switching time after SSB overlaps with symbol 6, symbol 5 and symbol 6 do not transmit SRS, symbol 7 may transmit the remaining SRS, or the portions of symbol 5 and symbol 6 overlapping with switching time do not transmit SRS, and the portions of symbol 6 not overlapping with switching time and 7 may transmit the remaining SRS).

Thus, when uplink data transmission is performed, the symbol to which the uplink data is transmitted is a symbol not occupied by the reference synchronization signal block.

The data processing method provided in the above-described embodiment of the present invention is explained below by way of example.

It should be noted that, in the following examples, the number of NCD-SSBs and CD-SSBs in one activated BWP is merely illustrative, and in practical applications, the number of NCD-SSBs and CD-SSBs in one activated BWP may be other numbers.

Referring to fig. 7, a schematic diagram of symbol occupancy of an activated BWP in an embodiment of the invention is given. In fig. 7, one active BWP corresponds to a downlink, including two NCD-SSBs and three CD-SSBs. The period of the NCD-SSB is greater than the period of the CD-SSB, and when both NCD-SSB and CD-SSB are transmitted, they occupy the same set of symbols, with No offset between NCD-SSB and CD-SSB.

In fig. 7, if the NCD-SSB is determined to be the reference synchronization signal block, it can be seen that there is no collision between the symbols occupied by the NCD-SSB and the symbols occupied by the uplink data transmission (i.e., the symbols occupied by UL1 and UL2 in fig. 7, and the number of the symbols occupied by UL1 and UL2 can be 1 or more), so that the uplink data can be transmitted on the symbols occupied by UL.

If the CD-SSB is determined to be the reference synchronization signal block, it can be seen that the symbol occupied by the CD-SSB collides with the symbol occupied by the uplink data transmission, and the uplink data transmission cannot be performed by using the symbol occupied by the UL2, and only the uplink data transmission can be performed by using the symbol occupied by the UL 1.

With continued reference to fig. 7, if the requirement for synchronization measurement requirements is low, i.e., synchronization measurements need not be performed frequently (e.g., not within SMTC windows, or within other preset measurement windows), then NCD-SSB may be determined to be the reference synchronization signal block. If the requirement for the synchronization measurement is high, that is, the synchronization measurement needs to be performed frequently, the CD-SSB may be determined as the reference synchronization signal block.

Referring to fig. 8, a symbol occupancy diagram of another active BWP in an embodiment of the invention is given. In fig. 8, one activated BWP corresponds to a downlink, including three NCD-SSBs and three CD-SSBs. The period of NCD-SSB is equal to the period of CD-SSB, and there is an offset between NCD-SSB and CD-SSB.

As can be seen from fig. 8, when NCD-SSB and CD-SSB occur in the same frequency range of BWP, SSB (including NCD-SSB and CD-SSB) has a high density, and the probability of collision with uplink data transmission increases greatly.

The number of symbols UL1 and UL2 occupied for transmitting uplink data may be 1 or more. If the NCD-SSB is determined to be the reference synchronous signal block, the symbols occupied by the NCD-SSB and the symbols occupied by the UL1 and the UL2 are not transmitted to collide, so that uplink data can be normally transmitted on the symbols occupied by the UL1 and the UL 2.

If the CD-SSB is determined to be the reference synchronization signal block, the symbol occupied by the CD-SSB collides with the symbol occupied by UL2, so that uplink data can be transmitted only through the symbol occupied by UL1, and uplink data cannot be transmitted on the symbol occupied by UL 2.

Referring to fig. 9, a symbol occupancy diagram of still another activated BWP in an embodiment of the invention is given. In fig. 9, one active BWP corresponds to a downlink, including two NCD-SSBs and three CD-SSBs. The period of NCD-SSB is greater than the period of CD-SSB, and there is an offset between the NCD-SSB and the CD-SSB occupancy.

If the CD-SSB is determined to be the reference synchronization signal block, the symbol occupied by the CD-SSB collides with the symbol occupied by UL1, so that uplink data can be transmitted only through the symbol occupied by UL2, and uplink data cannot be transmitted on the symbol occupied by UL 1.

In summary, since the first type synchronization signal block or the second type synchronization signal block is determined as the reference synchronization signal block, a time domain position where uplink data transmission cannot be performed is determined based on the determined reference synchronization signal block. Since only the first type synchronization signal block or the second type synchronization signal block can be used as the reference synchronization signal block, the number of the synchronization signal blocks in the activated BWP is reduced, and therefore the probability of collision between the uplink and downlink data transmission can be effectively reduced. And the first type of synchronous signal block and the second type of synchronous signal block can be used as reference synchronous signal blocks when the measurement requirement exists, so that the number of synchronous signal blocks in the activated BWP is increased, and the measurement efficiency can be effectively increased.

Referring to fig. 10, another data processing method in an embodiment of the present invention is given, and detailed description is given below through specific steps.

In the embodiment of the present invention, the data processing methods corresponding to the following steps 11 to 12 may be executed by a chip having data processing capability in the network device, or by a chip module including the chip having data processing capability in the network device. The following description will take a network device as an execution body as an example.

Step 11, determining a reference synchronization signal block.

In a specific implementation, the reference synchronization signal block may be a first type synchronization signal block or a second type synchronization signal block. The first type of synchronization signal block and the second type of synchronization signal block are different types of synchronization signal blocks.

In the embodiment of the present invention, if the network device detects that the first type of synchronization signal block and the second type of synchronization signal block simultaneously occur in the same activated BWP, the network device may determine to use the first type of synchronization signal block as the reference synchronization signal block or use the second type of synchronization signal block as the reference synchronization signal block.

The first type of synchronization signal block may be an NCD-SSB and the second type of synchronization signal block may be a CD-SSB. Alternatively, the first type of synchronization signal block is a CD-SSB and the second type of synchronization signal block is an NCD-SSB.

And step 12, sending indication information.

In a specific implementation, after determining the reference synchronization signal block, the network device may send indication information to the terminal device, where the indication information may be used to indicate which type of synchronization signal block is used as the reference synchronization signal block.

After receiving the indication information, the terminal device can know which synchronization signal block is the reference synchronization signal block. The operations performed by the terminal device using the reference synchronization signal block may correspond to the above-mentioned step 102 and corresponding examples, and will not be described herein.

Referring to fig. 11, a data processing apparatus 110 according to an embodiment of the present invention is provided, including: a first determination unit 111 and a second determination unit 112, wherein:

a first determining unit 111 for determining a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth;

a second determining unit 112, configured to determine a time domain position where uplink data transmission cannot be performed based on the determined reference synchronization signal block.

In specific implementation, the specific execution process of the first determining unit 111 and the second determining unit 112 may refer to steps 101 to 102 correspondingly, which is not described herein.

In a specific implementation, the data processing apparatus 110 may correspond to a chip with a data processing function in a terminal device; or corresponds to a chip module including a chip having a data processing function in the terminal device, or corresponds to the terminal device.

Referring to fig. 12, another data processing apparatus 120 according to an embodiment of the present invention is provided, including: a third determination unit 121 and a transmission unit 122, wherein:

a third determining unit 121 for determining a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth;

a transmitting unit 122, configured to transmit indication information, where the indication information is used to indicate the reference synchronization signal block.

In specific implementation, the specific execution process of the third determining unit 121 and the sending unit 122 may refer to steps 11 to 12, which are not described herein.

In a specific implementation, the data processing apparatus 120 may correspond to a chip with a data processing function in a network device; or corresponds to a chip module including a chip having a data processing function in the network device, or corresponds to the network device.

In a specific implementation, regarding each apparatus and each module/unit included in each product described in the above embodiments, it may be a software module/unit, or a hardware module/unit, or may be a software module/unit partially, or a hardware module/unit partially.

For example, for each device or product applied to or integrated on a chip, each module/unit included in the device or product may be implemented in hardware such as a circuit, or at least part of the modules/units may be implemented in software program, where the software program runs on a processor integrated inside the chip, and the rest (if any) of the modules/units may be implemented in hardware such as a circuit; for each device and product applied to or integrated in the chip module, each module/unit contained in the device and product can be realized in a hardware manner such as a circuit, different modules/units can be located in the same component (such as a chip, a circuit module and the like) or different components of the chip module, or at least part of the modules/units can be realized in a software program, the software program runs on a processor integrated in the chip module, and the rest (if any) of the modules/units can be realized in a hardware manner such as a circuit; for each device, product, or application to or integrated with the terminal, each module/unit included in the device, product, or application may be implemented by using hardware such as a circuit, different modules/units may be located in the same component (for example, a chip, a circuit module, or the like) or different components in the terminal, or at least part of the modules/units may be implemented by using a software program, where the software program runs on a processor integrated inside the terminal, and the remaining (if any) part of the modules/units may be implemented by using hardware such as a circuit.

The embodiment of the invention also provides a computer readable storage medium, which is a non-volatile storage medium or a non-transitory storage medium, and has a computer program stored thereon, wherein the computer program when executed by a processor performs the steps of the data processing method provided in steps 101 to 102 or performs the steps of the data processing method provided in steps 11 to 12.

The embodiment of the invention also provides a data processing device, which comprises a memory and a processor, wherein the memory stores a computer program capable of running on the processor, and the processor executes the steps of the data processing method provided by the steps 101 to 102 or the steps of the data processing method provided by the steps 11 to 12 when running the computer program.

Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program that instructs related hardware, the program may be stored on a computer readable storage medium, and the storage medium may include: ROM, RAM, magnetic or optical disks, etc.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims

1. A method of data processing, comprising:

determining a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth;

based on the determined reference synchronization signal block, a time domain position where uplink data transmission is not possible is determined.

2. The data processing method of claim 1, wherein the determining the reference synchronization signal block comprises:

defaulting the first type of synchronization signal block to the reference synchronization signal block; or,

defaulting the second type of synchronization signal block to the reference synchronization signal block; or,

defaults to the first type and second type synchronization signal blocks as the reference synchronization signal blocks.

3. The data processing method of claim 1, wherein the determining the reference synchronization signal block comprises:

and determining the reference synchronous signal block according to the synchronous measurement requirement.

4. The data processing method of claim 1, wherein the determining the reference synchronization signal block comprises:

determining the first type of synchronization signal block as the reference synchronization signal block when an offset exists between the first type of synchronization signal block and the second type of synchronization signal block; or,

determining the second type of synchronization signal block as the reference synchronization signal block when an offset exists between the first type of synchronization signal block and the second type of synchronization signal block; or,

and when the first type synchronous signal block and the second type synchronous signal block are offset, determining the first type synchronous signal block and the second type synchronous signal block as the reference synchronous signal block.

5. The data processing method of claim 1, wherein the determining the reference synchronization signal block comprises:

and when the first type synchronous signal block and the second type synchronous signal block have offset, and the period of the first type synchronous signal block is larger than that of the second type synchronous signal block, determining the first type synchronous signal block as the reference synchronous signal block.

6. The data processing method of claim 1, wherein the determining the reference synchronization signal block comprises:

receiving indication information;

and determining the reference synchronous signal block according to the indication information.

7. A method of data processing, comprising:

and sending indication information, wherein the indication information is used for indicating the reference synchronous signal block.

8. A data processing apparatus, comprising:

a first determining unit configured to determine a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth;

and a second determining unit configured to determine a time domain position where uplink data transmission is impossible based on the determined reference synchronization signal block.

9. A data processing apparatus, comprising:

a third determining unit configured to determine a reference synchronization signal block; the reference synchronous signal block is a first type synchronous signal block and/or a second type synchronous signal block, and the first type synchronous signal block and the second type synchronous signal block are positioned in the same activated partial bandwidth;

and the sending unit is used for sending indication information, wherein the indication information is used for indicating the reference synchronous signal block.

10. A computer-readable storage medium, which is a non-volatile storage medium or a non-transitory storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, performs the steps of the data processing method according to any one of claims 1 to 7.

11. A data processing apparatus comprising a memory and a processor, said memory having stored thereon a computer program executable on said processor, characterized in that said processor executes the steps of the data processing method according to any of claims 1 to 6 when said computer program is executed; alternatively, the steps of the data processing method of claim 7 are performed.