CN117439838A - Edge computing gateway master-slave machine-oriented self-adaptive rapid networking method - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/66—Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
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- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention discloses a self-adaptive rapid networking method for an edge computing gateway master-slave machine, which relates to the technical field of communication systems and mainly comprises the following steps: step 1: detecting whether to enter a registration state or not, and preparing to enter; step 2: entering a registration state, and detecting a registration initiating slave board; step 3: receiving and transmitting the main board and the slave board, and updating registry information; step 4: detecting a slave plate state, and exiting registration; the method mainly adopts an edge computing network management technology consisting of a main board and a plurality of slave boards, can realize online real-time rapid networking of a host computer to a plurality of slave computers through a hardware GPIO pin, an RS485 bus and a self-defined communication protocol, and realizes self-adaptive rapid networking of the slave computers of the edge computing gateway host computer.
Description
Technical Field
The invention relates to the technical field of communication systems, in particular to an edge computing gateway master-slave machine-oriented self-adaptive rapid networking method.
Background
The intelligent factory is a new stage of informatization development of modern factories, takes a digital factory as a basic, and strengthens information management and service by using an emerging technology; the production and sales flow is clearly mastered, the controllability of the production process is improved, the manual intervention on the production line is reduced, the production line data is timely and accurately collected, and reasonable production plans and schedules are arranged. By fusing the novel technologies such as green and intelligent means, intelligent systems and the like, a high-efficiency, energy-saving, environment-friendly and comfortable humanized factory is constructed. However, in an industrial production process, various production identification data are heterogeneous and have a large amount of data. Meanwhile, the industrial production environment is complex, and the data has the characteristic of real-time property. For on-site data processing, specific data acquisition and computation is often required on a computing platform. In the big data age, the complex and huge data volume means that the network bears huge load in the data processing process, which has become an unavoidable problem of cloud computing which is rapidly developed in recent years. In terms of delay and bandwidth load of a computer, cloud computing often cannot meet equipment user experience and real-time application requirements due to factors such as excessive load and distance; in terms of data security, although cloud computing has two major business services of public cloud and private cloud, the cloud computing still has the defects of low data privacy security, high deployment cost and the like, when the cloud computing is performed, because system data are all gathered to the cloud, the whole system is always paralyzed due to the fact that a cloud server breaks down, and if all tasks are processed in the cloud, a high failure rate is caused due to delay.
Therefore, an edge computing gateway master-slave machine self-adaptive rapid networking method is designed to solve the problems.
Disclosure of Invention
The invention aims to solve the defects of low cloud computing data privacy safety, high fault rate, high deployment cost and the like in the prior art, and provides an edge computing gateway master-slave machine-oriented self-adaptive quick networking method which is used for achieving better effect of edge computing in intelligent factories.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
an edge computing gateway master-slave machine-oriented self-adaptive rapid networking method mainly comprises the following steps:
step 1, detecting whether a master-slave machine enters a registration state or not, and preparing to enter;
step 2, entering a registration state, and detecting a registration initiating slave board;
step 3, receiving and transmitting the main board and the slave board, and updating registry information;
and 4, detecting the slave plate state and exiting registration.
Further preferably, the step 1 of detecting whether to enter the registration state, and preparing to enter, includes the following steps:
step 1.1, initializing serial port and 485 control equipment:
calling a UART equipment function path to realize the opening of the serial port, and if the opening fails, returning failure information 0; the RS485 control equipment is opened through an open function, and if the opening fails, failure information 0 is returned;
step 1.2, after the UART equipment is opened, initializing specific values of port numbers, peter's Lv, data bits, stop bits and check bits of the UART equipment;
step 1.3, initializing and configuring GPIO:
step 1.3.1, initializing and configuring GPIO as an input mode;
step 1.3.2, configuring 8 cs pins, setting the pins as input modes, judging the state of each cs pin, and when the state of one cs pin is 1, indicating that the slave board card is pulled out, wherein the corresponding position of the equipment table is 0; when the state of a certain cs pin is 0, the slave board card is not pulled out, whether the corresponding position of the equipment table is 0 is further judged, and if the corresponding position is 0, the corresponding position is recorded as a board_reg_pos;
step 1.4: the device address is communicated and acquired in preparation for entering the registration state.
Further preferably, the step 2, entering a registration state, detects that the registration-initiating slave board includes the following steps:
step 2.1, monitoring the GPIO pin state:
the program continuously checks the state of the GPIO pin, when the state of the GPIO pin is 1, the normal communication flow is entered, and when the state of the GPIO pin is 0, a register function is called to read the registry information of the IO card;
step 2.2, reading registry information to determine the type of the IO board card,
and through communication with the IO board card, the registry information of the IO board card is read, the model of the IO board card is obtained, a registration flow is entered, and a registration slave board is initiated.
Further preferably, the step 3 of receiving and transmitting the master board and the slave board and updating the registry information includes the following steps:
step 3.1, the host sets a transmission mode as serial port transmission, modifies relevant port information and binary information transmitted by the host, transmits a connection request to the slave, requests the slave to return corresponding registry information, and waits for data transmission to be completed;
step 3.2, the host sets a receiving mode as serial port receiving and reads the return information of the slave;
step 3.3, judging whether the host successfully receives the data, if not, returning to the step 3.1, and continuing to send the connection request;
step 3.4, judging whether the received data are in a correct format, if so, printing the received information content by the printing host, and circularly displaying the information content on a host screen;
and 3.5, the host confirms that the received information is accurate, acquires the board card model of the corresponding slave, and updates the information content of the slave board card at the corresponding position in the host registry.
Further preferably, the step 4 of detecting the registration from the plate state includes the steps of:
step 4.1, the host completes registration, modifies the identifier, and sets the last bit of the board_reg_pos to 1, indicating that registration is complete;
step 4.2, circularly detecting the states of 8 slave board GPIO pins, when the states of the slave board GPIO pins are 1, indicating that the slave board GPIO pins exit from a registration state and enter a normal communication flow, when the states of the slave board GPIO pins are 0, indicating that the slave board GPIO pins exit from failure, and detecting the GPIO pins again after waiting for delay;
step 4.3, if the state of the 8 slave boards GPIO pins is circularly detected for a plurality of times and the state of the slave boards GPIO pins is not detected to be in a registered state, the host sets a transmission mode to be serial port transmission, and transmits a forced exit signal to the slave machine to indicate early warning;
step 4.4, the slave sets a receiving mode as serial port receiving, and after receiving the early warning signal, the slave modifies the state into a registration forced exit state;
and 4.5, the slave sets a transmission mode as serial port transmission, the host sets a receiving mode as serial port reception, the slave transmits registration forced exit state to the host, the slave enters a dormant state, and the host returns to the step 1 for detection.
Further preferably, in the step 3.1, the relevant port information and the binary information sent by the host are modified, and the connection request is sent to the slave, where a sending frame format of the host is: 0Xff board_reg_pos 0x00 0x05 0xFA; in the step 3.2, the format of the slave return information frame is: 0xFF board_reg_pos the card type 0x05 x fa.
Further preferably, in the step 3.4, it is determined whether the received data is in a correct format, and the format determination content is: the frame start symbol, the frame end symbol, whether the board type corresponds to the corresponding contents in the registry, and location information.
Compared with the prior art, the invention has the beneficial effects that: the method can realize the online real-time quick networking of one host computer to multiple slaves through the hardware GPIO pins, the RS485 bus and the self-defined communication protocol, and realize the self-adaptive quick networking of the edge computing gateway host computer slaves; the access and exit states of the slave can be judged in real time, the activity detection of the slave is realized, and the failure rate is reduced; the method can realize plug and play of the slave machine, does not need to allocate an address to the slave machine through a dial switch, enables the new slave machine to be accessed intelligently in real time, does not need to restart the host machine, and reduces the deployment cost of system equipment.
Drawings
Fig. 1 is a schematic flow chart of the working principle of the edge computing gateway master-slave machine self-adaptive fast networking method;
FIG. 2 is a normal communication flow chart in an embodiment of the invention;
fig. 3 is a schematic diagram of an intelligent factory system architecture based on edge-oriented computing gateway master-slave self-adaptive fast networking in an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments.
A system that incorporates an Edge computing architecture in a smart factory system may be referred to as an Edge gateway system (Edge Gateway System, EGS), and then Edge Nodes (EN) are devices that serve to adjectively assume the role of Edge computing and act as Access Points (APs) for the entire Edge computing system. Edge gateway systems in current internet of things applications are increasing, as in some large factories, many devices need to be matched in real time, and delay will result in a high failure rate if all tasks are put in the cloud for processing. Therefore, the deployment of edge nodes to reduce latency is particularly important. In order to make the edge computation work better in the intelligent factory, it is necessary to design and develop an edge gateway system with edge computation feature.
In this embodiment, an edge-oriented computing gateway master-slave machine adaptive fast networking method is provided, as shown in fig. 1, and the method mainly includes the following steps:
step 1, detecting whether a master-slave machine enters a registration state or not, and preparing to enter; the method comprises the following steps:
step 1.1, initializing serial port and 485 control equipment:
and calling a UART device function PATH function, wherein fd=open (UART_DEV_PATH, O_RDWR|O_NOCTTY|O_NDELAY), and opening the serial device. The UART_DEV_PATH is a UART equipment PATH, and the other parameters O_RDWR can be adjusted according to the read-write requirement and the document format requirement; if the opening fails, returning failure information 0;
by the open function: f2=open (RS 485_dev_path, o_rdwr|o_noctty|o_ndeelay), realizing RS485 control device on. Where RS485_DEV_PATH represents the device PATH. The rest parameters O_RDWR can be adjusted according to the read-write requirement and the document format requirement; if the opening fails, returning failure information 0.
Step 1.2, after the UART device is turned on, initializing specific values such as port number, peltier, data bit, stop bit, check bit and the like of the UART device, uart_init (fd).
Step 1.3, initializing and configuring GPIO by the following method:
step 1.3.1, initializing and configuring GPIO as an input mode;
step 1.3.2, 8 CS (chip select) PINs are configured, from CS 0-PIN to CS 7-PIN, the input mode is set, the state of the CS PIN is judged, when the state of a certain CS PIN is 1, the slave board card is pulled out, the corresponding position of the equipment table is 0, when the state of a certain CS PIN is 0, the slave board card is not pulled out, whether the corresponding position of the equipment table is 0 is further judged, and if 0, the corresponding position is recorded as a board_reg_pos.
Step 1.4: the device address is communicated and acquired in preparation for entering the registration state.
To sum up, in order to obtain the address of the IO board device, the host needs to be able to identify which IO board card has been inserted in the corresponding card handling location (or is currently active). In the code, the host uses 8 cs pins to identify and select a particular IO card. In the main loop, the program will continuously check the status of each cs pin. If the status of a certain cs pin is 0, it indicates that the IO board card is inserted in a corresponding position, so as to obtain a position board_reg_pos of the IO board card.
Step 2, entering a registration state, detecting a registration initiating slave board, and comprising the following steps:
step 2.1, monitoring the GPIO pin state:
the program continuously checks the state of the GPIO pin, enters a normal communication flow when the state of the GPIO pin is 1, and calls a register function (fd, fd2, board_reg_pos) to read the registry information of the IO card when the state of the GPIO pin is 0.
Step 2.2, reading registry information to determine the type of the IO board card:
through communication with the IO board card, registry information of the IO board card is read, the model of the IO board card is further obtained, a registration flow is entered, and a registration slave board is initiated.
Step 3, receiving and transmitting the main board and the slave board, updating registry information, comprising the following steps:
step 3.1, the host sets the transmission mode as serial port transmission, modifies the related port information and the binary information transmitted by the host, and transmits a connection request to the slave, wherein the transmission frame format of the host is as follows: 0Xff board_reg_pos 0x00 0x05 0xFA, the requesting slave returns the corresponding registry information and delays for 1 ms to wait for the data transfer to complete.
Step 3.2, the host sets the receiving mode as serial port receiving, reads the return information of the slave, and the frame format of the return information of the slave is as follows: 0xFF board_reg_pos the card type 0x05 x fa.
And 3.3, judging whether the host successfully receives the data, if not, returning to the step 3.1, and continuing to send the connection request.
Step 3.4, judging whether the format of the received data is correct, wherein the format judgment content is as follows: the frame start symbol, the frame end symbol, whether the board type accords with the corresponding content in the registry or not, and the specific values such as the position information board_reg_pos; if the information is correct, the printing host prints the received information content, and the information content is circularly displayed on a host screen.
And 3.5, the host confirms that the received information is accurate, obtains the model of the corresponding slave board card, and updates the information content of the slave board card at the corresponding position in the host registry.
Step 4, detecting the slave plate state and exiting registration; the method comprises the following steps:
step 4.1, the host completes registration, modifies the identifier, and sets the last bit of the board_reg_pos to 1, indicating that registration is complete;
step 4.2, circularly detecting the states of 8 slave board GPIO pins, when the slave board GPIO pin state is 1, indicating to exit the registration state, entering a normal communication flow, when the slave board GPIO pin state is 0, indicating to exit failure, waiting for detecting the GPIO state again after delaying for 1 millisecond;
and 4.3, if the state of the 8 slave boards GPIO pins is circularly detected for a plurality of times and the state of the slave boards GPIO pins is not detected to be logged out of the registration state (in the embodiment, the cycle detection times are set to be 10 times), the host sets the transmission mode to be serial port transmission, and a forced log-out signal is sent to the slave machine to indicate early warning.
And 4.4, the slave sets the receiving mode as serial port receiving, and after receiving the early warning signal, the slave modifies the state into a registration forced exit state.
And 4.5, the slave sets a transmission mode as serial port transmission, the host sets a receiving mode as serial port reception, the slave transmits registration forced exit state to the host, the slave enters a dormant state, and the host returns to the step 1 for detection.
In this embodiment, the entering normal communication flow indicated in the above step 4.2 indicates that the registration has been completed to perform the function implementation, and as shown in fig. 2, the entering normal communication flow includes starting the normal communication flow, receiving an instruction from a host (upper computer), identifying a function code, executing a corresponding operation, ending the communication, and returning to the While loop.
In the embodiment, the edge data acquisition control platform based on the Linux system is used for the edge computing gateway master-slave machine self-adaptive quick networking method. Through the establishment of SPI communication between a host computer and a slave computer, system type selection is carried out according to the requirement of a system, an RK3568 chip is selected as a main chip of a Linux system board of the system, and schematic diagram design of an RS485 interface, an HDMI interface, an Ethernet RJ45 interface, a Wifi interface, an IO board card and the like and packaging and design of a PCB are carried out according to specific requirements, so that final PCB manufacture is completed. And on software, a serial communication algorithm is learned and designed in a Linux system. Finally, interface test is carried out on a designed data acquisition control platform, the stability and reliability of data acquisition of a designed edge data acquisition empty platform are proved, and fig. 3 is an intelligent factory system architecture of the edge computing gateway master-slave machine self-adaptive quick networking method provided by the embodiment, wherein the architecture mainly establishes transmission connection between a distributed gateway, a distributed server and intelligent equipment in a factory and local edge computing service in a factory system, the intelligent equipment and the distributed gateway mutually send requests, the local edge computing service is called by the distributed gateway, the distributed server and the intelligent equipment, and data storage and transportation are carried out between the distributed server and the intelligent equipment; of course, distributed gateways and distributed servers may also use cloud computing service technology.
The foregoing is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art, who is within the scope of the present invention, should make equivalent substitutions or modifications according to the technical scheme of the present invention and the inventive concept thereof, and should be covered by the scope of the present invention.
Claims (7)
1. An edge computing gateway master-slave machine-oriented self-adaptive rapid networking method is characterized by comprising the following steps of:
step 1, detecting whether a master-slave machine enters a registration state or not, and preparing to enter;
step 2, entering a registration state, and detecting a registration initiating slave board;
step 3, receiving and transmitting the main board and the slave board, and updating registry information;
and 4, detecting the slave plate state and exiting registration.
2. The method for adaptively and rapidly networking an edge-oriented computing gateway master-slave machine according to claim 1, wherein the step 1 of detecting whether to enter a registration state and preparing for entering comprises the following steps:
step 1.1, initializing serial port and 485 control equipment:
calling a UART equipment function path to realize the opening of the serial port, and if the opening fails, returning failure information 0; the RS485 control equipment is opened through an open function, and if the opening fails, failure information 0 is returned;
step 1.2, after the UART equipment is opened, initializing specific values of port numbers, peter's Lv, data bits, stop bits and check bits of the UART equipment;
step 1.3, initializing and configuring GPIO:
step 1.3.1, initializing and configuring GPIO as an input mode;
step 1.3.2, configuring 8 cs pins, setting the pins as input modes, judging the state of each cs pin, and when the state of one cs pin is 1, indicating that the slave board card is pulled out, wherein the corresponding position of the equipment table is 0; when the state of a certain cs pin is 0, the slave board card is not pulled out, whether the corresponding position of the equipment table is 0 is further judged, and if the corresponding position is 0, the corresponding position is recorded as a board_reg_pos;
step 1.4: the device address is communicated and acquired in preparation for entering the registration state.
3. The edge-oriented computing gateway master-slave self-adaptive fast networking method according to claim 1, wherein the step 2, entering a registration state, detecting to initiate a registration slave board, comprises the following steps:
step 2.1, monitoring the GPIO pin state:
the program continuously checks the state of the GPIO pin, when the state of the GPIO pin is 1, the normal communication flow is entered, and when the state of the GPIO pin is 0, a register function is called to read the registry information of the IO card;
step 2.2, reading registry information to determine the type of the IO board card:
and through communication with the IO board card, the registry information of the IO board card is read, the model of the IO board card is obtained, a registration flow is entered, and a registration slave board is initiated.
4. The method for adaptively and rapidly networking an edge-oriented computing gateway master-slave machine according to claim 1, wherein the step 3 of receiving and transmitting the master board and the slave board and updating the registry information comprises the following steps:
step 3.1, the host sets a transmission mode as serial port transmission, modifies relevant port information and binary information transmitted by the host, transmits a connection request to the slave, requests the slave to return corresponding registry information, and waits for data transmission to be completed;
step 3.2, the host sets a receiving mode as serial port receiving and reads the return information of the slave;
step 3.3, judging whether the host successfully receives the data, if not, returning to the step 3.1, and continuing to send the connection request;
step 3.4, judging whether the received data are in a correct format, if so, printing the received information content by the printing host, and circularly displaying the information content on a host screen;
and 3.5, the host confirms that the received information is accurate, acquires the board card model of the corresponding slave, and updates the information content of the slave board card at the corresponding position in the host registry.
5. The method for adaptively and rapidly networking an edge-oriented computing gateway master-slave machine according to claim 1, wherein the step 4 of detecting the slave plate state and exiting registration comprises the following steps:
step 4.1, the host completes registration, modifies the identifier, and sets the last bit of the board_reg_pos to 1, indicating that registration is complete;
step 4.2, circularly detecting the states of 8 slave board GPIO pins, when the states of the slave board GPIO pins are 1, indicating that the slave board GPIO pins exit from a registration state and enter a normal communication flow, when the states of the slave board GPIO pins are 0, indicating that the slave board GPIO pins exit from failure, and detecting the GPIO pins again after waiting for delay;
step 4.3, if the state of the 8 slave boards GPIO pins is circularly detected for a plurality of times and the state of the slave boards GPIO pins is not detected to be in a registered state, the host sets a transmission mode to be serial port transmission, and transmits a forced exit signal to the slave machine to indicate early warning;
step 4.4, the slave sets a receiving mode as serial port receiving, and after receiving the early warning signal, the slave modifies the state into a registration forced exit state;
and 4.5, the slave sets a transmission mode as serial port transmission, the host sets a receiving mode as serial port reception, the slave transmits registration forced exit state to the host, the slave enters a dormant state, and the host returns to the step 1 for detection.
6. The method for adaptively and rapidly networking an edge-oriented computing gateway master-slave machine according to claim 4, wherein in the step 3.1, the relevant port information and the binary information sent by the host machine are modified, a connection request is sent to the slave machine, and a sending frame format of the host machine is as follows: 0Xff board_reg_pos 0x00 0x05 0xFA; in the step 3.2, the format of the slave return information frame is: 0xFF board_reg_pos the card type 0x05 x fa.
7. The method for adaptively and rapidly networking an edge-oriented computing gateway master-slave machine according to claim 4, wherein in the step 3.4, it is determined whether the received data is in a correct format, and the format determination content is as follows: the frame start symbol, the frame end symbol, whether the board type corresponds to the corresponding contents in the registry, and location information.
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| CN110825491A (en) * | 2019-10-31 | 2020-02-21 | 福建天晴在线互动科技有限公司 | Virtual environment detection method based on firewall registry characteristics |
| CN112379896A (en) * | 2020-11-24 | 2021-02-19 | 中教云智数字科技有限公司 | Software communication interaction method based on registry and http protocol |
| CN114356665A (en) * | 2021-12-23 | 2022-04-15 | 中国航空工业集团公司西安航空计算技术研究所 | Comprehensive photoelectric signal processing computing resource management method |
| CN115665785A (en) * | 2022-11-21 | 2023-01-31 | 保定飞凌嵌入式技术有限公司 | LINUX board card-based wireless network card self-management application program module and method |
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| CN117992389A (en) * | 2024-04-03 | 2024-05-07 | 南京群顶科技股份有限公司 | Power management device and method for edge computing gateway |
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