CN117421138A - Inter-process communication method and device, electronic equipment and storage medium - Google Patents

Inter-process communication method and device, electronic equipment and storage medium Download PDF

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Publication number
CN117421138A
CN117421138A CN202311434862.0A CN202311434862A CN117421138A CN 117421138 A CN117421138 A CN 117421138A CN 202311434862 A CN202311434862 A CN 202311434862A CN 117421138 A CN117421138 A CN 117421138A
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memory
address
receiving end
receiving
identifier
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李养兆
于鲁宪
崔新民
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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Priority to CN202311434862.0A priority Critical patent/CN117421138A/en
Publication of CN117421138A publication Critical patent/CN117421138A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/546—Message passing systems or structures, e.g. queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)

Abstract

The invention provides an inter-process communication method, an inter-process communication device, electronic equipment and a storage medium, which relate to the field of inter-process communication, wherein the method is applied to a transmitting end process and comprises the following steps: initiating an address application to a receiving end process, and constructing a plurality of memory identifiers by utilizing a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier point to the same memory position; updating the plurality of memory identifications to a memory pool; when the data to be sent is obtained, a memory identifier is taken out from a memory pool, the data to be sent is written into a memory according to a memory address of a sending end in the taken-out memory identifier, and the taken-out memory identifier is sent to a receiving end process; the sending end process can apply for a plurality of memory addresses of the receiving end to the receiving end process in advance and complete address conversion in advance, so that the efficiency of sending data by the sending end process can be improved.

Description

Inter-process communication method and device, electronic equipment and storage medium
Technical Field
The present invention relates to the field of interprocess communication, and in particular, to an interprocess communication method, an interprocess communication device, an electronic apparatus, and a storage medium.
Background
In the related art, to facilitate inter-process communication, a shared memory mechanism is typically set for multiple processes, so that the multiple processes communicate in the same memory. However, each process is provided with an independent memory manager, and the management mode of each memory manager on the memory and the coding mode of the memory address may be different, so that each memory manager may adopt different memory addresses to point to the same memory block. Therefore, each time the transmitting end process transmits data, the memory address needs to be applied to the receiving end process, the memory address of the receiving end is converted into the memory address of the transmitting end which can be resolved by the transmitting end process, and then the data is written into the memory. This significantly reduces the efficiency of inter-process communication.
Disclosure of Invention
The invention aims to provide an inter-process communication method, an inter-process communication device, electronic equipment and a storage medium, wherein a transmitting end process can apply a plurality of receiving end memory addresses to a receiving end process in advance and complete address conversion in advance, so that the efficiency of transmitting data by the transmitting end process can be improved.
In order to solve the above technical problems, the present invention provides an inter-process communication method, applied to a sender process, including:
Initiating an address application to a receiving end process, and constructing a plurality of memory identifiers by utilizing a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position;
updating the memory identifications to a memory pool;
when the data to be sent is obtained, the memory identifier is taken out from the memory pool, the data to be sent is written into the memory according to the memory address of the sending end in the memory identifier taken out, and the memory identifier taken out is sent to the receiving end process.
Optionally, the constructing a plurality of memory identifiers by using the plurality of receiving end memory addresses returned by the receiving end process includes:
transmitting the multiple receiving end memory addresses to a management program for address conversion to obtain multiple transmitting end memory addresses;
and constructing the memory identifiers by utilizing the memory addresses of the receiving ends and the memory addresses of the corresponding transmitting ends.
Optionally, after the address application is initiated to the receiving end process, the method further includes:
receiving a plurality of memory identifiers returned by the receiving end process; the memory identifier returned by the receiving end process is from an idle linked list in the receiving end process, and the idle linked list is used for recording the memory identifier sent by the sending end process.
Optionally, the initiating the address application to the receiving end process includes:
initiating an address application to the receiving end process by using a first lock-free shared queue, and receiving a plurality of receiving end memory addresses returned by the receiving end process by using the first lock-free shared queue;
the sending the fetched memory identifier to the receiving end process includes:
and sending the fetched memory identifier to the receiving end process by using a second lock-free shared queue.
Optionally, the initiating the address application to the receiving end process includes:
when the number of the available memory identifiers in the memory pool is smaller than a first preset threshold value, continuously initiating an address application to the receiving end process;
stopping initiating an address application to the receiving end process when the number of the available memory identifiers in the memory pool is determined to be larger than a second preset threshold value; the second preset threshold is greater than the first preset threshold.
The invention also provides an inter-process communication method applied to the receiving end process, comprising the following steps:
when receiving an address application initiated by a transmitting end process, returning a plurality of receiving end memory addresses to the transmitting end process;
when a memory identifier sent by the sending end process is received, determining the position of data in a memory according to a receiving end memory address in the memory identifier returned by the sending end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position.
Optionally, after receiving the memory identifier sent by the sender process, the method further includes:
adding the memory identifier to an idle linked list;
correspondingly, after receiving the address application initiated by the sender process, the method further comprises the following steps:
judging whether the idle list is empty or not;
if yes, executing the step of returning a plurality of receiving end memory addresses to the transmitting end process;
if not, the memory identifier is taken out from the idle linked list, and the memory identifier is returned to the transmitting end process.
Optionally, when the address application initiated by the sender process is received, returning a plurality of receiver memory addresses to the sender process, including:
when a first lock-free shared queue is utilized to receive an address application initiated by the process of the sending end, returning a plurality of memory addresses of the receiving end by utilizing the first lock-free shared queue;
receiving the memory identifier sent by the sending end process, including:
and receiving the memory identification sent by the sending end process by using a second lock-free shared queue.
Optionally, before receiving the address application initiated by the sender process, the method further includes:
applying for a plurality of blocks of memory from the management program, and generating the memory address of the receiving end based on the plurality of blocks of memory.
The invention also provides an inter-process communication device, which is applied to a transmitting end process and comprises:
the memory identifier generation module is used for initiating an address application to a receiving end process and constructing a plurality of memory identifiers by utilizing a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position;
the memory pool updating module is used for updating the memory identifiers to the memory pool;
and the data transmitting module is used for taking out the memory identifier from the memory pool when the data to be transmitted is acquired, writing the data to be transmitted into the memory according to the memory address of the transmitting end in the memory identifier taken out, and transmitting the memory identifier taken out to the receiving end process.
The invention also provides an inter-process communication device, which is applied to a receiving end process and comprises:
the application response module is used for returning a plurality of receiving end memory addresses to the sending end process when receiving an address application initiated by the sending end process;
the data receiving module is used for determining the position of data in the memory according to the memory address of the receiving end in the memory identifier returned by the transmitting end process when the memory identifier sent by the transmitting end process is received; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position.
The present invention also provides an electronic device including:
a memory for storing a computer program;
and a processor for implementing the inter-process communication method as described above when executing the computer program.
The present invention also provides a computer-readable storage medium having stored therein computer-executable instructions that, when loaded and executed by a processor, implement an inter-process communication method as described above.
The invention provides an inter-process communication method, which is applied to a transmitting end process and comprises the following steps: initiating an address application to the receiving end process, and constructing a plurality of memory identifiers by utilizing a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position; updating the memory identifications to a memory pool; when the data to be sent is obtained, the memory identifier is taken out from the memory pool, the data to be sent is written into the memory according to the memory address of the sending end in the memory identifier taken out, and the memory identifier taken out is sent to the receiving end process.
In the invention, before data transmission, the transmitting end process can initiate an address application to the receiving end process in advance to obtain a plurality of receiving end memory addresses, and a plurality of memory identifications can be constructed by using the plurality of receiving end memory addresses, wherein each memory identification comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identification point to the same memory position; then, the transmitting end process can update the multiple memory identifications to the memory pool, namely, the conversion work of the memory address can be finished in advance, and multiple conversion results are stored in advance. Therefore, when data transmission is performed, the transmitting end process can directly take out the memory identifier from the memory pool, write the data to be transmitted into the memory according to the transmitting end memory address in the taken out memory identifier, and transmit the taken out memory identifier to the receiving end process, and the receiving end process does not need to independently request the memory address and process the memory address translation when data transmission is performed, so that the data transmission efficiency of the transmitting end process can be remarkably improved, and the inter-process communication efficiency can be improved. The invention also provides an inter-process communication device, electronic equipment and a storage medium, which have the beneficial effects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an inter-process communication system according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method for interprocess communication according to an embodiment of the invention;
FIG. 3 is a flowchart of another method for interprocess communication according to an embodiment of the invention;
FIG. 4 is a schematic diagram of an inter-process communication method according to an embodiment of the present invention;
FIG. 5 is a block diagram illustrating an inter-process communication device according to an embodiment of the present invention;
FIG. 6 is a block diagram illustrating another device for interprocess communication according to an embodiment of the invention;
fig. 7 is a block diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
For ease of understanding, please refer to fig. 1, fig. 1 is a schematic diagram of an inter-process communication system according to an embodiment of the present invention. The system comprises a sender process 100, a receiver process 200 and a hypervisor 300. In the related art, to facilitate inter-process communication, a shared memory mechanism is typically provided for a plurality of processes, that is, the transmitting process 100 and the receiving process 200 may communicate through the same memory (not shown). Because the sending end process 100 and the receiving end process 200 are both provided with independent memory managers (not shown), and the memory managers of different processes have different management modes for the memory and coding modes (memory block addresses) for the memory addresses, the memory addresses in the same memory area cannot be communicated between the two processes. Thus, the system is also provided with a hypervisor 300 for providing translation functions for the memory addresses of the two processes. In this way, when transmitting data, the transmitting process 100 may send the receiving memory address to the hypervisor 300 for address conversion after receiving the receiving memory address returned by the receiving process 200, so as to obtain a corresponding transmitting memory address, and further write the data to be transmitted into the memory according to the transmitting memory address, where the receiving memory address refers to an address that can be resolved by the receiving process 200, and the transmitting memory address refers to an address that can be resolved by the transmitting process 100. However, each time the transmitting process 100 performs data transmission, it is required to separately apply the memory address to the receiving process 200, and send the obtained memory address of the receiving end to the hypervisor 300 for address conversion, so that the efficiency of inter-process communication is significantly reduced. In view of this, the present invention may provide an inter-process communication method, in which the sending end process 100 may apply for multiple receiving end memory addresses to the receiving end process 200 in advance before performing data transmission, and complete address conversion in advance, so that when performing data transmission, the sending end process 100 may directly write data into the memory by using the converted sending end memory address, thereby improving the efficiency of sending data by the sending end process 100.
It should be noted that each process has functions of data transmission and data reception, that is, any process may be a transmitting end process, and may also be a receiving end process. Further, the embodiment of the present invention is not limited to the hardware devices where the sending end process, the receiving end process and the management program are located, and may be, for example, a mobile device, a personal computer, a server, etc., and may be set according to actual application requirements.
Referring to fig. 2, fig. 2 is a flowchart of an inter-process communication method provided by an embodiment of the present invention, where the method is applied to a sender process, and may include:
s201, initiating an address application to a receiving end process, and constructing a plurality of memory identifiers by utilizing a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position.
The sending end process in the embodiment of the invention can apply for a plurality of receiving end memory addresses to the receiving end process in advance before data transmission is carried out, and address conversion is carried out on the plurality of receiving end memory addresses in advance to obtain a plurality of sending end memory addresses. Then, the sender process may construct a plurality of memory identifiers by using each receiver memory address and the corresponding sender memory address, that is, each memory identifier includes a receiver memory address and a sender memory address, and the receiver memory address and the sender memory address in the same memory identifier all point to the same memory location. Thus, the transmitting end process can transmit data by utilizing the pre-constructed memory identifier.
It should be noted that, the receiving end memory addresses applied by the sending end process are exclusive to the sending end process and can only be used by the sending end process, that is, the receiving end process will not use the receiving end memory addresses before recovering the receiving end memory addresses.
It should be noted that, the embodiment of the present invention does not limit how the sender process initiates the address application, and reference may be made to the related art of inter-process communication. In order to reduce the overhead, the embodiment of the invention can set a first lock-free shared queue special for address application, a sending end process can initiate address application to a receiving end process by using the first lock-free shared queue, and a plurality of receiving end memory addresses returned by the receiving end process are received by using the first lock-free shared queue. In the process of data transmission by using the lock-free shared memory queue, the transmitting end only needs to transmit the memory block address of the shared memory to the receiving end, data copying is not needed, the transmitting process does not need to be locked, the memory block address information is input into the queue and output from the queue to operate without locking, the cost is low, and the cross-state switching cost is avoided, and the kernel space is not needed to be accessed and accessed in the transmission process, so that the embodiment of the invention can effectively reduce the cost caused by data exchange between the transmitting end process and the receiving end process, and can improve the data transmission efficiency.
Based on this, initiating an address application to the receiving end process may include:
step 11: initiating an address application to a receiving end process by using a first lock-free shared queue, and receiving a plurality of receiving end memory addresses returned by the receiving end process by using the first lock-free shared queue;
further, as described above, the sending process may send the plurality of receiving memory addresses to the hypervisor for address conversion, so as to obtain a plurality of sending memory addresses, and then a plurality of memory identifiers may be constructed by using each receiving memory address and the corresponding sending memory address.
Based on this, constructing a plurality of memory identifiers by using a plurality of receiving end memory addresses returned by the receiving end process may include:
step 21: and sending the multiple receiving end memory addresses to a management program for address conversion to obtain multiple sending end memory addresses.
Step 22: and constructing a plurality of memory identifications by utilizing the memory addresses of the receiving ends and the memory addresses of the corresponding transmitting ends.
It should be noted that, the embodiment of the present invention is not limited to the specific process of address translation, and reference may be made to related technologies of inter-process communication and shared memory mechanisms.
It should be noted that, in order to improve address application efficiency, batch memory application may be performed, that is, applying for multiple idle memories with the same size at a time. Meanwhile, in order to improve address conversion efficiency, batch address conversion can be performed, i.e. a plurality of memory addresses are mapped at a time.
S202, updating a plurality of memory identifiers to a memory pool.
After the memory identifier construction is completed, the sender process may update the plurality of memory identifiers to the memory pool. When the data is transmitted, the transmitting end process only needs to take the memory identifier from the memory pool and transmit the data by utilizing the taken memory identifier.
It should be noted that, the embodiment of the present invention is not limited to the number of the memory pool capable of storing the memory identifiers, and may be set according to the actual application requirements.
And S203, when the data to be transmitted is obtained, the memory identifier is taken out from the memory pool, the data to be transmitted is written into the memory according to the memory address of the transmitting end in the taken-out memory identifier, and the taken-out memory identifier is transmitted to the receiving end process.
Because the memory identifier is already constructed in advance, when the data to be transmitted is acquired and ready to be transmitted, the transmitting end process can apply for the memory from the memory pool, so as to take out the constructed memory identifier from the memory pool, write the data to be transmitted into the memory according to the transmitting end memory address in the taken-out memory identifier, and transmit the taken-out memory identifier to the receiving end process, so that the receiving end process determines the position of the data to be transmitted in the memory according to the receiving end memory address in the received memory identifier. Obviously, when the transmitting end process transmits data, no memory address is required to be additionally applied to the receiving end process, and no address conversion is required to be additionally carried out, so that the data transmission rate is obviously improved.
It should be noted that, the memory identifier received by the receiving end process is monopolized by the receiving end process and can only be accessed by the receiving end process. In other words, the sending process will not reuse the memory identifier before it is again aware of the memory identifier that has been sent to the receiving process.
Further, in order to reduce overhead, the embodiment of the invention may set a second lock-free shared queue dedicated for transmitting the memory identifier, that is, the sending end process may send the fetched memory identifier to the receiving end process by using the second lock-free shared queue, so as to improve the efficiency of exchanging data between the sending end process and the receiving end process based on the characteristics of the lock-free shared queue. It should be noted that, the second lock-free shared queue may be isolated from the first lock-free shared queue above, so as to ensure that the resources of the receiving and transmitting ends do not affect each other, and the sending is not affected because the IO operation (i/o operation) of the receiving end enters an asynchronous waiting state (in which the memory resources of the queue are occupied for a long time), so that the isolation is achieved from the resource level. That is, the sending end process and the receiving end process can utilize the first lock-free shared queue and the second lock-free shared queue to simultaneously apply for addresses and send data, so that the communication efficiency between the sending end process and the receiving end process can be further improved.
Based on this, sending the fetched memory identifier to the receiving end process may include:
step 31: and sending the fetched memory identifier to the receiving end process by using the second lock-free shared queue.
Furthermore, after receiving the memory identifiers returned by the transmitting end process, the receiving end process can also utilize an idle linked list to uniformly store the memory identifiers. Therefore, when the address application initiated by the sender process is received, the receiver process can also directly return the memory identifier in the idle linked list to the sender process, so that the number of address conversion times of the sender process can be reduced, and the inter-process communication efficiency can be further improved. In other words, when the receiving end process receives the address application initiated by the sending end process, the receiving end process may return the memory address of the receiving end to the sending end process, or may return the memory identifier previously sent by the receiving end process to the sending end process.
Based on this, after the address application is initiated to the receiving end process, it may further include:
step 41: receiving a plurality of memory identifiers returned by a receiving end process; the memory identifier returned by the receiving end process is from an idle linked list in the receiving end process, and the idle linked list is used for recording the memory identifier sent by the sending end process.
Further, in the data transmission process, the idle memory identifier in the memory pool of the transmitting end process is continuously reduced. In order to ensure that the sender process always has a sufficient amount of memory identifiers available, when the number of the memory identifiers available in the memory pool is determined to be smaller than a preset threshold value, the sender process can start to initiate an address application to the receiver process. Of course, to ensure that the sender process can obtain a sufficient amount of memory identifiers, a first preset threshold and a second preset threshold may also be set, where the second preset threshold is greater than the first preset threshold, and further the sender process may continuously initiate an address application to the receiver process when determining that the number of memory identifiers available in the memory pool is less than the first preset threshold, and stop initiating an address application to the receiver process when determining that the number of memory identifiers available in the memory pool is greater than the second preset threshold.
Based on this, initiating an address application to the receiving end process may include:
step 51: when the number of the available memory identifiers in the memory pool is smaller than a first preset threshold value, continuously initiating an address application to a receiving end process;
step 52: stopping initiating an address application to the receiving end process when the number of the available memory identifiers in the memory pool is determined to be larger than a second preset threshold value; the second preset threshold is greater than the first preset threshold.
It should be noted that, the work of executing the address application to the receiving process may be executed by a dedicated working thread in the memory pool. The worker thread may wake up when it is determined that the number of memory identifiers available in the memory pool is less than a first preset threshold and sleep when it is determined that the number of memory identifiers available in the memory pool is greater than a second preset threshold. Since the task of the worker thread is asynchronous with the send operation, the send operation is not blocked.
Based on the above embodiment, in the present invention, before data transmission is performed, a sender process may initiate an address application to a receiver process in advance, so as to obtain multiple receiver memory addresses, and multiple memory identifiers may be constructed by using the multiple receiver memory addresses, where each memory identifier includes a receiver memory address and a sender memory address, and the receiver memory address and the sender memory address in the same memory identifier all point to the same memory location; then, the transmitting end process can update the multiple memory identifications to the memory pool, namely, the conversion work of the memory address can be finished in advance, and multiple conversion results are stored in advance. Therefore, when data transmission is performed, the transmitting end process can directly take out the memory identifier from the memory pool, write the data to be transmitted into the memory according to the transmitting end memory address in the taken out memory identifier, and transmit the taken out memory identifier to the receiving end process, and the receiving end process does not need to independently request the memory address and process the memory address translation when data transmission is performed, so that the data transmission efficiency of the transmitting end process can be remarkably improved, and the inter-process communication efficiency can be improved.
Referring to fig. 3, fig. 3 is a flowchart of another inter-process communication method provided in an embodiment of the present invention, where the method is applied to a receiving end process, and may include:
s301, when an address application initiated by a sender process is received, a plurality of receiver memory addresses are returned to the sender process.
The sending end process in the embodiment of the invention can apply for a plurality of receiving end memory addresses to the receiving end process in advance before data transmission is carried out, and address conversion is carried out on the plurality of receiving end memory addresses in advance to obtain a plurality of sending end memory addresses so as to finish address application and address conversion in advance. Therefore, when receiving the address application initiated by the sender process, the receiver process needs to return multiple receiver memory addresses to the sender process.
As described above, a first lock-free shared queue may be disposed between the sender process and the receiver process, and dedicated for address application. In other words, the receiving end process may use the first shared queue to receive the address application initiated by the sending end process, and use the first shared queue to return the plurality of receiving end memory addresses.
Based on this, when receiving an address application initiated by the sender process, returning a plurality of receiver memory addresses to the sender process may include:
Step 61: when the first lock-free shared queue is utilized to receive an address application initiated by a transmitting end process, the first lock-free shared queue is utilized to return a plurality of receiving end memory addresses;
further, to obtain the available memory, the receiving end process may apply for multiple blocks of memory in advance to the hypervisor to generate a receiving end memory address based on the multiple blocks of memory.
Based on this, before receiving the address application initiated by the sender process, the method may further include:
step 71: and applying for the multiple blocks of memory to the management program, and generating a memory address of the receiving end based on the multiple blocks of memory.
S302, when a memory identifier sent by a transmitting end process is received, determining the position of data in a memory according to a receiving end memory address in the memory identifier returned by the transmitting end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position.
As described above, since the memory identifier has been previously constructed, when the data to be transmitted is acquired and ready to be transmitted, the transmitting process may write the data to be transmitted into the memory according to the transmitting memory address in the memory identifier, and transmit the extracted memory identifier to the receiving process. And the receiving end process can determine the position of the data to be sent in the memory according to the receiving end memory address in the received memory identifier so as to take out the data to be sent from the memory.
Further, in order to reduce the overhead, the embodiment of the invention may set a second lock-free shared queue dedicated for transmitting the memory identifier, that is, the sending end process may use the second lock-free shared queue to send the fetched memory identifier to the receiving end process, and the receiving end process may use the second lock-free shared queue to receive the memory identifier sent by the sending end process, so as to improve the efficiency of exchanging data between the sending end process and the receiving end process based on the characteristics of the lock-free shared queue. It should be noted that, the second lock-free shared queue may be isolated from the first lock-free shared queue above, so as to ensure that the resources of the receiving and transmitting ends do not affect each other, and the sending is not affected because the IO operation (i/o operation) of the receiving end enters an asynchronous waiting state (in which the memory resources of the queue are occupied for a long time), so that the isolation is achieved from the resource level. That is, the sending end process and the receiving end process can utilize the first lock-free shared queue and the second lock-free shared queue to simultaneously apply for addresses and send data, so that the communication efficiency between the sending end process and the receiving end process can be further improved.
Based on this, the receiving the memory identifier sent by the sending end process may include:
Step 81: and receiving the memory identifier sent by the transmitting end process by using the second lock-free shared queue.
Furthermore, after receiving the memory identifiers returned by the transmitting end process, the receiving end process can also utilize an idle linked list to uniformly store the memory identifiers. Therefore, when the address application initiated by the sender process is received, the receiver process can also directly return the memory identifier in the idle linked list to the sender process, so that the number of address conversion times of the sender process can be reduced, and the inter-process communication efficiency can be further improved. In other words, when the receiving end process receives the address application initiated by the sending end process, the receiving end process may return the memory address of the receiving end to the sending end process, or may return the memory identifier previously sent by the receiving end process to the sending end process. And, it can be understood that the receiving end process can determine whether the free list is empty, if so, a plurality of receiving end memory addresses are returned to the sending end process, otherwise, a memory identifier can be returned to the sending end process.
Based on this, after receiving the memory identifier sent by the sender process, the method may further include:
step 91: adding the memory identifier to an idle linked list;
Correspondingly, after receiving the address application initiated by the sender process, the method further comprises the following steps:
step 92: judging whether the free list is empty or not; if yes, go to step 93; if not, go to step 94;
step 93: executing the step of returning a plurality of receiving end memory addresses to the transmitting end process;
step 94: and taking the memory identifier out of the idle linked list, and returning the memory identifier to the transmitting end process.
The inter-process communication method will be described in detail based on a specific schematic diagram. Referring to fig. 4, fig. 4 is a schematic diagram of an inter-process communication method according to an embodiment of the invention. The inter-process communication method is divided into two phases, namely an initialization phase and a transmission phase. Wherein the initialization phase comprises:
1. the receiving end process applies for a plurality of memories from the third party management program and manages the memories as memory resources of the memory manager of the receiving end process.
2. The method comprises the steps that a sending end process initiates a request for creating 2 lock-free shared memory queues to a receiving end process, wherein a queue 1 is used for transmitting idle memory block addresses, and a queue 2 is used for transmitting available data memory block addresses. The two queues are logically independent, so that the purpose is to ensure that the resources of the receiving and transmitting ends are not affected by each other, the receiving end process IO can not enter an asynchronous waiting state (the memory resources of the queues can be occupied for a long time in the state), the transmission is affected, and the isolation is realized from the resource level.
3. The transmitting end process applies for a certain amount of idle memory through the queue 1 in advance, and after the idle memory is applied for, the part of idle memory can only be accessed by the transmitting end process.
4. The transmitting end process transmits the address of the idle memory to a third party management program, the third party management program converts the memory address into a memory address which can be identified by the transmitting end process, and the converted memory address and the memory address before conversion form a memory identifier.
5. The transmitting end process forms a new memory pool by the memory blocks corresponding to the memory identifiers. Logically, the memory pool is a sub-pool of the receiving end process memory pool.
The transmission stage comprises:
1. the transmitting end process applies for a free memory from the memory pool, and the memory pool returns a free memory identifier.
2. The transmitting end process uses the memory address 1 in the memory identifier as the address of the transmitting data, and fills the data to be transmitted into the address range.
3. The transmitting end process uses the queue 2 to transmit the available data memory identifier to the receiving end process, which is equivalent to transmitting data, and only the receiving end process can access the part of memory space after the transmission is completed, and the transmitting end process does not access the part of address space any more. The identification information of the memory is not stored in the process memory pool of the transmitting end.
4. After receiving the available data memory identifier, the receiving end process takes out the memory address 2, and because the memory address 2 is allocated by the local end memory manager, the memory identifier can be used for subsequent processing, for example, transmission to the lower layer of the IO stack, thereby realizing copy-free data transmission. Because the receiving end process monopolizes the part of the memory, the transmitting end process does not need to worry about reusing the memory, and the data is not required to be copied in the transmitting and processing stages.
5. After the receiving end process finishes using the block of memory, the memory identifier is hung on a special idle linked list, and the receiving end process returns to the part of memory when waiting for the sending end process to apply for the idle memory request to arrive. Because the portion of memory has completed the mapping of address 2 to memory address 1, the sender process may reduce the memory mapping overhead of the portion.
In the data transmission process, the idle memory identifiers in the process memory pool of the transmitting end are continuously reduced. In order to ensure that the transmitting end process always has enough memory identifiers available, the method further comprises dynamic water level management of a memory pool, and specifically comprises the following steps:
1. in the data transmission process, the idle memory in the process memory pool of the transmitting end is continuously reduced, and when a certain water level is reached, the working thread is started to lift the number (water level) of the idle memory.
2. The working thread of the memory pool applies for the free memory from the receiving end process through the queue 1, if the returned address identification contains the mapped memory address 1, the free memory is put into the memory pool, otherwise, the address conversion request is sent to the third party management program, the addresses before and after the free memory address conversion are assembled into the memory identification and put into the memory pool, and therefore the water level of the memory pool is raised. Since the task of the worker thread is asynchronous with the send operation, the send operation is not blocked.
3. In order to ensure that the water level lifting rate is greater than the memory consumption rate, batch memory application can be performed, i.e. a plurality of idle memories with the same size are applied at a time. Meanwhile, in order to improve address conversion efficiency, batch address conversion, that is, mapping a plurality of memory addresses at a time, may be performed.
The inter-process communication device, the electronic device and the computer readable storage medium provided by the embodiments of the present invention are described below, and the intelligent gateway described below and the method for processing message information of the home intelligent gateway described above may be referred to correspondingly.
Referring to fig. 5, fig. 5 is a block diagram of an inter-process communication apparatus according to an embodiment of the present invention, where the apparatus is applied to a sender process, and may include:
The memory identifier generating module 501 is configured to initiate an address application to a receiving end process, and construct a plurality of memory identifiers by using a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier point to the same memory position;
a memory pool update module 502, configured to update a plurality of memory identifiers to a memory pool;
and the data sending module 503 is configured to, when the data to be sent is obtained, take out a memory identifier from the memory pool, write the data to be sent into the memory according to the sender memory address in the taken out memory identifier, and send the taken out memory identifier to the receiver process.
Optionally, the memory identifier generating module 501 may include:
the address conversion sub-module is used for transmitting the memory addresses of the multiple receiving ends to the management program for address conversion to obtain the memory addresses of the multiple transmitting ends;
and the memory identifier construction submodule is used for constructing a plurality of memory identifiers by utilizing the memory addresses of the receiving ends and the memory addresses of the corresponding transmitting ends.
Optionally, the apparatus may further include:
the memory identifier receiving module is used for receiving a plurality of memory identifiers returned by the receiving end process; the memory identifier returned by the receiving end process is from an idle linked list in the receiving end process, and the idle linked list is used for recording the memory identifier sent by the sending end process.
Optionally, the memory identifier generating module 501 may include:
the address application submodule is used for initiating an address application to the receiving end process by utilizing the first lock-free shared queue and receiving a plurality of receiving end memory addresses returned by the receiving end process by utilizing the first lock-free shared queue;
the data transmitting module 503 may include:
and the memory identifier sending sub-module is used for sending the fetched memory identifier to the receiving end process by utilizing the second lock-free shared queue.
Optionally, the memory identifier generating module 501 may include:
the address application start sub-module is used for continuously initiating address application to the receiving end process when the number of the available memory identifiers in the memory pool is determined to be smaller than a first preset threshold value;
the address application ending submodule is used for stopping initiating the address application to the receiving end process when the number of the available memory identifiers in the memory pool is determined to be larger than a second preset threshold value; the second preset threshold is greater than the first preset threshold.
Referring to fig. 6, fig. 6 is a block diagram of another inter-process communication apparatus according to an embodiment of the present invention, where the apparatus is applied to a receiving end process, and may include:
the application response module 601 is configured to return a plurality of receiving-end memory addresses to the sending-end process when receiving an address application initiated by the sending-end process;
The data receiving module 602 is configured to determine, when receiving a memory identifier sent by a sending end process, a location in a memory of data according to a receiving end memory address in a memory identifier returned by the sending end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position.
Optionally, the apparatus may further include:
the memory identifier storage module is used for adding the memory identifier to the idle linked list;
the application response module 601 may further include:
the judging submodule is used for judging whether the idle list is empty or not;
the first processing sub-module is used for executing the step of returning a plurality of memory addresses of the receiving end to the transmitting end process if yes;
and the second processing sub-module is used for taking out the memory identifier from the idle linked list and returning the memory identifier to the transmitting end process if not.
Optionally, the application response module 601 may include:
the address returning sub-module is used for returning a plurality of receiving end memory addresses by using the first lock-free shared queue when the address application initiated by the transmitting end process is received by using the first lock-free shared queue;
Optionally, the data receiving module 602 may include:
and the memory identifier receiving sub-module is used for receiving the memory identifier sent by the transmitting end process by using the second lock-free shared queue.
Optionally, the apparatus may further include:
the memory application module is used for applying a plurality of blocks of memory to the management program and generating a receiving end memory address based on the plurality of blocks of memory.
Referring to fig. 7, fig. 7 is a block diagram of an electronic device according to an embodiment of the present invention, and an electronic device 70 according to an embodiment of the present invention includes a processor 71 and a memory 72; wherein the memory 72 is for storing a computer program; the processor 71 is configured to execute the inter-process communication method provided in the foregoing embodiment when executing the computer program.
For the specific process of the inter-process communication method, reference may be made to the corresponding content provided in the foregoing embodiment, and no further description is given here.
The memory 72 may be a carrier for storing resources, such as a read-only memory, a random access memory, a magnetic disk, or an optical disk, and the storage mode may be a temporary storage or a permanent storage.
In addition, the electronic device 70 further includes a power supply 73, a communication interface 74, an input-output interface 75, and a communication bus 76; wherein the power supply 73 is configured to provide an operating voltage for each hardware device on the electronic device 70; the communication interface 74 can create a data transmission channel between the electronic device 70 and an external device, and the communication protocol to be followed is any communication protocol applicable to the technical solution of the present invention, which is not specifically limited herein; the input/output interface 75 is used for obtaining external input data or outputting external output data, and the specific interface type thereof may be selected according to the specific application requirement, which is not limited herein.
The embodiment of the invention also provides a computer readable storage medium, and a computer program is stored on the computer readable storage medium, and when the computer program is executed by a processor, the steps of the inter-process communication method of any embodiment are realized.
Since the embodiments of the computer readable storage medium portion and the embodiments of the inter-process communication method portion correspond to each other, the embodiments of the storage medium portion are referred to the description of the embodiments of the inter-process communication method portion, and are not repeated here.
In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The inter-process communication method, the inter-process communication device, the electronic equipment and the storage medium provided by the invention are described in detail. The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present invention and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.

Claims (13)

1. An inter-process communication method, which is applied to a sender process, comprises:
initiating an address application to a receiving end process, and constructing a plurality of memory identifiers by utilizing a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position;
Updating the memory identifications to a memory pool;
when the data to be sent is obtained, the memory identifier is taken out from the memory pool, the data to be sent is written into the memory according to the memory address of the sending end in the memory identifier taken out, and the memory identifier taken out is sent to the receiving end process.
2. The method for inter-process communication according to claim 1, wherein constructing a plurality of memory identifiers using a plurality of receiver memory addresses returned by the receiver process comprises:
transmitting the multiple receiving end memory addresses to a management program for address conversion to obtain multiple transmitting end memory addresses;
and constructing the memory identifiers by utilizing the memory addresses of the receiving ends and the memory addresses of the corresponding transmitting ends.
3. The method of inter-process communication according to claim 1, further comprising, after initiating an address application to the receiving-end process:
receiving a plurality of memory identifiers returned by the receiving end process; the memory identifier returned by the receiving end process is from an idle linked list in the receiving end process, and the idle linked list is used for recording the memory identifier sent by the sending end process.
4. The method for inter-process communication according to claim 1, wherein said initiating an address application to a receiving-end process comprises:
initiating an address application to the receiving end process by using a first lock-free shared queue, and receiving a plurality of receiving end memory addresses returned by the receiving end process by using the first lock-free shared queue;
the sending the fetched memory identifier to the receiving end process includes:
and sending the fetched memory identifier to the receiving end process by using a second lock-free shared queue.
5. The method for inter-process communication according to claim 1, wherein said initiating an address application to a receiving-end process comprises:
when the number of the available memory identifiers in the memory pool is smaller than a first preset threshold value, continuously initiating an address application to the receiving end process;
stopping initiating an address application to the receiving end process when the number of the available memory identifiers in the memory pool is determined to be larger than a second preset threshold value; the second preset threshold is greater than the first preset threshold.
6. An inter-process communication method, applied to a receiving end process, comprising:
when receiving an address application initiated by a transmitting end process, returning a plurality of receiving end memory addresses to the transmitting end process;
When a memory identifier sent by the sending end process is received, determining the position of data in a memory according to a receiving end memory address in the memory identifier returned by the sending end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position.
7. The method for interprocess communication according to claim 6, further comprising, after receiving the memory identifier sent by the sender process:
adding the memory identifier to an idle linked list;
correspondingly, after receiving the address application initiated by the sender process, the method further comprises the following steps:
judging whether the idle list is empty or not;
if yes, executing the step of returning a plurality of receiving end memory addresses to the transmitting end process;
if not, the memory identifier is taken out from the idle linked list, and the memory identifier is returned to the transmitting end process.
8. The method according to claim 6, wherein the returning the plurality of receiver memory addresses to the sender process when the address application initiated by the sender process is received, comprises:
When a first lock-free shared queue is utilized to receive an address application initiated by the process of the sending end, returning a plurality of memory addresses of the receiving end by utilizing the first lock-free shared queue;
receiving the memory identifier sent by the sending end process, including:
and receiving the memory identification sent by the sending end process by using a second lock-free shared queue.
9. The method of inter-process communication according to claim 6, further comprising, prior to receiving the address application initiated by the sender process:
applying for a plurality of blocks of memory from the management program, and generating the memory address of the receiving end based on the plurality of blocks of memory.
10. An interprocess communication apparatus, applied to a transmitting end process, comprising:
the memory identifier generation module is used for initiating an address application to a receiving end process and constructing a plurality of memory identifiers by utilizing a plurality of receiving end memory addresses returned by the receiving end process; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position;
the memory pool updating module is used for updating the memory identifiers to the memory pool;
And the data transmitting module is used for taking out the memory identifier from the memory pool when the data to be transmitted is acquired, writing the data to be transmitted into the memory according to the memory address of the transmitting end in the memory identifier taken out, and transmitting the memory identifier taken out to the receiving end process.
11. An interprocess communication apparatus, applied to a receiving process, comprising:
the application response module is used for returning a plurality of receiving end memory addresses to the sending end process when receiving an address application initiated by the sending end process;
the data receiving module is used for determining the position of data in the memory according to the memory address of the receiving end in the memory identifier returned by the transmitting end process when the memory identifier sent by the transmitting end process is received; the memory identifier comprises a receiving end memory address and a transmitting end memory address, and the receiving end memory address and the transmitting end memory address in the same memory identifier all point to the same memory position.
12. An electronic device, comprising:
a memory for storing a computer program;
processor for implementing an inter-process communication method according to any of claims 1 to 5 and/or an inter-process communication method according to any of claims 6 to 9 when executing the computer program.
13. A computer readable storage medium having stored therein computer executable instructions which when loaded and executed by a processor implement the inter-process communication method of any of claims 1 to 5 and/or the inter-process communication method of any of claims 6 to 9.
CN202311434862.0A 2023-10-31 2023-10-31 Inter-process communication method and device, electronic equipment and storage medium Pending CN117421138A (en)

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