CN117420604B

CN117420604B - Metal detector

Info

Publication number: CN117420604B
Application number: CN202311744403.2A
Authority: CN
Inventors: 钱昱烨; 许国强; 陆志文; 赵洪光; 苏述权; 吴家荣
Original assignee: Shanghai Gaojing Detection Technology Co ltd
Current assignee: Shanghai Gaojing Detection Technology Co ltd
Priority date: 2023-12-19
Filing date: 2023-12-19
Publication date: 2024-02-23
Anticipated expiration: 2043-12-19
Also published as: CN117420604A

Abstract

The metal detector in the embodiment of the disclosure comprises: the clock switching frequency conversion circuit comprises a main frequency crystal oscillator, a secondary frequency crystal oscillator, a frequency conversion unit and a second connector, wherein the main frequency crystal oscillator and the secondary frequency crystal oscillator can be used in a switching mode, and the frequency conversion unit outputs working frequency signals; the transmitting circuit comprises two capacitor groups which are switched and communicated with the first transformer coil for matching the working frequency and a first connector connected with the second connector; the probe receiving signal circuit comprises two capacitor groups and a third connector, wherein the two capacitor groups are communicated with the second transformer coil for matching the working frequency; the signal processing control circuit comprises a fourth connector, a second change-over switch and a signal processing circuit; the first change-over switch is used for switching the main or auxiliary frequency crystal oscillator to obtain a corresponding working frequency signal to the transmitting circuit, and the transmitting circuit is enabled to work corresponding to the matched capacitor group; the second change-over switch enables the receiving circuit to work corresponding to the matched capacitor group. The working frequency can be switched to avoid interference.

Description

Metal detector

Technical Field

The present disclosure relates to the field of electromagnetic detection technology, and in particular, to detecting metals using electromagnetic fields.

Background

In factories there are a large number of consumer applications, especially in food enterprises. In order to ensure food safety, food metal detectors are used in a large amount to detect trace metals mixed with food raw materials or finished product packages in the production process, and because the sensitivity of the detectors is extremely high, steel balls or iron or stainless steel mixed with food with the thickness of more than 0.5mm can be detected, the metal detectors often cannot work normally or reduce the sensitivity due to the interference of frequency converters, so that the problem of the interference of the frequency converters is a necessary condition for ensuring the normal work of the metal detectors.

In the related art, to achieve anti-interference, the following approaches are generally used: the first is that the filter is added to resist power supply interference; the second is to reduce the sensitivity of the detector; and thirdly, the instrument is far away from the frequency converter as much as possible. However, all three methods have poor effects, which results in the metal detector not being used normally.

Disclosure of Invention

In view of the above-described drawbacks of the related art, an object of the present disclosure is to provide a metal detector that solves the problems in the related art.

A first aspect of the present disclosure provides a metal detector comprising: a clock switching frequency conversion circuit comprising: a first switch (S1), a first switching circuit (K1), a main frequency crystal oscillator (ZX 1) for providing a main frequency, at least one auxiliary frequency crystal oscillator (ZX 2) for providing at least one auxiliary frequency, a frequency conversion unit, a first amplifying circuit and a second connector (CN 2); the first switching circuit (K1) switches one end of a corresponding main frequency crystal oscillator (ZX 1) or auxiliary frequency crystal oscillator (ZX 2) based on the first switching signal to be coupled with the input end of the frequency conversion unit; the frequency conversion unit is used for obtaining a first working frequency through frequency conversion of the obtained main frequency or obtaining a second working frequency through frequency conversion of the obtained auxiliary frequency, and outputting a working frequency signal corresponding to the obtained first working frequency or second working frequency; the output end of the frequency conversion unit is coupled with the input end of the first amplifying circuit, and the first amplifying circuit generates and outputs a first amplifying signal with corresponding voltage based on the working frequency signal; the second connector (CN 2) is coupled with the output end of the first amplifying circuit and the output end of the first change-over switch (S1) and is used for outputting an output signal containing the first amplifying signal and the first change-over signal; a probe transmit signal circuit comprising: -a first connector (CN 1) for coupling with the second connector (CN 2), a first transformer (T1), a first set of capacitors (Ca 1, cb1, cc 1), a second set of capacitors (Ca 2, cb2, cc 2), and a second switching circuit (K2); the first transformer (T1) includes: a first primary coil unit, a first secondary coil unit and a transmission signal output coil unit, wherein the first connector (CN 1) is coupled with the first primary coil unit, the first secondary coil unit and the second switching circuit (K2) to form a path for the first secondary coil unit to be conducted with the first capacitor group (Ca 1, cb1, cc 1) or the second capacitor group (Ca 2, cb2, cc 2) through the second switching circuit (K2); the second switching circuit (K2) selects a first capacitor group (Ca 1, cb1, cc 1) or a second capacitor group (Ca 2, cb2, cc 2) to be conducted on the first secondary coil unit based on a first switching signal so as to form a first LC signal circuit matched with the first working frequency or the second working frequency; the first LC signal circuit starts vibrating based on the received first amplified signal; the transmitting signal output coil unit leads out a transmitting coil of which a transmitting signal end (OSCOUT) is coupled to the probe; a probe receive signal circuit comprising: a third connector (CN 3), a second transformer (T2), a third capacitor group (Cd 1, ce1, cf 1) corresponding to the first operating frequency, a fourth capacitor group (Cd 2, ce2, cf 2) corresponding to the second operating frequency, a second amplifying circuit, and a third switching circuit (K3); -the second transformer (T2) comprises a second primary winding unit and a second secondary winding unit, the third connector (CN 3) being coupled to the third switching circuit (K3); the third switching circuit (K3) selects a third capacitor group (Cd 1, ce1, cf 1) or a fourth capacitor group (Cd 2, ce2, cf 2) to be coupled to the second secondary coil unit based on a second switching signal so as to form a second LC signal circuit matched with the first working frequency or the second working frequency; the second LC signal circuit is coupled to the third connector (CN 3) via the second amplifying circuit; the second primary coil unit leads out a pair of receiving signal ends (IN 1, IN 2) which are coupled to the receiving coils of the probe; the second amplifying circuit is used for forming a second amplified signal based on the detection signal of the receiving coil and outputting the second amplified signal to the third connector (CN 3); a signal processing control circuit including a fourth connector (CN 4), a second change-over switch (S2), and a signal processing circuit; the second changeover switch (S2) outputs the second changeover signal based on the set switch state; the fourth connector (CN 4) is coupled to the output end of the second switch (S2) to obtain the second switching signal, and is coupled to the third connector (CN 3) to output the second switching signal and receive the second amplified signal; the fourth connector (CN 4) is further coupled to an input of the signal processing circuit.

In an embodiment of the first aspect, the primary and secondary frequencies differ by 10%.

In an embodiment of the first aspect, the first switching circuit (K1) comprises a first relay comprising a first solenoid that is energized/de-energized by a first switching signal, and a first single pole double throw switch magnetically controlled by the first solenoid to switch state; the first single pole double throw switch includes: the pair of static contacts are respectively coupled with one ends of the main frequency crystal oscillator and the auxiliary frequency crystal oscillator; the movable contact is coupled with the input end of the frequency conversion unit; and/or the second switching circuit (K2) comprises a second relay, wherein the second relay comprises a second electromagnetic coil which is powered on/off by a first switching signal and a second single-pole double-throw switch of which the switch state is magnetically controlled by the second electromagnetic coil; the second single pole double throw switch includes: a pair of stationary contacts respectively coupled to one ends of the first capacitor set (Ca 1, cb1, cc 1) and the second capacitor set (Ca 2, cb2, cc 2); a movable contact coupled to one end of a first secondary coil unit of the first transformer (T1); wherein the other ends of the first capacitor group (Ca 1, cb1, cc 1) and the second capacitor group (Ca 2, cb2, cc 2) are coupled to the other end of the first secondary coil unit; and/or, the third switching circuit (K3) includes a third relay including a third electromagnetic coil that is turned on/off by a second switching signal, and a third single pole double throw switch whose switching state is magnetically controlled by the third electromagnetic coil, the third single pole double throw switch including: a pair of stationary contacts respectively coupled to one ends of the third capacitor group (Cd 1, ce1, cf 1) and the fourth capacitor group (Cd 2, ce2, cf 2); and the movable contact is coupled to one end of the second secondary coil unit, which is coupled with the second amplifying circuit.

In an embodiment of the first aspect, the frequency conversion unit includes: the front and back stage is coupled with the starting circuit and the frequency dividing circuit.

In an embodiment of the first aspect, the starting circuit includes: the input end of the first inverter (U1A) is coupled with the input end of the starting circuit, the output end of the first inverter is coupled with one end of the first capacitor (C4), and a first resistor (R1) is connected between the input end and the output end of the first inverter (U1A) in parallel; the input end of the second inverter (U1B) is coupled with the other end of the first capacitor (C4), the other end of the second inverter is coupled with one end of the second capacitor (C2) and one end of the third capacitor (C3), the other end of the second capacitor (C2) is coupled with the other ends of the main frequency crystal oscillator and the auxiliary frequency crystal oscillator, and the other end of the third capacitor (C3) is grounded; a second resistor (R2) is connected in parallel between the input end and the output end of the second inverter (U1B); and the input end of the third inverter (U1C) is coupled with the output end of the second inverter (U1B), and the output end of the third inverter is coupled with the output end of the starting circuit.

In an embodiment of the first aspect, the frequency dividing circuit includes: at least two cascaded counters; one count output of the front counter is coupled to the clock terminal of the back counter.

In an embodiment of the first aspect, the metal detector comprises: the amplifying and adjusting circuit is coupled between the output end of the frequency conversion unit and the input end of the first amplifying circuit; the amplification adjustment circuit includes: a third resistor (R3) having one end coupled to an output of the frequency conversion unit; an N-type first transistor (Q1) with a base coupled to the other end of the third resistor (R3) and a collector coupled to the positive electrode of the DC voltage source, one end of the ninth capacitor (C9) and the positive electrode of the first bipolar capacitor (C10); the other end of the ninth capacitor (C9) is coupled with the negative electrode of the first bipolar capacitor (C10) and grounded; a potentiometer (VR 3) with two ends respectively coupled to the emitter of the first transistor (Q1) and one end of the fourth resistor (R4), and an adjustable end coupled to the input end of the first amplifying circuit; the other end of the fourth resistor (R4) is grounded.

In an embodiment of the first aspect, the first amplifying circuit includes: a twelfth capacitor (C12) having one end coupled to the input end of the first amplifying circuit and the other end coupled to one end of the twelfth resistor (R12), one end of the thirteenth resistor (R13), and the base of the N-type fourth transistor (Q4), and the other end of the twelfth resistor (R12) coupled to the positive electrode of the DC voltage source, the collector of the fourth transistor, and one end of the eighteenth capacitor (C18); the other end of the eighteenth capacitor (C18) is grounded; the other end of the thirteenth resistor (R13) is coupled with the negative electrode of the direct-current voltage source and one end of the fourteenth resistor (R14), and the emitter of the fourth transistor (Q4) is coupled with the other end of the fourteenth resistor (R14) and one end of the nineteenth capacitor (C19); a third transformer (T3) with two ends of the primary coil unit respectively coupled with the other end of the nineteenth capacitor (C19) and the negative electrode of the direct-current voltage source; two ends of the secondary coil unit are respectively coupled with the bases of a fifth transistor (Q5) and a sixth transistor (Q6), and one tap of the secondary coil unit is coupled with one end of a sixteenth resistor (R16), the positive electrode of a third diode (D3) and the positive electrode of a second bipolar capacitor (C20); the other end of the sixteenth resistor (R16) is grounded; the cathode of the third diode (D3) is coupled with one end of a fifteenth resistor (R15), and the other end of the fifteenth resistor (R15) and the cathode of the second bipolar capacitor (C20) are coupled with the cathode of the direct-current voltage source; collectors of a fifth transistor (Q5) and a sixth transistor (Q6) lead out an output end of the first amplifying circuit, and are coupled to a pair of operating frequency signal output pins of the second connector to output a first amplifying signal; an emitter of the fifth transistor (Q5) is coupled to the dc voltage source cathode via a seventeenth resistor (R17), and an emitter of the sixth transistor (Q6) is coupled to the dc voltage source cathode via an eighteenth resistor (R18).

In an embodiment of the first aspect, the first connector comprises: a first operating frequency indication input pin for receiving the first switching signal; a pair of working frequency signal input pins for receiving the first amplified signal; the first primary coil unit of the first transformer (T1) comprises: a first primary side sub-coil (N1-1) and a second primary side sub-coil (N1-2), the first secondary side coil unit including a first secondary side sub-coil (N2-1) and a second secondary side sub-coil (N2-2); one end of the first secondary side sub-coil (N2-1) is coupled with one end of the first primary side sub-coil (N1-1) and one working frequency signal input pin, and the other end of the first secondary side sub-coil (N2-1) is coupled with one ends of the first capacitor group (Ca 1, cb1, cc 1) and the second capacitor group (Ca 2, cb2, cc 2); one end of the second secondary sub-coil (N2-2) is coupled with one end of the second primary sub-coil (N1-2) and the other working frequency signal input pin, and the other end of the second secondary sub-coil (N2-2) is coupled with the output end of the second switching circuit (K2) for switching and communicating the other ends of the first capacitor group (Ca 1, cb1, cc 1) or the second capacitor group (Ca 2, cb2, cc 2); the other end of the second primary side sub-coil (N1-2) is coupled with the other end of the first primary side sub-coil (N1-1) and the positive electrode of the direct current voltage source.

In an embodiment of the first aspect, the third connector (CN 3) comprises: the probe receives a signal output pin and is used for outputting the second amplified signal; a second operating frequency indication input pin for receiving the second switching signal; and/or, the second amplifying circuit includes: one end of the fifth resistor (R5) is coupled with the input end of the second amplifying circuit, one end of the sixth resistor (R6) is coupled with one end of the fifth capacitor (C5) and grounded; the other end of the fifth capacitor (C5) is coupled with one end of the seventh resistor (R7); the non-inverting input end of the operational amplifier (U2) is coupled with the other end of the sixth resistor (R6), the inverting input end of the operational amplifier is coupled with the other end of the seventh resistor (R7) and one end of the eighth resistor (R8), the power supply anode of the operational amplifier is coupled with the positive electrode of the direct-current voltage source and one end of the eighth capacitor (C8), the other end of the eighth capacitor (C8) is grounded, the power supply cathode of the operational amplifier is coupled with the negative electrode of the direct-current voltage source and one end of the sixth capacitor (C6), the other end of the sixth capacitor (C6) is grounded, and the output end of the operational amplifier is coupled with the other end of the eighth resistor and one end of the seventh capacitor (C7); the other end of the seventh capacitor (C7) is coupled with one ends of a ninth resistor (R9) and a tenth resistor (R10), and the other end of the ninth resistor (R9) is grounded; the other end of the tenth resistor (R10) is coupled to the output end of the second amplifying circuit; and/or, the primary and secondary frequencies differ by 10%.

In summary, the metal detector in the embodiment of the disclosure includes: the clock switching frequency conversion circuit comprises a main frequency crystal oscillator, a secondary frequency crystal oscillator, a frequency conversion unit and a second connector, wherein the main frequency crystal oscillator and the secondary frequency crystal oscillator can be used in a switching mode, and the frequency conversion unit outputs working frequency signals; the transmitting circuit comprises two capacitor groups which are switched and communicated with the first transformer coil for matching the working frequency and a first connector connected with the second connector; the probe receiving signal circuit comprises two capacitor groups and a third connector, wherein the two capacitor groups are communicated with the second transformer coil for matching the working frequency; the signal processing control circuit comprises a fourth connector, a second change-over switch and a signal processing circuit; the first change-over switch is used for switching the main or auxiliary frequency crystal oscillator to obtain a corresponding working frequency signal to the transmitting circuit, and the transmitting circuit is enabled to work corresponding to the matched capacitor group; the second change-over switch enables the receiving circuit to work corresponding to the matched capacitor group. The metal detector with switchable working frequency is realized, the interference frequency of various frequency converters in a scene is avoided, and the anti-interference capability of a product is effectively improved, so that the reliability of the product is improved.

Drawings

FIG. 1 shows a schematic diagram of circuitry of a metal detector in an embodiment of the present disclosure.

Fig. 2 shows a schematic circuit structure of a clock switching frequency conversion circuit in an embodiment of the disclosure.

Fig. 3 shows a schematic circuit configuration of a probe transmit signal circuit in an embodiment of the disclosure.

Fig. 4 shows a schematic circuit configuration of a probe receiving signal circuit in an embodiment of the disclosure.

Fig. 5 shows a schematic circuit configuration of a signal processing control circuit in an embodiment of the disclosure.

Detailed Description

Other advantages and effects of the present disclosure will be readily apparent to those skilled in the art from the following detailed description of the embodiments of the disclosure given by way of specific examples. The disclosure may be embodied or applied in other different specific forms, and details of the disclosure may be modified or changed from various points of view and application without departing from the spirit of the disclosure. It should be noted that, without conflict, the embodiments of the present disclosure and features of the embodiments may be combined with each other.

The embodiments of the present disclosure will be described in detail below with reference to the attached drawings so that those skilled in the art to which the present disclosure pertains can easily implement the same. The present disclosure may be embodied in many different forms and is not limited to the embodiments described herein.

In the description of the present disclosure, references to the terms "one embodiment," "some embodiments," "examples," "particular examples," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or a group of embodiments or examples. Furthermore, various embodiments or examples, as well as features of various embodiments or examples, presented in this disclosure may be combined and combined by those skilled in the art without contradiction.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the representations of the present disclosure, "a set" means two or more, unless specifically defined otherwise.

For the purpose of clarity of the present disclosure, components that are not related to the description are omitted, and the same or similar components are given the same reference numerals throughout the specification.

Throughout the specification, when a device is said to be "coupled" to another device, this includes not only the case of "direct coupling" but also the case of "indirect coupling" with other elements interposed therebetween. In addition, when a certain component is said to be "included" in a certain device, unless otherwise stated, other components are not excluded, but it means that other components may be included.

Although the terms first, second, etc. may be used herein to connote various elements in some examples, the elements should not be limited by the terms. These terms are only used to distinguish one element from another element. For example, a first interface, a second interface, etc. Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "including" specify the presence of stated features, steps, operations, elements, modules, items, categories, and/or groups, but do not preclude the presence, presence or addition of one or more other features, steps, operations, elements, modules, items, categories, and/or groups. The terms "or" and/or "as used herein are to be construed as inclusive, or meaning any one or any combination. Thus, "A, B or C" or "A, B and/or C" means "any of the following: a, A is as follows; b, a step of preparing a composite material; c, performing operation; a and B; a and C; b and C; A. b and C). An exception to this definition will occur only when a combination of elements, functions, steps or operations are in some way inherently mutually exclusive.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the language clearly indicates the contrary. The meaning of "comprising" in the specification is to specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but does not preclude the presence or addition of other features, regions, integers, steps, operations, elements, and/or components.

Although not differently defined, including technical and scientific terms used herein, all terms have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The term append defined in commonly used dictionaries is interpreted as having a meaning that is consistent with the meaning of the relevant technical literature and the currently prompted message, and is not excessively interpreted as an ideal or very formulaic meaning, so long as no definition is made.

Currently, in a metal detection scene using a metal detector, a large number of frequency converters are often arranged in the environment, and the frequencies of the frequency converters can cause interference to the metal detector. There are a large number of consumer applications, such as in factories, particularly in food enterprises. In order to ensure food safety in food factories, a large amount of food metal detectors are used for detecting trace metals mixed in food raw materials or finished product packages in the production process, and the sensitivity of the detectors is extremely high and often cannot work normally or is reduced due to the interference of frequency converters, so that the problem of the interference of the frequency converters of the metal detectors is solved. However, various anti-interference means in the related art have the problems that the cost is increased due to the need of adding anti-interference shielding design, and the performance of the product is sacrificed due to the need of adding anti-interference shielding design, so that the effect is poor.

The applicant finds that the interference of the frequency converter has a certain frequency spectrum range according to the research of a large number of instruments in an actual scene, when a certain frequency is in time with the metal detector, the frequency converter can generate interference through the detection head of the metal detector, and the metal detector can not work normally when serious. However, when the metal detector changes the operating frequency, the operating frequency is increased or decreased by a certain magnitude (for example, within 10%), so that the frequency of the frequency converter can be avoided, and the metal detector can work normally.

Therefore, the applicant realizes the circuit for switching the working frequency of the metal detector based on the inventive idea, and can select the working frequency to resist the interference of the frequency converter when the metal detector specifically works.

As shown in fig. 1, a schematic structural diagram of a circuit system of a metal detector in an embodiment of the present disclosure is shown.

The metal detector works based on the electromagnetic induction principle. Specifically, the metal detector comprises a probe 10, and a 'balanced coil' is arranged in the probe 10, and specifically comprises a transmitting coil 101 and a receiving coil 102. The transmitting coil 101 generates an alternating high-frequency electromagnetic field. Two of the receiving coils 102 are distributed on both sides of the transmitting coil 101. When no metal passes, the receiving coil 102 receives a voltage of zero. As metal passes through the two receive coils 102, a change in the voltage signal occurs. Thereby judging whether metal exists or not according to the voltage signal change.

The circuitry includes: a clock switching frequency conversion circuit 11, a probe transmission signal circuit 12, a probe reception signal circuit 13, and a signal processing control circuit 14.

The clock switching frequency conversion circuit 11 may include two switchably used crystal oscillators, including a main frequency crystal oscillator 111 and at least one sub-frequency crystal oscillator 112. The clock switching frequency conversion circuit 11 may generate a corresponding operating frequency, such as a first operating frequency corresponding to the main frequency and at least one second operating frequency corresponding to the at least one sub-frequency, based on the currently used crystal oscillator frequency conversion. The clock switching frequency conversion circuit 11 is connected with the probe transmitting signal circuit 12 to transmit the working frequency to the probe transmitting signal circuit 12. In some embodiments, the switching of the main frequency crystal 111 and the sub-frequency crystal 112 in the clock switching frequency conversion circuit 11 may be implemented by a first switch 113, such as a dial switch that can be operated by a user, when the user dials to the 1 st gear, the main frequency crystal 111 is used, and when the user dials to the second gear, the sub-frequency crystal 112 is used. In some embodiments, a multiple of less than 1 is satisfied between the primary and secondary frequencies, e.g., the primary and secondary frequencies may differ by about 10%, for example. Such as 0.9 times the primary frequency, or 0.9 times the primary frequency, etc.

The probe transmitting signal circuit 12 is provided with a transmitting signal end connected with the transmitting coil 101. The probe transmit signal circuit 12 comprises a signal circuit of the type such as an inductance-capacitance (LC). Illustratively, the probe transmit signal circuit 12 may comprise a transformer, a primary coil unit of which may provide a primary voltage, a secondary coil unit in a predetermined voltage multiple relationship with the primary coil unit may provide the first inductance, and a secondary coil unit in another predetermined voltage multiple relationship with the primary coil unit may be led out of a transmit signal terminal connected to the transmit coil 101. To match the transferred first or second operating frequency, the probe transmit signal circuit 12 may switch the signal circuit of the inductance value L/capacitance value C corresponding to the first or second operating frequency so that the inductance value/capacitance value satisfies the operating frequency f ₀ The resonant frequency formula of (2) requires:

。

thus, the probe transmit signal circuit 12 can drive the transmit coil 101 to generate a high-frequency electromagnetic field corresponding to the first/second operating frequency. It will be appreciated that in some embodiments, since the inductance value of the first inductor is difficult to adjust, and in contrast, the capacitance value adjustment is more convenient, multiple capacitance sets (e.g., the first capacitance set or the second capacitance set in the figure) with different capacitance values may be set to meet the first operating frequency or the second operating frequency requirement. It will be appreciated that the number of capacitor banks and primary frequencies is the same as the number of secondary frequency categories.

Correspondingly, based on the high frequency electromagnetic field, the receiving coil 102 receives a detection signal of the first/second operating frequency. The two receiving signal terminals of the probe receiving signal circuit 13 may be connected to the two receiving coils 102, respectively, so that the probe receiving signal circuit 13 also needs to be set at the same operating frequency as the transmitting coil 101 to receive and process the probe signal. In some embodiments, an LC signal circuit may be also used in the probe receiving signal circuit 13, and a plurality of capacitance sets of the second inductor may be preset to be connected in a switchable manner corresponding to the first operating frequency and the second operating frequency, respectively. Illustratively, the probe receiving signal circuit 13 may include a transformer, and a secondary coil unit of the transformer may be used as the second inductor, and a primary coil unit may be connected to the two receiving coils 102 with a signal terminal led out.

The signal processing control circuit 14 is connected to the probe receiving signal circuit 13, and may be provided with a second changeover switch 141. The second switch 141 may also be implemented as a dial switch. The second switch 141 is operated by a user to generate a second switching signal, and sends the second switching signal to the probe receiving signal circuit 13 to select a matched capacitor bank (for example, a third capacitor bank or a fourth capacitor bank in the figure) to be connected with the inductor, so as to receive the detection signal of the first/second working frequency, and can transmit the detection signal to the signal processing control circuit 14 for processing analysis.

Based on the above circuitry, specific circuit implementations in which the constituent circuits are provided below.

As shown in fig. 2, a schematic circuit structure of a clock switching frequency conversion circuit in an embodiment of the disclosure is shown.

The clock switching frequency conversion circuit includes: the device comprises a first switch (S1), a first switching circuit (K1), a main frequency crystal oscillator (ZX 1) for providing a main frequency, at least one auxiliary frequency crystal oscillator (ZX 2) for providing at least one auxiliary frequency, a frequency conversion unit, a first amplifying circuit and a second connector (CN 2).

The first switch (S1) outputs a first switching signal based on the set switch state, and the first switching circuit (K1) switches one end of the corresponding main frequency crystal oscillator (ZX 1) or auxiliary frequency crystal oscillator (ZX 2) based on the first switching signal to be coupled with the input end of the frequency conversion unit. For example, in fig. 2, the first switch (S1) may be implemented as a dial switch, and has pins 1 to 4, pin 1 is connected to a dc voltage +15v, pin 2 is grounded via a forty-eight resistor (R48), and pins 3 and 4 are connected to form output terminals respectively coupled to the second connector (CN 2) and the input terminal of the first switch circuit (K1). Referring specifically to fig. 2, the first switching circuit (K1) includes a first relay including a first electromagnetic coil that is turned on/off by a first switching signal, and a first single-pole double-throw switch whose switching state is magnetically controlled by the first electromagnetic coil. The first single pole double throw switch includes: a pair of stationary contacts (2, 3 pins) respectively coupled to one ends of the main frequency crystal oscillator and the auxiliary frequency crystal oscillator; and the movable contact (1 pin) is coupled with the input end of the frequency conversion unit. Wherein, the 2 pin can be used as a normally closed contact connected with the 1 pin by default. The two ends of the first switching circuit (K1) can also be connected in parallel with a first diode (D1) which is arranged in the opposite direction for current protection. The first switching signal may distinguish between a primary frequency or a secondary frequency by a high and a low level.

The frequency conversion unit is used for obtaining a first working frequency through frequency conversion of the obtained main frequency or obtaining a second working frequency through frequency conversion of the obtained auxiliary frequency, and outputting a working frequency signal corresponding to the obtained first working frequency or second working frequency. The output end of the frequency conversion unit is coupled with the input end of the first amplifying circuit.

Illustratively, the frequency conversion unit includes: the front and back stage is coupled with the starting circuit and the frequency dividing circuit. The oscillation starting circuit starts oscillation based on a crystal oscillation signal of the connected main/auxiliary crystal oscillator. As exemplarily illustrated in fig. 2, the starting circuit includes: a first inverter (U1A), a first capacitor (C4), a first resistor (R1), a second inverter (U1B), a second resistor (R2), a second capacitor (C2), a third capacitor (C3), a third inverter (U1C), and the like.

The input end of the first inverter (U1A) is coupled with the input end of the starting circuit, the output end of the first inverter is coupled with one end of the first capacitor (C4), and a first resistor (R1) is connected between the input end and the output end of the first inverter (U1A) in parallel; the input end of the second inverter (U1B) is coupled with the other end of the first capacitor (C4), the other end of the second inverter is coupled with one end of the second capacitor (C2) and one end of the third capacitor (C3), the other end of the second capacitor (C2) is coupled with the other ends of the main frequency crystal oscillator and the auxiliary frequency crystal oscillator, and the other end of the third capacitor (C3) is grounded; a second resistor (R2) is connected in parallel between the input end and the output end of the second inverter (U1B); and the input end of the third inverter (U1C) is coupled with the output end of the second inverter (U1B), and the output end of the third inverter is coupled with the output end of the starting circuit.

The frequency dividing circuit may be implemented based on a counter, for example, with a count to set the frequency dividing factor. In particular, the frequency dividing circuit may include at least two cascaded counters, and one count output terminal of the preceding counter is coupled to a clock terminal of the following counter. As shown in fig. 2, the frequency dividing circuit includes two counters U2 and U3 at the front and rear stages, where U2 may be a decimal counter, and Q0 to Q9 are 10 count output ends; u3 can be an octal counter, and Q0-Q7 are 8 counting output ends. It can be seen that Q5 is connected to the clock terminal (clk) of U3, outputting a carry signal as the clock of U3.

In one example, if the division factor is 20, the main frequency is 2MHz, the sub-frequency is 1.8MHz, which is 90% of the main frequency, the first operating frequency is 100kHz, and the second operating frequency is 90kHz.

The first amplifying circuit generates and outputs a first amplifying signal of a corresponding voltage based on the operating frequency signal.

Optionally, in the embodiment of fig. 2, an amplifying adjustment circuit may be further provided, coupled between the output of the frequency conversion unit and the input of the first amplifying circuit. As shown in the figure, the amplification adjustment circuit includes: a third resistor (R3) having one end coupled to an output of the frequency conversion unit; an N-type first transistor (Q1) with a base coupled to the other end of the third resistor (R3) and a collector coupled to the positive electrode of the DC voltage source, one end of the ninth capacitor (C9) and the positive electrode of the first bipolar capacitor (C10); the other end of the ninth capacitor (C9) is coupled with the negative electrode of the first bipolar capacitor (C10) and grounded; a potentiometer (VR 3) with two ends respectively coupled to the emitter of the first transistor (Q1) and one end of the fourth resistor (R4), and an adjustable end coupled to the input end of the first amplifying circuit; the other end of the fourth resistor (R4) is grounded. By adjusting the position of the potentiometer (VR 3), the amplification of the first amplification circuit can be adjusted.

It will be appreciated that the input of the first amplifying circuit may also be connected to the output of the preceding frequency conversion unit without providing the amplifying adjustment circuit.

Illustratively, in the fig. 2 embodiment, the first amplifying circuit includes: a twelfth capacitor (C12) having one end coupled to the input end of the first amplifying circuit and the other end coupled to one end of the twelfth resistor (R12), one end of the thirteenth resistor (R13), and the base of the N-type fourth transistor (Q4), and the other end of the twelfth resistor (R12) coupled to the positive electrode of the DC voltage source, the collector of the fourth transistor, and one end of the eighteenth capacitor (C18); the other end of the eighteenth capacitor (C18) is grounded; the other end of the thirteenth resistor (R13) is coupled with the negative electrode of the direct-current voltage source and one end of the fourteenth resistor (R14), and the emitter of the fourth transistor (Q4) is coupled with the other end of the fourteenth resistor (R14) and one end of the nineteenth capacitor (C19); and the two ends of the primary coil unit of the third transformer (T3) are respectively coupled with the other end of the nineteenth capacitor (C19) and the negative electrode of the direct-current voltage source, and the third transformer (T3) is connected between the Q4 emitter and the rear stage, so that the effects of improving the amplifying effect and isolating and transmitting can be achieved. The two ends of the secondary coil unit of the third transformer (T3) are respectively coupled with the bases of the fifth transistor (Q5) and the sixth transistor (Q6), and one tap of the secondary coil unit is coupled with one end of the sixteenth resistor (R16), the positive electrode of the third diode (D3) and the positive electrode of the second bipolar capacitor (C20); the other end of the sixteenth resistor (R16) is grounded; the cathode of the third diode (D3) is coupled with one end of a fifteenth resistor (R15), and the other end of the fifteenth resistor (R15) and the cathode of the second bipolar capacitor (C20) are coupled with the cathode of the direct-current voltage source; collectors of a fifth transistor (Q5) and a sixth transistor (Q6) lead out an output end of the first amplifying circuit, and are coupled to a pair of operating frequency signal output pins of the second connector to output a first amplifying signal; an emitter of the fifth transistor (Q5) is coupled to the dc voltage source cathode via a seventeenth resistor (R17), and an emitter of the sixth transistor (Q6) is coupled to the dc voltage source cathode via an eighteenth resistor (R18).

The second connector (CN 2) is coupled to the output end of the first amplifying circuit and the output end of the first change-over switch (S1) and is used for outputting an output signal containing the first amplifying signal and the first change-over signal. In particular, the second connector illustratively includes 5 pins, wherein pins 2, 4 are connected to the collectors of Q5 and Q6, respectively, to output a first amplified signal, and pin 5 is used as a first operating frequency indication output pin for connection to S1 to receive the first switching signal. Pins 3 and 1 are respectively connected with the positive pole of a direct-current voltage source (+15V) and the ground.

As shown in fig. 3, a schematic circuit structure of a probe transmit signal circuit in an embodiment of the disclosure is shown.

The probe transmits a signal circuit, comprising: a first connector (CN 1) for coupling with the second connector (CN 2), a first transformer (T1), a first capacitor set (Ca 1, cb1, cc 1), a second capacitor set (Ca 2, cb2, cc 2), and a second switching circuit (K2). The two ends of the second switching circuit (K2) can be connected with a second diode (D2) which is arranged reversely in parallel to form current protection.

Illustratively, the second connector (CN 2) corresponding to the 5 pins in fig. 2, the first connector (CN 1) also contains 5 pins in one-to-one correspondence, wherein pins 3, 1 are connected to the dc voltage source positive (+15v) and ground, respectively, through the connection of the two connectors. The pin 5 serves as a first operating frequency indication input pin for outputting the first switching signal as an indication signal of the currently used first or second operating frequency to the second switching circuit (K2). Pins 2, 4 output the first amplified signal.

The first transformer (T1) includes: the first connector (CN 1) is coupled with the first primary coil unit (N1), the first secondary coil unit (N2) and the second switching circuit (K2) to form a path for the first secondary coil unit (N2) to be conducted with the first capacitor group (Ca 1, cb1, cc 1) or the second capacitor group (Ca 2, cb2, cc 2) through the second switching circuit (K2). The second switching circuit (K2) selects a first capacitor group (Ca 1, cb1, cc 1) or a second capacitor group (Ca 2, cb2, cc 2) based on the first switching signal to be coupled to the second secondary coil unit (N2') to form a first LC signal circuit matching the first or second operating frequency. The first LC signal circuit is vibrated based on the received first amplified signal. The transmitting signal output coil unit (N3) is led out of a transmitting signal end (OSCOUT) and is coupled to a transmitting coil of the probe. The transmission signal output coil unit (N3) may be implemented for another secondary coil.

The second switching circuit (K2) comprises a second relay, wherein the second relay comprises a second electromagnetic coil which is powered on/off by a first switching signal and a second single-pole double-throw switch of which the switch state is magnetically controlled by the second electromagnetic coil; the second single pole double throw switch includes: a pair of stationary contacts (2, 3 pins) respectively coupled to one ends of the first capacitor set (Ca 1, cb1, cc 1) and the second capacitor set (Ca 2, cb2, cc 2); a movable contact (1 pin) coupled to one end of a second secondary coil unit (N2') of the first transformer (T1); wherein the other ends of the first capacitor group (Ca 1, cb1, cc 1) and the second capacitor group (Ca 2, cb2, cc 2) are coupled to the other end of the second secondary coil unit (N2'). Wherein, the 2-pin is used as a normally closed contact.

As previously described, the first connector includes a first operating frequency indication input pin (i.e., pin 5) for receiving the first switching signal; a pair of operating frequency signal input pins (i.e., pins 2, 4) for receiving the first amplified signal. Correspondingly, the first primary coil unit of the first transformer (T1) comprises: a first primary side sub-coil (N1-1) and a second primary side sub-coil (N1-2), the first secondary side coil unit including a first secondary side sub-coil (N2-1) and a second secondary side sub-coil (N2-2); one end of the first secondary side sub-coil (N2-1) is coupled with one end of the first primary side sub-coil (N1-1) and one working frequency signal input pin, and the other end of the first secondary side sub-coil (N2-1) is coupled with one ends of the first capacitor group (Ca 1, cb1, cc 1) and the second capacitor group (Ca 2, cb2, cc 2); one end of the second secondary winding (N2-2) is coupled to one end of the second primary winding (N1-2) and the other working frequency signal input pin in a communication manner, and the other end of the second secondary winding (N2-2) is coupled to the output end of the second switching circuit (K2) (namely the movable contact of the second relay) for switching and communicating the other end of the first capacitor group (Ca 1, cb1, cc 1) or the second capacitor group (Ca 2, cb2, cc 2); the other end of the second primary side sub-coil (N1-2) is coupled with the other end of the first primary side sub-coil (N1-1) and the positive pole (+15V) of the direct current voltage source.

Referring to fig. 4, a schematic circuit diagram of a probe signal receiving circuit according to an embodiment of the disclosure is shown.

The probe receiving signal circuit includes: the circuit comprises a third connector (CN 3), a second transformer (T2), a third capacitor group (Cd 1, ce1, cf 1) corresponding to the first working frequency, a fourth capacitor group (Cd 2, ce2, cf 2) corresponding to the second working frequency, a second amplifying circuit and a third switching circuit (K3). The two ends of the third switching circuit (K3) can be connected with a third diode (D3) which is arranged reversely in parallel to form current protection.

-the second transformer (T2) comprises a second primary winding unit (N1 ') and a second secondary winding unit (N2'), the third connector (CN 3) being coupled to the third switching circuit (K3); the third switching circuit (K3) selects a third capacitor group (Cd 1, ce1, cf 1) or a fourth capacitor group (Cd 2, ce2, cf 2) to be coupled to the second secondary coil unit (N2') based on a second switching signal so as to form a second LC signal circuit matched with the first working frequency or the second working frequency; the second LC signal circuit is coupled to the third connector (CN 3) via the second amplifying circuit. The second primary coil unit (N1') leads out a pair of receive signal terminals (IN 1, IN 2) for coupling to a receive coil of the probe. It should be noted that the second transformer (T2) may also include other secondary windings, which are not shown because they are not directly connected to the components shown in the figures.

Illustratively, the third switching circuit (K3) includes a third relay including a third solenoid that is energized/de-energized by a second switching signal, and a third single pole double throw switch whose switch state is magnetically controlled by the third solenoid. The third single pole double throw switch includes: a pair of stationary contacts respectively coupled to one ends of a third capacitor group (Cd 1, ce1, cf 1) and a fourth capacitor group (Cd 2, ce2, cf 2), wherein the other ends of the third capacitor group (Cd 1, ce1, cf 1) and the fourth capacitor group (Cd 2, ce2, cf 2) are coupled to one end of the second secondary coil unit (N2'); and a movable contact coupled to the other end of the second sub-coil unit (N2').

Further example, the second amplifying circuit includes: a fifth resistor (R5) having one end coupled to the input end of the second amplifying circuit and one end of the sixth resistor (R6), and the other end coupled to one end of the fifth capacitor (C5) and grounded; the other end of the fifth capacitor (C5) is coupled with one end of the seventh resistor (R7); the non-inverting input end of the operational amplifier (U2) is coupled with the other end of the sixth resistor (R6), the inverting input end of the operational amplifier is coupled with the other end of the seventh resistor (R7) and one end of the eighth resistor (R8), the power supply anode of the operational amplifier is coupled with the positive electrode of the direct-current voltage source and one end of the eighth capacitor (C8), the other end of the eighth capacitor (C8) is grounded, the power supply cathode of the operational amplifier is coupled with the negative electrode of the direct-current voltage source and one end of the sixth capacitor (C6), the other end of the sixth capacitor (C6) is grounded, and the output end of the operational amplifier is coupled with the other end of the eighth resistor and one end of the seventh capacitor (C7); the other end of the seventh capacitor (C7) is coupled with one ends of a ninth resistor (R9) and a tenth resistor (R10), and the other end of the ninth resistor (R9) is grounded; the other end of the tenth resistor (R10) is coupled to the output of the second amplifying circuit.

Illustratively, the third connector (CN 3) may include pins 1-6, pins 1, 2 respectively connected to the positive pole (+15v) and the negative pole (-15v) of the dc voltage source, pin 3 and pin 5 connected to ground, pin 6 being a second operating frequency indication input pin for inputting the second switching signal. The pin 4 is coupled to an output end of the second amplifying circuit as a probe receiving signal output pin, and the probe signal received from the second secondary coil unit (N2') is amplified into a second amplified signal by the second amplifying circuit to be output from the pin 4.

As shown in fig. 5, a schematic circuit diagram of a signal processing control circuit in an embodiment of the disclosure is shown.

The signal processing control circuit includes: a fourth connector (CN 4), a second change-over switch (S2), and a signal processing circuit.

The second changeover switch (S2) outputs the second changeover signal based on the set switch state. The second switch (S2) may be exemplified as a dial switch for a user to operate to switch the switch state. The second switching signal may distinguish between the primary frequency and the secondary frequency by a high and a low level.

The fourth connector (CN 4) is coupled to the output end of the second switch (S2) to obtain the second switching signal, and is coupled to the third connector (CN 3) to output the second switching signal and receive the second amplified signal. The fourth connector (CN 4) is further coupled to an input of the signal processing circuit. Specifically, as shown in the figure, corresponding to the third connector (CN 3), the fourth connector (CN 4) may include pins 1 to 6 corresponding to each pin of the third connector (CN 3), that is, pins 1 and 2 are respectively connected to the positive pole (+15v) and the negative pole (-15v) of the dc voltage source, pin 3 and pin 5 are connected to ground, and pin 6 is used as a second operating frequency indication output pin to output the second switching signal. The pin 4 serves as a probe reception signal input pin, receives the second amplified signal from the third connector (CN 3), and outputs it to the signal processing circuit. It should be noted that, the signal processing circuit of the metal detector in this embodiment may be implemented by using an existing circuit in the related art, and is not directly related to the present invention, so that a detailed description is omitted herein.

Illustratively, the first connector (CN 1), the second connector (CN 2), the third connector (CN 3), and the fourth connector (CN 4) may be connector interfaces.

Based on the above embodiments, a metal detector with switchable operating frequencies can be realized. In practical application examples, the metal detector is used, and whether the metal detector works at a main frequency or a secondary frequency, only one group of coils of the probe transmitting signal circuit and the probe receiving signal circuit is needed. The probe transmitting signal circuit and the probe receiving signal circuit may be sealed inside the metal detector, so that the probe transmitting signal circuit and the probe receiving signal circuit are required to be connected to the probe transmitting signal circuit and the probe receiving signal circuit in a connector interface mode through a first switch (S1) arranged in an external anti-variable-frequency interference circuit and a second switch (S2) arranged in a signal processing control circuit, and the probe transmitting signal circuit and the probe receiving signal circuit can also work in a main frequency mode or a sub-frequency mode correspondingly.

In the illustration, exemplarily, when the pin 2 of the first switching switch (S1) in the circuit is ON and the pin 1 is OFF; when the 2 pin of the second change-over switch (S2) is ON and the 1 pin is OFF, the metal detector works in a main frequency mode, at the moment, the 2MHz main frequency of the main frequency crystal oscillator is divided by frequency conversion, the working frequency of the metal detector is 100kHz, at the moment, CN1 is coupled with CN2 connectors, then the 5 pin receives a low-level signal of S1, at the moment, the matched capacitance of a first LC signal circuit in a probe transmitting signal circuit is a first capacitance group (Ca 1, cb1 and Cc 1), at the same time, the connector CN3 of the probe receiving signal circuit is coupled with CN4, then the 6 pin receives a low-level second change-over signal of S2, at the moment, the matched capacitance ON the probe receiving signal circuit is a third capacitance group (Cd 1, ce1 and Cf 1), and at the moment, the first working frequency of 100kHz works normally.

When being interfered by the frequency converter, the user operates the 1 pin of the S1 to be ON, and the 2 pin to be OFF; when the 1 pin of the operation S2 is ON and the 2 pin is OFF, the metal detector works in a secondary frequency mode, at the moment, the secondary frequency 1.8MHz of the secondary frequency crystal oscillator is divided by frequency conversion, so that the working frequency of the metal detector is 90kHz, meanwhile, the 5 pin of the CN1 receives a high-level signal (for example +15V) of the S1, the capacitance matched with the LC circuit in the probe transmitting signal circuit is switched to a second capacitance group (Ca 2, cb2 and Cc 2), the 6 pin of the CN3 of the probe receiving signal circuit receives a second switching signal of the high level of the S2, so that the capacitance matched with the probe receiving signal circuit is switched to a fourth capacitance group (Cd 2, ce2 and Cf 2), and the second working frequency of 90kHz can work normally, so that the metal detector can resist signal interference of an external frequency converter.

As a preferred example, to ensure that the instrument is easy to produce and debug and can avoid variable frequency interference completely, the auxiliary frequency can be selected to switch when the main frequency is reduced or increased by about 10%. The production practice proves that the mode is very reliable, so that the metal detector can be reliably applied to multiple frequency converters, particularly food factories.

The above embodiments are merely illustrative of the principles of the present disclosure and its efficacy, and are not intended to limit the disclosure. Modifications and variations may be made to the above-described embodiments by those of ordinary skill in the art without departing from the spirit and scope of the present disclosure. Accordingly, it is intended that all equivalent modifications and variations which a person having ordinary skill in the art would accomplish without departing from the spirit and technical spirit of the present disclosure be covered by the claims of the present disclosure.

Claims

1. A metal detector, comprising:

a clock switching frequency conversion circuit comprising: a first switch (S1), a first switching circuit (K1), a main frequency crystal oscillator (ZX 1) for providing a main frequency, at least one auxiliary frequency crystal oscillator (ZX 2) for providing at least one auxiliary frequency, a frequency conversion unit, a first amplifying circuit and a second connector (CN 2); the first change-over switch (S1) outputs a first change-over signal based on the set switch state, and in the first change-over circuit (K1), one end of a main frequency crystal oscillator (ZX 1) or a secondary frequency crystal oscillator (ZX 2) corresponding to the first change-over signal is switched and coupled with the input end of the frequency conversion unit; the frequency conversion unit obtains a first working frequency based on the obtained main frequency conversion or obtains a second working frequency based on the obtained auxiliary frequency conversion, and outputs a working frequency signal corresponding to the obtained first working frequency or second working frequency; the output end of the frequency conversion unit is coupled with the input end of the first amplifying circuit, and the first amplifying circuit generates and outputs a first amplifying signal with corresponding voltage based on the working frequency signal; the second connector (CN 2) is coupled with the output end of the first amplifying circuit and the output end of the first change-over switch (S1) and is used for outputting an output signal containing the first amplifying signal and the first change-over signal;

A probe transmit signal circuit comprising: a first connector (CN 1) coupled to the second connector (CN 2), a first transformer (T1), a first capacitor set (Ca 1, cb1, cc 1), a second capacitor set (Ca 2, cb2, cc 2), and a second switching circuit (K2); the first transformer (T1) includes: a first primary coil unit, a first secondary coil unit and a transmission signal output coil unit, wherein the first connector (CN 1) is coupled with the first primary coil unit, the first secondary coil unit and the second switching circuit (K2) to form a path for the first secondary coil unit to be conducted with the first capacitor group (Ca 1, cb1, cc 1) or the second capacitor group (Ca 2, cb2, cc 2) through the second switching circuit (K2); the second switching circuit (K2) selects a first capacitor group (Ca 1, cb1, cc 1) or a second capacitor group (Ca 2, cb2, cc 2) based on a first switching signal to be coupled to the first secondary coil unit, so as to form a first LC signal circuit matching the first or second operating frequency; the first LC signal circuit starts vibrating based on the received first amplified signal; the transmitting signal output coil unit leads out a transmitting coil of which a transmitting signal end (OSCOUT) is coupled to the probe;

A probe receive signal circuit comprising: a third connector (CN 3), a second transformer (T2), a third capacitor group (Cd 1, ce1, cf 1) corresponding to the first operating frequency, a fourth capacitor group (Cd 2, ce2, cf 2) corresponding to the second operating frequency, a second amplifying circuit, and a third switching circuit (K3); the second transformer (T2) comprises a second primary winding unit and a second secondary winding unit; -the third connector (CN 3) is coupled to the third switching circuit (K3); the third switching circuit (K3) selects a third capacitor group (Cd 1, ce1, cf 1) or a fourth capacitor group (Cd 2, ce2, cf 2) to be coupled to the second secondary coil unit based on a second switching signal so as to form a second LC signal circuit matched with the first working frequency or the second working frequency; the second LC signal circuit is coupled to the third connector (CN 3) via the second amplifying circuit; the second primary coil unit leads out a pair of receiving signal ends (IN 1, IN 2) which are coupled to the receiving coils of the probe; the second amplifying circuit is used for forming a second amplified signal based on the detection signal of the receiving coil and outputting the second amplified signal to the third connector (CN 3);

A signal processing control circuit comprising: a fourth connector (CN 4), a second change-over switch (S2), and a signal processing circuit; the second changeover switch (S2) outputs the second changeover signal based on the set switch state; the fourth connector (CN 4) is coupled to the output end of the second switch (S2) to obtain the second switching signal, and is coupled to the third connector (CN 3) to output the second switching signal and receive the second amplified signal; the fourth connector (CN 4) is further coupled to an input of the signal processing circuit;

the first switching circuit (K1) comprises a first relay, wherein the first relay comprises a first electromagnetic coil which is powered on/off by a first switching signal and a first single-pole double-throw switch of which the switch state is magnetically controlled by the first electromagnetic coil; the first single pole double throw switch includes: the pair of static contacts are respectively coupled with one ends of the main frequency crystal oscillator and the auxiliary frequency crystal oscillator; the movable contact is coupled with the input end of the frequency conversion unit;

and/or the second switching circuit (K2) comprises a second relay, wherein the second relay comprises a second electromagnetic coil which is powered on/off by a first switching signal and a second single-pole double-throw switch of which the switch state is magnetically controlled by the second electromagnetic coil; the second single pole double throw switch includes: a pair of stationary contacts respectively coupled to one ends of the first capacitor set (Ca 1, cb1, cc 1) and the second capacitor set (Ca 2, cb2, cc 2); a movable contact coupled to one end of a first secondary coil unit of the first transformer (T1); wherein the other ends of the first capacitor group (Ca 1, cb1, cc 1) and the second capacitor group (Ca 2, cb2, cc 2) are coupled to the other end of the first secondary coil unit;

And/or, the third switching circuit (K3) includes a third relay including a third electromagnetic coil that is turned on/off by a second switching signal, and a third single pole double throw switch whose switching state is magnetically controlled by the third electromagnetic coil, the third single pole double throw switch including: a pair of stationary contacts respectively coupled to one ends of the third capacitor group (Cd 1, ce1, cf 1) and the fourth capacitor group (Cd 2, ce2, cf 2); the movable contact is coupled to one end of the second secondary coil unit, which is coupled with the second amplifying circuit;

the amplifying and adjusting circuit is coupled between the output end of the frequency conversion unit and the input end of the first amplifying circuit; the amplification adjustment circuit includes:

a third resistor (R3) having one end coupled to an output of the frequency conversion unit;

an N-type first transistor (Q1) with a base coupled to the other end of the third resistor (R3) and a collector coupled to the positive electrode of the DC voltage source, one end of the ninth capacitor (C9) and the positive electrode of the first bipolar capacitor (C10); the other end of the ninth capacitor (C9) is coupled with the negative electrode of the first bipolar capacitor (C10) and grounded;

a potentiometer (VR 3) with two ends respectively coupled to the emitter of the first transistor (Q1) and one end of the fourth resistor (R4), and an adjustable end coupled to the input end of the first amplifying circuit; the other end of the fourth resistor (R4) is grounded.

2. The metal detector of claim 1, wherein the primary frequency and the secondary frequency differ by 10%.

3. The metal detector according to claim 1, wherein the frequency conversion unit includes: the front and back stage is coupled with the starting circuit and the frequency dividing circuit.

4. A metal detector according to claim 3, wherein the start-up circuit comprises:

the input end of the first inverter (U1A) is coupled with the input end of the starting circuit, the output end of the first inverter is coupled with one end of the first capacitor (C4), and a first resistor (R1) is connected between the input end and the output end of the first inverter (U1A) in parallel;

the input end of the second inverter (U1B) is coupled with the other end of the first capacitor (C4), the other end of the second inverter is coupled with one end of the second capacitor (C2) and one end of the third capacitor (C3), the other end of the second capacitor (C2) is coupled with the other ends of the main frequency crystal oscillator and the auxiliary frequency crystal oscillator, and the other end of the third capacitor (C3) is grounded; a second resistor (R2) is connected in parallel between the input end and the output end of the second inverter (U1B);

and the input end of the third inverter (U1C) is coupled with the output end of the second inverter (U1B), and the output end of the third inverter is coupled with the output end of the starting circuit.

5. A metal detector according to claim 3, wherein the frequency divider circuit comprises: at least two cascaded counters; one count output of the front counter is coupled to the clock terminal of the back counter.

6. The metal detector of claim 1, wherein the first amplification circuit further comprises:

a twelfth capacitor (C12) having one end coupled to the input end of the first amplifying circuit and the other end coupled to one end of the twelfth resistor (R12), one end of the thirteenth resistor (R13), and the base of the N-type fourth transistor (Q4), and the other end of the twelfth resistor (R12) coupled to the positive electrode of the DC voltage source, the collector of the fourth transistor, and one end of the eighteenth capacitor (C18); the other end of the eighteenth capacitor (C18) is grounded; the other end of the thirteenth resistor (R13) is coupled with the negative electrode of the direct-current voltage source and one end of the fourteenth resistor (R14), and the emitter of the fourth transistor (Q4) is coupled with the other end of the fourteenth resistor (R14) and one end of the nineteenth capacitor (C19);

a third transformer (T3) with two ends of the primary coil unit respectively coupled with the other end of the nineteenth capacitor (C19) and the negative electrode of the direct-current voltage source; two ends of the secondary coil unit are respectively coupled with the bases of a fifth transistor (Q5) and a sixth transistor (Q6), and one tap of the secondary coil unit is coupled with one end of a sixteenth resistor (R16), the positive electrode of a third diode (D3) and the positive electrode of a second bipolar capacitor (C20); the other end of the sixteenth resistor (R16) is grounded; the cathode of the third diode (D3) is coupled with one end of a fifteenth resistor (R15), and the other end of the fifteenth resistor (R15) and the cathode of the second bipolar capacitor (C20) are coupled with the cathode of the direct-current voltage source;

Collectors of a fifth transistor (Q5) and a sixth transistor (Q6) are led out of the output end of the first amplifying circuit and are coupled to a pair of working frequency signal output pins of the second connector to output a first amplifying signal; an emitter of the fifth transistor (Q5) is coupled to the dc voltage source cathode via a seventeenth resistor (R17), and an emitter of the sixth transistor (Q6) is coupled to the dc voltage source cathode via an eighteenth resistor (R18).

7. The metal detector of claim 1, wherein the first connector comprises: a first operating frequency indication input pin for receiving the first switching signal; a pair of working frequency signal input pins for receiving the first amplified signal;

the first primary coil unit of the first transformer (T1) comprises: a first primary side sub-coil (N1-1) and a second primary side sub-coil (N1-2), the first secondary side coil unit including a first secondary side sub-coil (N2-1) and a second secondary side sub-coil (N2-2); one end of the first secondary side sub-coil (N2-1) is coupled with one end of the first primary side sub-coil (N1-1) and one working frequency signal input pin, and the other end of the first secondary side sub-coil (N2-1) is coupled with one ends of the first capacitor group (Ca 1, cb1, cc 1) and the second capacitor group (Ca 2, cb2, cc 2); one end of the second secondary sub-coil (N2-2) is coupled with one end of the second primary sub-coil (N1-2) and the other working frequency signal input pin, and the other end of the second secondary sub-coil (N2-2) is coupled with the output end of the second switching circuit (K2) for switching and communicating the other end of the first capacitor group (Ca 1, cb1, cc 1) or the second capacitor group (Ca 2, cb2, cc 2); the other end of the second primary side sub-coil (N1-2) is coupled with the other end of the first primary side sub-coil (N1-1) and the positive electrode of the direct current voltage source.

8. The metal detector as claimed in claim 1, wherein,

the third connector (CN 3) comprises: the probe receives a signal output pin and is used for outputting the second amplified signal; a second operating frequency indication input pin for receiving the second switching signal;

and/or, the second amplifying circuit includes: a fifth resistor (R5) having one end coupled to the input end of the second amplifying circuit and one end of the sixth resistor (R6), and the other end coupled to one end of the fifth capacitor (C5) and grounded; the other end of the fifth capacitor (C5) is coupled with one end of the seventh resistor (R7); the non-inverting input end of the operational amplifier (U2) is coupled with the other end of the sixth resistor (R6), the inverting input end of the operational amplifier is coupled with the other end of the seventh resistor (R7) and one end of the eighth resistor (R8), the power supply anode of the operational amplifier is coupled with the positive electrode of the direct-current voltage source and one end of the eighth capacitor (C8), the other end of the eighth capacitor (C8) is grounded, the power supply cathode of the operational amplifier is coupled with the negative electrode of the direct-current voltage source and one end of the sixth capacitor (C6), the other end of the sixth capacitor (C6) is grounded, and the output end of the operational amplifier is coupled with the other end of the eighth resistor and one end of the seventh capacitor (C7); the other end of the seventh capacitor (C7) is coupled with one ends of a ninth resistor (R9) and a tenth resistor (R10), and the other end of the ninth resistor (R9) is grounded; the other end of the tenth resistor (R10) is coupled to the output of the second amplifying circuit.