CN117411839A

CN117411839A - Data processing device, method, electronic device and storage medium

Info

Publication number: CN117411839A
Application number: CN202311323712.2A
Authority: CN
Inventors: 请求不公布姓名; 陈忠明
Original assignee: Kunyi Electronic Technology Shanghai Co Ltd
Current assignee: Kunyi Electronic Technology Shanghai Co Ltd
Priority date: 2023-10-12
Filing date: 2023-10-12
Publication date: 2024-01-16

Abstract

The application provides a data processing device, a method and a storage medium, wherein the device comprises a control module, a first type forwarding chip and a second type forwarding chip, and the first type forwarding chip is configured to: receiving data through the vehicle-mounted Ethernet interface, transmitting the data to the control module, and receiving the data transmitted by the control module and transmitting the data through the vehicle-mounted Ethernet interface; the second type forwarding chip is configured to: receiving data through a common Ethernet interface, transmitting the data to a control module, and receiving the data transmitted by the control module and transmitting the data through the common Ethernet interface; the control module is configured to: receiving data sent to the control module by the first type forwarding chip and forwarding the data to the second type forwarding chip; and receiving the data sent to the control module by the second type forwarding chip and forwarding the data to the first type forwarding chip. The data processing device can adapt to various application scenes, and application flexibility and use convenience of the data processing device are improved.

Description

Data processing device, method, electronic device and storage medium

Technical Field

The present disclosure relates to the field of ethernet communications technologies, and in particular, to a data processing apparatus, a data processing method, an electronic device, and a storage medium.

Background

The interface of the vehicle-mounted Ethernet is a single twisted pair, four twisted pairs are needed for data transmission by the traditional Ethernet interface, the personal computer is used as the traditional Ethernet interface, the Ethernet interface of the personal computer is required to be connected with the vehicle-mounted Ethernet interface when developing and debugging the vehicle-mounted equipment, the conversion is generally carried out through an Ethernet conversion device at present, the Ethernet port rate of the existing Ethernet conversion device is fixed, only the switching of hundred megaEthernet and common Ethernet is supported, or only the switching of gigabit Ethernet and common Ethernet is supported, and different conversion devices are needed when the vehicle-mounted Ethernet standards are different.

Disclosure of Invention

The embodiment of the application provides a data processing device, a data processing method, electronic equipment and a storage medium, which are used for solving the problems that various scenes cannot be adapted in the current data processing device and the flexibility is poor.

In order to solve the technical problems, the embodiment of the application provides the following technical scheme:

the application provides a data processing device, which comprises an FPGA chip, an MCU chip control module and a forwarding chip, wherein the forwarding chip comprises a first type forwarding chip and a second type forwarding chip, and the first type forwarding chip and the second type forwarding chip are rate self-adaptive PHY chips;

The first end of the first type forwarding chip is a vehicle-mounted Ethernet interface, and the second end of the first type forwarding chip is connected with the control module; the first end of the second type forwarding chip is a common Ethernet interface, and the second end of the second type forwarding chip is connected with the control module;

the first type forwarding chips are in one-to-one correspondence with the second type forwarding chips, and the first type forwarding chips are configured to: receiving data through the vehicle-mounted Ethernet interface, transmitting the data to a control module, and receiving the data transmitted by the control module and transmitting the data through the vehicle-mounted Ethernet interface; the second type forwarding chip is configured to: receiving data through the common Ethernet interface, transmitting the data to a control module, and receiving the data transmitted by the control module and transmitting the data through the common Ethernet interface;

the control module is configured to: receiving data sent to a control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; and receiving the data sent to the control module by the second type forwarding chip and forwarding the data to the first type forwarding chip corresponding to the second type forwarding chip.

The application also provides a data processing method, which is applied to a data processing device, wherein the data processing device comprises a control module and a forwarding chip, the forwarding chip comprises a first type forwarding chip and a second type forwarding chip, the first type forwarding chip corresponds to the second type forwarding chip one by one, a first end of the first type forwarding chip is a vehicle-mounted Ethernet interface, and a second end of the first type forwarding chip is connected with the control module; the first end of the second type forwarding chip is a common Ethernet interface, and the second end of the second type forwarding chip is connected with the control module; the method comprises the following steps:

receiving data sent to the control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; and receiving the data sent to the control module by the second type forwarding chip and forwarding the data to the first type forwarding chip corresponding to the second type forwarding chip.

Embodiments of the present application provide a computer readable storage medium storing a plurality of instructions adapted to be loaded by a processor to perform the steps of the data processing method described above.

The beneficial effects are that: the application provides a data processing device, a method and a storage medium, wherein the device comprises a control module, a first type forwarding chip and a second type forwarding chip, the first type forwarding chip receives data and sends the data to the control module, and the control module sends the data to the second type forwarding chip corresponding to the first type forwarding chip; the second type forwarding chip receives the data and sends the data to the control module, and the control module sends the data to the first type forwarding chip corresponding to the second type forwarding chip; the first type forwarding chip and the second type forwarding chip are rate self-adaptive PHY chips, and can be used for adaptively switching hundred megabytes/kilomega vehicle-mounted Ethernet and common Ethernet through the first type forwarding chip and the second type forwarding chip so as to adapt to various application scenes, and the application flexibility and the use convenience of the data processing device are improved.

Drawings

Technical solutions and other advantageous effects of the present application will be made apparent from the following detailed description of specific embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application.

Fig. 2 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application.

Fig. 3 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application.

Fig. 4 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application.

Fig. 5 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application.

Fig. 6 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application.

Fig. 7 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application.

Fig. 8 is a schematic diagram of SPI communication timing provided in the embodiment of the present application.

Fig. 9 is a flowchart of a data processing method provided in the present application.

Fig. 10 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

The vehicle-mounted Ethernet is a novel local area network technology for connecting an electronic control unit in a vehicle by using the Ethernet. Unlike the common ethernet technology, which adopts 4 pairs of unshielded twisted pair wires to transmit data, the vehicle-mounted ethernet can realize 100Mbps and 1Gbps data transmission even higher on a single unshielded twisted pair wire. Compared with the common Ethernet, the system is more suitable for the vehicle environment, and meets the requirements of the automobile industry on high reliability, low electromagnetic radiation, low power consumption, bandwidth allocation, low delay, synchronous instantaneity and the like.

Based on the rapid development of the vehicle-mounted Ethernet, in order to support the interaction of the vehicle-mounted local area network and the common local area network, the vehicle-mounted Ethernet and the common local area network are in data interaction, and a data processing device is required to transmit data between the vehicle-mounted Ethernet and the common Ethernet.

The embodiment of the application provides a data processing device, a data processing method and a computer readable storage medium, wherein the data processing device can be directly integrated in vehicle-mounted equipment or not integrated in the vehicle-mounted equipment, and the data processing device can be directly connected with the vehicle-mounted equipment as an external device for data processing.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a data processing device provided in an embodiment of the present application, where the data processing device includes a control module and a forwarding chip, the forwarding chip includes a first type forwarding chip and a second type forwarding chip, and the first type forwarding chip and the second type forwarding chip are rate adaptive PHY chips; the first end of the first type forwarding chip is a vehicle-mounted Ethernet interface, and the second end of the first type forwarding chip is connected with the control module; the first end of the second type forwarding chip is a common Ethernet interface, and the second end of the second type forwarding chip is connected with the control module; the first type forwarding chips are in one-to-one correspondence with the second type forwarding chips, and the first type forwarding chips are configured to: receiving data through the vehicle-mounted Ethernet interface, transmitting the data to the control module, and receiving the data transmitted by the control module and transmitting the data through the vehicle-mounted Ethernet interface; the second type forwarding chip is configured to: receiving data through a common Ethernet interface, transmitting the data to a control module, and receiving the data transmitted by the control module and transmitting the data through the common Ethernet interface; the control module is configured to: receiving data sent to the control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; and receiving the data sent to the control module by the second type forwarding chip and forwarding the data to the first type forwarding chip corresponding to the second type forwarding chip.

In one embodiment, the common ethernet interface is an RJ45 interface, and in other embodiments, the common ethernet interface may use a common ethernet interface type, such as an RJ11 interface, or the like. Hereinafter, for ease of understanding, the common ethernet interface type is an RJ45 interface, and the common ethernet is denoted as RJ45 ethernet, and the specific details involved are for exemplary purposes only and for ease of understanding, and are not limiting.

In one embodiment, the first type forwarding chip is a vehicle-mounted ethernet PHY chip, the second type forwarding chip is a common ethernet PHY chip, as shown in fig. 1, the number of the first type forwarding chip and the second type forwarding chip is 1, one end of the vehicle-mounted ethernet PHY chip is a vehicle-mounted ethernet interface, connected with the vehicle-mounted ethernet t1_0, and the other end of the vehicle-mounted ethernet PHY chip is connected with the common ethernet PHY chip through a control module, one end of the common ethernet PHY chip is a common ethernet interface, connected with the common ethernet rk45_0, so that interworking interaction between the vehicle-mounted ethernet t1_0 and the common ethernet rk45_0 is realized, that is, the common ethernet can capture and send all messages of the vehicle-mounted ethernet of the opposite end, and the vehicle-mounted ethernet can also obtain and send all messages of the common ethernet of the opposite end.

In one embodiment, as shown in fig. 2, the number of the first type forwarding chips and the second forwarding chips is 2, the 2 first type forwarding chips are respectively denoted as a first forwarding chip Tcar PHY-1, a second forwarding chip Tcar PHY-2, and the 2 second type forwarding chips are respectively denoted as a third forwarding chip RJ45 PHY-1 and a fourth forwarding chip RJ45 PHY-2. One end of the Tcar PHY-1 is a vehicle-mounted Ethernet interface and is connected with the vehicle-mounted Ethernet T1-1, the other end of the Tcar PHY-1 is connected with the RJ45 PHY-1 through a control module, one end of the RJ45 PHY-1 is a common Ethernet interface and is connected with the common Ethernet RJ 45-1, one end of the Tcar PHY-2 is a vehicle-mounted Ethernet interface and is connected with the vehicle-mounted Ethernet T1-2, the other end of the Tcar PHY-2 is connected with the RJ45 PHY-2 through a control module, and one end of the RJ45 PHY-2 is a common Ethernet interface and is connected with the common Ethernet RJ 45-2. The vehicle-mounted equipment is connected with T1_1 and T1_2, and the upper computer is connected with RJ45_1 and RJ45_2. At this time, the vehicle-mounted ethernet t1_1 and the vehicle-mounted ethernet t1_2 do not perform interworking interaction, the common ethernet rq45_1 and the vehicle-mounted ethernet t1_1 directly perform interworking interaction, and the common ethernet rq45_2 and the vehicle-mounted ethernet t1_2 directly perform interworking interaction.

In general, a PHY chip receives analog signals such as electricity and light, processes the signals through an MII interface after demodulation and a/D conversion, receives data transmitted from the MAC chip, processes the received data, converts parallel data into serial stream data, encodes the data according to an encoding rule of a physical layer, and then converts the encoded data into analog signals to transmit the data. In the application, no MAC chip is arranged, the control module directly forwards the data converted by the PHY chip, and the data conversion of the vehicle-mounted Ethernet and the common Ethernet is carried out by using the PHY to PHY mode.

The first type forwarding chip and the second type forwarding chip are rate self-adaptive PHY chips, and can realize hundred megagigabit self-adaptive switching according to the self-negotiation mode, so that the conversion of hundred megabit vehicle-mounted Ethernet and common Ethernet can be performed, and the conversion of kilobit vehicle-mounted Ethernet and common Ethernet can be performed. In the auto-negotiation mode, the first type forwarding chip performs auto-negotiation with the vehicle-mounted equipment, the second type forwarding chip performs auto-negotiation with the upper computer, the first type forwarding chip stores auto-negotiation capability of a common Ethernet signal, the second type forwarding chip stores auto-negotiation capability of the common vehicle-mounted Ethernet signal, and the first type forwarding chip and the second type forwarding chip automatically adjust transmission rates to a maximum speed and a duplex mode which are simultaneously provided by the first type forwarding chip and the second type forwarding chip according to auto-negotiation capability values of the first type forwarding chip and the second type forwarding chip. For example, when the network environment of the normal ethernet and the in-vehicle ethernet data can reach 100M, the data processing apparatus may support switching of the hundred mega in-vehicle ethernet and the normal ethernet, and when the network environment of the normal ethernet and the in-vehicle ethernet data can reach 1000M, the data processing apparatus may support switching of the giga ethernet and the normal ethernet.

According to the method and the device for realizing the multi-megabit mode and gigabit mode self-adaptive vehicle-mounted Ethernet and common Ethernet conversion, the port of the tested vehicle-mounted device is in the multi-megabit mode or the gigabit mode, the port which is in butt joint can be in the self-adaptive rate mode of the tested device port, and the application flexibility of products and the use convenience of clients are effectively improved. Furthermore, multiplexing data conversion can be achieved by increasing the number of the first type forwarding chips and the second type forwarding chips.

In one embodiment, the forwarding chips include 2 forwarding chips of a first type and 2 forwarding chips of a second type, and the control module is provided with a first transceiving mode and a second transceiving mode; when the control module is set to the first transceiving mode, the control module is configured to: receiving data sent to the control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; receiving data sent to the control module by the second type forwarding chip and forwarding the data to the first type forwarding chip corresponding to the second type forwarding chip; when the control module is set to the second transceiving mode, the control module is configured to: selecting one second type forwarding chip from the 2 second type forwarding chips as a monitoring chip; and receiving the data sent to the control module by the 2 first type forwarding chips, forwarding the data sent to the control module by one first type forwarding chip to the other first type forwarding chip, and forwarding the data sent to the control module by the 2 first type forwarding chips to the monitoring chip.

Compared with the prior art, the data processing device in the embodiment of the application has two transceiving modes, wherein the first transceiving mode is a vehicle-mounted Ethernet-common Ethernet conversion device in the traditional sense, and can convert the vehicle-mounted Ethernet and the common Ethernet to realize data conversion among different media; the second receiving and transmitting mode is actually a data acquisition mode, the two vehicle-mounted devices communicate through the vehicle-mounted Ethernet, namely, the two vehicle-mounted devices mutually transmit data through the two first type forwarding chips, and meanwhile, the upper computer can monitor and acquire the data of the two vehicle-mounted devices at the same time, so that the data of the two vehicle-mounted Ethernet can be transmitted in one data stream under the condition that the data of the two vehicle-mounted Ethernet are not changed, the data analysis of the two vehicle-mounted Ethernet by the subsequent devices is facilitated, for example, the data analysis work with data synchronism requirements is facilitated, and the data analysis work can be used for verifying the data correctness of the two paths of data.

The data processing device supports two transceiving modes. In one embodiment, the control module may be configured to be in a first transceiving mode or a second transceiving mode in a plurality of manners, for example, the control module may be connected through an upper computer to control an application program loaded by the control module, or the upper computer may issue a control signal to the control module to control the application program, or two keys are set, which correspond to the first transceiving mode and the second transceiving mode respectively, and the start/stop of the two transceiving modes is controlled through the keys. The configuration may also be automatic, for example, when the common ethernet interfaces corresponding to the 2 second type forwarding chips are all connected (the 2 common ethernet interfaces are connected with the switch and then connected with the upper computer through the switch, or the 2 common ethernet interfaces are respectively connected with the upper computer), the configuration is automatically configured into the first transceiving mode at this time, and when only one common ethernet interface corresponding to one second type forwarding chip in the 2 second type forwarding chips is connected with the upper computer, the configuration is automatically configured into the second transceiving mode at this time. In general, in the second transceiver mode, a second type forwarding chip connected to the host computer is used as a monitoring chip.

In one embodiment, the control module includes 2 first control units and 2 second control units, where the 2 first control units are in one-to-one correspondence with the 2 forwarding chips of the first type, the 2 second control units are in one-to-one correspondence with the 2 forwarding chips of the second type, and the 2 first control units are in one-to-one correspondence with the 2 second control units;

in the first transceiving mode, the first control unit is configured to: receiving data from a first type forwarding chip corresponding to the first control unit, storing the data into a storage area of the first control unit, and taking the data out of a storage area of a second control unit corresponding to the first control unit and sending the data to the first type forwarding chip corresponding to the first control unit; the second control unit is configured to: receiving data from a second type forwarding chip corresponding to the second control unit, storing the data into a storage area of the second control unit, and taking the data out of the storage area of the first control unit corresponding to the second control unit and sending the data to the second type forwarding chip corresponding to the second control unit;

in the second transceiving mode, selecting one second type forwarding chip from the 2 second type forwarding chips as a monitoring chip, and using a second control unit corresponding to the monitoring chip as a monitoring unit, wherein the first control unit is configured to: receiving data from a first type forwarding chip corresponding to a first control unit, storing the data in a storage area of the first control unit, and taking the data out of a storage area of another first control unit and sending the data to the first type forwarding chip corresponding to the first control unit; the monitoring unit is configured to: and polling the storage areas of the two first control units, taking out data from the storage areas of the first control units when the storage areas of the first control units are not empty, sending the data to the monitoring chip, and querying the storage areas of the other first control units when the storage areas of the first control units are empty. In one embodiment, as shown in FIG. 3, two first control units are respectively designated as a first controller Tcar-1Ctrl and a second controller Tcar-2 Ctrl, and two second control units are respectively designated as a third controller RJ45-1Ctrl and a fourth controller RJ45-2 Ctrl. The first forwarding chip Tcar PHY-1 corresponds to the first controller Tcar-1Ctrl, the second forwarding chip Tcar PHY-2 corresponds to the second controller Tcar-2 Ctrl, the third forwarding chip RJ45 PHY-1 corresponds to the third controller RJ45-1Ctrl, the fourth forwarding chip RJ45 PHY-2 corresponds to the fourth controller RJ45-2 Ctrl, the first controller Tcar-1Ctrl corresponds to the third controller RJ45-1Ctrl, and the second controller Tcar-2 Ctrl corresponds to the fourth controller RJ45-2 Ctrl.

In one embodiment, as shown in fig. 4 and 5, the storage area of the first control unit is a FIFO buffer, and the storage area of the second control unit is a FIFO buffer; the FIFO is a first-in first-out data buffer, is easy to use, has high reading and writing speed, and can ensure the time sequence of data.

When the device works in a first receiving and transmitting mode, only end-to-end data conversion is actually carried out, and a data path is a first type forwarding chip, a first control unit, a second control unit and a second type forwarding chip; when the device works in the second receiving and transmitting mode, on one hand, two vehicle-mounted devices need to communicate, on the other hand, the upper computer needs to grasp data, and two data paths are provided, as shown in fig. 5, namely a first forwarding chip, a first controller, a second forwarding chip, and a first controller/a second controller, and a monitoring chip. Therefore, for the second transceiving mode, the first control unit needs at least 2 FIFO buffers, whereas for the first transceiving mode, the second control unit needs only one FIFO buffer.

In one embodiment, in the first transceiving mode, the first control unit uses 1 FIFO buffer, as shown in fig. 4, the first controller Tcar-1 Ctrl receives data from the first forwarding chip Tcar PHY-1 and stores the data in the FIFO buffer of the first controller Tcar-1 Ctrl, and the first controller Tcar-1 Ctrl fetches the data from the FIFO buffer of the third controller RJ45-1 Ctrl and sends the data to the first forwarding chip Tcar PHY-1; the second controller Tcar-2 Ctrl receives data from the second forwarding chip Tcar PHY-2 and stores the data in a FIFO buffer area of the second controller Tcar-2 Ctrl, and the second controller Tcar-2 Ctrl takes the data from the FIFO buffer area of the fourth controller RJ45-2 Ctrl and sends the data to the second forwarding chip Tcar PHY-2; the third controller RJ45-1 Ctrl receives data from the third forwarding chip RJ45PHY-1 and stores the data in a FIFO buffer area of the third controller RJ45-1 Ctrl, and the third controller RJ45-1 Ctrl takes the data from the FIFO buffer area of the first controller Tcar-1 Ctrl and sends the data to the third forwarding chip RJ45 PHY-1; the fourth controller RJ45-2 Ctrl receives data from the fourth forwarding chip RJ45 PHY-2 and stores the data in a FIFO buffer area of the fourth controller RJ45-2 Ctrl, and the fourth controller RJ45-2 Ctrl takes the data from the FIFO buffer area of the second controller Tcar-2 Ctrl and sends the data to the fourth forwarding chip RJ45 PHY-2. At this time, the vehicle-mounted ethernet t1_1 and the vehicle-mounted ethernet t1_2 do not communicate and interact, the common ethernet rq45_1 and the vehicle-mounted ethernet t1_1 communicate and interact, the common ethernet rq45_2 and the vehicle-mounted ethernet t1_2 communicate and interact, that is, the common ethernet can capture and send all messages of the vehicle-mounted ethernet of the opposite terminal, and the vehicle-mounted ethernet can also obtain and send all messages of the common ethernet of the opposite terminal.

In one embodiment, in the second transceiving mode, the first control unit is provided with 2 FIFO buffers, the first control unit being configured to: receiving data from a first type forwarding chip corresponding to a first control unit, storing the data to a first FIFO buffer area and a second FIFO buffer area of the first control unit at the same time, and taking out the data from the first FIFO buffer area of the other first control unit and sending the data to the first type forwarding chip corresponding to the first control unit; the monitoring unit is configured to: and polling the second FIFO buffer areas of the two first control units, taking out data from the second FIFO buffer areas of the first control units when the second FIFO buffer areas of the first control units are not empty, and sending the data to the monitoring chip, and querying the second FIFO buffer areas of the other first control units when the second FIFO buffer areas of the first control units are empty.

In one embodiment, in the second transceiving mode, the first control unit uses 2 FIFO buffers, as shown in fig. 5, the first controller Tcar-1 Ctrl receives data from the first forwarding chip Tcar PHY-1 and stores the data in both the first FIFO buffer and the second FIFO buffer of the first controller Tcar-1 Ctrl, and the first controller Tcar-1 Ctrl fetches the data from the first FIFO buffer of the second controller Tcar-2 Ctrl and sends the data to the first forwarding chip Tcar PHY-1; the second controller Tcar-2 Ctrl receives data from the second forwarding chip Tcar PHY-2 and stores the data in a first FIFO buffer area and a second FIFO buffer area of the second controller Tcar-2 Ctrl at the same time, and the second controller Tcar-2 Ctrl takes the data from the first FIFO buffer area of the first controller Tcar-1 Ctrl and sends the data to the second forwarding chip Tcar PHY-2; the third forwarding chip RJ45 PHY-1 is used as a monitoring chip, the third controller RJ45-1 Ctrl corresponding to the third forwarding chip RJ45 PHY-1 is used as a monitoring unit, and the fourth controller RJ45-2 Ctrl does not work. The third controller RJ45-1 Ctrl polls the second FIFO buffer of the first controller Tcar-1 Ctrl and the second FIFO buffer of the second controller Tcar-2 Ctrl, and may sequentially query the second FIFO buffer of the first controller and the second FIFO buffer of the second controller at fixed time intervals, or alternatively query the second FIFO buffer of the first controller and the second FIFO buffer of the second controller in turn at fixed order. For the second FIFO buffer area currently accessed by the third controller RJ45-1 Ctrl, if the second FIFO buffer area currently accessed is not empty, the data is taken out and sent to the third forwarding chip RJ45 PHY-1, if the second FIFO buffer area currently accessed is empty, no operation is executed, and the second FIFO buffer area of another controller is queried. At this time, the on-vehicle ethernet t1_1 and the on-vehicle ethernet t1_2 are in interworking interaction, and the common ethernet (rq45_1) can simultaneously capture all messages of the on-vehicle ethernet t1_1 and the on-vehicle ethernet t1_2 and send the messages.

In one embodiment, the FIFO buffer comprises a data FIFO configured to receive ethernet data packets and a bypass FIFO configured to receive transmit completion instructions. When one data FIFO receives a complete Ethernet data message, a sending completion instruction is generated and stored in a corresponding bypass FIFO. Specifically, taking the first forwarding chip and the first controller as an example, when the first forwarding chip starts to receive data, the first controller detects that the data receiving bit is valid, the data received by the first forwarding chip is pressed into the data FIFO of the first controller, after the data transmission is completed, the first controller detects that the data receiving bit is invalid, and a sending completion instruction is generated and pressed into the bypass FIFO of the first controller. In this way, it may be determined whether the data FIFO is empty directly by querying the bypass FIFO. In the second transceiving mode, the monitoring unit polls the bypass FIFOs of the two first control units, and for the currently accessed bypass FIFOs, when the bypass FIFOs are not empty, data are taken out from the corresponding data FIFOs and sent to the monitoring chip, and when the bypass FIFOs are empty, the operation is skipped, and the operation is not executed, so that the other bypass FIFOs of the other first control units are queried. The method and the device support two transceiving modes, the two transceiving modes can be switched, so that the application scene of the product is more, different requirements of customers can be met, and the application flexibility of the product is effectively improved.

In one embodiment, as shown in fig. 6, the control module includes an FPGA chip (Field Programmable Gate Array ) and an MCU chip (Microcontroller Unit, single-chip microcomputer or single-chip microcomputer), the FPGA chip is connected to the MCU chip, the MCU chip is configured to issue a target configuration instruction to the FPGA chip, the FPGA chip is configured to be set to a first transceiving mode or a second transceiving mode according to the received target configuration instruction, the first type forwarding chip is connected to the FPGA chip, and the second type forwarding chip is connected to the FPGA chip.

According to the data service management method and device, the data service is managed through the FPGA chip, the control interface is managed through the MCU chip, and the MCU chip and the FPGA chip are matched for use, so that the configuration is more flexible, and the operation is more convenient.

The MCU chip is connected with the first type forwarding chip, the MCU chip is configured to send a first configuration signal to the first type forwarding chip and read the chip state from the first type forwarding chip, and the first type forwarding chip is configured to initialize and change the configuration according to the received first configuration signal; the MCU chip is connected with the second type forwarding chip, the MCU chip is configured to send a second configuration signal to the second type forwarding chip and read the chip state from the second type forwarding chip, and the second type forwarding chip is configured to initialize and change the configuration according to the received second configuration signal.

The MCU chip is provided with a first communication interface and a second communication interface, the first communication interface is used for realizing connection of the MCU chip with the first type forwarding chip and the second type forwarding chip, and the second communication interface is used for realizing connection of the MCU chip with the FPGA chip.

The first configuration signal and the second configuration signal are transmitted through the first communication interface. In one embodiment, the first communication interface may be an MDIO interface, where the MDIO interface is used to connect with the first type forwarding chip and the second type forwarding chip, that is, the communication interfaces of the MCU, the vehicle ethernet PHY and the normal ethernet PHY are MDIOs. After power-on, the PHY chip is initialized through the MCU chip, and the configuration of the PHY chip can be changed in real time through the upper computer, and the latest state of the PHY chip is obtained.

In one embodiment, the second communication interface may be an SPI interface, in which in an SPI communication protocol, the MCU chip is an SPI Master (SPI Master), the FPGA chip is an SPI Slave (SPI Slave), and the MCU chip may control an internal register of the FPGA in real time through the SPI interface, where the internal register stores basic information such as FPGAID, version number, compile time, and the like. The MCU chip can also control the state of the LED indicator lamp through the SPI interface and the internal register of the chip internal bus operation FPGA chip, the outside can judge the state of the current FPGA chip through the LED indicator lamp, such as a switch, a first transceiving mode and a second transceiving mode, and the MCU chip can also perform mode setting of the first transceiving mode or the second transceiving mode and the like through the SPI interface and the internal register of the chip internal bus operation FPGA chip. The FPGA chip can also acquire link (connection state) and speed (transmission rate) of the Ethernet port from the MCU chip through the register, so as to be used for constructing internal logic of the FPGA chip, and respectively adjust internal data sending and storage logic in hundred mega and giga modes. The SPI communication protocol supports 16-bit address, 16-bit data read-write operation, chip selection is pulled low to be effective, read-write bit '1' is read, read-write bit '0' is write, and address and data bits are transmitted to high bits and then to low bits. As shown in fig. 8, the CS signal is an enable signal (chip select signal), SCK is a clock signal, and the MCU chip pulls down the CS signal to ensure that the PFGA chip starts to receive data, and when the FPGA chip detects an edge signal of the clock signal, the FPGA chip immediately reads a signal on the data line, so that one bit of data (1 bit) is obtained. The MOSI represents the data output of the main equipment, the MOSI signal of the MCU chip is an output mode, and the MOSI signal of the PFGA chip is an input mode; MISO represents the data input of the main device, the MISO of the MCU chip is the input mode, and the MISO of the PFGA chip is the output mode.

In one embodiment, the MCU chip further comprises a Uart port, the Uart port is of a USB-to-Type-C port Type, the MCU chip can be connected with an upper computer such as a PC through the Uart port, and the upper computer is used for controlling the MCU chip, so that the control of the whole device is achieved. The MCU chip also comprises a JTAG interface, the MCU chip obtains the latest version of the FPGA from the external SPI Flash, and the FPGA firmware is loaded through the JTAG interface; in addition, the MCU chip can store the current configuration in the SPI Flash chip (supporting automatic storage or manual storage), and can acquire the configuration stored before power failure from the SPI Flash chip after power is on again, and also supports factory setting recovery, namely Rst reset. In addition, the firmware version can be stored in the external Flash chip, and the FPGA firmware and the MCU firmware can be updated on line through the JTAG interface and the external Flash chip.

In one embodiment, as shown in fig. 7, the FPGA chip includes 4 interface conversion modules, 2 forwarding chips of the first type and 2 forwarding chips of the second type are in one-to-one correspondence with the 4 interface conversion modules, and the interface conversion modules are configured to perform mutual conversion between an RGMII interface standard and a GMII interface standard, which is denoted as an RGMII < - > GMII module.

The RGMII interface (Reduced Gigabit Media-Independent Interface) and the GMII interface (Gigabit Media-Independent Interface) are two Ethernet interface standards, both of which are used to transport Ethernet data. The GMII transmits data and control signals to the PHY chip respectively, and an 8-bit parallel interface is used, wherein the GMII transmits 8 bits in one clock period, the rising edge transmits 8 bits, and the falling edge does not transmit; RGMII combines data and control signals together, using a 4-bit parallel interface, transmitting 8 bits in one clock cycle, with 4 bits on the rising edge and 4 bits on the falling edge. Compared with GMII, the RGMII interface can reduce the bus width for transmitting data and control signals, thereby saving the pin number of a physical interface and saving space on board level design.

The RGMII interface (Reduced GMII interface) is a simplified GMII interface. The GMII interface provides an 8-bit data channel with a clock of 125MHz when implementing a data transmission rate of 1000 Mbps. The RGMII interface reduces 8 data lines in total on TXD (data transmit pin) and RXD (data receive pin) relative to GMII interface, at a clock frequency of 125Mhz at a transmission rate of 1000Mbps, the transmit/receive data lines transmit/receive TXD [3:0]/RXD [3:0] in GMII interface on a rising edge of a clock signal, transmit/receive GMII interface on a falling edge of the clock signal, TXD [7:4]/RXD [7:4] (transmit data lines transmit 4bit data on a rising edge, transmit 4bit data on a falling edge, receive data lines receive 4bit data on a rising edge, and receive 4bit data on a falling edge), and signal gtx_clk (transmit end clock signal) reflects the states of tx_en (enable) and tx_er (transmit data error), i.e., gtx_clk rises along transmit_tx_tx_er, falling edge. Also, for RX_CLK (receiver clock signal), RX_EN (enabled) is sent on the rising edge of RX_CLK and RX_ER (send data error) is sent on the falling edge.

For the FPGA chip, the rising edge of one clock is used for processing more stably under the 125MHz clock, and certain stability problems possibly brought by higher time sequence requirements when the clock frequency is increased to 250MHz are considered, so that the RGMII-based data processing and time sequence stability are facilitated by adopting the RGMII < - > GMII module for performing the mutual conversion of the RGMII interface and the GMII interface, the data processing and time sequence stability are facilitated, and the board design complexity is reduced.

The conversion between RGMII and GMII may be achieved by an intermediate conversion circuit. This conversion circuit may convert data and clocks between the RGMII interface and the GMII interface. When converting from an RGMII interface to a GMII interface, the RGMII data and clock at a high rate are converted to a lower rate of the GMII to accommodate the transmission rate of the GMII interface. When converting from the GMII interface to the RGMII interface, the data and clock of the GMII interface are converted to a high rate of RGMII.

In one embodiment, the first transceiver mode may be referred to as bypass mode, in which the vehicle-mounted ethernet t1_1 and the vehicle-mounted ethernet t1_2 do not perform data interaction, the common ethernet rk45_1 and the vehicle-mounted ethernet t1_1 directly interact, and the common ethernet rk45_2 and the vehicle-mounted ethernet t1_2 directly interact, that is, the common ethernet may capture and send all messages of the vehicle-mounted ethernet of the opposite end, and the vehicle-mounted ethernet may also obtain and send all messages of the common ethernet of the opposite end.

The method is characterized in that the common Ethernet is used for capturing the vehicle-mounted Ethernet message, the implementation logic is as follows, vehicle-mounted Ethernet data is received through a vehicle-mounted Ethernet PHY chip, after the RGMII < - > GMII module of the FPGA chip is converted, the FPGA chip detects that the RX_EN signal of the vehicle-mounted end GMII interface is effective, RXD [7:0] data is pressed into the FIFO inside the FPGA chip, the length of the common Ethernet message is between 64B and 1518B, the FIFO depth is set to 4096, the data length is 8 bits, the maximum can be ensured to be buffered for 2 frames of the longest Ethernet message at the same time, after the RX_EN signal is invalid, the FPGA enables TX_EN, 96 bytes are transmitted according to the minimum frame gap of the Ethernet frame, the buffered data in the FIFO is sequentially carried out, and the common Ethernet interface can be directly connected with the PC end or the domain control end through the common Ethernet PHY chip after the RGMII < - > GMII module, and the vehicle-mounted Ethernet data is captured and obtained.

The second receiving and transmitting mode can be called as a minor mode, the vehicle-mounted Ethernet T1_1 and the vehicle-mounted Ethernet T1_2 can realize data interaction, and the common Ethernet (RJ 45_1) can simultaneously capture and send all messages of the vehicle-mounted Ethernet T1_1 and the vehicle-mounted Ethernet T1_2;

as shown in fig. 7, the third forwarding chip RJ45 PHY-1 is used as a monitoring chip, the logic of the implementation of the minor mode is as follows, the common ethernet does not split and parse the message of the vehicle-mounted ethernet, the message of the vehicle-mounted ethernet t1_1/the vehicle-mounted ethernet t1_2 is forwarded to the common ethernet rk45_1 respectively according to the polling mode, the common ethernet rk45_1 can be connected with the PC end or monitor the message of the vehicle-mounted ethernet in a domain control mode, the logic of the FPGA chip receives the message of the vehicle-mounted ethernet is similar to the logic of the bypass mode, only 2 FIFOs are used, the data of the two paths of vehicle-mounted ethernet are respectively pressed into two paths of data FIFOs, and after receiving a complete ethernet data message, the completion information command is pressed into a bypass FIFO, the non-empty FIFO indicates that the data corresponding to the ethernet port is buffered, the non-empty state of the two paths of the FPGA wheel is respectively taken out from the data, and the two paths of the FIFO is simultaneously grabbed by the common ethernet in the mode according to the minimum frame gap.

The bypass mode is utilized, so that data transmission between the common Ethernet of the opposite terminal and the vehicle-mounted Ethernet can be realized, and data conversion between different media can be realized; the bypass monitoring function of the vehicle-mounted Ethernet port can be realized by utilizing the minor mode, and the common Ethernet is used for capturing the data of the two vehicle-mounted Ethernet, so that the data of the two vehicle-mounted Ethernet can be transmitted in one data stream under the condition of not changing the data of the two vehicle-mounted Ethernet, the data analysis of the follow-up equipment on the two vehicle-mounted Ethernet can be conveniently performed, for example, the data analysis work with data synchronism requirements can be performed on the follow-up equipment, the requirements can be effectively met under the data link of the minor function, and the follow-up equipment can be used for verifying the correctness of the data of the two paths of data.

It will be understood that, for the first control unit and the second control unit, the FIFO buffer in the first transceiving mode and the buffer in the second transceiving mode may be multiplexed, or may be independent, as shown in fig. 7, fig. 7 shows the data links of the first transceiving mode and the second transceiving mode at the same time, where the FIFO buffer in the first transceiving mode and the buffer in the second transceiving mode are independent, and the above details do not limit the application to the implementation of the specific details described above, for example, by logic control, the FIFO buffer used in the first transceiving mode is used in the second transceiving mode.

Further, the present application also provides a data processing method, which is applied to the data processing device provided in the foregoing embodiment, and fig. 9 is a flowchart of the data processing method provided in the present application, where the method includes the following steps:

In one embodiment, the forwarding chips comprise 2 forwarding chips of a first type and 2 forwarding chips of a second type, and the control module is provided with a first transceiving mode and a second transceiving mode;

in a first receiving and transmitting mode, receiving data sent to the control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; receiving data sent to the control module by the second type forwarding chip and forwarding the data to the first type forwarding chip corresponding to the second type forwarding chip;

in a second receiving and transmitting mode, selecting one second type forwarding chip from 2 second type forwarding chips as a monitoring chip; and receiving the data sent to the control module by the 2 first type forwarding chips, forwarding the data sent to the control module by one first type forwarding chip to the other first type forwarding chip, and forwarding the data sent to the control module by the 2 first type forwarding chips to the monitoring chip.

Accordingly, the embodiment of the present application further provides an electronic device, as shown in fig. 10, where the electronic device may include a Radio Frequency (RF) circuit 101, a memory 102 including one or more computer readable storage media, an input unit 103, a display unit 104, a sensor 105, an audio circuit 106, a WiFi module 107, a processor 108 including one or more processing cores, and a power supply 109. It will be appreciated by those skilled in the art that the electronic device structure shown in fig. 10 is not limiting of the electronic device and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components. Wherein:

the radio frequency circuit 101 may be used for receiving and transmitting signals during the process of receiving and transmitting information or communication, in particular, after receiving downlink information of the base station, the downlink information is processed by one or more processors 108; in addition, data relating to uplink is transmitted to the base station. The memory 102 may be used to store software programs and modules, and the processor 108 performs various functional applications and virtual machine backups by running the software programs and modules stored in the memory 102. The input unit 103 may be used to receive entered numeric or character information and to generate keyboard, mouse, joystick, optical or trackball signal inputs related to customer settings and function control.

The display unit 104 may be used to display information entered by a client or provided to a client and various graphical client interfaces of a server, which may be composed of graphics, text, icons, video, and any combination thereof.

For example, the analysis result of the fast fourier transform, the frequency value of the original audio file after the fast fourier transform, the amplitude value of the original audio file after the fast fourier transform, the frequency error value, the amplitude error value, and the PWM signal comparison result may be displayed.

The electronic device may also include at least one sensor 105, such as a light sensor, a motion sensor, and other sensors. Audio circuitry 106 includes speakers that may provide an audio interface between the client and the electronic device.

WiFi belongs to the short-range wireless transmission technology, and the electronic device provides wireless broadband internet follow-up access for clients through the WiFi module 107. Although fig. 10 shows a WiFi module 107, it is understood that it does not belong to the necessary constitution of the electronic device, and can be omitted entirely as required within a range that does not change the essence of the application.

The processor 108 is a control center of the electronic device that uses various interfaces and lines to connect the various parts of the overall handset, performing various functions of the electronic device and processing the data by running or executing software programs and/or modules stored in the memory 102, and invoking data stored in the memory 102, thereby performing overall monitoring.

The processor 108 may include a control chip and a forwarding chip, the forwarding chip including a first type forwarding chip and a second type forwarding chip, the first type forwarding chip and the second type forwarding chip being rate-adaptive PHY chips; the first end of the first type forwarding chip is a vehicle-mounted Ethernet interface, and the second end of the first type forwarding chip is connected with the control module; the first end of the second type forwarding chip is a common Ethernet interface, and the second end of the second type forwarding chip is connected with the control module; the first type forwarding chips are in one-to-one correspondence with the second type forwarding chips, and the first type forwarding chips are configured to: receiving data through the vehicle-mounted Ethernet interface, transmitting the data to the control module, and receiving the data transmitted by the control module and transmitting the data through the vehicle-mounted Ethernet interface; the second type forwarding chip is configured to: receiving data through a common Ethernet interface, transmitting the data to a control module, and receiving the data transmitted by the control module and transmitting the data through the common Ethernet interface; the control module is configured to: receiving data sent to the control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; and receiving the data sent to the control module by the second type forwarding chip and forwarding the data to the first type forwarding chip corresponding to the second type forwarding chip. The electronic device further comprises a power supply 109 (e.g. a battery) for powering the various components, which may preferably be logically connected to the processor 108 via a power management system, whereby charging, discharging, and power consumption management functions are performed by the power management system.

Although not shown, the electronic device may further include a bluetooth module, etc., and will not be described herein. Specifically, in this embodiment, the processor 108 in the server loads executable files corresponding to the processes of one or more application programs into the memory 102 according to the following instructions, and the processor 108 executes the application programs stored in the memory 102, so as to implement the following functions:

In the foregoing embodiments, the descriptions of the embodiments are focused on, and the portions of an embodiment that are not described in detail in the foregoing embodiments may be referred to in the foregoing detailed description, which is not repeated herein.

It will be appreciated by those of ordinary skill in the art that all or part of the steps of the various methods of the above embodiments may be performed by a computer program or by computer program control related hardware, and that the instructions may be stored in a computer readable storage medium and loaded and executed by a processor.

To this end, embodiments of the present application provide a computer readable storage medium having stored therein a plurality of computer programs executable by a processor to perform the following functions:

Wherein the computer-readable storage medium may comprise:

read Only Memory (ROM), random access Memory (RAM, random Access Memory), magnetic or optical disk, and the like.

Since the computer program stored in the computer readable storage medium may perform any of the steps of the data processing method provided in the embodiments of the present application, the beneficial effects that any of the data processing methods for electronic devices provided in the embodiments of the present application may be achieved, which is detailed in the previous embodiments and will not be described herein.

The foregoing has described in detail the data processing apparatus, method, electronic device and computer readable storage medium provided by the embodiments of the present application, and specific examples have been applied to illustrate the principles and embodiments of the present application, where the foregoing description of the embodiments is only for aiding in understanding the technical solutions and core ideas of the present application; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. The data processing device is characterized by comprising a control module and a forwarding chip, wherein the forwarding chip comprises a first type forwarding chip and a second type forwarding chip, and the first type forwarding chip and the second type forwarding chip are rate self-adaptive PHY chips;

2. The data processing apparatus according to claim 1, wherein the forwarding chips include 2 forwarding chips of a first type and 2 forwarding chips of a second type, the control module being provided with a first transceiving mode and a second transceiving mode;

when the control module is set to a first transceiving mode, the control module is configured to: receiving data sent to a control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; receiving data sent to a control module by the second type forwarding chip and forwarding the data to a first type forwarding chip corresponding to the second type forwarding chip;

when the control module is set to the second transceiving mode, the control module is configured to: selecting one second type forwarding chip from the 2 second type forwarding chips as a monitoring chip; and receiving the data sent to the control module by the 2 first type forwarding chips, forwarding the data sent to the control module by one first type forwarding chip to the other first type forwarding chip, and forwarding the data sent to the control module by the 2 first type forwarding chips to the monitoring chip.

3. The data processing apparatus according to claim 2, wherein the control module includes 2 first control units and 2 second control units, the 2 first control units are in one-to-one correspondence with the 2 forwarding chips of the first type, the 2 second control units are in one-to-one correspondence with the 2 forwarding chips of the second type, and the 2 first control units are in one-to-one correspondence with the 2 second control units;

in a first transceiving mode, the first control unit is configured to: receiving data from a first type forwarding chip corresponding to the first control unit, storing the data into a storage area of the first control unit, taking the data out of a storage area of a second control unit corresponding to the first control unit, and sending the data to the first type forwarding chip corresponding to the first control unit; the second control unit is configured to: receiving data from a second type forwarding chip corresponding to the second control unit, storing the data in a storage area of the second control unit, taking the data out of a storage area of a first control unit corresponding to the second control unit, and sending the data to the second type forwarding chip corresponding to the second control unit;

In a second transceiving mode, selecting one second type forwarding chip from 2 second type forwarding chips as a monitoring chip, wherein a second control unit corresponding to the monitoring chip is used as a monitoring unit, and the first control unit is configured to: receiving data from a first type forwarding chip corresponding to the first control unit, storing the data in a storage area of the first control unit, and taking the data out of the storage area of the other first control unit and sending the data to the first type forwarding chip corresponding to the first control unit; the monitoring unit is configured to: and polling the storage areas of the two first control units, taking out data from the storage areas of the first control units when the storage areas of the first control units are not empty, sending the data to the monitoring chip, and querying the storage areas of the other first control units when the storage areas of the first control units are empty.

4. A data processing device according to claim 3, wherein the memory area of the first control unit is a FIFO buffer and the memory area of the second control unit is a FIFO buffer;

in a second transceiving mode, the first control unit is provided with at least 2 FIFO buffers, the first control unit being configured to: receiving data from a first type forwarding chip corresponding to the first control unit, simultaneously storing the data in a first FIFO buffer area and a second FIFO buffer area of the first control unit, and taking out the data from the first FIFO buffer area of the other first control unit and sending the data to the first type forwarding chip corresponding to the first control unit; the monitoring unit is configured to: and polling the second FIFO buffer areas of the two first control units, taking out data from the second FIFO buffer areas of the first control units when the second FIFO buffer areas of the first control units are not empty, and sending the data to the monitoring chip, and querying the second FIFO buffer areas of the other first control units when the second FIFO buffer areas of the first control units are empty.

5. The data processing apparatus according to claim 2, wherein the control module comprises an FPGA chip and an MCU chip, the FPGA chip being connected to the MCU chip, the MCU chip being configured to issue a target configuration instruction to the FPGA chip, the FPGA chip being configured to be set to a first transceiving mode or a second transceiving mode according to the received target configuration instruction, the first type forwarding chip being connected to the FPGA chip, and the second type forwarding chip being connected to the FPGA chip.

6. The data processing device of claim 5, wherein the MCU chip is coupled to the first type forwarding chip, the MCU chip configured to issue a first configuration signal to the first type forwarding chip and read a chip state from the first type forwarding chip, the first type forwarding chip configured to perform initialization and configuration modification based on the received first configuration signal;

the MCU chip is connected with the second type forwarding chip, the MCU chip is configured to send a second configuration signal to the second type forwarding chip and read the chip state from the second type forwarding chip, and the second type forwarding chip is configured to initialize and change the configuration according to the received second configuration signal.

7. The data processing apparatus according to claim 5, wherein the FPGA chip includes 4 interface conversion modules, and 2 forwarding chips of a first type and 2 forwarding chips of a second type are in one-to-one correspondence with the 4 interface conversion modules;

the interface conversion module is configured to perform a mutual conversion of an RGMII interface standard and a GMII interface standard.

8. The data processing method is applied to a data processing device and is characterized in that the data processing device comprises a control module and a forwarding chip, the forwarding chip comprises a first type forwarding chip and a second type forwarding chip, the first type forwarding chip and the second type forwarding chip are rate self-adaptive PHY chips, the first type forwarding chip corresponds to the second type forwarding chip one by one, a first end of the first type forwarding chip is a vehicle-mounted Ethernet interface, and a second end of the first type forwarding chip is connected with the control module; the first end of the second type forwarding chip is a common Ethernet interface, and the second end of the second type forwarding chip is connected with the control module; the method comprises the following steps:

9. The data processing method according to claim 8, wherein the forwarding chips include 2 forwarding chips of a first type and 2 forwarding chips of a second type, and the control module is provided with a first transceiving mode and a second transceiving mode;

in a first receiving and transmitting mode, receiving data sent to a control module by the first type forwarding chip and forwarding the data to a second type forwarding chip corresponding to the first type forwarding chip; receiving data sent to a control module by the second type forwarding chip and forwarding the data to a first type forwarding chip corresponding to the second type forwarding chip;

in a second receiving and transmitting mode, selecting one second type forwarding chip from the 2 second type forwarding chips as a monitoring chip; and receiving the data sent to the control module by the 2 first type forwarding chips, forwarding the data sent to the control module by one first type forwarding chip to the other first type forwarding chip, and forwarding the data sent to the control module by the 2 first type forwarding chips to the monitoring chip.

10. The electronic equipment is characterized by comprising a memory and a processor, wherein the processor comprises a control module and a forwarding chip; the memory stores an application program, and the processor is configured to execute the application program in the memory to perform the steps in the data processing method according to any one of claims 8 to 9.

11. A computer readable storage medium, characterized in that the computer readable storage medium has stored thereon a computer program which is executed by a processor to implement the steps in the data processing method of any of claims 8 to 9.