CN117407003B - Code translation processing method, device, processor and computer equipment - Google Patents

Code translation processing method, device, processor and computer equipment Download PDF

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CN117407003B
CN117407003B CN202311649187.3A CN202311649187A CN117407003B CN 117407003 B CN117407003 B CN 117407003B CN 202311649187 A CN202311649187 A CN 202311649187A CN 117407003 B CN117407003 B CN 117407003B
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code
attribute
memory block
memory
target code
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CN117407003A (en
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吕蓊鉴
黄能超
唐遇星
李�根
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Phytium Technology Co Ltd
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Phytium Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

The application provides a code translation processing method, a device, a processor and computer equipment, wherein the method comprises the following steps: when detecting that the attribute of a memory block where an object code exists changes from read-only attribute to writable attribute, recording a first abstract of each code page of the object code; when the property of the memory block where the target code is located is detected to be changed from a writable property to a read-only property, recording a second abstract of each code page of the target code; and determining the code page with modification from the target code according to the first abstract and the second abstract of each code page, and re-translating the code page with modification. By executing the scheme, the code translation and operation efficiency can be improved.

Description

Code translation processing method, device, processor and computer equipment
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a code translation processing method, a device, a processor, and a computer device.
Background
Binary translation may be used to solve the problem of program running across architectures at the binary level. The core principle of a general binary translator processing self-modifying code is as follows: the code currently being executed should be the latest code.
To achieve this goal, the core logic of the binary translation engine to handle self-modifying code is as follows: if the original code is translated, the original code is changed to read-only. If the original code becomes writable or written, the translation code corresponding to the original code is cleaned up. Wait for the next re-execution, re-translate and simultaneously set the translated code to read-only.
In practice, however, modifications to the code are typically made only to portions of the code, and the code translation logic described above may result in unnecessary code translation processes, affecting code translation and operating efficiency.
Disclosure of Invention
Based on the state of the art, the application provides a code translation processing method, a device, a processor and computer equipment, which can improve the code translation and operation efficiency.
In order to achieve the technical purpose, the application specifically provides the following technical scheme:
the first aspect of the present application proposes a code translation processing method, including:
when detecting that the attribute of a memory block where an object code exists changes from read-only attribute to writable attribute, recording a first abstract of each code page of the object code;
when the property of the memory block where the target code is located is detected to be changed from a writable property to a read-only property, recording a second abstract of each code page of the target code;
And determining the code page with modification from the target code according to the first abstract and the second abstract of each code page, and re-translating the code page with modification.
In some implementations, before detecting whether the property of the memory block in which the target code resides changes from a read-only property to a writable property, the method further includes:
judging whether the target code is a specific dynamic self-modifying code according to the memory address of a memory block where the target code is located, wherein the specific dynamic self-modifying code at least comprises a dynamic self-modifying code with the code quantity larger than a set code quantity threshold value;
and under the condition that the target code is determined to be a specific dynamic self-modifying code, detecting whether the attribute of the memory block where the target code is located is changed from a read-only attribute to a writable attribute.
In some implementations, before determining whether the target code is a specific dynamic self-modifying code according to a memory address of a memory block in which the target code is located, the method further includes:
detecting whether an attribute change event occurs in a memory block where the target code is located; the attribute change event comprises an event for setting the attribute of the memory block where the target code is located;
When detecting that the memory block where the target code is located has an attribute change event, judging whether the target code is a specific dynamic self-modifying code according to the memory address of the memory block where the target code is located.
In some implementations, determining whether the target code is a specific dynamic self-modifying code according to a memory address of a memory block in which the target code is located includes:
determining whether the target code is a specific dynamic self-modifying code by judging whether the memory block of the target code is out of a first memory range and whether the memory size of the memory block of the target code is within a set memory size range;
the first memory range includes a memory address range occupied by the static code mapped to the memory.
In some implementations, determining whether the target code is a specific dynamic self-modifying code by determining whether a memory block in which the target code is located is outside of a first memory range and whether a memory size of the memory block in which the target code is located is within a set memory size range includes:
judging whether the memory address of the memory block where the target code is located is in a first memory range;
If the memory address of the memory block where the target code is located is within the first memory range, determining that the target code is not a specific dynamic self-modifying code;
if the memory address of the memory block where the target code is located is out of the first memory range, judging whether the memory size of the memory block where the target code is located is within the set memory size range;
if the memory size of the memory block where the target code is located is within the set memory size range, determining that the target code is a specific dynamic self-modifying code.
In some implementations, the method further comprises:
detecting whether the attribute of the memory block where the target code is located is changed, wherein the change comprises changing from the read-only attribute to the writable attribute or changing from the writable attribute to the read-only attribute.
In some implementations, detecting whether a change occurs to an attribute of a memory block in which the target code is located includes:
when a first system call instruction is detected, acquiring attribute setting information from the first system call instruction; the first system call instruction is used for setting the attribute of the memory block where the target code is located as the attribute corresponding to the attribute setting information;
and comparing the attribute setting information with the pre-stored attribute information of the memory block where the target code is located, and judging whether the attribute of the memory block is changed or not.
A second aspect of the present application proposes a code translation processing apparatus, including:
a first recording unit, configured to record a first digest of each code page of an object code when it is detected that an attribute of a memory block where the object code is located changes from a read-only attribute to a writable attribute;
a second recording unit, configured to record a second digest of each code page of the target code when it is detected that the attribute of the memory block where the target code is located changes from a writable attribute to a read-only attribute;
and the translation processing unit is used for determining the code page with modification from the target code according to the first abstract and the second abstract of each code page, and re-translating the code page with modification.
A third aspect of the present application proposes a processor configured to perform the above-described code translation processing method.
A fourth aspect of the present application proposes a computer device comprising a processor configured to perform the above-described code translation processing method.
When detecting that the attribute of a memory block where an object code is located changes from read-only attribute to writable attribute and from writable attribute to read-only attribute, the code translation processing method records the abstract of each code page of the object code respectively; and then, determining the code page with modification from the target code according to the abstract of each code page in the process of changing the memory attribute, and re-translating the code page with modification. According to the scheme, the modified code page can be accurately identified from the self-modifying code, and the modified code page is re-translated, so that unnecessary code re-translation can be avoided, and the code translation and operation efficiency can be improved.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained according to the provided drawings without inventive effort to a person skilled in the art.
Fig. 1 is a flow chart of a code translation processing method according to an embodiment of the present application.
Fig. 2 is a flow chart of another code translation processing method according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of a code translation processing device according to an embodiment of the present application.
Fig. 4 is a schematic structural diagram of a computer device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
First, technical concepts appearing in the embodiments of the present application will be described:
binary translation (Binary Translation, BT): is a technique for directly translating an executable binary program that is capable of translating a binary program running on one processor to another processor.
The Self-Modifying Code (SMC) refers to a Code that modifies its own Code after the program is executed. For binary translation, because code is altered, the modified code needs to be re-translated.
Disabling code (invalid) refers in the embodiments of the present application to disabling translated code resulting from translation. Because the code to be run is modified, the corresponding translated code in the original translated code cache can no longer be used, and therefore, the translated code is invalidated. If the modified code needs to be run again, the translation needs to be re-performed.
Code caching: in the embodiment of the application, after the code of the original architecture is translated into the code applicable to another target architecture, a cache used by the code applicable to the target architecture is placed, namely, a code cache.
mmap is a system call that maps a block of code to a memory page of the operating system.
mpprotect is a system call that can change the permission attribute of a memory page, such as setting the memory page permission to read-only, writable, and executable.
Summary a one-way Hash function is performed on a piece of data to generate a Hash value of fixed length, which is a summary of the piece of data, also called a fingerprint.
Guest JitCache is a cache for state management of code to be translated.
The minimum unit of operating system management memory is one page size, typically 4k, or 16k.
Binary translation (Binary Translation, BT) is a technique for directly translating executable binary programs that can translate a binary program on one processor to run on another processor, thereby enabling the binary program to run across systems or across processors.
Binary translated objects, typically have dynamic self-modifying code and static code. The dynamic self-modifying code refers to program code that dynamically and automatically modifies or adjusts code content during the running process, such as a java virtual machine, a v8 engine, a net virtual machine, and the like. Static code refers to common program code that is not subject to self-modification during operation.
Currently, when implementing program cross-architecture execution based on binary translation, the translation efficiency can generally approach the performance of native programs for static code that typically does not contain self-modifications. But for dynamic self-modifying code, performance is generally poor.
The general principle of the translation processing of the dynamic self-modifying code by the binary translator is as follows: it is guaranteed that the currently executed code is the latest code. To implement this principle, the binary translator sets the original code attribute to read-only if the original code is translated during the translation of the dynamic self-modifying code; if the original code becomes writable or written, the previously stored translated code is cleaned up, waiting for the next execution again to re-translate when the code is present, and the properties of the translated code are set to read-only.
The code translation mechanism can sense the modification operation of the code sharply, clean old translation codes in time and ensure that the running codes are all new translation codes.
However, in the above-mentioned code translation mechanism, there are some problems, for example, if the modified code has a certain size and the modification to the code is not great, the translated code of the code is invalidated and cleaned up in the translation process, and then the modified complete code is re-translated. Therefore, when the translation code is invalidated and cleaned, the translation code with an excessive scope is invalidated, so that when the code is operated again, the code which is not modified originally needs to be translated again, and frequent invalidation and translation operations can seriously affect the setting and the efficiency of the instruction cache, thereby affecting the translation and the operation efficiency of the code, and reducing the operation efficiency and the performance of the code when the code is operated across the architecture.
Aiming at the technical problems, the embodiment of the application provides a code translation processing scheme which can avoid unnecessary code re-translation, thereby improving the code translation and operation efficiency.
The following describes specific contents of the code translation processing scheme provided in the embodiment of the present application. First, the embodiment of the application proposes a code translation processing method, which can be executed by a processor of a computer system. The processor can translate program codes running in other computer architectures into program codes suitable for the architecture in which the processor is located through binary translation. The code translation processing method provided by the embodiment of the application can enable the processor to avoid unnecessary code re-translation in the process of translating the program code through binary translation, so that the code translation and operation efficiency can be improved.
Referring to fig. 1, a code translation processing method provided in an embodiment of the present application includes:
s101, when detecting that the attribute of a memory block where the target code is located changes from read-only attribute to writable attribute, recording a first abstract of each code page of the target code.
Specifically, the object code refers to translated program code, which is stored in a computer memory and occupies a certain memory space, and in this embodiment, the memory space occupied by the code is named as a memory block.
In a conventional binary translation mechanism, the attribute of the memory block in which the code is located is in a read-only state before the code is modified, and at this time, the code in the memory block cannot be modified; when the code needs to be modified, firstly changing the attribute of the memory block where the code is located into a writable attribute, and then modifying the code of the memory block; after the modification is completed, the attribute of the memory block where the code is located needs to be changed into a read-only attribute again.
Thus, the modification of the code is accompanied by the change of the attribute of the memory block where the code is located, and whether the code is possibly modified can be reflected by the change of the attribute of the memory block where the code is located. According to the embodiment of the application, whether the identification code is modified or not is triggered by monitoring the attribute change event of the memory block where the code is located.
Specifically, the processor detects an attribute change event of the memory block where the target code is located in real time, for example, detects a system call for changing the attribute of the memory block where the target code is located, and when detecting the system call for changing the attribute of the memory block where the target code is located, it can determine whether the attribute of the memory block where the target code is located is changed according to the system call.
For example, in the linux system, when the program changes the executable authority of its own code, the mpprotection (addr, flag) is called. In mprotect (addr, flag), addr represents the address of a memory block for which a permission attribute needs to be changed, and flag represents a permission flag, such as read-only, writable, executable, and so on. The mprotect (addr, flag) indicates that the authority attribute of the memory block indicated by addr is set to the authority attribute indicated by flag.
The processor may detect a change in the property of the memory block in which the object code is located by detecting a system call for changing the authority property of the memory block in which the object code is located.
When the attribute of the memory block where the target code is located is detected to be changed from the read-only attribute to the writable attribute, the abstract of each code page of the target code is recorded as a first abstract of each code page.
Where the object code is typically made up of code from page to page, the code is typically modified from some pages as well. Thus, when it is desired to re-translate the modified code, it is essentially only necessary to re-translate the page of code in which the modification occurred.
In order to identify which code pages of the target code are modified, the embodiment of the application sets that when the processor detects that the attribute of the memory block where the target code is located changes from the read-only attribute to the writable attribute, the processor records a first abstract of each code page of the target code, namely calculates the abstract of each code page of the target code, and obtains the first abstract of each code page.
Wherein, when calculating the abstract of the code page, any algorithm for calculating the code abstract can be adopted. As an alternative implementation, the embodiment of the present application calculates a hash value of a code in a code page as a first digest of the code.
In addition, when the processor detects an attribute changing event that sets the attribute of the memory block where the target code is located as a writable attribute, the processor immediately calculates the digests of the code pages of the target code to obtain a first digest of the code pages. Because, at the moment when the target code sends out the system call changing the attribute of the memory block where the target code is located from the read-only attribute to the writable attribute, the target code is still in the read-only state and has not been modified yet, the digest is calculated on the target code at this time, and the digest before the code is modified can be accurately recorded.
S102, when the fact that the attribute of the memory block where the target code is located is changed from the writable attribute to the read-only attribute is detected, recording a second abstract of each code page of the target code.
Specifically, in step S101, after detecting that the attribute of the memory block where the target code is located changes from the read-only attribute to the writable attribute and recording the first abstract of each code page of the target code, the detection of the attribute change of the memory block where the target code is located is continued.
When it is detected that the authority attribute of the memory block where the target code is located is changed from the writable attribute to the read-only attribute, it may be determined that the modification to the target code has been completed, and the attribute of the memory block where the target code is located has been set to the read-only attribute again. At this time, the processor calculates the digest of each code page of the object code again as the second digest of each code page.
The processor calculates a second digest of each code page using the same digest algorithm as when the first digest of each code page was calculated in step S101.
It will be appreciated that upon detecting a change in the property of the memory block in which the object code is located from a writable property to a read-only property, a second digest of each code page of the object code is recorded, i.e. the digest of each code page of the object code after modification is recorded.
S103, determining the code page with modification from the target code according to the first abstract and the second abstract of each code page, and re-translating the code page with modification.
Specifically, the processor compares the first digest and the second digest of each code page of the target code, and determines whether the first digest and the second digest of each code page are identical, thereby determining whether the code of the code page is modified.
If the first abstract and the second abstract of the code page are different, the code of the code page is modified; if the first digest and the second digest of the code page are the same, no modification of the code page is indicated.
In this way, the processor can identify the code page in which the modification has occurred from among the code pages of the object code.
Further, the processor re-translates the code page in the target code that was modified, while the code page that was not modified follows the original translated code. Combining the re-translated code of the code page with the original translated code of the code page without modification to obtain the translated code after modification to the target code.
It can be seen that the embodiments of the present application only re-translate the code page in which the modification occurred in the object code.
As can be seen from the above description, in the code translation processing method provided in the embodiment of the present application, when detecting that the attribute of the memory block where the target code is located changes from the read-only attribute to the writable attribute and from the writable attribute to the read-only attribute, the digests of the code pages of the target code are recorded respectively; and then, determining the code page with modification from the target code according to the abstract of each code page in the process of changing the memory attribute, and re-translating the code page with modification. According to the scheme, the modified code page can be accurately identified from the self-modifying code, in the process of modifying the target code, all target code is not completely re-translated, and only the modified code page is re-translated, so that unnecessary code re-translation can be avoided, and the code translation and operation efficiency can be improved.
The code translation processing method provided by the embodiment of the application realizes the tracking of each code page of the code, so that the code pages which are modified can be timely and accurately identified, and the code pages which are modified can be re-translated.
However, in practical situations, not all codes are suitable for the above-mentioned code page tracking, and only when the code quantity of the code itself reaches a certain level, the above-mentioned code page tracking scheme can obtain an ideal code translation efficiency improving effect. Because the above-described process of tracking individual code pages also requires a certain amount of computing resources, if the code page tracking is performed on small program code, such as only one or two pages of code, the computing resource consumption is far greater than the computing resource consumption of directly clearing the complete code translation results and re-translating. Only when the code quantity of the code itself is large, such as a code of tens pages or hundreds of pages, the code re-translation is assisted by the above-mentioned code page tracking, so that the resource waste caused by re-translating the whole code can be avoided.
Thus, in some embodiments, referring to fig. 2, step S201 is performed before the code translation processing method described in the above embodiments is performed:
S201, judging whether the target code is a specific dynamic self-modifying code according to the memory address of the memory block where the target code is located.
The specific dynamic self-modifying code is at least a dynamic self-modifying code with the code quantity larger than the set code quantity threshold value. The above code amount can be expressed by the number of code pages. For example, a particular dynamic self-modifying code is one that has a number of code pages exceeding 10 pages.
Illustratively, the memory address of the memory block in which the target code is located is used to represent the memory size of the memory block in which the target code is located. Meanwhile, the memory size of the memory block in which the target code is located is represented by the number of pages of the code page stored in the memory block. Typically, a code page size corresponds to a 4K or 16K memory.
It can be appreciated that, by using the memory address of the memory block where the target code is located, it can be determined whether the target code meets the requirements of a specific dynamic self-modifying code.
If the object code is not a specific dynamic self-modifying code, the flow ends.
In the case that the target code is determined to be a specific dynamic self-modifying code, step S202 is executed to detect whether the attribute of the memory block where the target code is located changes from a read-only attribute to a writable attribute.
Further, when it is detected that the attribute of the memory block where the target code is located changes from the read-only attribute to the writable attribute, the subsequent steps of the code translation processing method described in the above embodiment can be executed.
Steps S203 to S205 in the code translation processing method shown in fig. 2 correspond to steps S101 to S103 in the code translation processing method shown in fig. 1, respectively, and the specific processing procedure thereof will be described with reference to the embodiment corresponding to the code translation processing method shown in fig. 1, and will not be repeated here.
The embodiment of the application judges whether the target code is a specific dynamic self-modifying code or not, and tracks the code page of the target code and judges whether the code page of the target code is modified or not under the condition that the target code is confirmed to be the specific dynamic self-modifying code. Therefore, the code page tracking can be developed aiming at the target code meeting the specific requirements, so that the computing resource consumption of the code page tracking can be used for the proper target code, and the computing resource waste and the negative influence caused by using the code page tracking for the improper code are avoided.
In another embodiment, before executing the step S201 and determining whether the target code is a specific dynamic self-modifying code according to the memory address of the memory block where the target code is located, it may also be detected whether an attribute change event occurs in the memory block where the target code is located, and when detecting that the attribute change event occurs in the memory block where the target code is located, execution of the step S201 is started, and whether the target code is a specific dynamic self-modifying code is determined according to the memory address of the memory block where the target code is located.
The attribute change event refers to an event that sets an attribute of a memory block where the target code is located, for example, an event that invokes a mpprotect call instruction of the system to set an attribute of a memory block where the target code is located may be regarded as an event that sets an attribute of a memory block where the target code is located.
If the attribute change event is not detected in the memory block where the object code is located, the detection may be returned again, and the processing of step S201 is not executed.
In this embodiment, the determination of whether the target code is a specific dynamic self-modifying code is triggered by aiming at the attribute change event of the memory block where the target code is located, that is, a reasonable trigger mechanism is set for the code translation processing method provided in the embodiment of the present application, so that computing resources can be further saved.
In some embodiments, it is disclosed that, according to the memory address of the memory block where the target code is located, whether the target code is a specific dynamic self-modifying code is determined, specifically, whether the target code is a specific dynamic self-modifying code may be determined by determining whether the memory block where the target code is located is out of the first memory range and whether the memory size of the memory block where the target code is located is within a set memory size range.
The first memory range refers to a memory address range occupied by the static code mapped to the memory.
Specifically, the static code is a common program code that is not self-modified in the running process.
In the memory, a portion of the memory address is reserved specifically for storing a mapping of the static code, for example, the static code is mapped to a specific memory range of the memory through mmap call, and the specific memory range is named as a first memory range in the embodiment of the present application. If a piece of program code is mapped to the first memory range, it can be determined that the program code is static code. The dynamic self-modifying code is only the code that is outside the first memory range.
On the other hand, the embodiment of the application presets the memory size range to identify the specific dynamic self-modifying code. The memory size range represents a certain range of memory size, and only codes within the memory size range are specific dynamic self-modifying codes, and codes smaller than the range or exceeding the range are not specific dynamic self-modifying codes.
In the embodiment of the application, the memory size is represented by the number of code pages page size. The specific memory size range described above represents a set code page size range, such as 12 pages to 512 pages.
Based on the setting of the set memory size range, the embodiment of the application compares the memory size occupied by the memory block where the target code is located, that is, the code page number of the memory block where the target code is located, with the set memory size range, and determines whether the memory size of the memory block where the target code is located is within the set memory size range, that is, whether the code page number stored in the memory block where the target code is located is within the code page number range defined by the set memory size range.
If the memory size of the memory block where the target code is located is within the set memory size range, the target code may be a specific dynamic self-modifying code.
According to the embodiment of the application, through the two aspects of the memory range and the memory size, whether the target code is a specific dynamic self-modifying code or not is comprehensively judged. In practical applications, only if the memory block in which the target code is located is outside the first memory range, and the memory size of the memory block in which the target code is located is within the set memory size range, the target code can be determined to be a specific dynamic self-modifying code.
In some embodiments, determining whether the object code is a particular dynamic self-modifying code may be accomplished by performing the following scheme of steps A1-A5:
A1, judging whether the memory address of the memory block where the target code is located is in a first memory range.
If the memory address of the memory block where the target code is located is within the first memory range, step A2 is executed to determine that the target code is not a specific dynamic self-modifying code.
Specifically, if the memory address of the memory block where the target code is located is within the first memory range, it is indicated that the memory address of the memory block where the target code is located is within the memory range occupied by the static code mapped to the memory by mmap call, and at this time, it can be directly determined that the target code belongs to the static code, which is not a dynamic self-modifying code, but rather is a specific dynamic self-modifying code.
If the memory address of the memory block where the target code is located is outside the first memory range, step A3 is executed to determine whether the memory size of the memory block where the target code is located is within the set memory size range.
If the memory size of the memory block where the target code is located is within the set memory size range, executing step A4, and determining that the target code is a specific dynamic self-modifying code.
If the memory size of the memory block where the target code is located is not within the set memory size range, step A5 is executed to determine that the target code is not a specific dynamic self-modifying code.
Specifically, if the memory address of the memory block where the target code is located is outside the first memory range, it can be explained that the target code is a dynamic self-modifying code, and based on this, whether the target code is the specific dynamic self-modifying code is determined according to the size of the target code.
The processor first determines the memory size of the memory block in which the object code is located, the memory size of the memory block being represented by the number of code pages stored in the memory block.
Then, the processor judges whether the memory size of the memory block where the target code is located is within the set memory size range, that is, judges whether the code page number of the memory block where the target code is located is within the set code page number range.
If the code page number of the memory block where the target code is located is within the set code page number range, the target code is determined to be a specific dynamic self-modifying code.
If the number of code pages of the memory block where the target code is located is not within the set number of code pages, it is determined that the target code is not a specific dynamic self-modifying code.
Through the processing, whether the target code belongs to the specific dynamic self-modifying code can be accurately identified, and the scheme for tracking the code page of the target code is further ensured.
In some embodiments, a translation code cache is provided in a cache of the computer system for storing translation code. Meanwhile, guest JitCache cache is set for managing the state of the code to be translated.
In Guest JitCache, the state of the code to be translated is stored, including the memory address of the code to be translated and the authority attribute of the code to be translated.
On the basis, the processor detects whether the attribute of the memory block where the target code is located is changed in real time, namely, detects whether the attribute of the memory block where the target code is located is changed from the read-only attribute to the writable attribute or from the writable attribute to the read-only attribute.
As described above, when a modification to the object code is required, the system's mpprotect call is typically triggered, i.e., an attribute change event is initiated to the memory block in which the object code resides. The processor can judge whether the attribute of the memory block where the target code is located is changed or not by detecting the attribute change event.
Specifically, when detecting a first system call instruction, the processor acquires attribute setting information from the first system call instruction.
The first system call instruction is a system call instruction for setting an authority attribute of a memory block where the target code is located, and is specifically configured to set the attribute of the memory block where the target code is located as an attribute corresponding to attribute setting information included in the first system call instruction.
In this embodiment of the present application, the first system call instruction is a system call instruction, i.e., an mprotect (addr, flag), where addr represents an address of a memory block that needs to change an authority attribute, and flag represents attribute setting information, such as read-only, writable, executable, and so on. The mprotect (addr, flag) indicates that the authority attribute of the memory block indicated by addr is set to the attribute indicated by flag. When addr represents the memory address of the memory block of the target code, the system call instruction is used for setting the attribute of the memory block of the target code to be the attribute represented by the flag.
After the attribute setting information is obtained from the detected first system call instruction, the processor compares the obtained attribute setting information with the attribute information of the memory block where the target code is located, which is stored in the Guest JitCache, and judges whether the attribute of the memory block is changed or not.
If the attribute setting information obtained from the first system call instruction is different from the attribute information of the memory block where the target code is located, which is stored in the Guest JitCache, it can be determined that the attribute of the memory block where the target code is located is changed; if the attribute setting information obtained from the first system call instruction is the same as the attribute information of the memory block where the target code is located, which is stored in the GuestJitCache, it can be determined that the attribute of the memory block where the target code is located is not changed.
Through the judgment, the processor can detect whether the attribute of the memory block where the target code is located is changed or not in real time, so that analysis of the change condition of the attribute of the memory block where the target code is located can be started timely. And through the judgment, the processor can accurately judge whether the attribute of the memory block where the target code is located changes from the read-only attribute to the writable attribute or whether the attribute changes from the writable attribute to the read-only attribute, so that the processor can timely calculate the abstract of each code page of the target code, and the execution efficiency of the code translation processing method is improved.
Correspondingly, the embodiment of the application also provides a code translation processing device, which is shown in fig. 3, and comprises:
the first recording unit 100 is configured to record a first digest of each code page of the target code when it is detected that the attribute of the memory block where the target code is located changes from a read-only attribute to a writable attribute.
And a second recording unit 110, configured to record a second digest of each code page of the target code when it is detected that the attribute of the memory block where the target code is located changes from a writable attribute to a read-only attribute.
And the translation processing unit 120 is configured to determine a modified code page from the target code according to the first digest and the second digest of each code page, and re-translate the modified code page.
In some embodiments, the apparatus further comprises:
the code verification unit is used for judging whether the target code is a specific dynamic self-modifying code according to the memory address of the memory block where the target code is located, wherein the specific dynamic self-modifying code at least comprises a dynamic self-modifying code with the code quantity larger than a set code quantity threshold value;
and under the condition that the target code is determined to be a specific dynamic self-modifying code, detecting whether the attribute of the memory block where the target code is located is changed from a read-only attribute to a writable attribute.
In some embodiments, the code verification unit is further to:
detecting whether an attribute change event occurs in a memory block where the target code is located; the attribute change event comprises an event for setting the attribute of the memory block where the target code is located;
when detecting that the memory block where the target code is located has an attribute change event, judging whether the target code is a specific dynamic self-modifying code according to the memory address of the memory block where the target code is located.
In some embodiments, determining whether the target code is a specific dynamic self-modifying code according to a memory address of a memory block in which the target code is located includes:
Determining whether the target code is a specific dynamic self-modifying code by judging whether the memory block of the target code is out of a first memory range and whether the memory size of the memory block of the target code is within a set memory size range;
the first memory range includes a memory address range occupied by the static code mapped to the memory.
In some embodiments, determining whether the target code is a specific dynamic self-modifying code by determining whether a memory block in which the target code is located is outside of a first memory range and whether a memory size of the memory block in which the target code is located is within a set memory size range includes:
judging whether the memory address of the memory block where the target code is located is in a first memory range;
if the memory address of the memory block where the target code is located is within the first memory range, determining that the target code is not a specific dynamic self-modifying code;
if the memory address of the memory block where the target code is located is out of the first memory range, judging whether the memory size of the memory block where the target code is located is within the set memory size range;
if the memory size of the memory block where the target code is located is within the set memory size range, determining that the target code is a specific dynamic self-modifying code.
In some embodiments, the apparatus further comprises:
and the attribute detection unit is used for detecting whether the attribute of the memory block where the target code is located is changed, wherein the change comprises changing the read-only attribute into the writable attribute or changing the writable attribute into the read-only attribute.
In some embodiments, detecting whether a change has occurred in an attribute of a memory block in which the object code is located includes:
when a first system call instruction is detected, acquiring attribute setting information from the first system call instruction; the first system call instruction is used for setting the attribute of the memory block where the target code is located as the attribute corresponding to the attribute setting information;
and comparing the attribute setting information with the pre-stored attribute information of the memory block where the target code is located, and judging whether the attribute of the memory block is changed or not.
The code translation processing device provided in this embodiment belongs to the same application concept as the code translation processing method provided in the foregoing embodiments of the present application, and may execute the code translation processing method provided in any of the foregoing embodiments of the present application, and has a functional module and beneficial effects corresponding to the execution method. Technical details not described in detail in this embodiment may be referred to the specific processing content of the code translation processing method provided in the foregoing embodiment of the present application, and will not be described herein again.
The functions performed by the above first recording unit 100, second recording unit 110, translation processing unit 120, and the like may be implemented by the same or different processors, respectively, and the embodiment of the present application is not limited.
It will be appreciated that the elements of the above apparatus may be implemented in the form of processor-invoked software. For example, the device includes a processor, where the processor is connected to a memory, and the memory stores instructions, and the processor invokes the instructions stored in the memory to implement any of the methods above or to implement functions of each unit of the device, where the processor may be a general-purpose processor, such as a CPU or a microprocessor, and the memory may be a memory within the device or a memory outside the device. Alternatively, the units in the apparatus may be implemented in the form of hardware circuits, and the functions of some or all of the units may be implemented by designing hardware circuits, which may be understood as one or more processors; for example, in one implementation, the hardware circuit is an ASIC, and the functions of some or all of the above units are implemented by designing the logic relationships of the elements in the circuit; for another example, in another implementation, the hardware circuit may be implemented by a PLD, for example, an FPGA may include a large number of logic gates, and the connection relationship between the logic gates is configured by a configuration file, so as to implement the functions of some or all of the above units. All units of the above device may be realized in the form of processor calling software, or in the form of hardware circuits, or in part in the form of processor calling software, and in the rest in the form of hardware circuits.
In the embodiment of the application, the processor is a circuit with signal processing capability, and in one implementation, the processor may be a circuit with instruction reading and running capability, such as a CPU, a microprocessor, a GPU, or a DSP, etc.; in another implementation, the processor may implement a function through a logical relationship of hardware circuitry that is fixed or reconfigurable, e.g., a hardware circuit implemented by the processor as an ASIC or PLD, such as an FPGA, or the like. In the reconfigurable hardware circuit, the processor loads the configuration document, and the process of implementing the configuration of the hardware circuit may be understood as a process of loading instructions by the processor to implement the functions of some or all of the above units. Furthermore, a hardware circuit designed for artificial intelligence may be provided, which may be understood as an ASIC, such as NPU, TPU, DPU, etc.
It will be seen that each of the units in the above apparatus may be one or more processors (or processing circuits) configured to implement the above method, for example: CPU, GPU, NPU, TPU, DPU, microprocessor, DSP, ASIC, FPGA, or a combination of at least two of these processor forms.
Furthermore, the units in the above apparatus may be integrated together in whole or in part, or may be implemented independently. In one implementation, these units are integrated together and implemented in the form of an SOC. The SOC may include at least one processor for implementing any of the methods above or for implementing the functions of the units of the apparatus, where the at least one processor may be of different types, including, for example, a CPU and an FPGA, a CPU and an artificial intelligence processor, a CPU and a GPU, and the like.
Another embodiment of the present application further proposes a processor configured to perform the code translation processing method described in any of the foregoing embodiments.
The processor is also a circuit with signal processing capability that improves the efficiency of code translation and operation by performing any of the code translation processing methods described in the embodiments above. The specific implementation manner of the processor may be referred to above as the implementation manner of the processor, and embodiments of the present application are not strictly limited.
Another embodiment of the present application further proposes a computer device, as shown in fig. 4, including:
a memory 200 and a processor 210;
wherein the memory 200 is connected to the processor 210, and is used for storing a program;
the processor 210 is configured to implement the code translation processing method disclosed in any one of the foregoing embodiments by executing the program stored in the memory 200.
Specifically, the above computer device may further include: a bus, a communication interface 220, an input device 230, and an output device 240.
The processor 210, the memory 200, the communication interface 220, the input device 230, and the output device 240 are interconnected by a bus. Wherein:
a bus may comprise a path that communicates information between components of a computer system.
Processor 210 may be a general-purpose processor such as a general-purpose Central Processing Unit (CPU), microprocessor, etc., or may be an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of programs in accordance with aspects of the present invention. But may also be a Digital Signal Processor (DSP), application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components.
Processor 210 may include a main processor, and may also include a baseband chip, modem, and the like.
The memory 200 stores programs for implementing the technical scheme of the present invention, and may also store an operating system and other key services. In particular, the program may include program code including computer-operating instructions. More specifically, the memory 200 may include read-only memory (ROM), other types of static storage devices that may store static information and instructions, random access memory (random access memory, RAM), other types of dynamic storage devices that may store information and instructions, disk storage, flash, and the like.
The input device 230 may include means for receiving data and information entered by a user, such as a keyboard, mouse, camera, scanner, light pen, voice input device, touch screen, pedometer, or gravity sensor, among others.
Output device 240 may include means, such as a display screen, printer, speakers, etc., that allow information to be output to a user.
The communication interface 220 may include devices using any transceiver or the like for communicating with other devices or communication networks, such as ethernet, radio Access Network (RAN), wireless Local Area Network (WLAN), etc.
Processor 210 executes programs stored in memory 200 and invokes other devices that may be used to implement the various steps of any of the code translation processing methods provided in the above-described embodiments of the present application.
In addition to the methods and apparatus described above, embodiments of the present application may also be a computer program product comprising computer program instructions which, when executed by a processor, cause the processor to perform the steps in the code translation processing method described in any of the embodiments described above in the present specification.
The computer program product may write program code for performing the operations of embodiments of the present application in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server.
Furthermore, an embodiment of the present application may also be a storage medium having stored thereon a computer program that is executed by a processor to perform the steps in the code translation processing method described in any of the above embodiments of the present specification.
For the foregoing method embodiments, for simplicity of explanation, the methodologies are shown as a series of acts, but one of ordinary skill in the art will appreciate that the present application is not limited by the order of acts described, as some acts may, in accordance with the present application, occur in other orders or concurrently. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required in the present application.
It should be noted that, in the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described as different from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other. For the apparatus class embodiments, the description is relatively simple as it is substantially similar to the method embodiments, and reference is made to the description of the method embodiments for relevant points.
The steps in the method of each embodiment of the application can be sequentially adjusted, combined and deleted according to actual needs, and the technical features described in each embodiment can be replaced or combined.
The modules and sub-modules in the device and the terminal of the embodiments of the present application may be combined, divided, and deleted according to actual needs.
In the embodiments provided in the present application, it should be understood that the disclosed terminal, apparatus and method may be implemented in other manners. For example, the above-described terminal embodiments are merely illustrative, and for example, the division of modules or sub-modules is merely a logical function division, and there may be other manners of division in actual implementation, for example, multiple sub-modules or modules may be combined or integrated into another module, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or modules, which may be in electrical, mechanical, or other forms.
The modules or sub-modules illustrated as separate components may or may not be physically separate, and components that are modules or sub-modules may or may not be physical modules or sub-modules, i.e., may be located in one place, or may be distributed over multiple network modules or sub-modules. Some or all of the modules or sub-modules may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional module or sub-module in each embodiment of the present application may be integrated in one processing module, or each module or sub-module may exist alone physically, or two or more modules or sub-modules may be integrated in one module. The integrated modules or sub-modules may be implemented in hardware or in software functional modules or sub-modules.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software unit executed by a processor, or in a combination of the two. The software elements may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A code translation processing method, characterized by comprising:
when detecting that the attribute of a memory block where an object code exists changes from read-only attribute to writable attribute, recording a first abstract of each code page of the object code; the method comprises the steps that codes in a memory block cannot be modified when the attribute of the memory block is a read-only attribute, and the codes in the memory block can be modified when the attribute of the memory block is a writable attribute; the first summary of each code page represents the summary of each code page before the target code is modified;
when the property of the memory block where the target code is located is detected to be changed from a writable property to a read-only property, recording a second abstract of each code page of the target code; the second summary of each code page represents the summary of each code page after the modification of the target code is completed;
and determining the code page with modification from the target code according to the first abstract and the second abstract of each code page, and re-translating the code page with modification.
2. The method of claim 1, wherein prior to detecting whether the property of the memory block in which the object code resides changes from a read-only property to a writable property, the method further comprises:
Judging whether the target code is a specific dynamic self-modifying code according to the memory address of a memory block where the target code is located, wherein the specific dynamic self-modifying code at least comprises a dynamic self-modifying code with the code quantity larger than a set code quantity threshold value;
and under the condition that the target code is determined to be a specific dynamic self-modifying code, detecting whether the attribute of the memory block where the target code is located is changed from a read-only attribute to a writable attribute.
3. The method of claim 2, wherein prior to determining whether the object code is a particular dynamic self-modifying code based on a memory address of a memory block in which the object code is located, the method further comprises:
detecting whether an attribute change event occurs in a memory block where the target code is located; the attribute change event comprises an event for setting the attribute of the memory block where the target code is located;
when detecting that the memory block where the target code is located has an attribute change event, judging whether the target code is a specific dynamic self-modifying code according to the memory address of the memory block where the target code is located.
4. A method according to claim 2 or 3, wherein determining whether the target code is a specific dynamic self-modifying code according to a memory address of a memory block in which the target code is located, comprises:
Determining whether the target code is a specific dynamic self-modifying code by judging whether the memory block of the target code is out of a first memory range and whether the memory size of the memory block of the target code is within a set memory size range;
the first memory range includes a memory address range occupied by the static code mapped to the memory.
5. The method of claim 4, wherein determining whether the object code is a specific dynamic self-modifying code by determining whether a memory block in which the object code is located is outside of a first memory range and whether a memory size of the memory block in which the object code is located is within a set memory size range, comprises:
judging whether the memory address of the memory block where the target code is located is in a first memory range;
if the memory address of the memory block where the target code is located is within the first memory range, determining that the target code is not a specific dynamic self-modifying code;
if the memory address of the memory block where the target code is located is out of the first memory range, judging whether the memory size of the memory block where the target code is located is within the set memory size range;
If the memory size of the memory block where the target code is located is within the set memory size range, determining that the target code is a specific dynamic self-modifying code.
6. The method according to claim 1, wherein the method further comprises:
detecting whether the attribute of the memory block where the target code is located is changed, wherein the change comprises changing from the read-only attribute to the writable attribute or changing from the writable attribute to the read-only attribute.
7. The method of claim 6, wherein detecting whether the property of the memory block in which the object code resides has changed comprises:
when a first system call instruction is detected, acquiring attribute setting information from the first system call instruction; the first system call instruction is used for setting the attribute of the memory block where the target code is located as the attribute corresponding to the attribute setting information;
and comparing the attribute setting information with the pre-stored attribute information of the memory block where the target code is located, and judging whether the attribute of the memory block is changed or not.
8. A code translation processing apparatus, comprising:
a first recording unit, configured to record a first digest of each code page of an object code when it is detected that an attribute of a memory block where the object code is located changes from a read-only attribute to a writable attribute; the method comprises the steps that codes in a memory block cannot be modified when the attribute of the memory block is a read-only attribute, and the codes in the memory block can be modified when the attribute of the memory block is a writable attribute; the first summary of each code page represents the summary of each code page before the target code is modified;
A second recording unit, configured to record a second digest of each code page of the target code when it is detected that the attribute of the memory block where the target code is located changes from a writable attribute to a read-only attribute; the second summary of each code page represents the summary of each code page after the modification of the target code is completed;
and the translation processing unit is used for determining the code page with modification from the target code according to the first abstract and the second abstract of each code page, and re-translating the code page with modification.
9. A processor configured to perform the code translation processing method according to any one of claims 1 to 7.
10. A computer device comprising a processor configured to perform the code translation processing method of any one of claims 1 to 7.
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