CN117406953A

CN117406953A - Audio data transmission method and device, storage medium and electronic equipment

Info

Publication number: CN117406953A
Application number: CN202311391184.4A
Authority: CN
Inventors: 江超; 毛启明; 王清泉
Original assignee: Phytium Technology Co Ltd
Current assignee: Phytium Technology Co Ltd
Priority date: 2023-10-24
Filing date: 2023-10-24
Publication date: 2024-01-16

Abstract

The application provides an audio data transmission method, an audio data transmission device, a storage medium and electronic equipment, wherein the audio data transmission method, the audio data transmission device, the storage medium and the electronic equipment are applied to a processor in the electronic equipment, and the processor is connected with an audio chip through an I2S bus, and comprises the following steps: the processor determines whether the audio file to be played is an audio file with more than 2 channels; if the audio file to be played is an audio file with more than 2 channels, the processor sends a mode switching instruction to the audio chip so as to switch the audio chip into an I2S multi-channel compatible mode; the processor transmits the audio file to be played to the audio chip based on the I2S multi-channel compatible mode, so that the audio chip receives the audio file to be played in the I2S multi-channel compatible mode. In the I2S multichannel compatible mode, multichannel (more than 2 channels) audio data can be transmitted between the processor and the audio chip, the audio data are not limited to left and right channel audio data, and the requirements of people on pursuing higher and better sound effects and sound quality can be met.

Description

Audio data transmission method and device, storage medium and electronic equipment

Technical Field

The present invention relates to the field of communications technologies, and in particular, to an audio data transmission method, an audio data transmission device, a storage medium, and an electronic device.

Background

In recent years, digital systems in cellular phones, computers and home automation products and audio data demands thereof have been greatly changed, including that audio signals from processors are being digitized. While such data in different systems is processed through many devices such as DSP, ADC, DAC, digital I/O interfaces, etc.

In order for these devices to communicate audio data with each other, a standard protocol is required, one of which is the I2S protocol. I2S is an integrated circuit built-in audio bus for a digital audio interface between devices. The protocol used to transfer digital audio data from one device to another is known as the I2S (inter-IC Sound) protocol, I2S for short. The protocol transfers audio data from one IC to another IC in the electronic device.

I2S has a significant drawback in that the I2S protocol only supports left and right channels. Corresponding to the audio with more than 2 channels, the I2S audio can not be supported from the protocol, and the requirements of people on pursuing higher and better sound effects and tone quality can not be met.

Disclosure of Invention

An object of the present application is to provide an audio data transmission method, apparatus, storage medium and electronic device, so as to at least partially improve the above-mentioned problems.

In order to achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

in a first aspect, an embodiment of the present application provides an audio data transmission method, which is applied to a processor in an electronic device, where the electronic device further includes an audio chip, and the processor is connected with the audio chip through an I2S bus, and the method includes: the processor determines whether an audio file to be played is an audio file with more than 2 channels; if the audio file to be played is an audio file with more than 2 channels, the processor sends a mode switching instruction to the audio chip so as to switch the audio chip into an I2S multi-channel compatible mode; the processor transmits the audio file to be played to the audio chip based on the I2S multi-channel compatible mode, so that the audio chip receives the audio file to be played in the I2S multi-channel compatible mode.

In this application, in the I2S multi-channel compatible mode, multi-channel (greater than 2 channels) audio data can be transmitted between the processor 10 and the audio chip 20, which is not limited to the left and right audio data, and can meet the requirements of people for pursuing higher and better sound effects and quality. And on the premise of meeting the multi-channel audio playing requirement, the energy consumption is reduced as much as possible.

Optionally, the step of transmitting the audio file to be played to the audio chip by the processor based on the I2S multi-channel compatible mode includes: the processor performs frequency multiplication processing on a serial clock SCLK and a frame clock WS in the I2S bus; the processor carries out multichannel coding on the audio file to be played to obtain a first target audio file; the processor transmits the first target audio file to the audio chip through the I2S bus based on the serial clock SCLK and the frame clock WS after frequency multiplication processing, so that the audio chip decodes the first target audio file in the I2S multi-channel compatible mode to obtain the audio file to be played.

In the scheme, the accuracy of audio file transmission is ensured through frequency multiplication processing and multichannel coding.

Optionally, the method further comprises: if the audio file to be played is an audio file with 2 channels or less, the processor sends a default instruction to the audio chip so that the audio chip is kept in an I2S protocol standard mode; the processor transmits the audio file to be played to the audio chip based on the I2S protocol standard mode, so that the audio chip receives the audio file to be played in the I2S protocol standard mode.

In the scheme, the playing of the 2-channel audio file can be considered at the same time.

Optionally, when recording the audio file, the method further comprises: the processor determines whether an audio file greater than 2 channels needs to be recorded; if the audio file with the sound channel more than 2 sound channels needs to be recorded, the processor sends a mode switching instruction to the audio chip so that the audio chip is switched to an I2S multi-sound channel compatible mode, the audio chip records a second target audio file and transmits the second target audio file to the processor through an I2S bus in the I2S multi-sound channel compatible mode, and the second target audio file is the audio file with the sound channel more than 2 sound channels; the processor receives a second target audio file transmitted by the audio chip in the I2S multi-channel compatible mode.

According to the method and the device, multichannel audio file recording can be considered simultaneously, and the higher audio recording requirement of a user is met.

In a second aspect, an embodiment of the present application provides an audio data transmission method, applied to an audio chip in an electronic device, where the electronic device further includes a processor, and the processor is connected with the audio chip through an I2S bus, and the method includes: when the audio chip receives a mode switching instruction sent by the processor, switching to an I2S multichannel compatible mode; and the audio chip receives the audio file to be played, which is transmitted by the processor, in the I2S multichannel compatible mode.

Optionally, the step of receiving, by the audio chip, the audio file to be played transmitted by the processor in the I2S multi-channel compatible mode includes: the audio chip receives a first target audio file transmitted by the I2S bus based on a serial clock SCLK and a frame clock WS after frequency multiplication processing; the first target audio file is obtained by carrying out multichannel coding on the audio file to be played by the processor in a frequency multiplication processing mode; and the audio chip decodes the first target audio file in the I2S multichannel compatible mode to obtain the audio file to be played.

In a third aspect, an embodiment of the present application provides an audio data transmission method, applied to an electronic device, where the electronic device includes a processor and an audio chip, and the processor is connected to the audio chip through an I2S bus, and the method includes: the processor determines whether an audio file to be played is an audio file with more than 2 channels; if the audio file to be played is an audio file with more than 2 channels, the processor sends a mode switching instruction to the audio chip, and the audio chip is switched to an I2S multi-channel compatible mode when receiving the mode switching instruction sent by the processor; the processor transmits the audio file to be played to the audio chip based on the I2S multichannel compatible mode; and the audio chip receives the audio file to be played, which is transmitted by the processor, in the I2S multichannel compatible mode.

Optionally, the method further comprises: if the audio file to be played is an audio file smaller than or equal to 2 channels, the processor sends a default instruction to the audio chip, and the audio chip keeps an I2S protocol standard mode when receiving the default instruction sent by the processor; the processor transmits the audio file to be played to the audio chip based on the I2S protocol standard mode; and the audio chip receives the audio file to be played, which is transmitted by the processor, in the I2S protocol standard mode.

Optionally, when recording the audio file, the method further comprises: the processor determines whether an audio file greater than 2 channels needs to be recorded; if the audio file with the sound channel more than 2 sound channels is required to be recorded, the processor sends a mode switching instruction to the audio chip; when the audio chip receives a mode switching instruction sent by the processor, switching to an I2S multichannel compatible mode; the audio chip records a second target audio file, wherein the second target audio file is an audio file with a sound channel more than 2 sound channels; the audio chip transmits the second target audio file to the processor through an I2S bus in the I2S multi-channel compatible mode; the processor receives a second target audio file transmitted by the audio chip in the I2S multi-channel compatible mode.

In a fourth aspect, an embodiment of the present application provides an audio data transmission apparatus, which is applied to a processor in an electronic device, where the electronic device further includes an audio chip, and the processor is connected to the audio chip through an I2S bus, and the apparatus includes: the first processing unit is used for determining whether the audio file to be played is an audio file with more than 2 channels or not by the processor; the first transmission unit is used for sending a mode switching instruction to the audio chip by the processor if the audio file to be played is an audio file with more than 2 channels so as to enable the audio chip to be switched to an I2S multi-channel compatible mode; the first transmission unit is further configured to transmit the audio file to be played to the audio chip based on the I2S multi-channel compatible mode, so that the audio chip receives the audio file to be played in the I2S multi-channel compatible mode.

In a fifth aspect, an embodiment of the present application provides an audio data transmission apparatus, which is applied to an audio chip in an electronic device, where the electronic device further includes a processor, and the processor is connected with the audio chip through an I2S bus, and the apparatus includes: the second processing unit is used for switching to an I2S multichannel compatible mode when the audio chip receives a mode switching instruction sent by the processor; the second transmission unit is used for receiving the audio file to be played, which is transmitted by the processor, by the audio chip in the I2S multi-channel compatible mode.

In a sixth aspect, embodiments of the present application provide a storage medium having stored thereon a computer program which, when executed by a processor, implements the audio data transmission method of the first and/or second aspects described above.

In a seventh aspect, an embodiment of the present application provides an electronic device, including: the processor and the audio chip are connected through an I2S bus, and the electronic equipment is used for realizing the audio data transmission method described in the first aspect and/or the second aspect.

In order to make the above objects, features and advantages of the present application more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered limiting in scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

Fig. 2 is a schematic flow chart of an audio data transmission method according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a channel field description provided in an embodiment of the present application;

FIG. 4 is a schematic diagram of protocol comparison before and after frequency multiplication according to an embodiment of the present application;

FIG. 5 is a second flowchart of an audio data transmission method according to an embodiment of the present disclosure;

fig. 6 is a third flowchart of an audio data transmission method according to an embodiment of the present disclosure;

fig. 7 is a flowchart illustrating a method for transmitting audio data according to an embodiment of the present disclosure;

fig. 8 is a schematic diagram of a unit of an audio data transmitter apparatus according to an embodiment of the present application;

fig. 9 is a second unit schematic diagram of an audio data transmitter device according to an embodiment of the present application.

In the figure: 10-a processor; 20-an audio chip; 301-a first processing unit; 302-a first transmission unit; 401-a second processing unit; 402-a second transmission unit.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some, but not all, embodiments of the present application. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

In the description of the present application, it should be noted that, the terms "upper," "lower," "inner," "outer," and the like indicate an orientation or a positional relationship based on the orientation or the positional relationship shown in the drawings, or an orientation or a positional relationship conventionally put in use of the product of the application, merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element to be referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present application.

In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.

Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.

The embodiment of the application provides an electronic device, which can be but is not limited to various audio control playing devices such as a notebook computer, a desktop computer, a mobile phone, an audio player and the like. As shown in fig. 1, the electronic device includes a processor 10 and an audio chip 20, and the processor 10 and the audio chip 20 are connected through an I2S bus.

The processor 10 may be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the audio data transmission method may be performed by integrated logic circuits of hardware in the processor 10 or instructions in the form of software. The processor 10 may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short), etc.; but also digital signal processors (Digital Signal Processor, DSP for short), MCUs, application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field-programmable gate arrays (Field-Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

The audio chip 20, which is called Coder-Decoder, CODEC for short, is called audio CODEC for short. In implementation, the steps of the audio data transmission method may be performed by integrated logic circuits of hardware in the audio chip 20 or instructions in the form of software. The audio chip 20 may be connected to audio output actuators such as a speaker, and a headset at the rear end, so as to play audio data, and may be connected to audio collection actuators such as a microphone at the rear end, so as to complete audio data collection.

As shown in fig. 1, the I2S bus includes a master Clock, also called a system Clock (MCLK); serial clocks, also called bit clocks (Series System Clock, SCLK for short); a frame clock, also called LRCK (word select, WS for short); audio Data in (SDI) and audio Data out (SDO).

In an alternative embodiment, the processor 10 and the audio chip 20 are also connected via an I2C (Inter-Integrated Circuit) control bus.

In the I2S protocol standard mode, the frame clock WS is used to switch data of left and right channels. LRCK of "1" indicates that data of the right channel is being transmitted, and LRCK of "0" indicates that data of the left channel is being transmitted. The frequency of LRCK is equal to the sampling frequency. In the standard mode of the I2S protocol, transmission of audio data of more than 2 channels cannot be supported, and requirements of people for pursuing higher and better sound effects and sound quality cannot be met.

Note that LRCK and WS are one signal, and it is understood that bit LRCK is an alias of WS. The abbreviation of bit Left (Left channel) can be understood by "L" in "LRCK", the abbreviation of ritth can be understood by "R", so LRCK (WS) refers to the frequency of channels, and the standard I2S protocol can be understood as the frequency of Left-right channel switching. The standard I2S is typically 44.1Khz or 48Khz for this left-right channel switching frequency. The frequency is set by the Codec during recording, and the frequency of the left and right channels is switched according to the frequency, or the frequency can be manually set as other frequencies.

The SLCK is the sampling frequency of audio data (sound data), and when the Codec chip records, the sampling frequency of each frame of audio signal is included in the audio file after the audio file is recorded. When transmitting or playing, the cpu (system or playing software) extracts the parameter, and then transmits and decodes at this frequency.

Standard I2S protocol: frequency of slck=2×sampling frequency (ws) ×sampling number of bits. 2 is 2 channels, the sampling frequency is LRCK, the common bit number of the sampling bit number is 16bit,24bit,32bit and 20bit, and the bit sampling depth can be understood.

The multi-channel extension extends only the number of channels, thus superimposing the frequencies of LRCK without increasing the sampling frequency, in particular to a single channel.

To overcome this problem, the embodiments of the present application provide an I2S multi-channel compatible mode, in which the frame clock WS switches channels once every time the level conversion indicates that the level conversion is performed, for example, LRCK is changed from "1" to "0" once, is changed from "0" to "0" once, and returns to the original channel after N channels are switched, so that multi-channel (greater than 2) audio data transmission can be supported.

The audio data transmission method provided in the embodiment of the present application may include, but is not limited to, application to the electronic device shown in fig. 1, and specific flow, please refer to fig. 2, and implementation steps of the audio data transmission method may include: s101, S102, S103, S104, S105, S201, S202, S203, and S204, which are specifically described below:

s101, the processor determines whether the audio file to be played is an audio file of more than 2 channels. If yes, executing S102; if not, S104 is performed.

Optionally, in this application, the processor 10 and the audio chip 20 may support an I2S protocol standard mode and an I2S multi-channel compatible mode, but the energy consumption in the two modes is not the same, so that in order to reduce the energy consumption as much as possible on the premise of meeting the multi-channel audio playing requirement, S101 needs to be executed, and whether to switch to the I2S multi-channel compatible mode is determined by determining whether the audio file to be played is an audio file with more than 2 channels. When the audio file to be played is an audio file with more than 2 channels, S102 is executed, and the mode is switched to an I2S multi-channel compatible mode; otherwise, S104 is executed, and the standard mode of the I2S protocol is maintained, so that the energy consumption is lower.

Alternatively, the processor may detect the audio file to be played while it is being played, thereby determining whether it is an audio file of more than 2 channels.

S102, if the audio file to be played is an audio file with a sound channel more than 2 channels, the processor sends a mode switching instruction to the audio chip.

Alternatively, the processor 10 may send a mode switch instruction to the audio chip via the I2C control bus.

S201, when the audio chip receives a mode switching instruction sent by the processor, the audio chip is switched to an I2S multi-channel compatible mode.

S103, the processor transmits the audio file to be played to the audio chip based on the I2S multi-channel compatible mode.

S202, the audio chip receives the audio file to be played, which is transmitted by the processor, in the I2S multi-channel compatible mode.

It should be noted that, in the scheme of the present application, in the I2S multi-channel compatible mode, multi-channel (greater than 2 channels) audio data can be transmitted between the processor 10 and the audio chip 20, which is not limited to the left and right audio data, and can meet the requirements of people for pursuing higher and better sound effects and sound quality.

S104, if the audio file to be played is an audio file with 2 channels or less, the processor sends a default instruction to the audio chip.

Alternatively, the default instruction and the mode switch instruction may be of a predetermined instruction type, and are not the same. The default instruction may also be null, not limited herein.

And S203, when receiving a default instruction sent by the processor, the audio chip is kept in an I2S protocol standard mode.

S105, the processor transmits the audio file to be played to the audio chip based on the I2S protocol standard mode.

S204, the audio chip receives the audio file to be played, which is transmitted by the processor, in the I2S protocol standard mode.

It should be noted that, when the audio file to be played is an audio file with 2 channels or less, by transmitting the audio file to be played in the standard mode of the I2S protocol, lower energy consumption can be achieved while the audio data transmission is achieved.

In an alternative embodiment, after receiving the audio file to be played, the audio chip 20 may play the audio file to be played through an audio output executing mechanism such as a speaker, a loudspeaker, and a headset at the back end.

On the basis of fig. 2, regarding how to guarantee the accuracy of audio file transmission under the existing I2S bus architecture, the embodiment of the present application further provides an optional implementation, please refer to the following, S103, the step of the processor transmitting the audio file to be played to the audio chip based on the I2S multi-channel compatible mode includes: s103-1, S103-2 and S103-3 are specifically described below.

S103-1, the processor multiplies the serial clock SCLK and the frame clock WS in the I2S bus.

Wherein, one pulse in the serial clock SCLK corresponds to 1 bit data, and each level conversion of the frame clock WS indicates that channel switching is performed once.

The processor multiplies the master clock MCLK, the serial clock SCLK, the frame clock WS in the I2S bus.

Alternatively, the frequency multiplication number may be, but is not limited to, 8 times, 16 channels are transmitted, exceeding the number of channels in the audio file, i.e., unused channels may be reserved by reserve. When more channels are needed, the number of channels can be extended by frequency doubling.

In an alternative embodiment, the frequency multiplication number may be determined based on the number of channels of the audio file to be played, and the frequency multiplication processing may be performed based on the frequency multiplication number. The mode switching instruction sent to the audio chip 20 simultaneously includes the frequency multiplication number, so that frequency matching is realized, the multi-channel audio effect can be ensured by reasonably setting the frequency multiplication number, and energy waste can be avoided. By the frequency multiplication process, more channels of audio data can be transmitted in a unit time length. It should be noted that, in the I2S multi-channel compatible mode, the frequency of LRCK is equal to the sampling frequency of the channel.

Optionally, please refer to fig. 3, fig. 3 is a schematic diagram of a channel field description provided in an embodiment of the present application, and fig. 4 is a schematic diagram of a protocol comparison before and after frequency multiplication provided in an embodiment of the present application.

As shown in fig. 3, the I2S protocol standard mode supports only two Left and Right channels, and the I2S multi-Channel compatible mode may support audio information of multiple directions, such as a Front Channel (Front Channel), a Back Channel (Back Channel), a Front Left Channel (LeftFront Channel), a Back Left Channel (LeftBack Channel), a Front Right Channel (RightFront Channel), and a Back Right Channel (RightBack Channel), in addition to a Left Channel (Left Channel) and a Right Channel (Right Channel).

In the scheme, a plurality of channels are added in the original I2S standard protocol by performing frequency multiplication processing, so that the encoding and decoding of a plurality of audio information are realized.

As shown in fig. 4 below, the lower part in fig. 4 is the original I2S standard protocol, and the upper part is to multiply the frequency by 16 times the original I2S standard protocol, add 8 effective channel information such as left, right, front, back, front left, front right, back left, back right, etc., and reserve reserved channels of NON1-NON8 8 directions, which can support 32 channels at most.

For example: the sampling frequency of the left and right channels WS of the original I2S standard protocol is 44.1Khz, the sampling rate is 705.6Khz after 16 times frequency multiplication, the sampling rate comprises 32 channels of samples, and the sampling rate of the decoded left and right channels is still 44.1Khz. Taking 16-bit sampling as an example:

Sclk=2×48khz×16=1.536 MHZ before frequency doubling;

sclk=16×2×48khz×16= 14.576Mhz after 16 frequency doubling.

When decoding, decoding is carried out according to 32 channels, and 16 paths of audio of the original I2S standard protocol (the original protocol comprises left and right 2 paths of audio) can be generated.

S103-2, the processor carries out multichannel coding on the audio file to be played to obtain a first target audio file.

Optionally, the audio data output SDO is multi-channel encoded according to the switching of the frame clock WS, so that after each switching of the frame clock WS, audio encoded data corresponding to the next channel is output through the audio data output SDO.

S103-3, the processor transmits the first target audio file to the audio chip through the I2S bus based on the serial clock SCLK and the frame clock WS after the frequency multiplication.

Optionally, the audio chip 20 decodes the first target audio file in the I2S multi-channel compatible mode to obtain an audio file to be played.

Optionally, after each switching of the frame clock WS, audio encoded data corresponding to the next channel is output through the audio data output SDO. The audio chip 20 samples the audio data output SDO to obtain audio encoded data, which is then decoded to obtain a corresponding audio file to be played.

On the basis of fig. 2, regarding how to guarantee the accuracy of audio file transmission under the existing I2S bus architecture, an embodiment of the present application further provides an optional implementation, please refer to the following, S202, the step of receiving, by an audio chip, an audio file to be played, transmitted by a processor in an I2S multi-channel compatible mode, includes: s202-1 and S202-2 are specifically described below.

S202-1, the audio chip receives a first target audio file transmitted by the I2S bus based on the serial clock SCLK and the frame clock WS after frequency multiplication.

The first target audio file is a file obtained by carrying out multichannel coding on an audio file to be played by a processor in a frequency multiplication processing mode.

Optionally, the audio chip 20 samples the audio data output SDO to obtain the audio-retrieved encoded data in the first target audio file.

Since the frequency multiplication process is already performed, the sampling frequency of the audio chip 20 correspondingly changes.

S202-2, the audio chip decodes the first target audio file in the I2S multi-channel compatible mode to obtain an audio file to be played.

Optionally, with respect to how to record multi-channel audio, the application further provides an optional implementation, please refer to fig. 5, and the audio data transmission method further includes, when recording the audio file: s111, S112, S113, S114, S115, S211, S212, S213, S214, S215, and S216 are specifically described below.

S111, the processor determines whether recording of audio files greater than 2 channels is required. If yes, S112 is executed, and if no, S114 is executed.

Optionally, during audio recording, the default is set as the flow recording of the I2S standard protocol, that is, the audio recording is performed in the I2S standard mode. When multi-channel surround recording is required, the processor 10 first determines whether there are multiple microphones, and if the multi-channel recording hardware environment satisfies the conditions, the processor 10 can select whether to perform multi-channel recording configuration through the I2C control bus. When it is required to record audio files of more than 2 channels, S112 is performed, and otherwise S114 is performed.

And S112, if the audio file with the sound channel more than 2 channels is required to be recorded, the processor sends a mode switching instruction to the audio chip.

S211, when the audio chip receives a mode switching instruction sent by the processor, the audio chip is switched to an I2S multi-channel compatible mode.

S212, the audio chip records a second target audio file.

Wherein the second target audio file is an audio file of greater than 2 channels.

S213, the audio chip transmits the second target audio file to the processor through the I2S bus in the I2S multi-channel compatible mode.

After the mode switch command is sent, the processor 10 multiplies the serial clock SCLK and the frame clock WS in the I2S bus. So that the audio chip transmits the second target audio file to the processor through the I2S bus in the I2S multi-channel compatible mode.

Note that, the SDI is an audio data value (a result after analog-to-digital conversion) acquired at the sampling frequency of SCK, and the input frequency of the SDI can be understood as the sampling frequency of SCK. The relationship between the input frequency of the SDI segment and the frequency of WS is equivalent to the relationship of SCK and WS. Frequency of slck=2×sampling frequency (ws) ×sampling number of bits.

S113, the processor receives the second target audio file transmitted by the audio chip in the I2S multi-channel compatible mode.

S114, the processor sends a default instruction to the audio chip.

S214, when the audio chip receives a default instruction sent by the processor, the audio chip is kept in an I2S protocol standard mode.

S215, the audio chip records the third target audio file.

Wherein the third target audio file is an audio file of less than or equal to 2 channels.

S216, the audio chip transmits the third target audio file to the processor through the I2S bus in the I2S protocol standard mode.

S115, the processor receives the third target audio file transmitted by the audio chip in the I2S protocol standard mode.

The audio data transmission method provided in the embodiment of the present application may include, but is not limited to, a specific process applied to the processor 10 in the electronic device shown in fig. 1, and referring to fig. 6, implementation steps of the audio data transmission method may include: s101, S102, S103, S104, and S105, which are specifically described below:

So that the audio chip is switched to the I2S multi-channel compatible mode.

So that the audio chip receives the audio file to be played in the I2S multi-channel compatible mode.

So that the audio chip remains in the I2S protocol standard mode.

So that the audio chip receives the audio file to be played in the I2S protocol standard mode.

On the basis of fig. 6, regarding how to guarantee the accuracy of audio file transmission under the existing I2S bus architecture, the embodiment of the present application further provides an optional implementation, please refer to the following, S103, the step of the processor transmitting the audio file to be played to the audio chip based on the I2S multi-channel compatible mode includes: s103-1, S103-2 and S103-3 are specifically described below.

And decoding the first target audio file by the audio chip in the I2S multichannel compatible mode to obtain an audio file to be played.

Optionally, when recording the audio file, the audio data transmission method further includes: s111, S112, S113, S114, and S115 are specifically described below.

S111, the processor determines whether recording of audio files greater than 2 channels is required. If yes, executing S112; if not, S114 is performed.

The audio chip is switched to an I2S multi-channel compatible mode, a second target audio file is recorded by the audio chip, and the second target audio file is transmitted to the processor through the I2S bus in the I2S multi-channel compatible mode, and the second target audio file is an audio file with more than 2 channels.

And S114, if the audio file with the sound channel less than or equal to 2 sound channels is required to be recorded, the processor sends a default instruction to the audio chip.

The audio chip is kept in an I2S protocol standard mode, a third target audio file is recorded, and the third target audio file is transmitted to the processor through the I2S bus in the I2S protocol standard mode, wherein the third target audio file is an audio file with 2 channels or less.

The audio data transmission method provided in the embodiment of the present application may include, but is not limited to, an audio chip 20 applied to the electronic device shown in fig. 1, and referring to fig. 7, the implementation steps of the audio data transmission method may include: s201, S202, S203, and S204, which are specifically described below:

On the basis of fig. 7, regarding how to guarantee the accuracy of audio file transmission under the existing I2S bus architecture, an embodiment of the present application further provides an optional implementation, please refer to the following, S202, the step of receiving, by an audio chip, an audio file to be played, transmitted by a processor in an I2S multi-channel compatible mode, includes: s202-1 and S202-2 are specifically described below.

Referring to fig. 8, fig. 8 is an audio data transmission device according to an embodiment of the present application, and optionally, the audio data transmission device is applied to the processor 10 described above.

The audio data transmission device applied to the processor 10 described above includes: a first processing unit 301 and a first transmission unit 302.

The first processing unit 301 is configured to determine, by using the processor, whether the audio file to be played is an audio file with a channel greater than 2 channels.

The first transmission unit 302 is configured to send a mode switching instruction to the audio chip to switch the audio chip to the I2S multi-channel compatible mode if the audio file to be played is an audio file with channels greater than 2 channels.

The first transmission unit 302 is further configured to transmit the audio file to be played back to the audio chip based on the I2S multi-channel compatible mode, so that the audio chip receives the audio file to be played back in the I2S multi-channel compatible mode.

The first transmission unit 302 is further configured to send a default instruction to the audio chip to keep the audio chip in the I2S protocol standard mode if the audio file to be played is an audio file with 2 channels or less.

The first transmission unit 302 is further configured to transmit the audio file to be played back to the audio chip based on the I2S protocol standard mode, so that the audio chip receives the audio file to be played back in the I2S protocol standard mode.

Alternatively, the first processing unit 301 may perform S101 and S111 described above, and the first transmission unit 302 may perform S102 to S105 and S112 to S115 described above.

Referring to fig. 9, fig. 9 is an audio data transmission device according to an embodiment of the present application, and optionally, the audio data transmission device is applied to the audio chip 20 described above.

The audio data transmission device applied to the above-described audio chip 20 includes: a second processing unit 401 and a second transmission unit 402.

The second processing unit 401 is configured to switch to an I2S multi-channel compatible mode when the audio chip receives a mode switching instruction sent by the processor;

the second transmission unit 402 is configured to receive, by using the audio chip, the audio file to be played, which is transmitted by the processor, in the I2S multi-channel compatible mode.

The second processing unit 401 is further configured to maintain the I2S protocol standard mode when the audio chip receives a default instruction sent by the processor.

The second transmission unit 402 is further configured to receive, by using the audio chip in the I2S protocol standard mode, an audio file to be played, which is transmitted by the processor.

Alternatively, the second processing unit 401 may perform S201, S203, S211, S212, S214, and S215 described above, and the second transmission unit 402 may perform S202, S204, S213, and S216 described above.

It should be noted that, the audio data transmission device provided in this embodiment may execute the method flow shown in the method flow embodiment to achieve the corresponding technical effects. For a brief description, reference is made to the corresponding parts of the above embodiments, where this embodiment is not mentioned.

The present application also provides a storage medium storing computer instructions, a program which when read and executed perform the audio data transmission method of the above embodiments. The storage medium may include memory, flash memory, registers, combinations thereof, or the like.

An electronic device is provided below, which may be, but is not limited to, a variety of audio controlled playback devices such as notebooks, desktops, cell phones, audio players, and the like. The electronic device is shown in fig. 1, and the above audio data transmission method can be implemented; specifically, the electronic device includes: the processor 10 and the audio chip 20 are connected through an I2S bus.

In summary, the embodiments of the present application provide an audio data transmission method, an apparatus, a storage medium, and an electronic device, where the electronic device is applied to a processor in the electronic device, and the electronic device further includes an audio chip, where the processor is connected to the audio chip through an I2S bus, including: the processor determines whether the audio file to be played is an audio file with more than 2 channels; if the audio file to be played is an audio file with more than 2 channels, the processor sends a mode switching instruction to the audio chip so as to switch the audio chip into an I2S multi-channel compatible mode; the processor transmits the audio file to be played to the audio chip based on the I2S multi-channel compatible mode, so that the audio chip receives the audio file to be played in the I2S multi-channel compatible mode. In the I2S multichannel compatible mode, multichannel (more than 2 channels) audio data can be transmitted between the processor and the audio chip, the audio data are not limited to left and right channel audio data, and the requirements of people on pursuing higher and better sound effects and sound quality can be met.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners as well. The apparatus embodiments described above are merely illustrative, for example, flow diagrams and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, the functional modules in the embodiments of the present application may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims

1. An audio data transmission method, characterized in that the method is applied to a processor in an electronic device, the electronic device further comprises an audio chip, and the processor and the audio chip are connected through an I2S bus, the method comprises:

the processor determines whether an audio file to be played is an audio file with more than 2 channels;

if the audio file to be played is an audio file with more than 2 channels, the processor sends a mode switching instruction to the audio chip so as to switch the audio chip into an I2S multi-channel compatible mode;

The processor transmits the audio file to be played to the audio chip based on the I2S multi-channel compatible mode, so that the audio chip receives the audio file to be played in the I2S multi-channel compatible mode;

if the audio file to be played is an audio file with 2 channels or less, the processor sends a default instruction to the audio chip so that the audio chip is kept in an I2S protocol standard mode;

the processor transmits the audio file to be played to the audio chip based on the I2S protocol standard mode, so that the audio chip receives the audio file to be played in the I2S protocol standard mode.

2. The audio data transmission method of claim 1, wherein the step of the processor transmitting the audio file to be played to the audio chip based on the I2S multi-channel compatible mode comprises:

the processor performs frequency multiplication processing on a serial clock SCLK and a frame clock WS in the I2S bus;

the processor carries out multichannel coding on the audio file to be played to obtain a first target audio file;

the processor transmits the first target audio file to the audio chip through the I2S bus based on the serial clock SCLK and the frame clock WS after frequency multiplication processing, so that the audio chip decodes the first target audio file in the I2S multi-channel compatible mode to obtain the audio file to be played.

3. The audio data transmission method of claim 1, wherein when recording an audio file, the method further comprises:

the processor determines whether an audio file greater than 2 channels needs to be recorded;

if the audio file with the sound channel more than 2 sound channels needs to be recorded, the processor sends a mode switching instruction to the audio chip so that the audio chip is switched to an I2S multi-sound channel compatible mode, the audio chip records a second target audio file and transmits the second target audio file to the processor through an I2S bus in the I2S multi-sound channel compatible mode, and the second target audio file is the audio file with the sound channel more than 2 sound channels;

the processor receives a second target audio file transmitted by the audio chip in the I2S multi-channel compatible mode.

4. An audio data transmission method, characterized in that the method is applied to an audio chip in an electronic device, the electronic device further comprises a processor, and the processor is connected with the audio chip through an I2S bus, the method comprises:

when the audio chip receives a mode switching instruction sent by the processor, switching to an I2S multichannel compatible mode;

The audio chip receives an audio file to be played, which is transmitted by the processor, in the I2S multichannel compatible mode;

when the audio chip receives a default instruction sent by the processor, the audio chip is kept in an I2S protocol standard mode;

and the audio chip receives the audio file to be played, which is transmitted by the processor, in the I2S protocol standard mode.

5. The audio data transmission method according to claim 4, wherein the step of receiving the audio file to be played transmitted by the processor in the I2S multi-channel compatible mode by the audio chip includes:

the audio chip receives a first target audio file transmitted by the I2S bus based on a serial clock SCLK and a frame clock WS after frequency multiplication processing;

the first target audio file is obtained by carrying out multichannel coding on the audio file to be played by the processor in a frequency multiplication processing mode;

and the audio chip decodes the first target audio file in the I2S multichannel compatible mode to obtain the audio file to be played.

6. An audio data transmission method, which is characterized by being applied to an electronic device, wherein the electronic device comprises a processor and an audio chip, the processor and the audio chip are connected through an I2S bus, and the method comprises the following steps:

if the audio file to be played is an audio file with more than 2 sound channels, the processor sends a mode switching instruction to the audio chip,

the processor transmits the audio file to be played to the audio chip based on the I2S multichannel compatible mode;

the audio chip receives the audio file to be played transmitted by the processor in the I2S multichannel compatible mode;

if the audio file to be played is an audio file with 2 channels or less, the processor sends a default instruction to the audio chip,

the processor transmits the audio file to be played to the audio chip based on the I2S protocol standard mode;

7. The audio data transmission method of claim 6, wherein when recording an audio file, the method further comprises:

if the audio file with the sound channel more than 2 sound channels is required to be recorded, the processor sends a mode switching instruction to the audio chip;

the audio chip records a second target audio file, wherein the second target audio file is an audio file with a sound channel more than 2 sound channels;

the audio chip transmits the second target audio file to the processor through an I2S bus in the I2S multi-channel compatible mode;

8. An audio data transmission device, characterized by being applied to a processor in an electronic device, the electronic device further comprising an audio chip, the processor and the audio chip being connected through an I2S bus, the device comprising:

the first processing unit is used for determining whether the audio file to be played is an audio file with more than 2 channels or not by the processor;

The first transmission unit is used for sending a mode switching instruction to the audio chip by the processor if the audio file to be played is an audio file with more than 2 channels so as to enable the audio chip to be switched to an I2S multi-channel compatible mode;

the first transmission unit is further configured to transmit the audio file to be played to the audio chip based on the I2S multi-channel compatible mode, so that the audio chip receives the audio file to be played in the I2S multi-channel compatible mode;

the first transmission unit is further configured to, if the audio file to be played is an audio file with 2 channels or less, send a default instruction to the audio chip, so that the audio chip is kept in an I2S protocol standard mode;

the first transmission unit is further configured to transmit the audio file to be played to the audio chip based on the I2S protocol standard mode, so that the audio chip receives the audio file to be played in the I2S protocol standard mode.

9. An audio data transmission device, characterized in that, be applied to the audio chip in electronic equipment, electronic equipment still includes the processor, the processor with audio chip passes through I2S bus connection, the device includes:

The second processing unit is used for switching to an I2S multichannel compatible mode when the audio chip receives a mode switching instruction sent by the processor;

the second transmission unit is used for receiving the audio file to be played, which is transmitted by the processor, by the audio chip in the I2S multichannel compatible mode;

the second processing unit is further configured to maintain an I2S protocol standard mode when the audio chip receives a default instruction sent by the processor;

the second transmission unit is further configured to receive, by using the audio chip in the I2S protocol standard mode, the audio file to be played, where the audio file is transmitted by the processor.

10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the method according to any one of claims 1-3 and/or 4-5.

11. An electronic device, comprising: a processor and an audio chip, the processor being connected to the audio chip by an I2S bus, the electronic device being adapted to implement the method of any of claims 1-3 and/or 4-5.