CN117348993A - Mixed key-level task scheduling method and device - Google Patents
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Abstract
The invention discloses a method and a device for scheduling mixed critical tasks, which relate to the technical field of information and comprise the following steps: acquiring a released task sequence; orderly listing the released task sequences into a conventional task queue, and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task; if the tasks are executed in the corresponding processors, upgrading the key level of the system, determining the low-key-level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low-key-level tasks into a low-key-level reserved queue; and recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue. By applying the technical scheme, the consistency and the integrity of the data can be ensured, and better system performance can be obtained.
Description
Technical Field
The invention relates to the technical field of information, in particular to a method and a device for scheduling mixed critical-level tasks.
Background
In the field of embedded systems, integrating multiple functions on a platform for sharing resources is an important research content. The importance of the computing tasks of different functions is different, and the computing tasks are generally expressed by different key levels, for example, in the fields of aviation, automobiles and the like, and have multi-level key level division. Hybrid critical-level systems are dedicated to letting multiple critical-level tasks not affect the time-limit requirements of high critical-level tasks while minimizing physical device redundancy.
Currently, when task scheduling is performed, once the critical level of the system is lifted, in order to ensure that the high critical level task takes more CPU computing time to meet the deadline, the low critical level task is usually discarded or suspended indefinitely. However, this approach is too negative, with the potential for discarding low critical tasks, which may have a negative impact, and the tasks being performed will generally access data, and the consistency and integrity of the data may be impacted by the deadline suspension of the low critical tasks, which may affect overall system performance.
Disclosure of Invention
The invention provides a method and a device for scheduling mixed critical tasks, which mainly can ensure the consistency and the integrity of data and can obtain better system performance.
According to a first aspect of an embodiment of the present invention, there is provided a hybrid critical-level task scheduling method, including:
acquiring a released task sequence;
orderly listing the released task sequences into a conventional task queue, and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task;
if the tasks are executed in the corresponding processors, upgrading the key level of the system, determining the low-key-level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low-key-level tasks into a low-key-level reserved queue;
and recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue.
According to a second aspect of an embodiment of the present invention, there is provided a hybrid critical-stage task scheduling apparatus, including:
the acquisition unit is used for acquiring the released task sequence;
the scheduling unit is used for orderly listing the released task sequences into a conventional task queue and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task;
the determining unit is used for determining low-key-level tasks which are not executed from the queues to be processed corresponding to the processors if the system key-level is updated when the tasks are executed in the corresponding processors, and listing the low-key-level tasks into a low-key-level reserved queue;
and the allocation unit is used for recycling the idle time slots on the processors to an idle time slot queue and allocating the idle time sequence in the idle time slot queue to the low critical task in the low critical reservation queue.
According to a third aspect of embodiments of the present invention, there is provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of:
acquiring a released task sequence;
orderly listing the released task sequences into a conventional task queue, and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task;
if the tasks are executed in the corresponding processors, upgrading the key level of the system, determining the low-key-level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low-key-level tasks into a low-key-level reserved queue;
and recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue.
According to a fourth aspect of embodiments of the present invention, there is provided an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the program:
acquiring a released task sequence;
orderly listing the released task sequences into a conventional task queue, and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task;
if the tasks are executed in the corresponding processors, upgrading the key level of the system, determining the low-key-level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low-key-level tasks into a low-key-level reserved queue;
and recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue.
Compared with the prior art, the method and the device for scheduling the mixed critical-level tasks can acquire the released task sequences, orderly list the released task sequences into the conventional task queues, locally schedule each task in the conventional task queues to allocate corresponding processors for each task, determine the low critical-level tasks which are not executed from the to-be-processed queues corresponding to each processor if the tasks are executed in the corresponding processors, list the low critical-level tasks into the low critical-level reserved queues, finally recycle the idle time slots on each processor into the idle time slot queues, and allocate the idle time sequences in the idle time slot queues to the low critical-level tasks in the low critical-level reserved queues. Therefore, the invention actively processes the low-key-level tasks in the mixed key-level multi-task scheduling based on the isomorphic multi-processor platform, thereby ensuring the consistency and the integrity of data. The method has the advantages that the execution capacity of the multiprocessor is fully utilized as much as possible while the high-critical-level task meets the cut-off time limit, so that a low-critical-level reserved queue and an idle time slot queue are constructed, dynamic idle time slots on each processor in the whole system execution process can be recycled into the idle time slot queue, and the tasks in the low-critical-level reserved queue can obtain available execution time from the idle time slot queue, so that mixed scheduling of different critical-level tasks under different scenes can be realized, and better system performance can be obtained.
The foregoing description is only an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above-mentioned and other objects, features and advantages of the present application more clearly understood, the following detailed description of the present application will be given.
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In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 shows a flow diagram of a hybrid critical task scheduling method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an overall design architecture of a hierarchical scheduler according to an embodiment of the present invention;
FIG. 3 shows a global scheduler overall design schematic provided by an embodiment of the present invention;
FIG. 4 shows a task partitioning strategy diagram provided by an embodiment of the present invention;
FIG. 5 shows a schematic diagram of the overall design of a local scheduler provided by an embodiment of the present invention;
FIG. 6 is a schematic diagram of a task acceptance test based on time demand analysis according to an embodiment of the present invention;
FIG. 7 illustrates a schematic diagram of a budget consumption and replenishment flow provided by an embodiment of the present invention;
FIG. 8 illustrates a high-criticality task execution timing diagram provided by an embodiment of the present invention;
FIG. 9 shows a schematic diagram of idle stealing task execution timing provided by an embodiment of the invention;
FIG. 10 is a schematic flow chart of a hybrid critical task scheduling algorithm according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a hybrid critical task scheduling device according to an embodiment of the present invention;
fig. 12 is a schematic diagram of an entity structure of an electronic device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without any inventive effort, are intended to be within the scope of the invention.
It should be noted that the terms "comprising" and "having" and any variations thereof in the embodiments of the present invention and the accompanying drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Existing processing methods are too negative, with the potential for negative impact of the involuntary discarding of low critical tasks, the executing tasks typically access data, and the consistency and integrity of the data may be compromised by the deadless suspension of the low critical tasks, thereby affecting overall system performance.
In order to solve the above problem, an embodiment of the present invention provides a hybrid critical task scheduling method, as shown in fig. 1, including:
and 101, acquiring a released task sequence.
For the embodiment of the invention, when executing, the released task sequence needs to be acquired first, and the task sequence contains each task to be executed.
Step 102, the released task sequence is orderly listed into a regular task queue, and each task in the regular task queue is locally scheduled so as to allocate a corresponding processor for each task.
For the embodiment of the invention, the released task sequences are sequentially listed into the conventional task queues, and when the tasks in the conventional task queues are locally scheduled, the limited allocation of the processors with the lowest current utilization rate is selected each time, so that the loads of the processors are balanced, and the scheduling success rate is improved. Based thereon, the method comprises: determining a processor with the lowest current utilization rate of the system aiming at any task in the tasks; and distributing any task to the processor with the lowest utilization rate.
Step 103, if the tasks are executed in the corresponding processors, upgrading the critical level of the system, determining the low critical level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low critical level tasks into a low critical level reservation queue.
For the embodiment of the invention, when the critical level of the system is upgraded, the non-executed low critical level tasks can be listed in a low critical level reservation queue, and the method comprises the following steps of: if the key levels of the low-key-level tasks are different, determining the execution sequence of the low-key-level tasks according to the key level of the low-key-level tasks; if the key levels among the low-key-level tasks are the same, determining the execution sequence among the low-key-level tasks according to the unexecuted time of the low-key-level tasks; and according to the execution sequence, the low-critical-level tasks are orderly listed into the low-critical-level reserved queue.
Specifically, once critical-level upgrade occurs, low critical-level tasks that are not executed are determined from the single queues to be processed corresponding to the respective processors, and the low critical-level tasks are listed in the low critical-level reservation queues. Further, critical-level tasks are prioritized, i.e., when there are more than two critical levels in the system, the promotion of critical levels may occur more than once, and thus the critical levels between the relatively low critical-level tasks that are suspended are not consistent. In addition, if the key levels are the same, tasks with less execution time are prioritized.
And 104, recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue.
For the embodiment of the invention, when the idle time slot is recovered, the method comprises the following steps: determining absolute deadlines corresponding to idle time slots on the processors; storing the idle time slots into the idle time slot queues according to the time sequence of the absolute deadline; and if the current time of the system exceeds the absolute deadline corresponding to the idle time slot, determining that the idle time slot fails, and removing the idle time slot from the idle time slot queue.
Specifically, once the system starts executing, it starts to reclaim the free time slots on each processor, and the embodiments of the present invention do not limit the duration of the minimum recoverable free time slot. Each reclaimed free slot is described using a doublet (q, d), where q represents the free slot duration and d represents its absolute deadline, and if d is exceeded, the free slot is invalidated. If the task is completed before the absolute deadline expires, an idle slot is created. And storing the non-invalid idle time slots in an idle time slot queue according to the time sequence of the absolute deadline, and allocating the idle time slots to tasks in a low critical-level reservation queue for use.
Further, the most significant difference between hybrid critical systems and traditional real-time systems is the decoupling of criticality from time sensitivity, which are considered equivalent properties in traditional real-time systems, however, in general they are not identical. Time sensitivity refers to the importance of a task to acquire CPU resources at a particular point in time, which is often not an alternative to hard real-time tasks, because such time allocation is meaningless if a task acquires CPU resources after its absolute time limit. The criticality of the task reflects the importance of the task to the whole system, namely the influence of the execution failure of the task to the system is reflected, and the higher the task criticality level is, the lower the execution failure of the system can be tolerated. On the other hand, the criticality also reflects the credibility of the task, and the failure of the execution of the unreliable task does not cause the system to crash, but the credible task must be successfully executed. The hybrid critical-level tasks are represented as quaternions:
τ i ＝(T i ,D i ,C i ,L i )
the four parameters are task period, task relative time limit, task worst execution time (WCET) and task key grade. Unlike conventional real-time systems, C i Is a vector, i.e., one WCET for each key tier, and the WCET for a high key tier is often greater than or equal to the WCET for a low key tier. If task tau i Key level L of (2) i Above the system critical level LS, then τ i Is a high-critical task; otherwise, it is a low critical task.
In particular, to facilitate theoretical analysis, a study may be conducted on a dual criticality model, with LO representing a low criticality level, HI representing a high criticality level, and tasks considered to have an implicit deadline, then the tasks may be represented as
τ i ＝(T i ,C i (LO),C i (HI),L i )
C i (LO) and C i (HI) represents WCET at low and high key ratings, respectively. If the actual execution time of a job does not exceed C i (LO), then the job is running at a low critical level; if the actual execution time of a job exceeds C i (LO) but not more than C i (HI), then the job is running at a high key level; if the actual execution time of a job exceeds C i (HI), then the job performs the error.
When the high-critical-level task enters the high-critical-level operation, the system can give up the execution of the low-critical-level task to ensure that the execution of the high-critical-level task cannot fail. However, on the premise that the time limit constraint of the high-critical task can be met, the CPU utilization rate should be improved as much as possible.
As shown in fig. 2, the scheduler design of the hierarchical architecture can decouple the single-core scheduling policy from supporting multi-core scheduling, so that the scheduler design is more flexible to implement. Therefore, the multi-core hybrid critical task scheduler is designed by adopting a hierarchical architecture, and is composed of a global scheduler and a local scheduler, wherein the global scheduler is mainly responsible for carrying out task division and processor allocation according to the current information of the system, and the local scheduler is mainly responsible for generating a correct task execution sequence by using a single-core hybrid critical scheduling algorithm.
As shown in fig. 3, the core function of the global scheduler is task allocation, that is, task allocation to a suitable CPU core, where the task allocation needs to comprehensively consider the requirements of each aspect. Firstly, the schedulability requirement of the task is met, that is to say, after the task is distributed to the target CPU core by a certain method, the task can be completed within the time limit; secondly, under the condition of meeting the schedulability requirement, the task may have a plurality of optional CPU cores, and the overhead of inter-core cross-core message communication among the CPU cores should be considered, so that the total number of the cross-core message communication is reduced; finally, load balancing among multiple cores is also an index of system performance, and on the premise of meeting schedulability, the load among the cores needs to be balanced as much as possible.
It can be seen that the overall design consideration of the global scheduler is comprehensive, and the three functional modules including task partitioning, cross-core message optimization and load balancing are needed to be decomposed, so that the design and development are facilitated, the task partitioning module is the most core module, and the design of the task partitioning strategy is analyzed.
When CPU core allocation is carried out on tasks in a traditional real-time system, the tasks are firstly ordered according to a certain index strategy, so that the allocation performance can be improved; then dividing each task to the corresponding CPU core in turn by a certain method according to the sequence; and finally, detecting the schedulability of the task on the CPU core, if the task is schedulable, dividing the task successfully, and otherwise, dividing the task failed.
The hybrid critical system may also refer to the practice in the traditional real-time system, where tasks are first sequenced and preprocessed, and then the CPU cores are allocated.
The sorting and dividing of the tasks in the hybrid key system are two parts which complement each other, and a proper sorting strategy can improve the performance of task division. The embodiment of the invention provides a task allocation strategy combining key rank ordering and first adaptation based on the existing theory. The allocation process of the strategy is as follows: if no task allocation has been made, the first CPU core that meets the schedulability requirement is selected and the task is allocated to that core. The schedulability detection is performed using a task acceptance test method of the local scheduler. If the detection passes, the task may be allocated to the CPU core; if the detection is not passed, it is stated that the task is allocated to the CPU core, which causes the task on the CPU core to be unscheduled, and therefore the task cannot be allocated to the CPU core. If all tasks are successfully allocated, then the task partitioning is successful; if there is a task that cannot be allocated to the appropriate CPU core, then the task division fails.
As shown in fig. 4, the temporal complexity of the strategy, whether it be sorting f or traversing q, is simply analyzed and is at a pseudo-polynomial level, so the overall temporal complexity of the strategy is also at a pseudo-polynomial level.
After the task is assigned to the target CPU core, the target CPU core is required to execute the local scheduler program, resulting in the correct task execution order.
Further, the overall flow of the local scheduler is shown in fig. 5. Newly arrived low critical tasks are inserted into a wait queue to wait for system acceptance; each accepted low-critical task is placed in a low-critical task queue and ordered in priority order; each high critical task is placed in the high critical task queue in the order of the EDF. The local scheduler generates a correct scheduling sequence through an idle stealing mechanism and a time isolation mechanism, combines the advantages of dynamic scheduling and static scheduling, adopts an EDF scheduling algorithm queue for high-key tasks, sorts the tasks according to the deadlines of the tasks in the earliest and later time, arranges the tasks with the earliest deadlines at the forefront of the queue, always selects the first task in the queue to allocate a processor for the first task when the task is selected by a scheduler, adopts a fixed priority preemption algorithm system for allocating the processor to the process with the highest priority for the low-key task, enables the processor to execute, and immediately stops the execution of the current process as long as another process with higher priority appears during the execution, and re-allocates the processor to the new process with the highest priority. In addition, the schedulability judgment of the high-critical-level task is designed by using a Baruah method and the acceptance test of the low-critical-level task refers to the time demand analysis of a real-time system.
Further, considering the influence of high-critical-level tasks in a hybrid critical system, a method for judging whether low-critical-level tasks are subjected to testing is provided.
In a conventional real-time system, task τ i Time requirement w of (2) i (t) is as follows:
wherein w is i (t) is task τ i Representing the time demand function of a task tau i Maximum time requirement of (2); a is that i Is of a priority higher than tau i Is a low-critical-level task set; c i Is task tau i Is performed in the same manner as the execution time of the first step; c k Is task tau k Is performed in the same manner as the execution time of the first step; t (T) k Is task tau k Is a periodic one.
At task τ i At or some point in time t before the time limit of (1), if the CPU time t provided by the system becomes greater than or equal to the CPU time requirement w i (t), then task τ i Can meet the time limit D i . That is, if at t.ltoreq.D i At the moment w i (t). Ltoreq.t, then task τ i Can be scheduled by the system; if for any t.ltoreq.D i All have w i (t)>t, then task tau i Cannot be scheduled to execute to completion within its time limit.
Considering a hybrid critical system, high critical tasks, while being preempted by low critical tasks, must be guaranteed with priority, and therefore, alsoThe high critical tasks can be considered as tasks with very high priority, then the total time demand w of the low critical tasks in the hybrid critical system i (t) is:
wherein A is i Is of a priority higher than tau i B is a high critical task set.
The following describes the execution flow of the task acceptance test algorithm by way of an example, and verifies the correctness of the task acceptance test algorithm. Assume that there are 5 mixed critical level tasks in the system, where τ 1 And τ 2 Is a high critical task, τ 3 ～τ 5 Is a low critical task with priority τ 3 >τ 4 >τ 5 The total utilization of the system is 96.7%.
As shown in FIG. 6, the solid line represents the time demand function of each task, the dashed line represents the time that the higher priority task contributed to the lower priority task, w i The intersection of (t) with the CPU time supply function y (t) =t identifies task τ i At this point the job execution is completed. As can be seen from the figure, task τ 3 And τ 4 The maximum possible response times of (2) are 4.75 and 9, which are within the respective time limits and therefore can be scheduled by the system as feasible; while task τ 5 Is well above the supply function t, so the task cannot be scheduled by the system.
When the point in time is an integer multiple of the higher priority task and the high critical task period, the function rises once and at this point in time the difference w between the task time demand and the CPU supply i (t) -t is minimal, so it can be determined at these times whether the task is schedulable.
In summary, time demand-based analysisThe method realizes the task acceptance test and determines the task tau with low key level i The flow of whether possible scheduling in the hybrid critical system is as follows:
first, a time demand function w is calculated according to a formula i (t)
After that, it is checked whether the inequality is established,
w i (t)≤t
wherein t=jt k ；k∈A i ；If there are moments satisfying the inequality, task τ i Is schedulable.
Further, the design goal of the hybrid critical task scheduling algorithm is to be able to allow high priority low critical tasks to preempt low priority high critical tasks, which in effect will provide a time isolation mechanism between different critical level tasks. However, the time isolation mechanism between the tasks of the same critical level is quite important, if one malicious task in the tasks of the same critical level frequently occupies CPU time, the system will have no extra time to process other tasks with lower priority, the response time of other tasks will be very large and even miss the time limit, and the system will be in an overload state. The section expands the time slice structure and combines with the Capability mechanism of the mginkgo microkernel, introduces the concept of the running context (SchedCtx), and realizes a set of feasible time isolation mechanism based on the concept.
The running context is also a kernel object, for which access needs to be through Capability mechanisms. It records the task cycle, execution budget, deadline, bound TCB, maximum number of supplements, supplementary header, supplementary trailer, and bound CPU core. Tasks with full run contexts whose execution budget is the same as the cycle can monopolize the remaining CPU bandwidth of higher critical level tasks, which is very useful for running low critical best effort tasks in idle time, and which can also be used to limit high critical level tasks whose execution time does not exceed the execution budget of the current critical level except for emergency situations. Tasks with a complete budget do not incur any inherent overhead except for a preemption rate of 1/T. Tasks with partial execution context whose execution budget is less than a cycle, cannot be run again until the execution budget is exhausted, unless replenished again.
As shown in FIG. 7, the consumption-replenishment rules of the execution budget are key to whether the execution context can meet the design requirements, and this section refers to rules of sporadic servers in conventional real-time systems for design. The purpose of the sporadic servers is to ensure that the execution time of a task does not exceed its execution budget during any period of time that is the period of the task. The method and the device prevent the task from saving the budget and supplementing the budget at the time near the end of the period by tracking the residual execution budget of the task at the preempted time T and supplementing the budget at the time t+T, and continuously run for the time exceeding the execution budget. In practice, a real system is not able to track an unlimited number of supplements, and if the number of supplements exceeds a certain threshold, then the subsequently exceeded budget will be discarded. If the threshold is one, then the sporadic server will behave in accordance with the polling server, unused budgets will be discarded, and the task will be executed in the next cycle. The optimal value of the threshold depends on the design details of the system and the characteristics of the hardware platform, so this section takes this threshold as an attribute of the running context, which can be specified by the developer according to specific requirements. The TCB task control component of a task must bind with the running context to run, and budget consumption-replenishment rules can limit the running time of the task, enabling time isolation between tasks by replenishing the consumed budget multiple times.
In a hybrid critical system, there is little benefit in completing high-critical tasks ahead of time, and if low-critical tasks are selected for execution after all high-critical tasks are completed, then the low-critical task response time will be longer and the time limit constraints will not be easily met. Therefore, on the premise of ensuring the time limit constraint of the high-critical-level task, the idle time can be used for running the low-critical-level task so as to improve the CPU utilization rate. This in effect provides a time isolation mechanism between the high-critical tasks and the low-critical tasks, since the low-critical tasks run during idle time of the high-critical tasks without affecting the operation of the high-critical tasks.
The logic of the idle stealing algorithm is relatively simple, i.e. low critical level task execution is scheduled as long as there is sufficient idle time in the system. However, how to calculate the available space of the system is complex, and requires calculation within a task overcycle to obtain a correct result. The execution flow of the idle stealing algorithm is described below by way of an example. Assuming that there are two high-level critical tasks in the system, τ 1 And τ 2 Is a high critical task, τ 3 And τ 4 Is a low critical level task.
As shown in fig. 8, two high-critical-level tasks τ 1 And τ 2 Released at time 0 and scheduled for execution in the order of EDFs. Due to tau 1 And τ 2 The total CPU utilization is 95.8%, so that idle time exists in the system, and low-critical-level tasks can be executed through idle stealing. τ 1 And τ 2 Is 12, that is to say τ every 12 units of time 1 And τ 2 Is consistent.
And on the premise of meeting respective time limit constraints, sequentially moving the jobs released by the two high-key-level tasks in the overcycle backwards to obtain an idle stealing task execution time sequence shown in fig. 9. [0,0.5] is the available free of the system, i.e., the low critical level task released at time 0, which is schedulable to execute if its maximum execution time is less than 0.5 units of time. Notably, the available free space in the system is 0 at time 0.5, at which time the system must discard all accepted tasks and execute high-critical tasks, only so can the time limit constraints of the high-critical tasks be guaranteed. The embodiment of the invention is called a key point at such a moment, and the core of the hybrid key-level scheduling algorithm is the detection key point, so that the key point detection algorithm is provided for the embodiment of the invention.
The key point detection algorithm has the core idea that the time for starting execution of each job is moved backwards as much as possible on the premise of not missing the absolute time limit of each high-level job, and after the operation, the difference between the release time of the first job in the job table and the current moment is the minimum idle quantity of the system.
The key point detection algorithm is analyzed, and an algorithm for judging whether the low-key-level task is allowed to run at the current moment can be easily obtained: if the minimum idle quantity of the system is zero, the current moment is a key point, all high-level tasks in the overcycle must be executed at the moment, and the execution of all low-level tasks is abandoned, so that the time limit constraint of the high-level tasks can be ensured only; if the minimum idle amount of the system is greater than zero, selecting a task with highest priority from the tasks with low key level and the execution time being smaller than the idle time; if the minimum amount of system idleness is less than zero, then the system is unscheduled, an exception occurs and an error should be reported. Through the key point detection algorithm and the low key level task operation condition judgment algorithm, the low key level task can be ensured not to interfere with the high key level task, and the system utilization rate can be ensured.
Combining the time isolation mechanism of the previous section with the idle stealing mechanism of the current section, the flow of the hybrid critical-level task scheduling algorithm is obtained, as shown in fig. 10.
The mixed critical-level task scheduling method provided by the embodiment of the invention is based on the isomorphic multiprocessor platform, and the low critical-level task in the mixed critical-level multi-task scheduling is actively processed, so that the consistency and the integrity of data can be ensured. The method has the advantages that the execution capacity of the multiprocessor is fully utilized as much as possible while the high-critical-level task meets the cut-off time limit, so that a low-critical-level reserved queue and an idle time slot queue are constructed, dynamic idle time slots on each processor in the whole system execution process can be recycled into the idle time slot queue, and the tasks in the low-critical-level reserved queue can obtain available execution time from the idle time slot queue, so that mixed scheduling of different critical-level tasks under different scenes can be realized, and better system performance can be obtained.
Further, as a specific implementation of fig. 1, an embodiment of the present invention provides a hybrid critical task scheduling apparatus, as shown in fig. 11, where the apparatus includes: an acquisition unit 31, a scheduling unit 32, a determination unit 33 and an allocation unit 34.
The acquisition unit 31 may be configured to acquire the released task sequence.
The scheduling unit 32 may be configured to sequentially list the released task sequences into a regular task queue, and locally schedule each task in the regular task queue, so as to allocate a corresponding processor to each task.
The determining unit 33 may be configured to determine, if the tasks are executed in the corresponding processors and the system critical level is updated, a low critical level task that is not executed from the to-be-processed queues corresponding to the respective processors, and list the low critical level task in a low critical level reservation queue.
The allocation unit 34 may be configured to recycle the free slots on the respective processors to a free slot queue, and allocate the free time sequences in the free slot queue to the low critical tasks in the low critical reservation queue.
In a specific application scenario, the scheduling unit 32 may be specifically configured to determine, for any one of the tasks, a processor with a lowest current utilization rate of the system; and distributing any task to the processor with the lowest utilization rate.
In a specific application scenario, the determining unit 33 may be specifically configured to determine, according to the key level of the low-key-level task, an execution order between the low-key-level tasks if the key levels of the low-key-level tasks are different; if the key levels among the low-key-level tasks are the same, determining the execution sequence among the low-key-level tasks according to the unexecuted time of the low-key-level tasks; and according to the execution sequence, the low-critical-level tasks are orderly listed into the low-critical-level reserved queue.
In a specific application scenario, the allocation unit 34 may be specifically configured to determine an absolute deadline corresponding to an idle slot on each processor; and storing the idle time slots into the idle time slot queue according to the time sequence of the absolute deadline.
Further, the determining unit 33 may be further configured to determine that the idle slot fails and remove the current system time from the idle slot queue if the current system time exceeds the absolute deadline corresponding to the idle slot.
Further, the scheduling unit 32 may be further configured to perform local scheduling on each task at the same critical level.
Further, the scheduling unit 32 may be further configured to globally schedule the low-critical-level tasks in the low-critical-level reservation queue.
It should be noted that, for other corresponding descriptions of each functional module related to the hybrid critical task scheduling device provided by the embodiment of the present invention, reference may be made to corresponding descriptions of the method shown in fig. 1, which are not repeated herein.
Based on the above method as shown in fig. 1, correspondingly, the embodiment of the present invention further provides a computer readable storage medium, on which a computer program is stored, which when being executed by a processor, implements the following steps: acquiring a released task sequence; orderly listing the released task sequences into a conventional task queue, and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task; if the tasks are executed in the corresponding processors, upgrading the key level of the system, determining the low-key-level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low-key-level tasks into a low-key-level reserved queue; and recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue.
Based on the embodiment of the method shown in fig. 1 and the device shown in fig. 11, the embodiment of the invention further provides a physical structure diagram of an electronic device, as shown in fig. 12, where the electronic device includes: a processor 41, a memory 42, and a computer program stored on the memory 42 and executable on the processor, wherein the memory 42 and the processor 41 are both arranged on a bus 43, the processor 41 performing the following steps when said program is executed: acquiring a released task sequence; orderly listing the released task sequences into a conventional task queue, and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task; if the tasks are executed in the corresponding processors, upgrading the key level of the system, determining the low-key-level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low-key-level tasks into a low-key-level reserved queue; and recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue.
The embodiment of the invention carries out anomaly detection on the signals by acquiring the signal values, legal value ranges and/or legal signal relations of the signals in the message data, and CAN effectively judge whether the CAN bus network system is invaded and detected according to the anomaly detection result of the signals, thereby ensuring the safety of the network system.
Those of ordinary skill in the art will appreciate that: the drawing is a schematic diagram of one embodiment and the modules or flows in the drawing are not necessarily required to practice the invention.
Those of ordinary skill in the art will appreciate that: the modules in the apparatus of the embodiments may be distributed in the apparatus of the embodiments according to the description of the embodiments, or may be located in one or more apparatuses different from the present embodiments with corresponding changes. The modules of the above embodiments may be combined into one module, or may be further split into a plurality of sub-modules.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A hybrid critical task scheduling method, comprising:
acquiring a released task sequence;
orderly listing the released task sequences into a conventional task queue, and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task;
if the tasks are executed in the corresponding processors, upgrading the key level of the system, determining the low-key-level tasks which are not executed from the queues to be processed corresponding to the processors, and listing the low-key-level tasks into a low-key-level reserved queue;
and recycling the idle time slots on the processors to an idle time slot queue, and distributing idle time sequences in the idle time slot queue to low-critical-level tasks in the low-critical-level reserved queue.
2. The method of claim 1, wherein the locally scheduling each task in the regular task queue to assign a corresponding processor to each task comprises:
determining a processor with the lowest current utilization rate of the system aiming at any task in the tasks;
and distributing any task to the processor with the lowest utilization rate.
3. The method of claim 1, wherein said listing said low critical-level tasks in a low critical-level reservation queue comprises:
if the key levels of the low-key-level tasks are different, determining the execution sequence of the low-key-level tasks according to the key level of the low-key-level tasks;
if the key levels among the low-key-level tasks are the same, determining the execution sequence among the low-key-level tasks according to the unexecuted time of the low-key-level tasks;
and according to the execution sequence, the low-critical-level tasks are orderly listed into the low-critical-level reserved queue.
4. The method of claim 1, wherein the reclaiming the free time slots on the respective processors to a free time slot queue comprises:
determining absolute deadlines corresponding to idle time slots on the processors;
and storing the idle time slots into the idle time slot queue according to the time sequence of the absolute deadline.
5. The method according to claim 4, characterized in that the method comprises:
and if the current time of the system exceeds the absolute deadline corresponding to the idle time slot, determining that the idle time slot fails, and removing the idle time slot from the idle time slot queue.
6. The method according to any one of claims 1-5, further comprising:
and carrying out local scheduling on each task under the same key level.
7. The method according to any one of claims 1-5, characterized in that the method comprises:
and globally scheduling the low-critical-level tasks in the low-critical-level reservation queue.
8. A hybrid critical task scheduling device, comprising:
the acquisition unit is used for acquiring the released task sequence;
the scheduling unit is used for orderly listing the released task sequences into a conventional task queue and carrying out local scheduling on each task in the conventional task queue so as to allocate corresponding processors for each task;
the determining unit is used for determining low-key-level tasks which are not executed from the queues to be processed corresponding to the processors if the system key-level is updated when the tasks are executed in the corresponding processors, and listing the low-key-level tasks into a low-key-level reserved queue;
and the allocation unit is used for recycling the idle time slots on the processors to an idle time slot queue and allocating the idle time sequence in the idle time slot queue to the low critical task in the low critical reservation queue.
9. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the computer program when executed by the processor implements the steps of the method of any one of claims 1 to 7.
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