CN117335808A - Decimal modulation method and device, storage medium and electronic equipment - Google Patents

Decimal modulation method and device, storage medium and electronic equipment Download PDF

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Publication number
CN117335808A
CN117335808A CN202310813744.4A CN202310813744A CN117335808A CN 117335808 A CN117335808 A CN 117335808A CN 202310813744 A CN202310813744 A CN 202310813744A CN 117335808 A CN117335808 A CN 117335808A
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result
modulation
fractional
quantization strategy
processing
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鲁勇
刘波
刘海平
梁健林
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Beijing Intengine Technology Co Ltd
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Beijing Intengine Technology Co Ltd
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Priority to CN202310813744.4A priority Critical patent/CN117335808A/en
Publication of CN117335808A publication Critical patent/CN117335808A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

The application discloses a decimal modulating method, a decimal modulating device, a storage medium and electronic equipment. The decimal modulating method comprises the steps of obtaining a decimal part to be modulated; multiplying the decimal part to obtain a processing result; modulating the processing result to obtain a primary modulation result; comparing the decimal part with a threshold value, and determining a quantization strategy according to a comparison result; and carrying out corresponding subtraction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result. The scheme can reduce the transient jump of the modulation result.

Description

Decimal modulation method and device, storage medium and electronic equipment
Technical Field
The present disclosure relates to the field of integrated circuits, and in particular, to a decimal modulating method, apparatus, storage medium and electronic device.
Background
Typically there is only one clock source in the circuit, and each module has an operating clock that requires a different frequency. It is therefore common practice to equip the system with a high frequency clock source, and then each module divides the high frequency clock source to obtain the clock required by each module. However, in general, the clock frequencies required by the modules may vary widely, and the high-frequency clock source cannot be guaranteed to be an integer multiple of all clocks, so that the need for a fractional divider arises.
The fractional divider is realized by a plurality of methods, but the basic principle is the same, namely, a method is adopted in a plurality of frequency dividing periods to make the number of the certain periods more or less than 1, namely, a method of pulse swallowing or pulse inserting is adopted, so that the fractional frequency dividing ratio is obtained in an average sense. Currently, the most common approach is to modulate the fractional portion of the fractional division ratio with a sigma delta modulator to achieve fractional division.
However, the modulation result obtained by the current decimal modulation method has larger instantaneous jump, so that the output clock signal has higher instantaneous jitter (jitter) and unstable frequency.
Disclosure of Invention
The application provides a decimal modulation method, a decimal modulation device, a storage medium and electronic equipment, which can reduce instantaneous jump of a modulation result.
In a first aspect, the present application provides a fractional modulation method, including:
acquiring a decimal part to be modulated;
multiplying the decimal part to obtain a processing result;
modulating the processing result to obtain a primary modulation result;
comparing the decimal part with a threshold value, and determining a quantization strategy according to a comparison result;
and carrying out corresponding reduction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result.
In the decimal modulation method provided in the present application, the determining a quantization strategy according to the comparison result includes:
when the fractional portion is less than or equal to the threshold, determining that the quantization strategy is an odd quantization strategy;
when the fractional portion is greater than the threshold, the quantization strategy is determined to be an even quantization strategy.
In the decimal modulation method provided by the application, the threshold value is 0.5.
In the decimal modulating method provided by the application, the step of multiplying the decimal part to obtain a processing result includes:
multiplying the decimal part by a first preset multiple to obtain a processing result.
In the decimal modulation method provided in the present application, when the quantization strategy is the odd quantization strategy, the performing corresponding reduction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result includes:
dividing the primary modulation result by a second preset multiple to obtain a target modulation result.
In the decimal modulation method provided in the present application, when the quantization strategy is the even quantization strategy, the performing corresponding reduction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result includes:
adding the primary modulation result with 1 to obtain a secondary modulation result;
dividing the secondary modulation result by a second preset multiple to obtain a target modulation result.
In the decimal modulating method provided by the application, the first preset multiple is the same as the second preset multiple.
In a second aspect, the present application provides a fractional modulation apparatus comprising:
an acquisition unit configured to acquire a decimal part to be modulated;
the multiplication unit is used for carrying out multiplication processing on the decimal part to obtain a processing result;
the modulation unit is used for modulating the processing result to obtain a primary modulation result;
a comparison unit for comparing the decimal part with a threshold value and determining a quantization strategy according to the comparison result;
and the multiplying and subtracting unit is used for carrying out corresponding multiplying and subtracting processing on the primary modulation result according to the quantization strategy to obtain a target modulation result.
In a third aspect, the present application provides a storage medium storing a plurality of instructions adapted to be loaded by a processor to perform the fractional modulation method of any one of the preceding claims.
In a fourth aspect, the present application provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements any one of the above-mentioned fractional modulation methods when executing the computer program.
In summary, the decimal modulating method provided by the application includes obtaining a decimal part to be modulated; multiplying the decimal part to obtain a processing result; modulating the processing result to obtain a primary modulation result; comparing the decimal part with a threshold value, and determining a quantization strategy according to a comparison result; and carrying out corresponding reduction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result. The scheme can reduce the transient jump of the modulation result.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flow chart of a decimal modulating method according to an embodiment of the present application.
Fig. 2 is a schematic diagram of a primary modulation result provided in an embodiment of the present application.
Fig. 3 is a schematic diagram of a target modulation result provided in an embodiment of the present application.
Fig. 4a is a schematic diagram of a modulation result using a conventional method according to an embodiment of the present application.
FIG. 4b is a schematic diagram of another modulation result using a conventional method according to an embodiment of the present application
Fig. 5 is a schematic structural diagram of a fractional modulation device according to an embodiment of the present application.
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the element defined by the phrase "comprising one … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element, and furthermore, elements having the same name in different embodiments of the present application may have the same meaning or may have different meanings, a particular meaning of which is to be determined by its interpretation in this particular embodiment or by further combining the context of this particular embodiment.
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In the following description, suffixes such as "module", "component", or "unit" for representing elements are used only for facilitating the description of the present application, and are not of specific significance per se. Thus, "module," "component," or "unit" may be used in combination.
In the description of the present application, it should be noted that the positional or positional relationship indicated by the terms such as "upper", "lower", "left", "right", "inner", "outer", etc. are based on the positional or positional relationship shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
The fractional divider is realized by a plurality of methods, but the basic principle is the same, namely, a method is adopted in a plurality of frequency dividing periods to make the number of the certain periods more or less than 1, namely, a method of pulse swallowing or pulse inserting is adopted, so that the fractional frequency dividing ratio is obtained in an average sense. Currently, the most common approach is to modulate the fractional portion of the fractional division ratio with a sigma delta modulator to achieve fractional division.
However, the modulation result obtained by the current decimal modulation method has larger instantaneous jump, so that the output clock signal has higher instantaneous jitter (jitter) and unstable frequency.
Based on this, the embodiment of the application provides a decimal modulating method, a decimal modulating device, a storage medium and electronic equipment. Specifically, the decimal modulating method of the embodiment of the application may be performed by a decimal frequency divider, where the decimal frequency divider is located in an electronic device, and the electronic device may be an electronic device such as a smart phone, a tablet computer, a notebook computer, a touch screen, a game console, a personal computer (PC, personal Computer), a personal digital assistant (Personal Digital Assistant, PDA), and the like. The electronic device can be connected with the server in a wired or wireless mode, the server can be an independent physical server, a server cluster or a distributed system formed by a plurality of physical servers, and a cloud server for providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDNs, basic cloud computing services such as big data and artificial intelligent platforms and the like.
The technical solutions shown in the present application will be described in detail below through specific examples. The following description of the embodiments is not intended to limit the priority of the embodiments.
Referring to fig. 1, fig. 1 is a flow chart of a decimal modulating method according to an embodiment of the present application. The specific flow of the decimal modulation method can be as follows:
101. the fractional part to be modulated is obtained.
It should be noted that there are many implementation methods of the fractional divider, but the basic principle is the same, that is, a method is adopted in a plurality of dividing periods to make a plurality of periods count more or less by 1 number, that is, a method of pulse swallowing or pulse inserting, so as to obtain the fractional dividing ratio in an average sense.
Wherein the fractional part to be modulated refers to the fractional part of the fractional division ratio. For example, when the fractional division ratio is 2.7, the fraction to be modulated is 0.7. For another example, when the fractional division ratio is 1.25, the fraction to be modulated is 0.25.
102. And multiplying the decimal part to obtain a processing result.
Specifically, the fractional part may be multiplied by a first preset multiple to obtain a processing result. In this embodiment of the present application, the first preset multiple is 2. For example, when the fraction is 0.6211 and the first preset multiple is 2, the processing result is 0.6211×2= 1.2422.
103. And modulating the processing result to obtain a primary modulation result.
Specifically, a sigma-delta modulator may be used to modulate the processing result, thereby obtaining a primary modulation result.
It should be noted that, the modulation process of the sigma-delta modulator on the processing result is a conventional technical means in the art, and will not be described in detail herein.
In some embodiments, the processing result may be modulated accordingly according to the size of the processing result, so as to obtain a primary modulation result.
It will be appreciated that since the fractional portion is multiplied in step 102, the result of the processing is greater than 1 or less than 1 in size. That is, the step of "modulating the processing result accordingly according to the size of the processing result, thereby obtaining the primary modulation result" may include:
judging whether the processing result is larger than 1;
and correspondingly modulating the processing result according to the judging result to obtain a primary modulation result.
The step of modulating the processing result according to the judging result to obtain a primary modulation result may specifically include:
when the processing result is smaller than 1, directly modulating the processing result to obtain a primary modulation result;
when the processing result is larger than 1, modulating the decimal part of the processing result to obtain a primary modulation result.
It will be appreciated that when the processing result is greater than 1, the processing result is divided into an integer part and a fractional part. Thus, the integer part of the processing result may be carried and then the fractional part of the processing result may be modulated, thereby obtaining a primary modulation result.
For example, when the fraction is 0.6211 and the first preset multiple is 2, the processing result is 0.6211×2= 1.2422, and the integer part 1 can be carried at this time, and then the primary modulation result can be obtained by modulating 0.2422. When the fraction is 0.3211 and the first preset multiple is 2, the processing result is 0.3211×2= 0.6422, and the primary modulation result is obtained by directly modulating 0.6422.
104. The fractional part is compared with a threshold value and a quantization strategy is determined according to the comparison result.
In the embodiment of the present application, the quantization policies include an odd quantization policy and an even quantization policy. In some embodiments, the step of comparing the fractional part with a threshold value and determining the quantization strategy according to the comparison result may specifically include:
when the fractional part is less than or equal to the threshold value, determining that the quantization strategy is an odd quantization strategy;
when the fractional portion is greater than the threshold, the quantization strategy is determined to be an even quantization strategy.
It should be noted that, in the embodiment of the present application, the threshold value is 0.5.
105. And carrying out corresponding subtraction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result.
It can be appreciated that the minimum number of changes in the quantization result is 2, since both even quantization and odd quantization are employed. Therefore, in the embodiment of the present application, the second preset multiple is the same as the first preset multiple, and is 2.
In some embodiments, when the quantization strategy is an odd number quantization strategy, the step of performing corresponding subtraction processing on the primary modulation result according to the quantization strategy to obtain the target modulation result may include:
and when the primary modulation result is divided by a second preset multiple, obtaining a target modulation result.
It will be appreciated that when the fraction to be modulated is less than 0.5, the processing result is also the fraction after multiplying the fraction to be modulated by 2. Therefore, the primary modulation result obtained by modulating the processing result is an even number. At this time, the primary modulation result may be divided by 2. Therefore, an odd quantization strategy can be adopted, and the primary modulation result is directly divided by the second preset multiple, so that the target modulation result is obtained.
In some embodiments, when the quantization strategy is an even number quantization strategy, the step of performing corresponding subtraction on the primary modulation result according to the quantization strategy to obtain the target modulation result may include:
when the quantization strategy is an even number quantization strategy, performing corresponding subtraction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result, including:
adding the primary modulation result with 1 to obtain a secondary modulation result;
dividing the secondary modulation result by a second preset multiple to obtain a target modulation result.
It will be appreciated that when the fraction to be modulated is greater than 0.5, the processing result is divided into carry integer 1 and fraction after multiplying the fraction to be modulated by 2. Therefore, the primary modulation result obtained by modulating the fractional part of the processing result is an odd number. At this time, the primary modulation result cannot be divided by 2. Therefore, even quantization may be used, and the primary modulation result may be added to 1 to obtain an even secondary modulation result, and then the secondary modulation result may be divided by a second preset multiple to obtain the target modulation result.
In order to facilitate understanding of the fractional modulation method provided in the embodiments of the present application, the following will be exemplified. For example, the fraction to be modulated is 0.6211, the first preset multiple and the second preset multiple are both 2, and the threshold is 0.5. At this time, the process of performing the fractional modulation on 0.6211 may specifically be as follows:
(1) the fraction portion 0.6211 to be modulated is multiplied by a first preset multiple 2 to obtain a processing result 1.2422.
(2) The fractional part 0.2422 of the processing result is modulated with a sigma delta modulator to obtain a primary modulation result as shown in fig. 2, i.e., -3, 3.
(3) Comparing the fractional part 0.6211 to be modulated with a threshold value of 0.5, thereby determining that the quantization strategy adopted at this time is an even quantization strategy;
(4) adding the primary modulation result shown in FIG. 2 to 1 to obtain a secondary modulation result, namely [ -3+1,3+1]; the secondary modulation result is then divided by a second preset multiple 2 to obtain the target modulation result as shown in fig. 3, i.e., [ -2/2,4/2]. That is, the target modulation result for 0.6211 in the embodiment of the present application is [ -1,2].
When 0.6211 is modulated directly using a sigma delta modulator, the modulation result shown in fig. 4, i.e., [ -2,4].
As can be seen from the above, when the sigma-delta modulator is directly used to modulate 0.6211, the instantaneous jump of the modulation result ranges from-2 to 4. When the decimal modulation method provided by the embodiment of the application is adopted to modulate 0.6211, the instantaneous jump range of the modulation result is-1 to 2, and the instantaneous jump range is reduced by half.
In summary, the decimal modulating method provided by the embodiment of the present application includes obtaining a decimal part to be modulated; multiplying the decimal part to obtain a processing result; modulating the processing result to obtain a primary modulation result; comparing the decimal part with a threshold value, and determining a quantization strategy according to a comparison result; and carrying out corresponding subtraction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result. The scheme can reduce the transient jump of the modulation result, so that the output clock signal has low transient jitter and stable frequency.
In order to better implement the fractional modulation method provided in the embodiments of the present application, the embodiments of the present application further provide a fractional modulation apparatus, where the meaning of a noun is the same as that in the fractional modulation method described above, and specific implementation details may refer to the description in the method embodiments.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a fractional modulation device according to an embodiment of the present application. The fractional modulation means may comprise an acquisition unit 201, a multiplication unit 202, a modulation unit 203, a comparison unit 204 and a subtraction unit 205. Wherein,
an acquisition unit 201 for acquiring a fractional part to be modulated;
a multiplication unit 202, configured to perform multiplication processing on the fractional part to obtain a processing result;
a modulating unit 203, configured to modulate the processing result to obtain a primary modulation result;
a comparing unit 204 for comparing the decimal part with a threshold value and determining a quantization strategy according to the comparison result;
and the subtraction unit 205 is configured to perform corresponding subtraction processing on the primary modulation result according to the quantization strategy, so as to obtain a target modulation result.
The specific embodiments of the above units can be referred to the above examples of the fractional modulation method, and will not be described herein.
In summary, the decimal modulating device provided in the embodiment of the present application may acquire the decimal part to be modulated through the acquiring unit 201; multiplying the decimal part by a multiplying unit 202 to obtain a processing result; modulating the processing result by the modulating unit 203 to obtain a primary modulation result; comparing the fractional part with a threshold value by a comparison unit 204 and determining a quantization strategy according to the comparison result; the primary modulation result is subjected to corresponding subtraction processing by the subtraction unit 205 according to the quantization strategy, and a target modulation result is obtained. The scheme can reduce the transient jump of the modulation result, so that the output clock signal has low transient jitter and stable frequency.
The embodiment of the present application further provides an electronic device, in which the decimal modulating apparatus of the embodiment of the present application may be integrated, as shown in fig. 6, which shows a schematic structural diagram of an electronic device 500 related to the embodiment of the present application, specifically:
the electronic device 500 may integrate the above-mentioned decimal modulating means and may further comprise Radio Frequency (RF) circuitry 501, a memory 502 comprising one or more computer readable storage media, an input unit 503, a display unit 504, a sensor 505, an audio circuit 506, a wireless fidelity (WiFi, wireless Fidelity) module 507, a processor 508 comprising one or more processing cores, and a power supply 509. Those skilled in the art will appreciate that the electronic device 500 structure shown in fig. 6 is not limiting of the electronic device 500 and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components. Wherein:
the RF circuit 501 may be configured to receive and send information or signals during a call, and in particular, after receiving downlink information of a base station, the downlink information is processed by one or more processors 508; in addition, data relating to uplink is transmitted to the base station. Typically, RF circuitry 501 includes, but is not limited to, an antenna, at least one amplifier, a tuner, one or more oscillators, a subscriber identity module (SIM, subscriber Identity Module) card, a transceiver, a coupler, a low noise amplifier (LNA, low Noise Amplifier), a duplexer, and the like. In addition, RF circuitry 501 may also communicate with networks and other devices via wireless communications. The wireless communication may use any communication standard or protocol including, but not limited to, global system for mobile communications (GSM, global System of Mobile communication), general packet radio service (GPRS, general Packet Radio Service), code division multiple access (CDMA, code Division Multiple Access), wideband code division multiple access (WCDMA, wideband Code Division Multiple Access), long term evolution (LTE, long Term Evolution), email, short message service (SMS, short Messaging Service), and the like.
The memory 502 may be used to store software programs and modules, and the processor 508 executes the software programs and modules stored in the memory 502 to perform various functional applications and information processing. The memory 502 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function (such as a sound playing function, a target data playing function, etc.), and the like; the storage data area may store data (such as audio signals, phonebooks, etc.) created according to the use of the electronic device 500, and the like. In addition, memory 502 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory 502 may also include a memory controller to provide access to the memory 502 by the processor 508 and the input unit 503.
The input unit 503 may be used to receive input numeric or character information and to generate keyboard, mouse, joystick, optical or trackball signal inputs related to user settings and function control. In particular, in one particular embodiment, the input unit 503 may include a touch-sensitive surface, as well as other input devices. The touch-sensitive surface, also referred to as a touch display screen or a touch pad, may collect touch operations thereon or thereabout by a user (e.g., operations thereon or thereabout by a user using any suitable object or accessory such as a finger, stylus, etc.), and actuate the corresponding connection means according to a predetermined program. Alternatively, the touch-sensitive surface may comprise two parts, a touch detection device and a touch controller. The touch detection device detects the touch azimuth of a user, detects a signal brought by touch operation and transmits the signal to the touch controller; the touch controller receives touch information from the touch detection device and converts it into touch point coordinates, which are then sent to the processor 508, and can receive commands from the processor 508 and execute them. In addition, touch sensitive surfaces may be implemented in a variety of types, such as resistive, capacitive, infrared, and surface acoustic waves. The input unit 503 may comprise other input devices besides a touch-sensitive surface. In particular, other input devices may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, mouse, joystick, etc.
The display unit 504 may be used to display information entered by a user or provided to a user as well as various graphical user interfaces of the electronic device 500, which may be composed of graphics, text, icons, video, and any combination thereof. The display unit 504 may include a display panel, which may be optionally configured in the form of a liquid crystal display (LCD, liquid Crystal Display), an Organic Light-Emitting Diode (OLED), or the like. Further, the touch-sensitive surface may overlay a display panel, and upon detection of a touch operation thereon or thereabout, the touch-sensitive surface is passed to the processor 508 to determine the type of touch event, and the processor 508 then provides a corresponding visual output on the display panel based on the type of touch event. Although in fig. 6 the touch sensitive surface and the display panel are implemented as two separate components for input and output functions, in some embodiments the touch sensitive surface may be integrated with the display panel to implement the input and output functions.
The electronic device 500 may also include at least one sensor 505, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor may include an ambient light sensor that may adjust the brightness of the display panel according to the brightness of ambient light, and a proximity sensor that may turn off the display panel and/or backlight when the electronic device 500 is moved to the ear. As one of the motion sensors, the gravity acceleration sensor can detect the acceleration in all directions (generally three axes), and can detect the gravity and the direction when the mobile phone is stationary, and can be used for applications of recognizing the gesture of the mobile phone (such as horizontal and vertical screen switching, related games, magnetometer gesture calibration), vibration recognition related functions (such as pedometer and knocking), and the like; other sensors such as gyroscopes, barometers, hygrometers, thermometers, infrared sensors, etc. that may also be configured with the electronic device 500 are not described in detail herein.
Audio circuitry 506, speakers, and a microphone may provide an audio interface between the user and the electronic device 500. The audio circuit 506 may transmit the received electrical signal converted from the audio signal to a speaker, where it is converted into a sample signal for output; on the other hand, the microphone converts the collected sample signal into an electrical signal, which is received by the audio circuit 506 and converted into an audio signal, which is processed by the audio signal output processor 508, and then sent via the RF circuit 501 to, for example, another electronic device 500, or the audio signal is output to the memory 502 for further processing. Audio circuitry 506 may also include an ear bud jack to provide communication of the peripheral ear bud with electronic device 500.
WiFi belongs to a short-distance wireless transmission technology, and the electronic equipment 500 can help a user to send and receive emails, browse webpages, access streaming media and the like through the WiFi module 507, so that wireless broadband Internet access is provided for the user. Although fig. 6 shows a WiFi module 507, it is understood that it does not belong to the necessary constitution of the electronic device 500, and may be omitted entirely as needed within a range that does not change the essence of the present application.
The processor 508 is a control center of the electronic device 500, connects various parts of the entire handset using various interfaces and lines, and performs various functions of the electronic device 500 and processes data by running or executing software programs and/or modules stored in the memory 502, and invoking data stored in the memory 502, thereby performing overall monitoring of the handset. Optionally, the processor 508 may include one or more processing cores; preferably, the processor 508 may integrate an application processor that primarily handles operating systems, user interfaces, applications, etc., with a modem processor that primarily handles wireless communications. It will be appreciated that the modem processor described above may not be integrated into the processor 508.
The electronic device 500 also includes a power supply 509 (e.g., a battery) for powering the various components, which may be logically connected to the processor 508 via a power management system that performs functions such as managing charge, discharge, and power consumption. The power supply 509 may also include one or more of any of a direct current or alternating current power supply, a recharging system, a power failure detection circuit, a power converter or inverter, a power data indicator, and the like.
Although not shown, the electronic device 500 may further include a camera, a bluetooth module, etc., which will not be described herein. In particular, in this embodiment, the processor 508 in the electronic device 500 loads executable files corresponding to the processes of one or more application programs into the memory 502 according to the following instructions, and the processor 508 executes the application programs stored in the memory 502, so as to implement various functions, such as:
acquiring a decimal part to be modulated;
multiplying the decimal part to obtain a processing result;
modulating the processing result to obtain a primary modulation result;
comparing the decimal part with a threshold value, and determining a quantization strategy according to a comparison result;
and carrying out corresponding subtraction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result.
In the foregoing embodiments, the descriptions of the embodiments are focused on, and the portions of an embodiment that are not described in detail in the foregoing embodiments may be referred to in the detailed description of the audio processing method, which is not repeated herein.
The electronic device 500 provided in the embodiment of the present application may obtain the fractional part to be modulated; multiplying the decimal part to obtain a processing result; modulating the processing result to obtain a primary modulation result; comparing the decimal part with a threshold value, and determining a quantization strategy according to a comparison result; and carrying out corresponding subtraction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result. The scheme can reduce the transient jump of the modulation result, so that the output clock signal has low transient jitter and stable frequency.
In the foregoing embodiments, the descriptions of the embodiments are focused on, and for those portions of an embodiment that are not described in detail, reference may be made to the foregoing detailed description of the fractional modulation method, which is not repeated herein.
It should be noted that, for the fractional modulation method in the embodiment of the present application, it will be understood by those skilled in the art that all or part of the flow of implementing the fractional modulation method in the embodiment of the present application may be implemented by controlling related hardware by a computer program, where the computer program may be stored in a computer readable storage medium, such as a memory of a terminal, and executed by at least one processor in the terminal, and the execution may include, for example, the flow of the embodiment of the fractional modulation method.
For the decimal modulating device of the embodiment of the application, each functional module may be integrated in one processing chip, or each module may exist separately and physically, or two or more modules may be integrated in one module. The integrated modules may be implemented in hardware or in software functional modules. The integrated modules may also be stored in a computer readable storage medium if implemented as software functional modules and sold or used as a stand-alone product.
To this end, embodiments of the present application provide a storage medium having stored therein a plurality of instructions capable of being loaded by a processor to perform steps in any of the fractional modulation methods provided by embodiments of the present application. The storage medium may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a random access Memory (RAM, random Access Memory), or the like.
The decimal modulating method, device, storage medium and electronic equipment provided by the application are respectively described in detail, and specific examples are applied to the description of the principle and implementation of the application, and the description of the above examples is only used for helping to understand the core ideas of the application; meanwhile, those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, and the present description should not be construed as limiting the present application in view of the above.

Claims (10)

1. A fractional modulation method, comprising:
acquiring a decimal part to be modulated;
multiplying the decimal part to obtain a processing result;
modulating the processing result to obtain a primary modulation result;
comparing the decimal part with a threshold value, and determining a quantization strategy according to a comparison result;
and carrying out corresponding reduction processing on the primary modulation result according to the quantization strategy to obtain a target modulation result.
2. The fractional modulation method of claim 1 wherein said determining a quantization strategy based on the comparison result comprises:
when the fractional portion is less than or equal to the threshold, determining that the quantization strategy is an odd quantization strategy;
when the fractional portion is greater than the threshold, the quantization strategy is determined to be an even quantization strategy.
3. The fractional modulation method of claim 2 wherein the threshold is 0.5.
4. The fractional modulation method of claim 1 wherein said multiplying said fractional portion to obtain a processed result comprises:
multiplying the decimal part by a first preset multiple to obtain a processing result.
5. The fractional modulation method of claim 4 wherein when the quantization strategy is the odd quantization strategy, the performing corresponding subtraction on the primary modulation result according to the quantization strategy to obtain a target modulation result comprises:
dividing the primary modulation result by a second preset multiple to obtain a target modulation result.
6. The fractional modulation method of claim 4 wherein when the quantization strategy is the even quantization strategy, the performing corresponding subtraction on the primary modulation result according to the quantization strategy to obtain a target modulation result comprises:
adding the primary modulation result with 1 to obtain a secondary modulation result;
dividing the secondary modulation result by a second preset multiple to obtain a target modulation result.
7. The fractional modulation method of claim 5 or 6 wherein the first preset multiple is the same as the second preset multiple.
8. A fractional modulation apparatus, comprising:
an acquisition unit configured to acquire a decimal part to be modulated;
the multiplication unit is used for carrying out multiplication processing on the decimal part to obtain a processing result;
the modulation unit is used for modulating the processing result to obtain a primary modulation result;
a comparison unit for comparing the decimal part with a threshold value and determining a quantization strategy according to the comparison result;
and the multiplying and subtracting unit is used for carrying out corresponding multiplying and subtracting processing on the primary modulation result according to the quantization strategy to obtain a target modulation result.
9. A storage medium storing a plurality of instructions adapted to be loaded by a processor to perform the fractional modulation method of any one of claims 1-7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the fractional modulation method of any one of claims 1-7 when the computer program is executed by the processor.
CN202310813744.4A 2023-07-04 2023-07-04 Decimal modulation method and device, storage medium and electronic equipment Pending CN117335808A (en)

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CN202310813744.4A CN117335808A (en) 2023-07-04 2023-07-04 Decimal modulation method and device, storage medium and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310813744.4A CN117335808A (en) 2023-07-04 2023-07-04 Decimal modulation method and device, storage medium and electronic equipment

Publications (1)

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CN117335808A true CN117335808A (en) 2024-01-02

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