CN117331498A - Method, device, equipment and medium for constructing mapping table of solid state disk - Google Patents
Method, device, equipment and medium for constructing mapping table of solid state disk Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
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- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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Abstract
The application discloses a method, a device, equipment and a medium for constructing a mapping table of a solid state disk, which relate to the technical field of computers and comprise the following steps: writing the data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes; adding a first physical address into a preset physical address space of a logic address of data to be written on a mapping table; the first physical address is the physical address of a continuous memory with the target size for writing the data to be written; writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer; replacing the first physical address with a second physical address; the second physical address is the physical address of a continuous flash memory with a target size in the solid state disk written with the data to be written; and the target integer number of the logical addresses with the preset granularity corresponds to a physical address with the target size. The method and the device can reduce the memory occupation space of the mapping table of the solid state disk.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method, an apparatus, a device, and a medium for constructing a mapping table of a solid state disk.
Background
Currently, a mapping table of a Solid State Disk (SSD) generally adopts 4K (Kilobyte) or 512 byte granularity to store a mapping relationship between a logical address (LBA, logical Block Address) and a physical address (PBA, physics Block Address), and the size of each physical address is continuously increased along with the increase of the capacity of the Solid State Disk; for example, when 8T (tera ) discs are used, a physical address of 32 bytes is enough to identify all flash memory locations, but when 16T or 32T discs are used, the physical address needs more bytes to identify the flash memory locations, further, a change in the size of 1 physical address may cause a change in the memory of the solid state disk occupied by the whole mapping table, for example, the size of each physical address is increased by one byte, under a mapping relationship of 4k granularity, the memory occupied by the whole mapping table may be increased by approximately 3.9GB (Gigabyte), and the increased memory will greatly increase the production cost of the solid state disk.
In summary, how to reduce the memory space of the mapping table of the solid state disk is a current problem to be solved.
Disclosure of Invention
In view of the above, the present invention aims to provide a method, a device, and a medium for constructing a mapping table of a solid state disk, which can reduce the memory space of the mapping table of the solid state disk, and the specific scheme is as follows:
in a first aspect, the application discloses a method for constructing a mapping table of a solid state disk, including:
acquiring a write command sent by a client, and writing data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes;
adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address;
writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer;
replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size.
Optionally, the method for constructing the mapping table of the solid state disk further includes:
setting an address sequence number for a logical address corresponding to the data with the preset granularity in the data to be written so as to carry out address sequencing; the address sequence numbers are sequentially set from small to large and are not repeated; the data of the adjacent address sequence numbers with the target size are sequentially stored in the same second physical address in the sequence from the small address sequence number to the large address sequence number;
correspondingly, after replacing the first physical address with the second physical address, the method further includes:
acquiring a read command sent by the client, determining a logic address of the data to be read with the preset granularity based on the read command, and determining the address sequence number of the logic address of the data to be read;
determining a third physical address for storing the data to be selected according to the logical address of the data to be read based on the mapping table; the data to be selected is a group of continuous data with the target size, wherein the group of continuous data comprises the data to be read;
solving the remainder of the target integer according to the address sequence number to obtain a target remainder;
sequentially and averagely dividing the third physical address into target integer addresses based on the target integers;
And determining a fourth physical address of the data to be read based on the target remainder and the target integer address based on the sequence of physical addresses, so as to read the data to be read from the fourth physical address.
Optionally, the method for constructing the mapping table of the solid state disk further includes:
setting the address identification of the corresponding preset physical address space according to the current physical address corresponding to the stored data in the target data; the target data is a group of data of the target size including the data to be written; unknown data is allowed to exist in the target data.
Optionally, the setting the address identifier of the corresponding preset physical address space according to the current physical address corresponding to the stored data in the target data includes:
if the stored data does not exist in the target data, setting the address identification of the preset physical address space as an unrecorded identification;
if the stored data in the target data are stored in the continuous flash memory with the current target size, setting the address identification of the preset physical address space as a flash memory identification;
and if the stored data in the target data are stored in the continuous memory with the current target size, setting the address identification of the preset physical address space as a memory identification.
Optionally, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
if the address mark of the preset physical address space is the non-stored mark, resetting the continuous memory of the target size, and writing the data to be written corresponding to the write command into the continuous memory of the target size; the data to be written is data smaller than the target size.
Optionally, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
if the address identifier of the preset physical address space is the flash memory identifier or the memory identifier, writing the data to be written corresponding to the write command and the stored data in the current continuous memory of the target size or the current continuous flash memory of the target size into the new continuous memory of the target size; the new data composed of the data to be written and the stored data is data not larger than the target size;
correspondingly, adding a first physical address to a preset physical address space corresponding to the logical address of the data to be written in the mapping table includes:
Adding a first physical address into a preset physical address space corresponding to the logical addresses of the data to be written and the stored data on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written and the stored data;
correspondingly, the writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer comprises the following steps:
and writing the new data in the new continuous memory with the target size into the new continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer.
Optionally, if the stored data in the target data is stored in the continuous memory with the current target size, setting the address identifier of the preset physical address space as a memory identifier, including:
if the stored data in the target data are stored in the continuous memory with the current target size and are not ready for flash writing, setting the address identifier of the preset physical address space as a first memory identifier;
if the stored data in the target data are stored in the continuous memory with the current target size and flash memory writing is ready, setting the address identifier of the preset physical address space as a second memory identifier;
Correspondingly, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
if the address identifier of the preset physical address space is the first memory identifier, directly writing the data to be written and the stored data corresponding to the write command into a continuous memory with the current target size;
if the address identifier of the preset physical address space is the second memory identifier, directly writing the data to be written and the stored data corresponding to the write command into the continuous memory with the current target size;
correspondingly, adding a first physical address to a preset physical address space corresponding to the logical address of the data to be written in the mapping table includes:
adding a first physical address into a preset physical address space corresponding to the logical addresses of the data to be written and the stored data on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written and the stored data;
correspondingly, the writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer comprises the following steps:
And writing the data to be written and the stored data in the new continuous memory with the target size or the current continuous memory with the target size into the continuous flash memory with the target size in the solid state disk through a flash memory conversion layer.
Optionally, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
if the write operation corresponding to the write command is aligned write of the data to be written aiming at the target size, the data to be written corresponding to the write command is directly written into the continuous memory with the target size;
correspondingly, the writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer comprises the following steps:
and directly writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer.
In a second aspect, the present application discloses a solid state disk mapping table construction device, including:
the first data writing module is used for acquiring a writing command sent by the client and writing data to be written corresponding to the writing command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes;
The address adding module is used for adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on the mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address;
the second data writing module is used for writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer;
an address modification module for replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size.
In a third aspect, the present application discloses an electronic device comprising:
a memory for storing a computer program;
and the processor is used for executing the computer program to realize the method for constructing the solid state disk mapping table.
In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; the method for constructing the solid state disk mapping table is realized when the computer program is executed by a processor.
As can be seen, the application acquires a write command sent by a client, and writes data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes; adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address; writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer; replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size. Therefore, in the existing method, a logical address with a preset granularity corresponds to a physical address with the preset granularity, the target size is an integer number of the preset granularity, and the logical address with the target size corresponds to a physical address with the target size, and when the logical address is stored in the mapping table, compared with the existing method, the storage logarithm of the needed logical address and the physical address is reduced under the condition that the data sizes are the same, and therefore the memory occupation space of the mapping table of the solid state disk can be reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for constructing a mapping table of a solid state disk disclosed in the present application;
FIG. 2 is a flowchart of a method for constructing a mapping table of a solid state disk disclosed in the present application;
fig. 3 is a schematic structural diagram of a mapping table construction device for a solid state disk disclosed in the present application;
fig. 4 is a block diagram of an electronic device disclosed in the present application.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
At present, a mapping table of the solid state disk generally adopts 4K or 512 byte granularity to store a mapping relation between a logical address and a physical address, and the size of each physical address is continuously increased along with the increase of the capacity of the solid state disk; for example, when 8T discs are used, a physical address of 32 bytes is enough to identify all flash memory locations, but when 16T discs or 32T discs are used, the physical address needs more bytes to identify the flash memory locations, further, a change in the size of 1 physical address can cause a change in the memory of the solid state disk occupied by the whole mapping table, for example, the size of each physical address is increased by one byte, under a mapping relationship of 4k granularity, the memory occupied by the whole mapping table can be increased by about 3.9GB, and the increased memory can greatly increase the production cost of the solid state disk.
Therefore, the embodiment of the application provides a solid state disk mapping table construction scheme, which can reduce the memory occupation space of the mapping table of the solid state disk.
The embodiment of the application discloses a method for constructing a mapping table of a solid state disk, which is shown in fig. 1 and comprises the following steps:
step S11: acquiring a write command sent by a client, and writing data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes.
In this embodiment, the preset granularity is the granularity of a logical address when data is stored, and the NVMe (NVM Express, logic device interface specification) 2.0 protocol specifies that the preset granularity is generally 512 bytes or 4K granularity after the solid state disk is formatted.
In one embodiment, taking the target size as 16K as an example, the target integer is 4 if the preset granularity size is 4K, and the target integer is 32 if the preset granularity size is 512 bytes.
In this embodiment, an address identifier of the corresponding preset physical address space is set according to a current physical address corresponding to the stored data in the target data, so as to determine a storage position of the stored data; the target data is a group of data of the target size including the data to be written; unknown data is allowed to exist in the target data.
In a specific embodiment, if the preset granularity is 4K, the target data includes 4 pieces of 4K data, the 4 pieces of 4K data form a set of data with the target size, and if the preset granularity is 512 bytes, the target data includes 32 pieces of 512 bytes of data, and the 32 pieces of 512 bytes of data form a set of data with the target size.
It should be noted that if the stored data does not exist or only has 4K or other small amount less than the target size, the data to be written is 4K, the target data includes 8K unknown data, is empty, and is written after waiting.
In this embodiment, the address identifiers of the preset physical address space include three states, which respectively indicate that data is not written, that data is in the flash memory, that data is written in the memory but not in the flash memory, and are sequentially represented by pab=0, pab=nand, and pab=cache; wherein the CACHE is a CACHE memory.
In this embodiment, the process of writing the data to be written corresponding to the write command into the continuous memory with the target size includes aligned writing and unaligned writing, where aligned writing means writing the data to be written with the target size sequentially, and unaligned writing means writing the data to be written with the target size sequentially.
In this embodiment, when the writing is aligned writing, the writing the data to be written corresponding to the writing command into the continuous memory with the target size includes: and if the write operation corresponding to the write command is aligned write of the data to be written aiming at the target size, directly writing the data to be written corresponding to the write command into the idle continuous memory with the target size.
In this embodiment, when writing is not aligned, the data to be written needs to be stored in consideration of the storage location of the stored data, that is, in consideration of the address identifier.
It should be noted that the setting, according to the current physical address corresponding to the stored data in the target data, the address identifier of the corresponding preset physical address space includes: if the stored data does not exist in the target data, setting an address identifier of the preset physical address space to be an unrecorded identifier (pab=0); if the stored data in the target data is stored in the continuous flash memory with the current target size, setting the address identifier of the preset physical address space to be a flash memory identifier (pab=nand); and if the stored data in the target data are stored in the continuous memory with the current target size, setting the address identifier of the preset physical address space as a memory identifier (pab=cache).
In this embodiment, the overall storage process of the data to be written is different for the three different states, if the data to be written is not stored with the identifier, the data can be directly stored in the memory and the flash memory in sequence, if the data is stored with the identifier of the flash memory or the identifier of the memory, the data in the flash memory or the memory needs to be taken out and put into a new memory again, and then stored into the flash memory.
In this embodiment, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes: if the address mark of the preset physical address space is the non-stored mark, resetting the continuous memory of the target size, and writing the data to be written corresponding to the write command into the continuous memory of the target size; the data to be written is data smaller than the target size. It should be noted that, the step of clearing the continuous memory of the target size is mainly to clear dirty data in the memory.
In this embodiment, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes: if the address identifier of the preset physical address space is the flash memory identifier or the memory identifier, writing the data to be written corresponding to the write command and the stored data in the current continuous memory of the target size or the current continuous flash memory of the target size into the new continuous memory of the target size; the new data composed of the data to be written and the stored data is data not larger than the target size. It should be noted that, in the continuous memory written to the new target size, the continuous memory of the new target size may also be cleared.
In this embodiment, when the stored data is stored in the memory, the data to be written may be stored in different ways under different conditions in the memory; specifically, if the stored data in the target data is stored in the continuous memory with the current target size, setting the address identifier of the preset physical address space as a memory identifier, including: if the stored data in the target data are stored in the continuous memory with the current target size and are not ready for flash writing, setting the address identifier of the preset physical address space as a first memory identifier; and if the stored data in the target data are stored in the continuous memory with the current target size and flash memory writing is ready to be performed, setting the address identifier of the preset physical address space as a second memory identifier.
In this embodiment, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes: if the address identifier of the preset physical address space is the first memory identifier, directly writing the data to be written and the stored data corresponding to the write command into a continuous memory with the current target size; if the address identifier of the preset physical address space is the second memory identifier, the data to be written and the stored data corresponding to the write command are directly written into the continuous memory with the current target size.
Step S12: adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address.
In this embodiment, the logical address of the target size corresponds to the physical address of the target size.
In this embodiment, if the write is aligned, a first physical address is directly added to a preset physical address space corresponding to the logical address of the data to be written on the mapping table.
In this embodiment, if the address identifier of the preset physical address space is the non-stored identifier, a first physical address is directly added to a preset physical address space corresponding to the logical address of the data to be written on the mapping table.
In this embodiment, if the address identifier of the preset physical address space is the flash memory identifier or the memory identifier, adding a first physical address to the preset physical address space corresponding to the logical address of the data to be written in the mapping table includes: adding a first physical address into a preset physical address space corresponding to the logical addresses of the data to be written and the stored data on a mapping table; the first physical address is a physical address of a continuous memory of the target size to which the data to be written and the stored data are written.
In this embodiment, if the address identifier of the preset physical address space is the first memory identifier or the second memory identifier, adding the first physical address to the preset physical address space corresponding to the logical address of the data to be written on the mapping table includes: adding a first physical address into a preset physical address space corresponding to the logical addresses of the data to be written and the stored data on a mapping table; the first physical address is a physical address of a continuous memory of the target size to which the data to be written and the stored data are written.
Step S13: and writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer.
In this embodiment, if the writing is aligned writing, the data to be written in the continuous memory with the target size is directly written into the free continuous flash memory with the current target size in the solid-state disk through the flash memory conversion layer.
In this embodiment, if the address identifier of the preset physical address space is the non-stored identifier, the data to be written in the continuous memory with the target size is directly written into the free continuous flash memory with the current target size in the solid-state disk through the flash memory conversion layer.
In this embodiment, if the address identifier of the preset physical address space is the flash memory identifier or the memory identifier, the writing, by the flash memory conversion layer, the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid state disk includes: and writing the new data in the new continuous memory with the target size into the new continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer.
In this embodiment, if the address identifier of the preset physical address space is the first memory identifier or the second memory identifier, writing, by the flash memory conversion layer, the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid state disk includes: and writing the data to be written and the stored data in the new continuous memory with the target size or the current continuous memory with the target size into the continuous flash memory with the target size in the solid state disk through a flash memory conversion layer.
Step S14: replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size.
In this embodiment, the states of the 0, NAND and CACHE are processed concurrently by different cores, and the synchronization problem of the marked states between different cores is guaranteed by locking.
In one particular embodiment, the host writes: after the flash translation layer (FTL, flash Translation Layer) receives the write command issued by the host, locking is performed at 16K granularity. Three scenarios need to be handled.
First, for 16k aligned writing, every 16k data can be moved to a continuous 16k memory, and then the 16k memory is controlled by FTL to be written to the same flash page, and after writing, one pba=nand is updated. The flash memory writing and the memory writing are completed by different cores, corresponding operations can be carried out when the locks are contended among the different cores, and corresponding address identifiers are modified after the corresponding operations are completed by the different cores. It should be noted that the page represents a continuous flash memory of the target size.
Second, for 16k unaligned writing, if no data (pba=0) has been written before the corresponding 16k position, the 16k continuous memory is cleared to zero 0, then the unaligned 16k data of the secondary write is moved to the cleared memory, and finally the unaligned 16k data is written to the memory (pba=cache is changed). Such as: to write 8K data to two 4K positions, a 16K memory is applied first, after clearing, the 8K data is moved to a position corresponding to the memory, and finally flash memory writing is started, and the mapping relation in the mapping table is updated (pba=nand is changed). The flash memory writing and the memory writing are completed by different cores, corresponding operations can be carried out when the locks are contended among the different cores, and corresponding address identifiers are modified after the corresponding operations are completed by the different cores.
Third, for 16k unaligned writing, if data has already been written in other positions of the corresponding 16k (pba=old CACHE/pba=old NAND), the previously written data needs to be read first, then spliced into 1 new 16k data, and then written down to a flash page (pba=new NAND), and the data in the old NAND position needs to be marked as invalid, waiting for subsequent garbage collection. Such as: to write data to the position of lba=0, but the position of lba=1 has already been written, then the 16k data including lba=1 is read according to the mapping table to the applied 16k memory, and then the 16k data including lba=0 is spliced into a complete 16k (i.e. the 4k data at the position of lba=0 is covered with the new data of this time), and finally the flash memory write operation is started. The flash memory writing and the memory writing are completed by different cores, corresponding operations can be carried out when the locks are contended among the different cores, and corresponding address identifiers are modified after the corresponding operations are completed by the different cores.
Fourth, for 16k unaligned writes, if sequential writes are performed, it may be considered to stitch 16k data with sequential write data issued by the host without initiating a CACHE read or NAND read. For example: taking 4k as an example, the host sequentially issues write operations of lba=0, lba=1, lba=2, and lba=3, respectively. The steps of the scene are as follows: 1. firstly locking, processing LBA=0, cleaning the 16k memory, moving 4k data into the memory, modifying PBA=CACHE1, and unlocking. After receiving the message of pba=cache 1, the other concurrent core also locks, modifies pba=cache 2, unlocks, and initiates flash memory writing; 2. processing lba=1, firstly locking, if pba=cache 1 is found, directly moving the current 4k data to the corresponding position of the CACHE without applying for a memory, if pba=cache 2 is found, applying for 16k memory as in the third operation, copying the data of the CACHE2 to the newly applied memory, and waiting for a new flash memory write operation to be initiated in the round; 3. processing lba=2/3 is similar to lba=1, and if pba=cache 1, the present 4k data may be moved to the corresponding position of the CACHE without applying a memory. If pba=cache 2 is found, then the 16k memory is applied as in the third operation above, and the data from CACHE2 is copied to the newly applied memory, in preparation for the round of initiating a new flash write operation.
It should be noted that pba=cache 1 corresponds to the first memory identifier, and pba=cache 2 corresponds to the second memory identifier.
It should be noted that the host writes as: if the host wants to write user data into the solid state disk, the host needs to tell the solid state disk what data to write, how much data to write, and where the data source is in the host memory, and these information are contained in the write command sent by the host to the solid state disk. Each piece of user data corresponds to one LBA, and the write command tells the solid state disk what data is written by specifying the LBA. For NVMe/PCIe (PCIe, peripheral component interconnect express, a high-speed serial computer expansion bus standard), after receiving a write command, the solid state disk reads data from a location where memory data of the host is located through PCIe, and then writes the data into a physical address (flash memory or internal memory), and simultaneously generates a mapping relationship between an LBA and the physical address and stores the mapping relationship in a mapping table.
In summary, when the mapping table adopts the 16k_mapping mode, the write operation of the solid state disk ensures that every 16k aligned 4k is written to the same page, the size of one page is usually 16k, and the minimum granularity of the overlay is also 16k. Each 4k read operation of the SSD; and the 512 format is similar, and the writing operation of the solid state disk ensures that every 16k of 32 aligned 512 bytes are written on the same page. It should be noted that using 16K-mapping to preserve the mapping of the relationship between LBAs and flash memory (i.e., one PBA can determine 16K of NAND data) would save 75% of the memory cost compared to 4K-mapping.
As can be seen, the application acquires a write command sent by a client, and writes data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes; adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address; writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer; replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size. Therefore, in the existing method, a logical address with a preset granularity corresponds to a physical address with the preset granularity, the target size is an integer number of the preset granularity, and the logical address with the target size corresponds to a physical address with the target size, and when the logical address is stored in the mapping table, compared with the existing method, the storage logarithm of the needed logical address and the physical address is reduced under the condition that the data sizes are the same, and therefore the memory occupation space of the mapping table of the solid state disk can be reduced.
The embodiment of the application discloses a specific solid state disk mapping table construction method, and compared with the previous embodiment, the technical scheme is further described and optimized. Referring to fig. 2, the method specifically includes:
step S21: and acquiring a read command sent by the client, determining a logic address of the data to be read with the preset granularity based on the read command, and determining the address sequence number of the logic address of the data to be read.
In this embodiment, the method further includes: setting an address sequence number for a logical address corresponding to the data with the preset granularity in the data to be written so as to carry out address sequencing; the address sequence numbers are sequentially set from small to large and are not repeated; and the data of the adjacent address sequence numbers with the target size are sequentially stored in the same second physical address in the sequence from the small address sequence number to the large address sequence number. It should be noted that the starting sequence number of the address ordering generally starts from 0 or starts from 1, and others are possible.
It should be noted that, for example, a granularity of 4k, a non-16 k alignment represents that the data size of a write or read is less than 16k, or that the starting start LBA pair 16 is not divisible, or that the ending end LBA pair 16 is not divisible. 16k alignment represents that both the start start_LBA and end_LBA are integer divided by 16; for example, lba=0/1/2/3 corresponds to the same PBA0, lba=2/3/4/5 is not 16k aligned, corresponds to PBA0 and PBA1.
In a specific embodiment, the data of the adjacent address sequence numbers with the target size are sequentially stored in the same second physical address in the order from the smaller address sequence number to the larger address sequence number, that is, lba=0/1/2/3 is a set of data with the target size, and so on 4/5/6/7, 8/9/10/11, and so on are a set of data with the target size respectively. Lba=0/1/2/3 corresponds to PBA0, lba=4/5/6/7 corresponds to PBA1, and so on.
In a specific embodiment, taking 4k as an example, if a logical address of the data to be read with the preset granularity to be read is determined based on the read command, and the address sequence number of the logical address of the data to be read is determined, where the address sequence number of the logical address is 7 in lba=4/5/6/7.
Step S22: determining a third physical address for storing the data to be selected according to the logical address of the data to be read based on the mapping table; the data to be selected is a set of consecutive data of the target size including the data to be read.
In this embodiment, the third physical address is the continuous memory of the target size or the continuous flash memory of the target size, that is, the physical address corresponding to lba=4/5/6/7 in the mapping table.
In a specific embodiment, taking 4k as an example, a physical address corresponding to a logical address is stored in the mapping table, so that a third physical address storing the data to be selected can be determined according to the logical address of the data to be read based on the mapping table.
Step S23: solving the remainder of the target integer according to the address sequence number to obtain a target remainder; and sequentially and averagely dividing the third physical address into target integer addresses based on the target integers.
In a specific embodiment, taking 4k as an example, the target integer is 4, the address sequence number is 7, and the target integer is calculated according to the address sequence number to obtain a target remainder, that is, 7 is divided by 4 to obtain 1 more than 3; and the third physical address stores the target integer number of data with the preset granularity, and is sequentially and averagely divided into target integer parts, namely sequentially determining addresses corresponding to lba=4, lba=5, lba=6 and lba=7 respectively.
Step S24: and determining a fourth physical address of the data to be read based on the target remainder and the target integer address based on the sequence of physical addresses, so as to read the data to be read from the fourth physical address.
In this embodiment, the determining, based on the target remainder and the fourth physical address of the data to be read from the target integer address includes: and determining a fourth physical address of the data to be read according to the initial sequence numbers of all the address sequence numbers and based on the target remainder and the target integer address. Specifically, taking the physical address of the first target numerical value in the target integer address as the fourth physical address of the data to be read; when the initial sequence number is 0, the target value is the target remainder plus 1, when the initial sequence number is 1, the target value is the target remainder, when the initial sequence number is 2, the target value is the target remainder minus 1, and so on.
In a specific embodiment, taking 4k as an example, the target integer is 4, the address sequence number is 7, and the calculated result is 7 divided by 4 to obtain 1 more than 3; if the address sequence number starts with 0, the fourth physical address is the 3+1=4 addresses in lba=4/5/6/7; if the address number starts with 1, the fourth physical address is the 3 rd address in lba=5/6/7/8.
For 512 bytes, the target integer is 32, and the other contents are similar to the description of the example of 4k, and will not be described in detail here.
In one embodiment, the host reads: for a host read command received by the FTL, the read data positions are three, firstly, in a solid state disk memory, the data are directly carried to the host from the CACHE; secondly, in the flash memory, a NAND read request needs to be initiated, and the maximum concurrency number of reading is 16k bytes at most at a time; third, if the read location is not writing data or is formatted, the FTL returns 0 to the host.
The processing mode of the 4k host computer reading is specifically as follows: firstly, according to the LBA mapping table, if the searched PBA value shows that the data is written into the flash memory, the position of the 16k data in the flash memory is found. Determining the position of the data to be read in the 16K flash memory according to the value obtained by the residual of the LBA to the 4; secondly, if the PBA display data is not written into the flash memory and is still in the memory, the accurate position of the 4k data in the memory is found out from the 16k memory according to the residual calculation of the LBA to the 4; thirdly, if the PBA displays that the position is not written with data, the blank is directly returned.
The processing mode of the 512 byte host read is specifically as follows: firstly, according to the LBA mapping table, if the searched PBA value shows that the data is written into the flash memory, the position of the 16k data in the flash memory is found. According to the value obtained by the remainder of the LBA pair 32, determining the offset of the data to be read at the position of the 16K flash memory, and determining the accurate position of the corresponding 512-byte data; secondly, if the PBA display data is not written into the flash memory and is still in the memory, the accurate position of 512 bytes of data in the memory is found out from the 16k memory according to the residual calculation of the LBA pair 32; thirdly, if the PBA displays that the position is not written with data, the blank is directly returned.
It should be noted that the host reads: if the host wants to read the user data on the solid state disk, the host needs to tell the solid state disk what data is needed, how much data is needed, and where the data is needed to be placed in the memory of the host, and the information is contained in a read command sent by the host to the solid state disk. And searching a mapping table (generated during writing) according to the LBA by the solid state disk, finding the physical position of corresponding data, and then reading to obtain the data. After the data is read, for NVMe/PCIe, the solid state disk writes the data into the memory specified by the host through PCIe. This completes the read access of the host to the SSD.
As can be seen, the present application obtains a read command sent by the client, determines a logical address of the data to be read with the preset granularity based on the read command, and determines the address sequence number of the logical address of the data to be read; determining a third physical address for storing the data to be selected according to the logical address of the data to be read based on the mapping table; the data to be selected is a group of continuous data with the target size, wherein the group of continuous data comprises the data to be read; solving the remainder of the target integer according to the address sequence number to obtain a target remainder; sequentially and averagely dividing the third physical address into target integer addresses based on the target integers; and determining a fourth physical address of the data to be read based on the target remainder and the target integer address based on the sequence of physical addresses, so as to read the data to be read from the fourth physical address. According to the method and the device, the data can be read based on the address sequence numbers, and the data can be read rapidly and conveniently.
Correspondingly, the embodiment of the application also discloses a device for constructing the mapping table of the solid state disk, which is shown in fig. 3, and comprises the following steps:
the first data writing module 11 is configured to obtain a write command sent by a client, and write data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes;
the address adding module 12 is configured to add a first physical address to a preset physical address space corresponding to the logical address of the data to be written on the mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address;
the second data writing module 13 is configured to write the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer;
an address modification module 14 for replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size.
The more specific working process of each module may be the same as that disclosed in the foregoing embodiment, and will not be described herein.
As can be seen, the application acquires a write command sent by a client, and writes data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes; adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address; writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer; replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size. Therefore, in the existing method, a logical address with a preset granularity corresponds to a physical address with the preset granularity, the target size is an integer number of the preset granularity, and the logical address with the target size corresponds to a physical address with the target size, and when the logical address is stored in the mapping table, compared with the existing method, the storage logarithm of the needed logical address and the physical address is reduced under the condition that the data sizes are the same, and therefore the memory occupation space of the mapping table of the solid state disk can be reduced.
Further, the embodiment of the application also provides electronic equipment. Fig. 4 is a block diagram of an electronic device 20, according to an exemplary embodiment, and the contents of the diagram should not be construed as limiting the scope of use of the present application in any way.
Fig. 4 is a schematic structural diagram of an electronic device 20 according to an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a display screen 23, an input output interface 24, a communication interface 25, a power supply 26, and a communication bus 27. The memory 22 is configured to store a computer program, where the computer program is loaded and executed by the processor 21 to implement relevant steps in the method for constructing a mapping table of a solid state disk disclosed in any of the foregoing embodiments. In addition, the electronic device 20 in the present embodiment may be specifically an electronic computer.
In this embodiment, the power supply 26 is used to provide an operating voltage for each hardware device on the electronic device 20; the communication interface 25 can create a data transmission channel between the electronic device 20 and an external device, and the communication protocol to be followed is any communication protocol applicable to the technical solution of the present application, which is not specifically limited herein; the input/output interface 24 is used for obtaining external input data or outputting external output data, and the specific interface type thereof may be selected according to the specific application needs, which is not limited herein.
The memory 22 may be a read-only memory, a random access memory, a magnetic disk, an optical disk, or the like, and the resources stored thereon may include the computer program 221, which may be stored in a temporary or permanent manner. The computer program 221 may further include a computer program for performing other specific tasks in addition to the computer program for performing the method for constructing a solid state disk mapping table performed by the electronic device 20 disclosed in any of the foregoing embodiments.
Further, the embodiment of the application also discloses a computer readable storage medium for storing a computer program; the method for constructing the solid state disk mapping table is realized when the computer program is executed by a processor.
The specific steps of the method may be referred to as corresponding matters disclosed in the foregoing embodiments, and will not be described herein.
In this application, each embodiment is described in a progressive manner, and each embodiment focuses on the difference from other embodiments, and the same or similar parts between the embodiments refer to the devices disclosed in the embodiments, so that the description is relatively simple because it corresponds to the method disclosed in the embodiments, and the relevant parts refer to the description of the method section.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above describes in detail a method, a device, equipment and a storage medium for constructing a mapping table of a solid state disk, and specific examples are applied to describe the principles and embodiments of the present application, and the description of the above examples is only used to help understand the method and core ideas of the present application; meanwhile, as those skilled in the art will have modifications in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.
Claims (11)
1. The method for constructing the mapping table of the solid state disk is characterized by comprising the following steps of:
acquiring a write command sent by a client, and writing data to be written corresponding to the write command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes;
adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address;
Writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer;
replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size.
2. The method for constructing a mapping table of a solid state disk according to claim 1, further comprising:
setting an address sequence number for a logical address corresponding to the data with the preset granularity in the data to be written so as to carry out address sequencing; the address sequence numbers are sequentially set from small to large and are not repeated; the data of the adjacent address sequence numbers with the target size are sequentially stored in the same second physical address in the sequence from the small address sequence number to the large address sequence number;
correspondingly, after replacing the first physical address with the second physical address, the method further includes:
acquiring a read command sent by the client, determining a logic address of the data to be read with the preset granularity based on the read command, and determining the address sequence number of the logic address of the data to be read;
Determining a third physical address for storing the data to be selected according to the logical address of the data to be read based on the mapping table; the data to be selected is a group of continuous data with the target size, wherein the group of continuous data comprises the data to be read;
solving the remainder of the target integer according to the address sequence number to obtain a target remainder;
sequentially and averagely dividing the third physical address into target integer addresses based on the target integers;
and determining a fourth physical address of the data to be read based on the target remainder and the target integer address based on the sequence of physical addresses, so as to read the data to be read from the fourth physical address.
3. The method for constructing a mapping table of a solid state disk according to claim 1, further comprising:
setting the address identification of the corresponding preset physical address space according to the current physical address corresponding to the stored data in the target data; the target data is a group of data of the target size including the data to be written; unknown data is allowed to exist in the target data.
4. The method for constructing a mapping table of a solid state disk according to claim 3, wherein the setting the address identifier of the corresponding preset physical address space according to the current physical address corresponding to the stored data in the target data includes:
If the stored data does not exist in the target data, setting the address identification of the preset physical address space as an unrecorded identification;
if the stored data in the target data are stored in the continuous flash memory with the current target size, setting the address identification of the preset physical address space as a flash memory identification;
and if the stored data in the target data are stored in the continuous memory with the current target size, setting the address identification of the preset physical address space as a memory identification.
5. The method for constructing a mapping table of a solid state disk according to claim 4, wherein writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
if the address mark of the preset physical address space is the non-stored mark, resetting the continuous memory with the target size, and writing the data to be written corresponding to the write command into the continuous memory with the target size; the data to be written is data smaller than the target size.
6. The method for constructing a mapping table of a solid state disk according to claim 4, wherein writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
If the address identifier of the preset physical address space is the flash memory identifier or the memory identifier, writing the data to be written corresponding to the write command and the stored data in the current continuous memory of the target size or the current continuous flash memory of the target size into the new continuous memory of the target size; the new data composed of the data to be written and the stored data is data not larger than the target size;
correspondingly, adding a first physical address to a preset physical address space corresponding to the logical address of the data to be written in the mapping table includes:
adding a first physical address into a preset physical address space corresponding to the logical addresses of the data to be written and the stored data on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written and the stored data;
correspondingly, the writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer comprises the following steps:
and writing the new data in the new continuous memory with the target size into the new continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer.
7. The method of claim 4, wherein setting the address identifier of the preset physical address space as the memory identifier if the stored data in the target data is stored in the continuous memory of the current target size, comprises:
if the stored data in the target data are stored in the continuous memory with the current target size and are not ready for flash writing, setting the address identifier of the preset physical address space as a first memory identifier;
if the stored data in the target data are stored in the continuous memory with the current target size and flash memory writing is ready, setting the address identifier of the preset physical address space as a second memory identifier;
correspondingly, the writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
if the address identifier of the preset physical address space is the first memory identifier, directly writing the data to be written and the stored data corresponding to the write command into a continuous memory with the current target size;
if the address identifier of the preset physical address space is the second memory identifier, directly writing the data to be written and the stored data corresponding to the write command into the continuous memory with the current target size;
Correspondingly, adding a first physical address to a preset physical address space corresponding to the logical address of the data to be written in the mapping table includes:
adding a first physical address into a preset physical address space corresponding to the logical addresses of the data to be written and the stored data on a mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written and the stored data;
correspondingly, the writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer comprises the following steps:
and writing the data to be written and the stored data in the new continuous memory with the target size or the current continuous memory with the target size into the continuous flash memory with the target size in the solid state disk through a flash memory conversion layer.
8. The method for constructing a mapping table of a solid state disk according to any one of claims 1 to 7, wherein writing the data to be written corresponding to the write command into the continuous memory with the target size includes:
if the write operation corresponding to the write command is aligned write of the data to be written aiming at the target size, the data to be written corresponding to the write command is directly written into the continuous memory with the target size;
Correspondingly, the writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer comprises the following steps:
and directly writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through a flash memory conversion layer.
9. The utility model provides a solid state disk mapping table construction device which characterized in that includes:
the first data writing module is used for acquiring a writing command sent by the client and writing data to be written corresponding to the writing command into a continuous memory with a target size; the target size is a target integer number of preset granularity sizes;
the address adding module is used for adding a first physical address into a preset physical address space corresponding to the logical address of the data to be written on the mapping table; the first physical address is a physical address of a continuous memory with the target size for writing the data to be written; the mapping table stores the mapping relation between the logical address and the physical address;
the second data writing module is used for writing the data to be written in the continuous memory with the target size into the continuous flash memory with the target size in the solid-state disk through the flash memory conversion layer;
An address modification module for replacing the first physical address with a second physical address; the second physical address is a physical address of the continuous flash memory with the target size written in the solid state disk of the data to be written; wherein the target integer number of logical addresses of the preset granularity corresponds to one physical address of the target size.
10. An electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the method for constructing a mapping table of a solid state disk according to any one of claims 1 to 8.
11. A computer-readable storage medium for storing a computer program; the method for constructing the mapping table of the solid state disk according to any one of claims 1 to 8 is realized when the computer program is executed by a processor.
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