CN117321944A

CN117321944A - Mapping method, device and equipment and storage medium

Info

Publication number: CN117321944A
Application number: CN202280001469.XA
Authority: CN
Inventors: 罗星熠
Original assignee: Beijing Xiaomi Mobile Software Co Ltd
Current assignee: Beijing Xiaomi Mobile Software Co Ltd
Priority date: 2022-04-27
Filing date: 2022-04-27
Publication date: 2023-12-29
Also published as: WO2023206184A1

Abstract

The disclosure provides a mapping method, a mapping device, mapping equipment and mapping storage media, and belongs to the technical field of communication. The method comprises the following steps: and determining the mapping type of the DMRS according to the frequency domain reuse factors and OCCs with preset orders on the frequency domain, wherein the DMRS with different mapping types correspond to different frequency domain reuse factors and preset orders, the frequency domain reuse factors are used for representing the number of orthogonal ports supported in a basic unit in an FDM mode, the frequency domain reuse factors and the preset orders are both greater than or equal to 2, and the symbol length during the DMRS mapping comprises single-symbol mapping or double-symbol mapping. The method provided by the present disclosure increases the number of orthogonal ports supported by DMRS mapping. Meanwhile, through adjusting the preset order of OCC on the frequency domain, each port realizes frequency domain orthogonality, and the performance of channel estimation is ensured. And by introducing the grid mapping mode, the channel estimation performance loss caused by the reduction of the frequency domain resource number of each orthogonal DMRS port is compensated to a certain extent aiming at the situation of increasing the number of the orthogonal DMRS ports.

Description

Mapping method, device and equipment and storage medium

Technical Field

The present disclosure relates to the field of communications technologies, and in particular, to a mapping method, apparatus, and device, and a storage medium.

Background

In a communication system, by introducing related joint transmission, an MU-MIMO (Multi-User multiple input multiple output ) system can support more UEs (User equipment) to obtain a larger system gain. Among them, the related joint transmission also has a high demand for the number of orthogonal ports supported in DMRS (Demodulation Reference Scheme, demodulation reference signal) mapping. The current single-symbol DMRS mapping can support at most 6 orthogonal ports, and the dual-symbol DMRS mapping can support at most 12 orthogonal ports, so that the requirement of related joint transmission on the number of orthogonal ports cannot be met.

In the related art, the number of DMRS ports is doubled by halving the number of existing frequency domain resources (e.g., REs (Resource elements)) for each DMRS port.

However, in the related art, for DMRS mapping scheme one (Type 1), the number of frequency domain resources per DMRS port is reduced by 3 after halving, and the frequency domain orthogonality cannot be achieved, which may reduce the performance of channel estimation.

Disclosure of Invention

The mapping method, the mapping device, the mapping equipment and the storage medium realize the selective activation of the candidate cells or the candidate cell groups through the dynamic change of the activation states and the types of the candidate cells and/or the candidate cell groups.

An embodiment of the present disclosure provides a mapping method, including:

determining the mapping type of a demodulation reference signal (DMRS) according to a frequency domain reuse factor and an Orthogonal Cover Code (OCC) with a preset order on a frequency domain, wherein the DMRS with different mapping types correspond to different frequency domain reuse factors and preset orders, the frequency domain reuse factors are used for representing the number of orthogonal ports supported in a basic unit in a Frequency Division Multiplexing (FDM) mode, the frequency domain reuse factors and the preset orders are both greater than or equal to 2, and the symbol length during the DMRS mapping comprises single symbol mapping or double symbol mapping.

In another aspect of the present disclosure, a mapping apparatus includes:

the determining module is configured to determine a mapping type of a demodulation reference signal DMRS according to a frequency domain reuse factor and an orthogonal cover code OCC with a preset order in a frequency domain, where DMRS with different mapping types correspond to different frequency domain reuse factors and preset orders, the frequency domain reuse factors are used to represent the number of orthogonal ports supported in a basic unit in a frequency division multiplexing FDM manner, the frequency domain reuse factors and the preset orders are both greater than or equal to 2, and a symbol length when the DMRS is mapped includes single symbol mapping or double symbol mapping.

A terminal according to an embodiment of another aspect of the present disclosure includes:

a processor;

a transceiver coupled to the processor;

wherein the processor is configured to load and execute executable instructions to implement the mapping method as described in the above aspect.

In another aspect of the present disclosure, a network device is provided, where the network device includes:

a processor;

a transceiver coupled to the processor;

In a further aspect of the disclosure, a computer readable storage medium is provided, where executable program code is stored, where the executable program code is loaded and executed by a processor to implement the mapping method according to the above aspect.

An embodiment of a further aspect of the disclosure proposes a computer readable storage medium for implementing a mapping method as described in the previous aspect, when the computer program product is executed by a processor of a terminal or a network device.

In summary, in the mapping method, apparatus, device, and storage medium provided in the embodiments of the present disclosure, the mapping type of the DMRS may be determined according to the frequency domain reuse factor and the OCC of the preset order in the frequency domain, where the DMRS of different mapping types correspond to the OCC of different frequency domain reuse factors and preset orders, and the frequency domain reuse factor is used to represent the number of orthogonal ports supported in the basic unit by the FDM mode, and the frequency domain reuse factor and the preset order are both greater than or equal to 2. As can be seen, in the embodiments of the present disclosure, by making the frequency domain reuse factor number equal to or greater than 2 (i.e., reducing the frequency domain resource number of each DMRS port), the number of orthogonal ports supported by the DMRS mapping can be increased. Meanwhile, through adjusting the preset order of OCC on the frequency domain, each port realizes the orthogonality of the frequency domain, so that the performance of channel estimation is ensured.

In addition, in the embodiment of the disclosure, for the DMRS mapping of the dual symbols, a lattice mapping manner is also introduced, so that the channel estimation performance loss caused by the reduction of the frequency domain resource number of each orthogonal DMRS port is compensated to a certain extent for the situation of increasing the number of the orthogonal DMRS ports.

Drawings

The foregoing and/or additional aspects and advantages of the present disclosure will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:

FIG. 1a is a flow chart of a mapping method according to an embodiment of the present disclosure;

FIG. 1b is a flow chart of a mapping method according to an embodiment of the present disclosure;

fig. 2a is a flowchart illustrating a mapping method according to another embodiment of the present disclosure

Fig. 2b is a schematic diagram of a distribution of different ports on time-frequency resources when performing single symbol mapping based on the first formula and the table 1 according to an embodiment of the disclosure;

FIG. 3a is a flow chart of a mapping method according to yet another embodiment of the present disclosure;

fig. 3b is a schematic diagram of a distribution of different ports on a time-frequency resource when performing single symbol mapping based on a formula two and a table 2 according to an embodiment of the disclosure;

fig. 3c is a schematic diagram of a distribution of different ports on a time-frequency resource when performing dual-symbol mapping based on a formula two and a table 2 according to an embodiment of the disclosure;

Fig. 4 is a flowchart of a mapping method according to an embodiment of the disclosure;

fig. 5 is a schematic diagram of distribution of different ports on a time-frequency resource when performing lattice dual-symbol mapping based on a formula three and a table 3 according to an embodiment of the present disclosure;

FIG. 6 is a flow chart of a mapping method according to another embodiment of the present disclosure;

fig. 7 is a schematic diagram of the distribution of different ports on time-frequency resources when two latticed double-symbol mapping is performed based on the formula four and the table 4 according to the embodiment of the disclosure;

FIG. 8 is a flow chart of a mapping method according to another embodiment of the present disclosure;

FIG. 9 is a flow chart of a mapping method according to another embodiment of the present disclosure;

FIG. 10 is a flow chart of a mapping method according to another embodiment of the present disclosure;

FIG. 11 is a schematic structural diagram of a mapping device according to an embodiment of the present disclosure;

FIG. 12 is a block diagram of a user device provided by one embodiment of the present disclosure;

fig. 13 is a block diagram of a network side device according to an embodiment of the present disclosure.

Detailed Description

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the embodiments of the present disclosure. Rather, they are merely examples of apparatus and methods consistent with aspects of embodiments of the present disclosure as detailed in the accompanying claims.

The terminology used in the embodiments of the disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the disclosure. As used in this disclosure of embodiments and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.

It should be understood that although the terms first, second, third, etc. may be used in embodiments of the present disclosure to describe various information, these information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, the first information may also be referred to as second information, and similarly, the second information may also be referred to as first information, without departing from the scope of embodiments of the present disclosure. The words "if" and "if" as used herein may be interpreted as "at … …" or "at … …" or "in response to a determination", depending on the context.

A mapping method, apparatus, device and storage medium according to embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

Fig. 1a is a flowchart of a mapping method provided in an embodiment of the present disclosure, where the mapping method may be performed by a UE or a network device, as shown in fig. 1a, and the mapping method may include the following steps:

step 101a, determining the mapping type of the DMRS according to the frequency domain reuse factor and OCC (Orthogonal Cover Code ) of preset order in the frequency domain.

In one embodiment of the present disclosure, a UE may be a device that provides voice and/or data connectivity to a user. The terminal device may communicate with one or more core networks via a RAN (Radio Access Network ), and the UE may be an internet of things terminal, such as a sensor device, a mobile phone (or "cellular" phone), and a computer with an internet of things terminal, e.g., a fixed, portable, pocket, hand-held, computer-built-in, or vehicle-mounted device. Such as a Station (STA), subscriber unit (subscriber unit), subscriber Station (subscriber Station), mobile Station (mobile), remote Station (remote Station), access point, remote terminal (remote), access terminal (access terminal), user device (user terminal), or user agent (user agent). Alternatively, the UE may be a device of an unmanned aerial vehicle. Alternatively, the UE may be a vehicle-mounted device, for example, a laptop with a wireless communication function, or a wireless terminal externally connected to the laptop. Alternatively, the UE may be a roadside device, for example, a street lamp, a signal lamp, or other roadside devices with a wireless communication function.

And, in one embodiment of the present disclosure, DMRS of different mapping types correspond to different Frequency domain reuse factors and different preset orders, where the Frequency domain reuse factors are used to represent the number of orthogonal ports supported by FDM (Frequency-division multiplexing) in a basic unit, where the basic unit may be a symbol (e.g., OFDM (Orthogonal Frequency Division Multiplexing, orthogonal Frequency division multiplexing) symbol), and the Frequency domain reuse factors and the preset orders may be greater than or equal to 2.

It should be noted that, in one embodiment of the present disclosure, the frequency domain reuse factor may be 2 or 4 or 6, and the preset order may be 6 or 3 or 2.

Specifically, for the frequency domain reuse factor, when the frequency domain reuse factor is 2, 4 or 6, the corresponding preset order may be any value, for example, the corresponding preset order may be any one of "6, 3 or 2" (e.g., when the frequency domain reuse factor is 2, the preset order may be 6), or may be any value other than "6, 3 or 2" (e.g., when the frequency domain reuse factor is 2, the preset order may be 4).

And, for the preset order, when it is 6 or 3 or 2, the corresponding frequency domain reuse factor may be any value, for example, the corresponding frequency domain reuse factor may be any one of "2 or 4 or 6" (for example, when the preset order may be 2, the frequency domain reuse factor is 6), or may be any value other than "2 or 4 or 6" (for example, when the preset order may be 2, the frequency domain reuse factor is 4).

In the embodiment of the present disclosure, the frequency domain reuse factor is mainly: 2, and the preset order is: 6"," frequency domain reuse factor: 4, and the preset order is: 3"," frequency domain reuse factor: 6, and the preset order is: 2 "three are examples, to which reference is made in particular to the following examples. However, other combinations are within the scope of the present disclosure.

In summary, in the mapping method provided in the embodiments of the present disclosure, the mapping type of the DMRS is determined according to the frequency domain reuse factor and the OCC of the preset order in the frequency domain, the DMRS of different mapping types correspond to the different frequency domain reuse factors and the OCC of the preset order, and the frequency domain reuse factor is used to represent the number of orthogonal ports supported in the basic unit in the FDM mode, where the frequency domain reuse factor and the preset order are both greater than or equal to 2. As can be seen, in the embodiments of the present disclosure, by making the frequency domain reuse factor number equal to or greater than 2 (i.e., reducing the frequency domain resource number of each DMRS port), the number of orthogonal ports supported by the DMRS mapping can be increased. Meanwhile, through adjusting the preset order of OCC on the frequency domain, each port realizes the orthogonality of the frequency domain, so that the performance of channel estimation is ensured.

Fig. 1b is a flowchart of a mapping method provided in an embodiment of the disclosure, where the mapping method may be performed by a UE or a network device, as shown in fig. 1b, and the mapping method may include the following steps:

step 101b, determining the mapping type of the DMRS according to the frequency domain reuse factor, the OCC of the preset order on the frequency domain, the symbol length when the DMRS is mapped and the mapping mode when the DMRS is mapped.

The related description of the frequency domain reuse factor and the OCC of the preset order in the frequency domain may be described with reference to the above embodiments, which are not repeated herein.

And, in one embodiment of the present disclosure, the symbol length at the time of DMRS mapping described above includes single symbol mapping, or dual symbol mapping. Further, in one embodiment of the present disclosure, the mapping manner when the DMRS is mapped includes comb mapping or block mapping in response to the symbol length when the DMRS is mapped being single symbol mapping, and the mapping manner when the DMRS is mapped includes comb mapping, lattice mapping or block mapping in response to the symbol length when the DMRS is mapped being double symbol mapping.

It can be seen that, in one embodiment of the present disclosure, for DMRS of dual symbol mapping, a trellis mapping form is introduced, so as to compensate for the channel estimation performance loss caused by the reduction of the frequency domain resource number of each orthogonal DMRS port to a certain extent for the case of increasing the number of orthogonal DMRS ports.

It should be noted that, in the embodiments of the present disclosure, the main objective is to "the frequency domain reuse factor is: 4, and the preset order is: 3"," frequency domain reuse factor: 6, and the preset order is: 2 "the form of the trellis map introduced by the two-symbol map in the two cases is described in detail, reference being made in particular to the following embodiments. However, it is within the scope of the present disclosure that the trellis mapping is also introduced when the two-symbol mapping is performed in other combinations.

Fig. 2a is a flowchart of a mapping method provided in an embodiment of the present disclosure, where the mapping method may be performed by a UE or a network device, as shown in fig. 2a, and the mapping method may include the following steps:

step 201, determining a mapping type of the DMRS according to a frequency domain reuse factor and an OCC of a preset order in a frequency domain, wherein the frequency domain reuse factor is: 2, and the preset order is: order 6.

Wherein, in one embodiment of the present disclosure, the frequency domain reuse factor is: 2, and the preset order is: at the 6 th order, the transmission symbol is mapped to the corresponding time-frequency resource through the following mapping formula I:

k＝12n+2k'+Δ

k′＝0,1,2,3,4,5

n＝0，1，2

wherein,for scaling factor omega _f (k') is OCC, ω in the frequency domain _t (l') is OCC in the time domain,for the time domain position of DMRS in one slot (slot), delta is the frequency domain position adjustment parameter, k 'is the frequency domain index, l' is the time domain index, k, l represent the position, r (), n represents the index of the sequence to be transmitted, p represents the port, Representing the symbols mapped on RE (k, l).

And, in one embodiment of the present disclosure, w _f When the preset order of (k') is 6 th order, w _f (k') 4 column vectors may be arbitrarily selected from the following 6 th order orthogonal codes as OCC codes, for example, the first 4 column vectors are selected for illustration. Alternatively, w _f (k') all 6 column vectors may be selected from the following 6 th order orthogonal codes to support more than twice the number of DMRS ports currently supported. Alternatively, the w _f When the preset order of (k') is 6, other similar 6-order orthogonal codes may be used. Any two column vectors in the following 6-order orthogonal codes are orthogonal.

And when w _f (k') when the first 4 column vectors are selected from the 6 th order orthogonal codes as above, table 1 provides ω for the embodiments of the present disclosure _f (k′)、ω _t (l') and delta.

TABLE 1

Then "the frequency domain reuse factor is: 2, and the preset order is: DMRS mapping of order 6 ".

Further, fig. 2b is a schematic diagram of a distribution of different ports on time-frequency resources when performing single symbol mapping based on the formula one and the table 1 according to an embodiment of the disclosure. As shown in fig. 2b, when the single symbol mapping is performed based on the formula one and the table 1, two CDM (code division multiplexing ) groups are included, wherein the number of orthogonal DMRS ports supported in each CDM group is 4, and when the single symbol mapping is performed based on the formula one and the table 1, a total of 8 orthogonal DMRS ports can be supported. Further, the two-symbol mapping based on the formula one and the table 1 is similar, wherein when the two-symbol mapping based on the formula one and the table 1 is used, the number of orthogonal DMRS ports supported in each CDM group may be 8, and when the two-symbol mapping based on the formula one and the table 1 is used, a total of 16 orthogonal DMRS ports may be supported.

And, the manner of the embodiment of the disclosure is to enhance the DMRS type1 in the existing protocol, so, compared with the single symbol mapping in the related art type1 which can support 4 orthogonal DMRS ports at most and the double symbol mapping can support 8 orthogonal DMRS ports at most, the embodiment of the disclosure can support twice as many orthogonal DMRS ports as the existing protocol, so as to meet the requirement of related joint transmission. In addition, in the embodiment of the disclosure, 6-order OCC is adopted on the frequency domain for DMRS mapping with a frequency domain reuse factor of 2, so that each port can be ensured to realize frequency domain orthogonality, and the performance of channel estimation is ensured.

In summary, in the mapping method provided in the embodiments of the present disclosure, the mapping type of the DMRS is determined according to the frequency domain reuse factor and the OCC of the preset order in the frequency domain, the DMRS of different mapping types correspond to the different frequency domain reuse factors and the OCC of the preset order, and the frequency domain reuse factor is used to represent the number of orthogonal ports supported in the basic unit in the FDM mode, where the frequency domain reuse factor and the preset order are both greater than or equal to 2. Therefore, by introducing higher-order OCC in the frequency domain, the number of orthogonal ports supported by the DMRS mapping can be increased, and each port can realize frequency domain orthogonality, so that the performance of channel estimation is ensured.

Fig. 3a is a flowchart of a mapping method provided in an embodiment of the present disclosure, where the mapping method may be performed by a UE or a network device, and as shown in fig. 3a, the mapping method may include the following steps:

step 301, determining a mapping type of the DMRS according to a frequency domain reuse factor and an OCC of a preset order in a frequency domain, wherein the frequency domain reuse factor is: 4, and the preset order is: 3 rd order.

Wherein, in one embodiment of the present disclosure, the frequency domain reuse factor is: 4, and the preset order is: and in the 3 rd order, mapping the transmission symbol to the corresponding time-frequency resource through the following mapping formula II:

k＝12n+4k'+Δ

k′＝0,1,2

n＝0,1,...

wherein,for scaling factor omega _f (k') is OCC, ω in the frequency domain _t (l') is OCC in the time domain,for the time domain position of DMRS in one slot (slot), delta is the frequency domain position adjustment parameter, k 'is the frequency domain index, l' is the time domain index, k, l represent the position, r (), n represents the index of the sequence to be transmitted, p represents the port,representing the symbols mapped on RE (k, l). And, in one embodiment of the present disclosure, w _f When the preset order of (k') is 3, w _f (k') 2 column vectors can be arbitrarily selected from 3-order orthogonal codes as OCC codes, for example Taking the first 2 column vectors as an example for illustration. Alternatively, w _f (k') all 3 column vectors may be selected from the following 3-order orthogonal codes to support more than twice the number of DMRS ports currently supported. Alternatively, the w _f When the preset order of (k') is 3 orders, other similar 3-order orthogonal codes may be used. Any two column vectors in the following 3-order orthogonal codes are orthogonal.

And when w _f (k') when the first 2 column vectors are selected from the 3 rd order orthogonal codes as above, table 2 provides ω for embodiments of the present disclosure _f (k′)、ω _t (l') and delta.

TABLE 2

Then based on the above formula two and table 2, the "frequency domain reuse factor is: 4, and the preset order is: DMRS mapping of order 3 ".

Further, fig. 3b is a schematic diagram of a distribution of different ports on a time-frequency resource when performing single symbol mapping based on the formula two and the table 2 according to the embodiment of the disclosure, and fig. 3c is a schematic diagram of a distribution of different ports on a time-frequency resource when performing double symbol mapping based on the formula two and the table 2 according to the embodiment of the disclosure. As shown in fig. 3b, when performing single symbol mapping based on the formula two and table 2, the single symbol mapping includes 4 CDM groups, where the number of orthogonal DMRS ports supported in each CDM group is 2, and total 8 orthogonal DMRS ports can be supported by performing single symbol mapping based on the formula two and table 2. Further, as shown in fig. 3c, the DMRS may be mapped in a block mapping manner based on the formula two and the table 2, and meanwhile, the two symbol mapping may be performed based on the formula two and the table 2, and includes 4 CDM groups (not shown in fig. 3 c), where the number of orthogonal DMRS ports supported in each CDM group is 4 (not shown in fig. 3 c), and performing the two symbol mapping based on the formula two and the table 2 may support 16 orthogonal DMRS ports in total.

And, the manner of the embodiment of the disclosure is to enhance the DMRS type1 in the existing protocol, so, compared with the case that the single symbol mapping of type1 in the related art can support 4 orthogonal DMRS ports at most and the double symbol mapping can support 8 orthogonal DMRS ports at most, the embodiment of the disclosure can support twice as many orthogonal DMRS ports as the existing protocol, regardless of the single symbol mapping or the double symbol mapping, and can meet the requirement of related joint transmission. In addition, in the embodiment of the disclosure, 3-order OCC is adopted on the frequency domain for DMRS mapping with a frequency domain reuse factor of 4, so that each port can be ensured to realize frequency domain orthogonality, and the performance of channel estimation is ensured.

Fig. 4 is a flowchart of a mapping method provided in an embodiment of the present disclosure, where the method may be performed by a UE or a network device, and as shown in fig. 4, the mapping method may include the following steps:

step 401, determining a mapping type of the DMRS according to a frequency domain reuse factor and an OCC of a preset order in a frequency domain, where the frequency domain reuse factor is: 4, and the preset order is: 3 rd order, and when DMRS is mapped, the symbol length is a double symbol mapping, and the DMRS is mapped in a trellis mapping manner.

Wherein, in one embodiment of the present disclosure, the frequency domain reuse factor is: 4, and the preset order is: and when the order is 3, mapping the transmission symbol to the corresponding time-frequency resource through the following mapping formula III:

k＝12n+4k'+Δ

k′＝0,1，2

n＝0,1,...

wherein,for scaling factor omega _f (k') is OCC, ω in the frequency domain _t (l') is OCC in the time domain,for the time domain position of DMRS in one slot (slot), delta is the frequency domain position adjustment parameter, k 'is the frequency domain index, l' is the time domain index, k, l represent the position, r (), n represents the index of the sequence to be transmitted, p represents the port,representing the symbols mapped on RE (k, l). And, in one embodiment of the present disclosure, w _f When the preset order of (k') is 3, w _f (k') 2 column vectors may be arbitrarily selected from the following 3-order orthogonal codes as OCC codes, for example, the first 2 column vectors are selected for illustration. Alternatively, w _f (k') all 3 column vectors may be selected from the following 3-order orthogonal codes to support more than twice the number of DMRS ports currently supported. Alternatively, the w _f When the preset order of (k') is 3 orders, other similar 3-order orthogonal codes may be used. Any two column vectors in the following 3-order orthogonal codes are orthogonal.

And when w _f (k') when the first 2 column vectors are selected from the 3 rd order orthogonal codes as above, table 3 provides the frequency domain reuse factor for the embodiment of the present disclosure as follows: 4, and the preset order is: when DMRS is mapped in a lattice mapping manner under 3-order double symbol mapping, ω _t (l') and delta. And other parameters (e.g., omega _f The value of (k')) can be referred to in Table 2.

TABLE 3 Table 3

Then based on the above formula three and table 3, the "frequency domain reuse factor is: 4, and the preset order is: 3-order "trellis DMRS mapping for double symbols.

Further, fig. 5 is a schematic diagram of the distribution of different ports on time-frequency resources when performing lattice dual-symbol mapping based on the formula three and the table 3 according to the embodiment of the present disclosure. The DMRS mapping for the double symbols is performed by introducing a trellis mapping method, so that the channel estimation performance loss caused by the reduction of the frequency domain resource number of each orthogonal DMRS port can be compensated to a certain extent for the situation of increasing the number of the orthogonal DMRS ports.

It should be noted that fig. 5 is only an example, and other grid mapping manners are also within the scope of the embodiments of the present disclosure.

Fig. 6 is a flowchart of a mapping method provided in an embodiment of the present disclosure, where the method may be performed by a UE or a network device, and as shown in fig. 6, the mapping method may include the following steps:

step 601, determining a mapping type of the DMRS according to a frequency domain reuse factor and an OCC of a preset order in a frequency domain, wherein the frequency domain reuse factor is: 6, the preset order is: 2 nd order, and when DMRS is mapped, the symbol length is a double symbol mapping, and the DMRS is mapped in a trellis mapping manner.

Wherein, in one embodiment of the present disclosure, the frequency domain reuse factor is: 6, the preset order is: and in the 2 nd order, mapping the transmission symbol to the corresponding time-frequency resource through the following mapping formula IV:

k＝12n+6k'+Δ

k′＝0,1

n＝0,1

wherein,for scaling factor omega _f (k') is OCC, ω in the frequency domain _t (l') is OCC in the time domain,for the time domain position of DMRS in one slot (slot), delta is the frequency domain position adjustment parameter, k 'is the frequency domain index, l' is the time domain index, k, l represent the position, r (), n represents the index of the sequence to be transmitted, p represents the port,representing the symbols mapped on RE (k, l).

And, table 4 provides the frequency domain reuse factor for embodiments of the present disclosure as: 6, the preset order is: 2 th order When DMRS is mapped in a trellis-mapped manner under two-symbol mapping, ω _t (l') and delta.

TABLE 4 Table 4

Then based on the above formula four and table 4, the "frequency domain reuse factor is: 6, the preset order is: 2-order "trellis DMRS mapping for double symbols.

Further, fig. 7 is a schematic diagram of the distribution of different ports on time-frequency resources when two lattice-shaped double symbol mapping is performed based on the formula four and the table 4 according to the embodiment of the present disclosure. As shown in fig. 7, when performing the double symbol mapping based on the formula four and the table 4, by introducing the trellis mapping method, the channel estimation performance loss caused by the reduction of the frequency domain resource number of each orthogonal DMRS port can be compensated to a certain extent for the case of increasing the number of the orthogonal DMRS ports. It should be noted that fig. 7 is only an example, and other grid mapping manners are also within the scope of the embodiments of the present disclosure.

And, as shown in fig. 7, the dual symbol mapping is performed based on the formula four and table 4, and includes 6 CDM groups (not shown in fig. 7), where the number of orthogonal DMRS ports supported in each CDM group is 4 (not shown in fig. 7), and the dual symbol mapping is performed based on the formula four and table 4, so that a total of 24 orthogonal DMRS ports can be supported. Similarly, the single symbol mapping is performed based on the formula four and the table 4, and includes 6 CDM groups, where the number of orthogonal DMRS ports supported in each CDM group is 2, and performing the single symbol mapping based on the formula four and the table 4 can support 12 orthogonal DMRS ports in total.

And, the manner of the embodiment of the disclosure is to enhance the DMRS type2 in the existing protocol, so, compared with the case that the single symbol mapping of type2 in the related art can support 6 orthogonal DMRS ports at most and the double symbol mapping can support 12 orthogonal DMRS ports at most, the embodiment of the disclosure can double the orthogonal DMRS ports of the existing protocol in both single symbol mapping and double symbol mapping, and can meet the requirement of related joint transmission. In addition, in the embodiment of the disclosure, 2-order OCC is adopted on the frequency domain for DMRS mapping with a frequency domain reuse factor of 6, so that each port can be ensured to realize frequency domain orthogonality, and then the performance of channel estimation is ensured.

Fig. 8 is a flowchart of a mapping method provided in an embodiment of the disclosure, where the mapping method may be performed by a UE or a network device, and as shown in fig. 8, the mapping method may include the following steps:

step 801, determining that the symbol length in DMRS mapping is double-symbol mapping, and mapping the DMRS in a trellis mapping manner.

Wherein a detailed description of step 801 may be described with reference to the above embodiments.

Fig. 9 is a flowchart of a mapping method provided in an embodiment of the disclosure, where the method may be performed by a UE or a network device, and as shown in fig. 9, the mapping method may include the following steps:

step 901, determining that the symbol length in DMRS mapping is double-symbol mapping, and mapping the DMRS in a trellis mapping manner, where the preset order is: 3 rd order, and the frequency domain reuse factor is: 4.

Fig. 10 is a flowchart of a mapping method provided in an embodiment of the present disclosure, where the method may be performed by a UE or a network device, and as shown in fig. 10, the mapping method may include the following steps:

step 1001, determining that the symbol length in DMRS mapping is double-symbol mapping, and mapping the DMRS in a trellis mapping manner, where the preset order is: 2 nd order, and the frequency domain reuse factor is: 6.

Further, in one embodiment of the present disclosure, the network device may transmit, to the UE, indication information indicating at least one of a frequency domain reuse factor, OCC on a frequency domain, and whether to trellis-map corresponding to the mapping type of the DMRS described above.

And in another embodiment of the present disclosure, the UE may receive indication information sent by the network device, where the indication information is used to indicate at least one of a frequency domain reuse factor corresponding to the mapping type of the DMRS, OCC on a frequency domain, and whether to trellis-map.

Fig. 11 is a schematic structural diagram of a mapping device according to an embodiment of the present disclosure, where, as shown in fig. 11, the device may include:

In summary, in the mapping apparatus provided in the embodiments of the present disclosure, the mapping types of DMRS may be determined according to the frequency domain reuse factor and OCC of a preset order in the frequency domain, where DMRS of different mapping types correspond to OCCs of different frequency domain reuse factors and preset orders, and the frequency domain reuse factor is used to represent the number of orthogonal ports supported in the basic unit by the FDM mode, where the frequency domain reuse factor and the preset order are both greater than or equal to 2. As can be seen, in the embodiments of the present disclosure, by making the frequency domain reuse factor number equal to or greater than 2 (i.e., reducing the frequency domain resource number of each DMRS port), the number of orthogonal ports supported by the DMRS mapping can be increased. Meanwhile, through adjusting the preset order of OCC on the frequency domain, each port realizes the orthogonality of the frequency domain, so that the performance of channel estimation is ensured.

Optionally, in one embodiment of the disclosure, the frequency domain reuse factor is: 2.

optionally, in one embodiment of the disclosure, the frequency domain reuse factor is: 4.

optionally, in one embodiment of the disclosure, the frequency domain reuse factor is: 6.

optionally, in one embodiment of the disclosure, the preset order is: order 6.

Optionally, in one embodiment of the disclosure, the preset order is: 3 rd order.

Optionally, in one embodiment of the disclosure, the preset order is: 2 nd order.

Optionally, in one embodiment of the disclosure, the determining module is further configured to:

determining the mapping type of the DMRS according to the frequency domain reuse factor, OCC of preset order on the frequency domain, symbol length when the DMRS is mapped and the mapping mode when the DMRS is mapped;

wherein, the symbol length in DMRS mapping includes single symbol mapping or double symbol mapping; and responding to the symbol length when the DMRS is mapped to be single symbol mapping, wherein the mapping mode when the DMRS is mapped comprises comb mapping or block mapping, and responding to the symbol length when the DMRS is mapped to be double symbol mapping, and the mapping mode when the DMRS is mapped comprises comb mapping, lattice mapping or block mapping.

Optionally, in an embodiment of the present disclosure, a symbol length when the DMRS is mapped is a dual symbol mapping, and a mapping manner when the DMRS is mapped is a trellis mapping.

Fig. 12 is a block diagram of a user equipment UE1200 provided in one embodiment of the present disclosure. For example, the UE1200 may be a mobile phone, a computer, a digital broadcast terminal device, a messaging device, a game console, a tablet device, a medical device, an exercise device, a personal digital assistant, and the like.

Referring to fig. 12, ue1200 may include at least one of the following components: a processing component 1202, a memory 1204, a power component 1206, a multimedia component 1208, an audio component 1210, an input/output (I/O) interface 1212, a sensor component 1213, and a communications component 1216.

The processing component 1202 generally controls overall operation of the UE1200, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 1202 may include at least one processor 1220 to execute instructions to perform all or part of the steps of the methods described above. Further, the processing component 1202 may include at least one module that facilitates interaction between the processing component 1202 and other components. For example, the processing component 1202 may include a multimedia module to facilitate interaction between the multimedia component 1208 and the processing component 1202.

The memory 1204 is configured to store various types of data to support operations at the UE 1200. Examples of such data include instructions for any application or method operating on the UE1200, contact data, phonebook data, messages, pictures, videos, and the like. The memory 1204 may be implemented by any type or combination of volatile or non-volatile memory devices, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.

The power supply component 1206 provides power to the various components of the UE 1200. The power supply components 1206 may include a power management system, at least one power supply, and other components associated with generating, managing, and distributing power for the UE 1200.

The multimedia component 1208 includes a screen between the UE1200 and the user that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a user. The touch panel includes at least one touch sensor to sense touch, swipe, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or slide action, but also a wake-up time and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 1208 includes a front camera and/or a rear camera. The front camera and/or the rear camera may receive external multimedia data when the UE1200 is in an operation mode, such as a photographing mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

The audio component 1210 is configured to output and/or input audio signals. For example, the audio component 1210 includes a Microphone (MIC) configured to receive external audio signals when the UE1200 is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may be further stored in the memory 1204 or transmitted via the communications component 1216. In some embodiments, audio assembly 1210 further includes a speaker for outputting audio signals.

The I/O interface 1212 provides an interface between the processing component 1202 and peripheral interface modules, which may be a keyboard, click wheel, buttons, etc. These buttons may include, but are not limited to: homepage button, volume button, start button, and lock button.

The sensor component 1213 includes at least one sensor for providing status assessment of various aspects for the UE 1200. For example, the sensor component 1213 may detect the on/off state of the device 1200, the relative positioning of components, such as the display and keypad of the UE1200, the sensor component 1213 may also detect the change in position of the UE1200 or a component of the UE1200, the presence or absence of user contact with the UE1200, the orientation or acceleration/deceleration of the UE1200, and the change in temperature of the UE 1200. The sensor assembly 1213 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 1213 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 1213 may also include an acceleration sensor, a gyroscopic sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

The communications component 1216 is configured to facilitate wired or wireless communication between the UE1200 and other devices. The UE1200 may access a wireless network based on a communication standard, such as WiFi,2G, or 3G, or a combination thereof. In one exemplary embodiment, the communication component 1216 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communications component 1216 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the UE1200 may be implemented by at least one Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a Programmable Logic Device (PLD), a Field Programmable Gate Array (FPGA), a controller, a microcontroller, a microprocessor, or other electronic components for performing the above-described methods.

Fig. 13 is a block diagram of a network-side device 1300 provided by an embodiment of the present disclosure. For example, the network-side device 1300 may be provided as a network-side device. Referring to fig. 13, the network-side device 1300 includes a processing component 1311 that further includes at least one processor, and memory resources represented by a memory 1332 for storing instructions, such as applications, executable by the processing component 1322. The applications stored in memory 1332 may include one or more modules each corresponding to a set of instructions. Further, the processing component 1310 is configured to execute instructions to perform any of the methods described above as applied to the network-side device, e.g., as shown in fig. 1.

The network-side device 1300 may also include a power component 1326 configured to perform power management of the network-side device 1300, a wired or wireless network interface 1350 configured to connect the network-side device 1300 to a network, and an input-output (I/O) interface 1358. Network-side device 1300 may operate based on an operating system stored in memory 1332, such as Windows Server TM, mac OS XTM, unix (TM), linux (TM), free BSDTM, or the like.

In the embodiments provided in the present disclosure, the method provided in the embodiments of the present disclosure is described from the perspective of the network side device and the UE, respectively. In order to implement the functions in the method provided by the embodiments of the present disclosure, the network side device and the UE may include a hardware structure, a software module, and implement the functions in the form of a hardware structure, a software module, or a hardware structure plus a software module. Some of the functions described above may be implemented in a hardware structure, a software module, or a combination of a hardware structure and a software module.

The embodiment of the disclosure provides a communication device. The communication device may include a transceiver module and a processing module. The transceiver module may include a transmitting module and/or a receiving module, where the transmitting module is configured to implement a transmitting function, the receiving module is configured to implement a receiving function, and the transceiver module may implement the transmitting function and/or the receiving function.

The communication device may be a terminal device (such as the terminal device in the foregoing method embodiment), or may be a device in the terminal device, or may be a device that can be used in a matching manner with the terminal device. Alternatively, the communication device may be a network device, a device in the network device, or a device that can be used in cooperation with the network device.

Another communication apparatus provided by an embodiment of the present disclosure. The communication device may be a network device, or may be a terminal device (such as the terminal device in the foregoing method embodiment), or may be a chip, a chip system, or a processor that supports the network device to implement the foregoing method, or may be a chip, a chip system, or a processor that supports the terminal device to implement the foregoing method. The device can be used for realizing the method described in the method embodiment, and can be particularly referred to the description in the method embodiment.

The communication device may include one or more processors. The processor may be a general purpose processor or a special purpose processor, etc. For example, a baseband processor or a central processing unit. The baseband processor may be used to process communication protocols and communication data, and the central processor may be used to control communication apparatuses (e.g., network side devices, baseband chips, terminal devices, terminal device chips, DUs or CUs, etc.), execute computer programs, and process data of the computer programs.

Optionally, the communication device may further include one or more memories, on which a computer program may be stored, and the processor executes the computer program, so that the communication device performs the method described in the above method embodiment. Optionally, the memory may further store data. The communication device and the memory may be provided separately or may be integrated.

Optionally, the communication device may further include a transceiver, an antenna. The transceiver may be referred to as a transceiver unit, transceiver circuitry, or the like, for implementing the transceiver function. The transceiver may include a receiver, which may be referred to as a receiver or a receiving circuit, etc., for implementing a receiving function, and a transmitter; the transmitter may be referred to as a transmitter or a transmitting circuit, etc., for implementing a transmitting function.

Optionally, one or more interface circuits may be included in the communication device. The interface circuit is used for receiving the code instruction and transmitting the code instruction to the processor. The processor executes the code instructions to cause the communication device to perform the method described in the method embodiments above.

In one implementation, a transceiver for implementing the receive and transmit functions may be included in the processor. For example, the transceiver may be a transceiver circuit, or an interface circuit. The transceiver circuitry, interface or interface circuitry for implementing the receive and transmit functions may be separate or may be integrated. The transceiver circuit, interface or interface circuit may be used for reading and writing codes/data, or the transceiver circuit, interface or interface circuit may be used for transmitting or transferring signals.

In one implementation, a processor may have a computer program stored thereon, which, when executed on the processor, may cause a communication device to perform the method described in the method embodiments above. The computer program may be solidified in the processor, in which case the processor may be implemented in hardware.

In one implementation, a communication device may include circuitry that may implement the functions of transmitting or receiving or communicating in the foregoing method embodiments. The processors and transceivers described in this disclosure may be implemented on integrated circuits (integrated circuit, ICs), analog ICs, radio frequency integrated circuits RFICs, mixed signal ICs, application specific integrated circuits (application specific integrated circuit, ASIC), printed circuit boards (printed circuit board, PCB), electronic devices, and the like. The processor and transceiver may also be fabricated using a variety of IC process technologies such as complementary metal oxide semiconductor (complementary metal oxide semiconductor, CMOS), N-type metal oxide semiconductor (NMOS), P-type metal oxide semiconductor (positive channel metal oxide semiconductor, PMOS), bipolar junction transistor (bipolar junction transistor, BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), etc.

The communication apparatus described in the above embodiment may be a network device or a terminal device (such as the terminal device in the foregoing method embodiment), but the scope of the communication apparatus described in the present disclosure is not limited thereto, and the structure of the communication apparatus may not be limited. The communication means may be a stand-alone device or may be part of a larger device. For example, the communication device may be:

(1) A stand-alone integrated circuit IC, or chip, or a system-on-a-chip or subsystem;

(2) A set of one or more ICs, optionally including storage means for storing data, a computer program;

(3) An ASIC, such as a Modem (Modem);

(4) Modules that may be embedded within other devices;

(5) A receiver, a terminal device, an intelligent terminal device, a cellular phone, a wireless device, a handset, a mobile unit, a vehicle-mounted device, a network device, a cloud device, an artificial intelligent device, and the like;

(6) Others, and so on.

In the case where the communication device may be a chip or a system of chips, the chip includes a processor and an interface. The number of the processors may be one or more, and the number of the interfaces may be a plurality.

Optionally, the chip further comprises a memory for storing the necessary computer programs and data.

Those of skill in the art will further appreciate that the various illustrative logical blocks (illustrative logical block) and steps (step) described in connection with the embodiments of the disclosure may be implemented by electronic hardware, computer software, or combinations of both. Whether such functionality is implemented as hardware or software depends upon the particular application and design requirements of the overall system. Those skilled in the art may implement the described functionality in varying ways for each particular application, but such implementation is not to be understood as beyond the scope of the embodiments of the present disclosure.

The present disclosure also provides a readable storage medium having instructions stored thereon which, when executed by a computer, perform the functions of any of the method embodiments described above.

The present disclosure also provides a computer program product which, when executed by a computer, performs the functions of any of the method embodiments described above.

In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer programs. When the computer program is loaded and executed on a computer, the flow or functions described in accordance with the embodiments of the present disclosure are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer program may be stored in or transmitted from one computer readable storage medium to another, for example, by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means from one website, computer, server, or data center. The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a high-density digital video disc (digital video disc, DVD)), or a semiconductor medium (e.g., a Solid State Disk (SSD)), or the like.

Those of ordinary skill in the art will appreciate that: the various numbers of first, second, etc. referred to in this disclosure are merely descriptive convenience and are not intended to limit the scope of embodiments of the disclosure nor to indicate sequential order.

At least one of the present disclosure may also be described as one or more, a plurality may be two, three, four or more, and the present disclosure is not limited. In the embodiment of the disclosure, for a technical feature, the technical features in the technical feature are distinguished by "first", "second", "third", "a", "B", "C", and "D", and the technical features described by "first", "second", "third", "a", "B", "C", and "D" are not in sequence or in order of magnitude.

Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

A mapping method, the method comprising:

and determining the mapping type of the demodulation reference signal (DMRS) according to the frequency domain reuse factor and an Orthogonal Cover Code (OCC) with a preset order on a frequency domain, wherein the DMRS with different mapping types correspond to different frequency domain reuse factors and preset orders, the frequency domain reuse factors are used for representing the number of orthogonal ports supported in a basic unit in a Frequency Division Multiplexing (FDM) mode, and the frequency domain reuse factors and the preset orders are both larger than or equal to 2.
The method of claim 1, wherein the frequency domain reuse factor is: 2.
the method of claim 1, wherein the frequency domain reuse factor is: 4.
the method of claim 1, wherein the frequency domain reuse factor is: 6.
the method of claim 1, wherein the predetermined order is: order 6.
The method of claim 1, wherein the predetermined order is: 3 rd order.
The method of claim 1, wherein the predetermined order is: 2 nd order.
The method of any of claims 1-7, wherein the determining the mapping type of the DMRS according to the frequency domain reuse factor and the OCC of the preset order in the frequency domain comprises:

determining the mapping type of the DMRS according to the frequency domain reuse factor, OCC of preset order on the frequency domain, symbol length when the DMRS is mapped and the mapping mode when the DMRS is mapped;

wherein, the symbol length in DMRS mapping includes single symbol mapping or double symbol mapping;

responding to the symbol length when the DMRS is mapped as single symbol mapping, wherein the mapping mode when the DMRS is mapped comprises comb mapping or block mapping;

and responding to the symbol length when the DMRS is mapped to be double-symbol mapping, wherein the mapping mode when the DMRS is mapped comprises comb mapping, grid mapping or block mapping.
The method of claim 8, wherein the symbol length at the time of DMRS mapping is a double symbol mapping and the mapping manner at the time of DMRS mapping is a trellis mapping.
A mapping apparatus, the apparatus comprising:

the determining module is configured to determine a mapping type of a demodulation reference signal DMRS according to a frequency domain reuse factor and an orthogonal cover code OCC with a preset order in a frequency domain, where DMRS with different mapping types correspond to different frequency domain reuse factors and preset orders, the frequency domain reuse factors are used to represent the number of orthogonal ports supported in a basic unit in a frequency division multiplexing FDM manner, the frequency domain reuse factors and the preset orders are both greater than or equal to 2, and a symbol length when the DMRS is mapped includes single symbol mapping or double symbol mapping.
A terminal, the terminal comprising:

a processor;

a transceiver coupled to the processor;

wherein the processor is configured to load and execute executable instructions to implement the mapping method of any of claims 1 to 8.
A network device, the network device comprising:

a processor;

a transceiver coupled to the processor;

wherein the processor is configured to load and execute executable instructions to implement the mapping method of any of claims 1 to 8.
A computer readable storage medium having stored therein executable program code that is loaded and executed by a processor to implement the mapping method of any of claims 1 to 9.
A computer program product for implementing the mapping method according to any of claims 1 to 9 when executed by a processor of a terminal or network device.