CN117319148A - Signal compensation method and device - Google Patents
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- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
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Abstract
The embodiment of the application provides a signal compensation method and device, wherein the method comprises the following steps: receiving multiple PCIE signal streams; adjusting target attribute values of target signal attributes of the multi-path PCIE signal streams to obtain multi-path reference signal streams; and compensating each path of reference signal stream by using a signal compensator to obtain multiple paths of target signal streams output by the signal compensator, wherein the signal compensator is used for compensating the target signal at the current moment in each path of reference signal stream according to N reference signals before the current moment in each path of reference signal stream, the target compensation parameters used by the signal compensator are determined according to the reference attribute values of the multiple paths of reference signal streams, and N is an integer greater than or equal to 2. According to the method and the device, the problem that the optimization efficiency of the received signal flow is low in the related technology is solved, and the technical effect of improving the optimization efficiency of the received signal flow is achieved.
Description
Technical Field
The embodiment of the application relates to the field of computers, in particular to a signal compensation method and device.
Background
In the current PCIE link, no matter whether the CPU is directly connected to the PCIE device, or the CPU-response-PCIE DEIVCE is adopted, or the PCIE is switched through the SWITCH, a problem often occurs in the link is CE error reporting. Currently, in order to cope with the foregoing CE error problem, a general PCIE SERDES method is often adopted, and in a PCIE link receiving end, a received PCIE signal is processed by a unified hardware ATT, VGA and CTLE (Continuous Time Linear Equalizer ), and then is processed by a Full-speed DFE, and then is processed by a Data deser+cdr, and then is sent to a Data link layer for Data processing. After the PCIE signals are processed by ATT and VGA, the amplitude value and the direct current bias voltage of the PCIE signals are stabilized in a PCIE SPEC receiving range, each PCIE signal is processed in a pure hardware CTLE mode, and the attenuation difference of high and low frequencies is compensated by reducing low-frequency signals in the PCIE signals, so that channel compensation is realized. However, due to the inconsistency of the PCIE link and the transmitting end and the receiving end of each PCIE device, the consistency of signals between channels cannot be guaranteed, so that the received PCIE signals are transmitted to the DFE for processing through a unified hardware processing mode, the pressure is completely transmitted to the DFE, and further, the effect of optimizing the DFE against the ISI (Inter Symbolinterference ) problem is extremely poor under the processing pressure.
Disclosure of Invention
The embodiment of the application provides a signal compensation method and device, which at least solve the problem of low optimization efficiency of a received signal stream in the related technology.
According to one embodiment of the present application, there is provided a signal compensation method including: receiving multiple PCIE signal streams;
adjusting target attribute values of target signal attributes of the multiple PCIE signal streams to obtain multiple reference signal streams, wherein the target signal attributes are signal attributes of compensation parameters used for determining a signal compensation stage in the signal attributes of the PCIE signal streams, and differences among the reference attribute values of the target signal attributes of the multiple reference signal streams are smaller than target values;
and compensating each path of reference signal stream by using a signal compensator to obtain multiple paths of target signal streams output by the signal compensator, wherein the signal compensator is used for compensating the target signal at the current moment in each path of reference signal stream according to N reference signals before the current moment in each path of reference signal stream, the target compensation parameters used by the signal compensator are determined according to the reference attribute values of the multiple paths of reference signal streams, and N is an integer greater than or equal to 2.
Optionally, the adjusting the target attribute value of the target signal attribute of the multiple PCIE signal flows includes:
determining a target adjustment parameter of each PCIE signal flow according to the target attribute values of the plurality of PCIE signal flows, wherein the target adjustment parameter is used for indicating an adjustment direction and an adjustment value of the target attribute value;
and adjusting each PCIE signal flow according to the adjusting parameters of each PCIE signal flow to obtain the reference signal flow.
Optionally, the determining, according to the target attribute values of the multiple PCIE signal flows, a target adjustment parameter of each PCIE signal flow includes:
calculating a target difference value between signal amplitudes of the PCIE signal flows, wherein the target attribute value comprises the signal amplitudes;
and determining the target adjusting parameter corresponding to the target difference value from the difference value and the adjusting parameter with the corresponding relation.
Optionally, the adjusting each path of PCIE signal flow according to the target adjustment parameter of each path of PCIE signal flow to obtain the reference signal flow includes:
determining a target alternating current gain corresponding to the target adjusting parameter value from the adjusting parameter value and the alternating current gain which have corresponding relations;
acquiring a target capacitance value corresponding to the target alternating current gain;
setting the capacitance of the initial continuous time linear equalizer as the target capacitance value to obtain the target continuous time linear equalizer;
and adjusting the PCIE signal flow by using the target continuous time linear equalizer to obtain the reference signal flow.
Optionally, the compensating, by using a signal compensator, each path of the reference signal stream to obtain a plurality of paths of target signal streams output by the signal compensator, including:
and inputting the N reference signals and the target signal into a target pre-feedback equalizer to obtain the target signal flow output by the target pre-feedback equalizer, wherein the target pre-feedback equalizer is used for compensating the target signal according to the influence condition of the N reference signals on the target signal, and the signal compensator comprises the target pre-feedback equalizer.
Optionally, the inputting the N reference signals and the target signal into a target pre-feedback equalizer includes:
and respectively inputting N reference signals and the target signal into corresponding reference pre-feedback equalizers in the N+1-stage reference pre-feedback equalizer according to a time sequence, wherein the target pre-feedback equalizer comprises the N+1-stage parallel reference pre-feedback equalizer.
Optionally, before the N reference signals and the target signal are respectively input to the corresponding reference prefeed equalizer in the n+1 stage reference prefeed equalizer in the time sequence order, the method further includes:
determining a target sampling latch threshold value corresponding to a target baud rate of a current PCIE signal flow from the baud rate and the sampling latch threshold value which have corresponding relations, wherein the current PCIE signal flow is the PCIE signal flow corresponding to the reference signal flow to be compensated currently;
and setting the sampling latch threshold value of the reference pre-feedback equalizer as the target sampling latch threshold value.
According to another embodiment of the present application, there is provided a compensation device for a signal, including:
the receiving module is used for receiving multiple PCIE signal streams;
the adjusting module is used for adjusting target attribute values of target signal attributes of the PCIE signal flows to obtain multiple paths of reference signal flows, wherein the target signal attributes are signal attributes of compensation parameters used for determining a signal compensation stage in the signal attributes of the PCIE signal flows, and differences among the reference attribute values of the target signal attributes of the multiple paths of reference signal flows are smaller than target values;
the compensation module is used for compensating each path of reference signal stream by using a signal compensator to obtain multiple paths of target signal streams output by the signal compensator, wherein the signal compensator is used for compensating the target signals at the current moment in each path of reference signal streams according to N reference signals before the current moment in each path of reference signal streams, the target compensation parameters used by the signal compensator are determined according to the reference attribute values of the multiple paths of reference signal streams, and N is an integer greater than or equal to 2.
According to a further embodiment of the present application, there is also provided a computer readable storage medium having stored therein a computer program, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
According to a further embodiment of the present application, there is also provided an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
According to the method and the device, after the multi-path PCIE signal stream is received, the target attribute values of the target signal attributes of the multi-path PCIE signals are adjusted, so that the difference value between the reference attribute values of the target signal attributes of the obtained multi-path reference signal stream is smaller than the target value, the consistency of the target signal attributes of the multi-path reference signal stream is further ensured, the compensation pressure for compensating the isolated reference signal stream by using the signal compensator is reduced, when the non-path reference signal stream is compensated by using the signal compensator, the target signal at the current moment in each path of reference signal stream is compensated according to N reference signals before the current moment in each path of reference signal stream, the target signal at the current moment is compensated according to the reference signals before the current moment, the problem of intersymbol interference in the signal stream is further avoided, and therefore the technical effect of low optimization efficiency of the received signal stream in the related technology is achieved, and the optimization efficiency of the received signal stream is improved.
Drawings
Fig. 1 is a block diagram of a hardware structure of a mobile terminal according to a signal compensation method of an embodiment of the present application;
FIG. 2 is a flow chart of a method of compensation of signals according to an embodiment of the present application;
FIG. 3 is an alternative signal flow conditioning schematic according to an embodiment of the present application;
FIG. 4 is an alternative topology of a continuous-time linear equalizer structure according to an embodiment of the present application;
FIG. 5 is an alternative signal flow contrast diagram according to an embodiment of the present application;
FIG. 6 is an alternative reference pre-feedback equalizer topology according to an embodiment of the present application;
fig. 7 is a block diagram of a signal compensation device according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
The method embodiments provided in the embodiments of the present application may be performed in a mobile terminal, a computer terminal or similar computing device. Taking the mobile terminal as an example, fig. 1 is a block diagram of a hardware structure of the mobile terminal according to an embodiment of the present application. As shown in fig. 1, a mobile terminal may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA) and a memory 104 for storing signals, wherein the mobile terminal may also include a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those skilled in the art that the structure shown in fig. 1 is merely illustrative and not limiting of the structure of the mobile terminal described above. For example, the mobile terminal may also include more or fewer components than shown in fig. 1, or have a different configuration than shown in fig. 1.
The memory 104 may be used to store a computer program, for example, a software program of application software and a module, such as a computer program corresponding to a signal compensation method in the embodiment of the present application, and the processor 102 executes the computer program stored in the memory 104, thereby performing various functional applications and signal processing, that is, implementing the method described above. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located relative to the processor 102, which may be connected to the mobile terminal via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device 106 is used to receive or transmit signals via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, simply referred to as NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is configured to communicate with the internet wirelessly.
Fig. 2 is a flowchart of a method of compensating a signal according to an embodiment of the present application, as shown in fig. 2, the flowchart including the steps of:
step S202, receiving multiple PCIE signal streams;
step S204, adjusting target attribute values of target signal attributes of the multiple PCIE signal flows to obtain multiple paths of reference signal flows, where the target signal attributes are signal attributes of compensation parameters used for determining a signal compensation stage in the signal attributes of the PCIE signal flows, and differences between reference attribute values of the target signal attributes of the multiple paths of reference signal flows are smaller than a target value;
step S206, compensating each path of the reference signal stream by using a signal compensator to obtain multiple paths of target signal streams output by the signal compensator, where the signal compensator is configured to compensate the target signal at the current time in each path of the reference signal stream according to N reference signals before the current time in each path of the reference signal stream, and the target compensation parameter used by the signal compensator is determined according to the reference attribute values of the multiple paths of the reference signal streams, where N is an integer greater than or equal to 2.
Through the steps, after the multi-path PCIE signal stream is received, the target attribute values of the target signal attributes of the multi-path PCIE signal are adjusted, so that the difference value between the reference attribute values of the target signal attributes of the obtained multi-path reference signal stream is smaller than the target value, the consistency of the target signal attributes of the multi-path reference signal stream is further ensured, the compensation pressure for compensating the isolated reference signal stream by using the signal compensator is reduced, and when the non-path reference signal stream is compensated by using the signal compensator, the target signal at the current moment in each path of reference signal stream is compensated according to N reference signals before the current moment in each path of reference signal stream, the compensation of the target signal at the current moment according to the reference signal before the current moment is realized, and the problem of intersymbol interference in the signal stream is further avoided.
In the embodiment provided in step S202, the multiple PCIE signal streams are signal streams collected through multiple channels.
In the embodiment provided in step S204, the target signal attribute may be, but is not limited to, an attribute for characterizing a signal stream in a time domain and/or a frequency domain, and the target signal attribute may be, but is not limited to, an amplitude, a frequency band, a peak value, a spectrum density, a phase, a waveform shape, etc., for example, the adjusted multiple reference signal stream may be, but is not limited to, a difference between the frequency band and the amplitude is less than a target value.
Optionally, in the embodiment of the present application, the manner of adjusting the target attribute value of the target signal attribute of the multiple PCIE signal flows may, but is not limited to, determining a signal attenuation parameter of each PCIE signal flow according to the target attribute value of each PCIE signal flow, and attenuating the low-frequency and high-frequency portions of the signal flow corresponding to the screening parameter.
Optionally, in the embodiment of the present application, the signal compensation stage is used to perform signal compensation on signals in each signal stream, so as to avoid intersymbol interference between signals.
Optionally, in this embodiment of the present application, the compensation parameter may be, but is not limited to, a parameter for characterizing a model of a signal compensator, where the compensation parameter may be determined according to an attribute value of a target signal attribute of an adjusted reference signal stream, for example, a stage number of a signal equalizer included in the signal compensator, where the signal compensator is configured to include multiple stages of signal equalizers, where the multiple stages of signal equalizers are configured to be connected in parallel, and each stage of signal equalizer is configured to process a reference signal that is one stage before a current time, so as to determine an influence condition of the reference signal on a signal value of the current time signal, and further after adjusting a target attribute value of a target signal attribute of a PCIE signal stream, so that an attribute value of a target signal attribute of the obtained multiple reference signal stream remains consistent (for example, is adjusted to a reference attribute value), and then, a compensation parameter (for example, a stage number of signal equalizers) corresponding to the reference attribute value may be determined from the attribute value and the compensation parameter having a correspondence. In this embodiment, the number of stages of the signal equalizer included in the signal compensator is adjusted according to the attribute value of the adjusted reference signal stream, so that on the premise of ensuring the compensation effect of compensating the signal by using the signal compensator, the compensation efficiency of compensating the reference signal stream by the signal compensator is ensured, and the influence of introducing excessive redundant reference signals on the running time of the signal compensator is avoided.
Alternatively, in the embodiment of the present application, the compensation parameter may be an operating parameter used to characterize the signal compensator when performing signal compensation, which may include, but is not limited to, a gain value, a tap coefficient, and the like, which is not limited in this aspect.
In the embodiment provided in step S206, the signal compensator may be, but not limited to, a pre-feedback equalizer or a decision feedback equalizer, or may be a compensator obtained by modifying the topology of the pre-feedback equalizer or the decision feedback equalizer according to the compensation requirement, such as the number of stages of the pre-feedback equalizer and the decision feedback equalizer, which is not limited in this scheme.
Optionally, in the embodiment of the present application, the signal compensator is configured to predict, according to signal values of the N reference signals, an influence value of the N reference signals on a target signal at a current time, and further perform signal compensation on the target signal according to the influence value, and in a specific operation, may, but not limited to, determine an influence weight of each reference signal according to a difference condition between signal values of each reference signal and adjacent signals, and perform weighted summation on the reference signals according to the influence weights, thereby obtaining a signal compensation value of the target signal.
As an optional embodiment, the adjusting the target attribute value of the target signal attribute of the multiple PCIE signal flows includes:
determining a target adjustment parameter of each PCIE signal flow according to the target attribute values of the plurality of PCIE signal flows, wherein the adjustment parameter is used for indicating an adjustment direction and an adjustment value of the target attribute value;
and regulating each PCIE signal flow according to the target regulation parameters of each PCIE signal flow, and obtaining one path of reference signal flow.
Optionally, in the embodiment of the present application, the manner of determining the adjustment parameter may be, but is not limited to, predicting the reference attribute values corresponding to the multiple PCIE signals according to the difference between the target attribute values of the multiple PCIE signal flows, and further determining the adjustment parameter according to the difference between the target attribute value and the reference attribute value of each PCIE signal flow.
In the above embodiment, according to the difference of the target attribute values of the multiple paths of PCIE signals, the adjustment parameters of each path of PCIE signal flows are determined, and then the adjustment parameters are used to adjust each path of signals, so that each path of signal flows are adjusted according to the difference condition between the multiple paths of PCIE signal flows, and the consistency before the adjusted multiple paths of PCIE signal flows is improved.
As an optional embodiment, the determining, according to the target attribute values of the multiple PCIE signal flows, a target adjustment parameter of each PCIE signal flow includes:
calculating a target difference value between signal amplitudes of the PCIE signal flows, wherein the target attribute value comprises the signal amplitudes;
and determining the target adjusting parameter corresponding to the target difference value from the difference value and the adjusting parameter with the corresponding relation.
Optionally, in the embodiment of the present application, a target continuous-time linear equalizer may be set for each PCIE signal stream, where the target continuous-time linear equalizer performs signal compensation on a signal of a current signal stream according to an equalization parameter value, so as to ensure consistency of reference signal streams after adjustment of multiple PCIE signal streams. Fig. 3 is an optional signal flow adjustment schematic diagram according to an embodiment of the present application, as shown in fig. 3, where PCIE signal flows of multiple channels such as PCIE LANE0, PCIE LANE1, PCIE LANE2, etc. are provided, a corresponding target continuous time linear equalizer CTLE is set for each signal flow, and when CTLE0/CTLE1/CTLE2, etc. performs signal processing, a weighting process is provided between CTLEs, so that frequency bands and amplitudes of signals after CTLE are kept consistent.
Through the steps, the equalization parameter value is determined according to the difference between the signal amplitudes of the multiple PCIE signal streams, and then for each PCIE signal, a target continuous time linear equalizer adjusts the signal stream based on the equalization parameter value, so that signal compensation of each signal stream according to the amplitude difference of the multiple signals is realized, and the problem that signal amplitude inconsistencies among channels are caused by signal compensation of each signal stream independently through the continuous time linear equalizer in the related art is avoided.
As an optional embodiment, the adjusting each path of the PCIE signal flow according to the target adjustment parameter of each path of the PCIE signal flow to obtain the reference signal flow includes:
determining a target alternating current gain corresponding to the target adjusting parameter value from the adjusting parameter value and the alternating current gain which have corresponding relations;
acquiring a target capacitance value corresponding to the target alternating current gain;
setting the capacitance of the initial continuous time linear equalizer as the target capacitance value to obtain the target continuous time linear equalizer;
and adjusting the PCIE signal flow by using the target continuous time linear equalizer to obtain the reference signal flow.
Optionally, in the embodiment of the present application, the target continuous-time linear equalizer is configured to adjust attenuation of the low-frequency and high-frequency portions of different signals of the current PCIE signal stream according to the equalization parameter value, so as to adjust the amplitude of the signal stream.
Optionally, in the embodiment of the present application, the continuous-time linear equalizer is essentially a high-pass filter, and compensates for the high-frequency loss of the signal frequency by reducing the low-frequency component of the signal, and fig. 4 is a topology diagram of an alternative continuous-time linear equalizer structure according to the embodiment of the present application, where VIN is a PCIE signal input signal, and is output as VOUT after CTLE processing, and the transfer function of the continuous-time linear equalizer is as follows:
the dc gain is as follows:
the ac gain is as follows:
the CTLE is specifically set for the input signals of different signals by setting parameters of R1, R2, C1, C2, and by modifying attenuation of low-frequency and high-frequency portions of different signals.
As an optional embodiment, the compensating, by using a signal compensator, each path of the reference signal stream to obtain multiple paths of target signal streams output by the signal compensator includes:
and inputting the N reference signals and the target signal into a target pre-feedback equalizer to obtain the target signal flow output by the target pre-feedback equalizer, wherein the target pre-feedback equalizer is used for compensating the target signal according to the influence condition of the N reference signals on the target signal, and the signal compensator comprises the target pre-feedback equalizer.
Optionally, in this embodiment of the present application, the number of reference signals may be determined according to the attribute values of the target attributes of the adjusted multiple reference signal flows, that is, when signals in signal flows with different attribute values are compensated, the number of reference signals used may also be different, for example, under some attribute value features, the compensation value of the signal at the current time needs to be determined by using 5 reference signals before the current time, and under another attribute value feature, the compensation value of the signal at the current time may need to be determined by using 8 reference signals before the current time, so that the number of target signals (i.e., N) corresponding to the attribute values of the target attributes of the adjusted multiple reference signal flows may be determined from the number of signals with a corresponding relationship and the attribute values.
Through the above, the reference signal and the target signal are processed by using the target pre-feedback equalizer, so that the target signal is compensated according to the influence condition of a plurality of reference signals on the current target signal, and the accuracy rate of compensating the target signal is improved.
As an alternative embodiment, the inputting the N reference signals and the target signal into the target pre-feedback equalizer includes:
and respectively inputting N reference signals and the target signal into corresponding reference pre-feedback equalizers in the N+1-stage reference pre-feedback equalizer according to a time sequence, wherein the target pre-feedback equalizer comprises the N+1-stage parallel reference pre-feedback equalizer.
Optionally, in the embodiment of the present application, the core function of the pre-feedback equalizer is to implement setting and modifying the sampling latch threshold at the speed of the input baud rate through an analog circuit, so as to reduce the influence of ISI on signal identification by processing the signal transmitted by the CTLE. FIG. 5 is a comparison diagram of an alternative signal flow according to an embodiment of the present application, as shown in FIG. 5, for a received signal flow "0 1 1 1 1 10 1 0", the left side is a signal flow that is not processed by the target pre-feedback equalizer, and the right side is a signal flow that is processed by the target pre-feedback equalizer, and when the signal flow is not processed by the DFE, since the pre-data is a long input string 1, this results in erroneous recognition of data 1 due to voltage failing to decrease in time when the data string is suddenly changed to 0, thereby resulting in error reporting
Through the steps, the N+1-level parallel reference pre-feedback equalizer is arranged in the mu white pre-feedback equalizer, so that each level of reference pre-feedback equalizer processes one level of signal, the influence condition of the reference signals of each level on the value of the target signal is determined, and the accuracy of the compensated target signal value is improved.
As an alternative embodiment, before the N reference signals and the target signal are respectively input to the corresponding reference prefeed equalizer of the n+1 stage reference prefeed equalizer in the time sequence, the method further includes:
determining a target sampling latch threshold value corresponding to a target baud rate of a current PCIE signal flow from the baud rate and the sampling latch threshold value which have corresponding relations, wherein the current PCIE signal flow is the PCIE signal flow corresponding to the reference signal flow to be compensated currently;
and setting the sampling latch threshold value of the reference pre-feedback equalizer as the target sampling latch threshold value.
Optionally, in the embodiment of the present application, the target pre-feedback equalizer sets a corresponding reference pre-feedback equalizer for the reference signal and the target signal, such as H1, H2, H3, etc. for the pre-stage input data. Through the influence of parameters such as H1, H2, the signal value at the current moment is correspondingly modified, for example, in the current example, the first 5 data are all 1, and then all the H1, H2, H3, H4 and H5 have lifting influence on the threshold value of the current data, so that the current sampled data can be accurately sampled within the threshold value range. Fig. 6 is an alternative reference pre-feedback equalizer topology according to an embodiment of the present application, as shown in fig. 6 Vin, for the last input data, +h1 and-H1 are preset solid state values. The pre-feedback equalizer controls 2 latches and adders, as for +h1 or-H1 functioning, depending on whether the last input data was 0 or 1, and finally the last output is selected by the last decision selector, the last 1-tap feedforward equalizer, if designed as n-level signals, the n above equalizers are connected in parallel for implementing the function of the pre-equalizer.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk), comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method described in the embodiments of the present application.
The embodiment also provides a signal compensation device, which is used for implementing the above embodiment and the preferred implementation manner, and is not described in detail. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.
Fig. 7 is a block diagram of a signal compensation device according to an embodiment of the present application, where, as shown in fig. 7, the device includes a receiving module, configured to receive multiple PCIE signal flows;
the adjusting module is used for adjusting target attribute values of target signal attributes of the PCIE signal flows to obtain multiple paths of reference signal flows, wherein the target signal attributes are signal attributes of compensation parameters used for determining a signal compensation stage in the signal attributes of the PCIE signal flows, and differences among the reference attribute values of the target signal attributes of the multiple paths of reference signal flows are smaller than target values;
the compensation module is used for compensating each path of reference signal stream by using a signal compensator to obtain multiple paths of target signal streams output by the signal compensator, wherein the signal compensator is used for compensating the target signals at the current moment in each path of reference signal streams according to N reference signals before the current moment in each path of reference signal streams, the target compensation parameters used by the signal compensator are determined according to the reference attribute values of the multiple paths of reference signal streams, and N is an integer greater than or equal to 2.
Through the above, after the multipath PCIE signal streams are received, the target attribute values of the target signal attributes of the multipath PCIE signals are adjusted, so that the difference value between the reference attribute values of the target signal attributes of the multipath reference signal streams is smaller than the target value, the consistency of the target signal attributes of the multipath reference signal streams is further ensured, the compensation pressure for compensating the isolated reference signal streams by using the signal compensator is reduced, and when the multipath reference signal streams are compensated by using the signal compensator, the target signals at the current moment in each path of reference signal streams are compensated according to N reference signals before the current moment in each path of reference signal streams, the target signals at the current moment are compensated according to the reference signals before the current moment, and the problem of intersymbol interference in the signal streams is further avoided.
Optionally, the adjusting module includes: the determining unit is used for determining the adjusting parameters of each PCIE signal flow according to the target attribute values of the plurality of PCIE signal flows, wherein the target adjusting parameters are used for indicating the adjusting direction and the adjusting value of the target attribute values;
and the adjusting unit is used for adjusting each path of PCIE signal flow according to the target adjusting parameters of each path of PCIE signal flow to obtain the reference signal flow.
Optionally, the determining unit is configured to:
calculating a target difference value between signal amplitudes of the PCIE signal flows, wherein the target attribute value comprises the signal amplitudes;
and determining the target adjusting parameter corresponding to the target difference value from the difference value and the adjusting parameter with the corresponding relation.
Optionally, the adjusting unit is configured to:
determining a target alternating current gain corresponding to the target adjusting parameter value from the adjusting parameter value and the alternating current gain which have corresponding relations;
acquiring a target capacitance value corresponding to the target alternating current gain;
setting the capacitance of the initial continuous time linear equalizer as the target capacitance value to obtain the target continuous time linear equalizer;
and adjusting the PCIE signal flow by using the target continuous time linear equalizer to obtain the reference signal flow.
Optionally, the compensation module includes:
the input unit is configured to input N reference signals and the target signal into a target pre-feedback equalizer, to obtain the target signal stream output by the target pre-feedback equalizer, where the target pre-feedback equalizer is configured to compensate the target signal according to the influence condition of the N reference signals on the target signal, and the signal compensator includes the target pre-feedback equalizer.
Optionally, the input unit is configured to:
and respectively inputting N reference signals and the target signal into corresponding reference pre-feedback equalizers in the N+1-stage reference pre-feedback equalizer according to a time sequence, wherein the target pre-feedback equalizer comprises the N+1-stage parallel reference pre-feedback equalizer.
Optionally, the apparatus further includes:
a determining module, configured to determine, before the N reference signals and the target signals are respectively input to the reference pre-feedback equalizer corresponding to the n+1-stage reference pre-feedback equalizer according to the time sequence, a target sampling latch threshold corresponding to a target baud rate of a current PCIE signal flow from baud rates and sampling latch thresholds having a corresponding relationship, where the current PCIE signal flow is the PCIE signal flow corresponding to the reference signal flow to be compensated currently;
and the setting module is used for setting the sampling latch threshold value of the reference pre-feedback equalizer as the target sampling latch threshold value.
It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the above modules may be located in different processors in any combination.
Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
Embodiments of the present application also provide an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor, and an input/output device connected to the processor.
Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.
It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code executable by computing devices, so that they may be stored in a storage device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application should be included in the protection scope of the present application.
Claims (10)
1. A method of compensating a signal, comprising:
receiving multiple PCIE signal streams;
adjusting target attribute values of target signal attributes of the multiple PCIE signal streams to obtain multiple reference signal streams, wherein the target signal attributes are signal attributes of compensation parameters used for determining a signal compensation stage in the signal attributes of the PCIE signal streams, and differences among the reference attribute values of the target signal attributes of the multiple reference signal streams are smaller than target values;
and compensating each path of reference signal stream by using a signal compensator to obtain multiple paths of target signal streams output by the signal compensator, wherein the signal compensator is used for compensating the target signal at the current moment in each path of reference signal stream according to N reference signals before the current moment in each path of reference signal stream, the target compensation parameters used by the signal compensator are determined according to the reference attribute values of the multiple paths of reference signal streams, and N is an integer greater than or equal to 2.
2. The method of claim 1, wherein adjusting the target attribute value of the target signal attribute of the multiple PCIE signal flows comprises:
determining a target adjustment parameter of each PCIE signal flow according to the target attribute values of the plurality of PCIE signal flows, wherein the adjustment parameter is used for indicating an adjustment direction and an adjustment value of the target attribute value;
and regulating each PCIE signal flow according to the target regulation parameters of each PCIE signal flow, so as to obtain the reference signal flow.
3. The method of claim 2, wherein the determining the target adjustment parameter for each PCIE signal flow according to the target attribute values of the multiple PCIE signal flows comprises:
calculating a target difference value between signal amplitudes of the PCIE signal flows, wherein the target attribute value comprises the signal amplitudes;
and determining the target adjusting parameter corresponding to the target difference value from the difference value and the adjusting parameter with the corresponding relation.
4. The method of claim 2, wherein adjusting each PCIE signal flow according to the target adjustment parameter of each PCIE signal flow to obtain the reference signal flow includes:
determining a target alternating current gain corresponding to the target adjusting parameter value from the adjusting parameter value and the alternating current gain which have corresponding relations;
acquiring a target capacitance value corresponding to the target alternating current gain;
setting the capacitance of the initial continuous time linear equalizer as the target capacitance value to obtain the target continuous time linear equalizer;
and adjusting the PCIE signal flow by using the target continuous time linear equalizer to obtain the reference signal flow.
5. The method of claim 1, wherein the compensating each of the reference signal streams using a signal compensator to obtain a plurality of target signal streams output by the signal compensator, comprises:
and inputting the N reference signals and the target signal into a target pre-feedback equalizer to obtain the target signal flow output by the target pre-feedback equalizer, wherein the target pre-feedback equalizer is used for compensating the target signal according to the influence condition of the N reference signals on the target signal, and the signal compensator comprises the target pre-feedback equalizer.
6. The method of claim 5, wherein said inputting N of said reference signals and said target signal into a target pre-feedback equalizer comprises:
and respectively inputting N reference signals and the target signal into corresponding reference pre-feedback equalizers in the N+1-stage reference pre-feedback equalizer according to a time sequence, wherein the target pre-feedback equalizer comprises the N+1-stage parallel reference pre-feedback equalizer.
7. The method of claim 6, wherein prior to said inputting N of said reference signals and said target signal in time sequence to respective ones of said n+1 stage reference pre-feedback equalizers, said method further comprises:
determining a target sampling latch threshold value corresponding to a target baud rate of a current PCIE signal flow from the baud rate and the sampling latch threshold value which have corresponding relations, wherein the current PCIE signal flow is the PCIE signal flow corresponding to the reference signal flow to be compensated currently;
and setting the sampling latch threshold value of the reference pre-feedback equalizer as the target sampling latch threshold value.
8. A signal compensation device, comprising:
the receiving module is used for receiving multiple PCIE signal streams;
the adjusting module is used for adjusting target attribute values of target signal attributes of the PCIE signal flows to obtain multiple paths of reference signal flows, wherein the target signal attributes are signal attributes of compensation parameters used for determining a signal compensation stage in the signal attributes of the PCIE signal flows, and differences among the reference attribute values of the target signal attributes of the multiple paths of reference signal flows are smaller than target values;
the compensation module is used for compensating each path of reference signal stream by using a signal compensator to obtain multiple paths of target signal streams output by the signal compensator, wherein the signal compensator is used for compensating the target signals at the current moment in each path of reference signal streams according to N reference signals before the current moment in each path of reference signal streams, the target compensation parameters used by the signal compensator are determined according to the reference attribute values of the multiple paths of reference signal streams, and N is an integer greater than or equal to 2.
9. A computer readable storage medium, characterized in that a computer program is stored in the computer readable storage medium, wherein the computer program, when being executed by a processor, implements the steps of the method according to any of the claims 1 to 7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method of any one of claims 1 to 7 when the computer program is executed.
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