CN117318465A - High voltage electronic load with voltage buffer circuit - Google Patents
High voltage electronic load with voltage buffer circuit Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H02M1/34—Snubber circuits
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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Abstract
Description
技术领域Technical field
本发明是有关于电子负载的电路设计,特别是有关于一种具有电压缓冲电路的高压电子负载。The present invention relates to the circuit design of an electronic load, and in particular to a high-voltage electronic load with a voltage buffer circuit.
背景技术Background technique
目前,电动车及储能产业的发展,朝向高电压高功率发展。在电动车及储能产业领域中,包括了充电器或高电压电池。当测试充电器或高电压电池时就需要负载。负载可以采用实际负载(例如马达或指定的电器设备)或是使用可模拟实际负载的电子负载。At present, the development of electric vehicles and energy storage industry is moving towards high voltage and high power. In the field of electric vehicles and energy storage industry, it includes chargers or high-voltage batteries. A load is required when testing chargers or high voltage batteries. The load can be an actual load (such as a motor or specified electrical equipment) or an electronic load that can simulate the actual load.
以充电器为例,充电器的输入电能是电网的市电,而充电器所输出的高电压直流电可用于对车载的高电压电池充电,所以充电器的输出端的实际负载是电池。当电池充电完成后就由电池所储存的电力经由逆变器(Inverter)驱动马达及相关电器设备。所以电池释放电能时,电池就成为电源以供应电能,电池的实际负载是逆变器及所连接的马达。Take the charger as an example. The input power of the charger is the mains power of the power grid, and the high-voltage direct current output by the charger can be used to charge the high-voltage battery on the vehicle. Therefore, the actual load at the output end of the charger is the battery. When the battery is charged, the power stored in the battery drives the motor and related electrical equipment through the inverter. So when the battery releases power, the battery becomes the power source to supply power, and the actual load of the battery is the inverter and the connected motor.
欲对充电器的各项电性能进行测试时,若使用实际的电池来测试,需要较长时间来充电,电池的电压是随着电池电量的对应值。由于电池无法由外部控制电压,所以产业上都使用电子负载来模拟电池。When you want to test the various electrical properties of the charger, if you use an actual battery to test, it will take a longer time to charge. The voltage of the battery corresponds to the battery power. Since the battery voltage cannot be controlled externally, electronic loads are used in the industry to simulate batteries.
采用电子负载的优势是由于电子负载具有各种负载模式,包含定电流、定电阻、定电压、定功率等负载模式。控制负载模式的参数就可以很容易又快速地测试充电器的各项特性、功能及规格等数据。The advantage of using electronic loads is that electronic loads have various load modes, including constant current, constant resistance, constant voltage, constant power and other load modes. By controlling the parameters of the load mode, you can easily and quickly test the charger's various features, functions, specifications and other data.
电池的充电器有车载充电器或充电站的快速充电,其作用都是对电动车的动力电池充电储存电能。充电器对电池的充电程序是定电流及定电压充电。一般是初期用定电流对电池充电,接近充满电时再改用定电压充电。充电器若用电池来测试,因电池充电需耗费数十分钟到数小时,显然不能满足有效率的检测需求。因此,采用电子负载来测试充电器,此时电子负载是模拟电池的端电压。在充电时期,电池是充电器的负载,使用电子负载的定电压或定电阻模式来模拟电池的端电压或充电负载电阻。The battery charger includes a car charger or a fast charger at a charging station. Its function is to charge and store electric energy in the power battery of an electric vehicle. The charger's charging procedure for the battery is constant current and constant voltage charging. Generally, the battery is charged with constant current in the initial stage, and then switched to constant voltage charging when it is nearly fully charged. If the charger is tested using a battery, charging the battery will take tens of minutes to several hours, which obviously cannot meet the requirements for efficient testing. Therefore, an electronic load is used to test the charger. At this time, the electronic load simulates the terminal voltage of the battery. During the charging period, the battery is the load of the charger, and the constant voltage or constant resistance mode of the electronic load is used to simulate the terminal voltage of the battery or the charging load resistance.
另一方面,对电池测试时,虽然可以使用实际的逆变器及马达来做为负载,若使用逆变器及所连接的马达,负载电流会随电池电压及马达转速及扭力等变化。由于逆变器及马达的控制较为复杂,因此大都使用电子负载的定电流或定功率模式来作为电池放电提供电能输出的负载,可以很容易控制电池放电的电流或电功率。所以产业上都使用电子负载来模拟各种负载模式,包含定电流、定电阻、定电压、定功率等负载模式。控制负载模式的参数就可以很容易又快速测试电池的各项特性、功能及规格等,对电池的放电性能检测非常方便。.On the other hand, when testing the battery, although the actual inverter and motor can be used as the load, if an inverter and a connected motor are used, the load current will change with the battery voltage and motor speed and torque. Since the control of inverters and motors is relatively complex, the constant current or constant power mode of electronic loads is mostly used as a load to provide electric energy output for battery discharge, which can easily control the current or electric power of battery discharge. Therefore, electronic loads are used in the industry to simulate various load modes, including constant current, constant resistance, constant voltage, constant power and other load modes. By controlling the parameters of the load mode, you can easily and quickly test various characteristics, functions and specifications of the battery. It is very convenient to test the discharge performance of the battery. .
由于产业持续往高功率发展,可以取得充电时较快速的充电时间及使用电动车时较长的行驶里程,因此电压不断提升,目前已超过1000V,往1500V提升中,除此之外,电功率也不断提高。As the industry continues to develop towards high power, it can achieve faster charging times and longer driving ranges when using electric vehicles. Therefore, the voltage continues to increase. It has currently exceeded 1000V and is increasing towards 1500V. In addition, the electric power is also Continuous improving.
由于功率半导体元件,包括双极晶体管(bipolar)、金属氧化物场效应晶体管(MOSFET)、绝缘栅极双极性晶体管(IGBT)、碳化硅SIC等,单个功率元件的额定电压有限,超过1500V的功率半导体的成本高,因此一般会采用2个功率晶体管串联方式来达到提升功率元件的额定电压。Due to power semiconductor components, including bipolar transistors (bipolar), metal oxide field effect transistors (MOSFET), insulated gate bipolar transistors (IGBT), silicon carbide SIC, etc., the rated voltage of a single power component is limited and exceeds 1500V. The cost of power semiconductors is high, so two power transistors are generally connected in series to increase the rated voltage of the power component.
发明内容Contents of the invention
虽然高压电子负载具备高度的产业利用价值,但在高压电子负载的现有技术中,仍存在一些问题。例如,分压电路因受到后级电路设计的不当而存在负载效应的问题或是后级电路受到输入电流的影响。此外,当高压电子负载在高电压的待测试电源瞬间加载时,负载回路中的第一功率元件与第二功率元件的电压往往无法受到有效的平均分配。Although high-voltage electronic loads have high industrial utilization value, there are still some problems in the existing technology of high-voltage electronic loads. For example, the voltage divider circuit has load effect problems due to improper design of the subsequent circuit or the subsequent circuit is affected by the input current. In addition, when a high-voltage electronic load is instantaneously loaded with a high-voltage power supply to be tested, the voltages of the first power element and the second power element in the load circuit often cannot be effectively evenly distributed.
在现有技术中,有业者采用电流增强型驱动电路,将取自于分压电路的前级电流以电流增益的方式(例如以达林顿晶体管)产生一增强的后级电流,再据以驱动负载回路中的功率元件。如此的做法,往往会产生分压电路的负载效应问题或是后级电路受到输入电流的影响。且此一现有技术,须配置一额外电压给电流增强型驱动电路使用。更者,在多组功率晶体管并联提升功率的应用时,必须在每一个负载回路中配置一电流增强型驱动电路,如此增加了电路的复杂性。In the existing technology, some manufacturers use current-enhanced driving circuits to generate an enhanced rear-stage current by using the front-stage current taken from the voltage divider circuit in the form of current gain (for example, using a Darlington transistor), and then use Drive the power components in the load circuit. Such an approach will often cause the load effect of the voltage divider circuit or the subsequent circuit to be affected by the input current. Moreover, this prior art requires an additional voltage to be configured for the current-enhanced driving circuit. Furthermore, in applications where multiple groups of power transistors are connected in parallel to increase power, a current enhancement drive circuit must be configured in each load circuit, which increases the complexity of the circuit.
鉴于现有技术的缺失,本发明的目的是提供一种具有电压缓冲电路的高压电子负载。In view of the lack of existing technology, the object of the present invention is to provide a high-voltage electronic load with a voltage buffer circuit.
本发明解决问题的技术手段是在高压电子负载中包括有一第一功率元件和一与该第一功率元件串联的第二功率元件构成一负载回路。一分压电路依据一待测电压值产生一分压电压。一电流感测电路串联连接于该负载回路。一电流控制电路,连接于该电流感测电路。一电压缓冲电路连接在一分压电路和该第一功率元件之间。该电压缓冲电路包括一第三功率元件,其栅极连接在该分压电路的该分压连接点、漏极连接在该第一功率元件的漏极、源极连接在该第一功率元件的栅极,该第三功率元件的源极还通过一第三电阻连接到该第二连接线。The technical means for solving the problem of the present invention is to include a first power element and a second power element connected in series with the first power element in a high-voltage electronic load to form a load loop. A voltage dividing circuit generates a divided voltage according to a voltage value to be measured. A current sensing circuit is connected in series to the load loop. A current control circuit is connected to the current sensing circuit. A voltage buffer circuit is connected between a voltage dividing circuit and the first power component. The voltage buffer circuit includes a third power element, the gate of which is connected to the voltage dividing connection point of the voltage dividing circuit, the drain is connected to the drain of the first power element, and the source is connected to the first power element. The gate electrode and the source electrode of the third power element are also connected to the second connection line through a third resistor.
本发明的另一实施例,是在高压电子负载中包括有一第一功率元件和一与该第一功率元件串联的第二功率元件构成一负载回路。一分压电路依据一待测电压值产生一分压电压。一电流感测电路串联连接于该负载回路。一电流控制电路,连接于该电流感测电路。一电压缓冲电路连接在一分压电路和该第一功率元件之间。该电压缓冲电路相对于该分压电路的该第二电阻具有高输入阻抗,且该电压缓冲电路相对于该第一功率元件具有低输出阻抗。In another embodiment of the present invention, a high-voltage electronic load includes a first power component and a second power component connected in series with the first power component to form a load loop. A voltage dividing circuit generates a divided voltage according to a voltage value to be measured. A current sensing circuit is connected in series to the load loop. A current control circuit is connected to the current sensing circuit. A voltage buffer circuit is connected between a voltage dividing circuit and the first power component. The voltage buffer circuit has a high input impedance relative to the second resistor of the voltage dividing circuit, and the voltage buffer circuit has a low output impedance relative to the first power component.
本发明的再一实施例,是在高压电子负载中包括多个负载回路,每一个负载回路中包括至少一第一功率元件和一与该第一功率元件串联的第二功率元件。一分压电路依据一待测电压值产生一分压电压。多个电流感测电路分别串联连接于该负载回路。多个电流控制电路,分别连接于该电流感测电路。一电压缓冲电路连接在分压电路和该多个负载回路中的第一功率元件之间。In yet another embodiment of the present invention, a high-voltage electronic load includes a plurality of load circuits, and each load circuit includes at least a first power component and a second power component connected in series with the first power component. A voltage dividing circuit generates a divided voltage according to a voltage value to be measured. A plurality of current sensing circuits are respectively connected in series to the load circuit. A plurality of current control circuits are respectively connected to the current sensing circuit. A voltage buffer circuit is connected between the voltage dividing circuit and the first power components in the plurality of load circuits.
在功效方面,本发明中的分压电路采用2个具有高电阻值的电阻,而电压缓冲电路具有高输入阻抗可避免对分压电路的分压电阻造成负载效应,且不会受到输入电流的影响。此外,电压缓冲电路具有低输出阻抗可有效驱动负载回路中的第一功率元件。在实际应用时,本发明的高压电子负载在待测试电源瞬间加载时,负载回路中的第一功率元件与第二功率元件的电压可以受到有效的平均分配。In terms of efficacy, the voltage dividing circuit in the present invention uses two resistors with high resistance values, and the voltage buffer circuit has a high input impedance to avoid loading effects on the voltage dividing resistors of the voltage dividing circuit and will not be affected by the input current. Influence. In addition, the voltage buffer circuit has low output impedance and can effectively drive the first power component in the load loop. In practical applications, when the high-voltage electronic load of the present invention is instantaneously loaded with the power supply to be tested, the voltages of the first power element and the second power element in the load circuit can be effectively and evenly distributed.
本发明中,由于电压缓冲电路中的功率元件的漏极连接到负载回路中的第一功率元件的漏极,故不需要现有技术中额外施加的电压源,可简化额外的电路设计。In the present invention, since the drain of the power element in the voltage buffer circuit is connected to the drain of the first power element in the load circuit, there is no need for an additional applied voltage source in the prior art, and additional circuit design can be simplified.
本发明应用于多组功率晶体管并联提升功率的实施例中,仅需要一个电压缓冲电路即可驱动多个负载回路的各个功率元件,而不需要设置多个分压电路以及多个电压缓冲电路,故可有效简化了电路的复杂性。The present invention is applied to embodiments in which multiple groups of power transistors are connected in parallel to increase power. Only one voltage buffer circuit is needed to drive each power element of multiple load circuits, without the need to set up multiple voltage dividing circuits and multiple voltage buffer circuits. Therefore, the complexity of the circuit can be effectively simplified.
本发明所采用的具体技术,将通过以下的实施例及附图作进一步的说明。The specific technology used in the present invention will be further explained through the following examples and drawings.
附图说明Description of drawings
图1是本发明第一实施例的系统方块图。Figure 1 is a system block diagram of the first embodiment of the present invention.
图2是本发明第一实施例的电路示意图。Figure 2 is a schematic circuit diagram of the first embodiment of the present invention.
图3是本发明第二实施例的系统方块图。Figure 3 is a system block diagram of the second embodiment of the present invention.
附图标号:Reference number:
1、1a:高压电子负载1. 1a: High voltage electronic load
2:待测电源2: Power supply to be tested
3:分压电路3: Voltage dividing circuit
4:电流控制电路4: Current control circuit
5:电压缓冲电路5: Voltage buffer circuit
AMP:放大器AMP: amplifier
C1:补偿电容C1: Compensation capacitor
L、La、Lb:负载回路L, La, Lb: load circuit
L1:第一连接线L1: first connection line
L2:第二连接线L2: Second connection line
IL:负载电流IL: load current
M1:第一功率元件M1: the first power component
M2:第二功率元件M2: Second power element
M3:第三功率元件M3: The third power element
R1:第一电阻R1: first resistor
R2:第二电阻R2: second resistor
R3:第三电阻R3: The third resistor
Rs:感测电阻Rs: sensing resistance
S1:功率元件控制信号S1: Power component control signal
V1:待测电压值V1: voltage value to be measured
V2:感测电压V2: sensing voltage
Vd:分压电压Vd: divided voltage
Vs:电流控制信号Vs: current control signal
具体实施方式Detailed ways
同时参阅图1、图2所示,其显示本发明第一实施例的高压电子负载1经由第一连接线L1与一第二连接线L2连接于一待测电源2。高压电子负载1包括一第一功率元件M1、一第二功率元件M2、一感测电阻Rs、一分压电路3、一电流控制电路4、一电压缓冲电路5。Referring to FIGS. 1 and 2 simultaneously, a high-voltage electronic load 1 according to a first embodiment of the present invention is connected to a power source 2 to be tested via a first connection line L1 and a second connection line L2. The high-voltage electronic load 1 includes a first power element M1, a second power element M2, a sensing resistor Rs, a voltage dividing circuit 3, a current control circuit 4, and a voltage buffer circuit 5.
第一功率元件M1、第二功率元件M2、感测电阻Rs三者呈串联连接构成一负载回路L,再经由该第一连接线L1与该第二连接线L2连接于该待测电源2。The first power element M1, the second power element M2, and the sensing resistor Rs are connected in series to form a load loop L, and are connected to the power supply 2 under test via the first connection line L1 and the second connection line L2.
第一功率元件M1的漏极是连接于第一连接线L1,源极则连接于第二功率元件M2的漏极。第二功率元件M2的源极在串联连接感测电阻Rs后连接至第二连接线L2。感测电阻Rs用以感测通过该负载回路L的负载电流IL大小。The drain of the first power element M1 is connected to the first connection line L1, and the source is connected to the drain of the second power element M2. The source of the second power element M2 is connected to the second connection line L2 after the sensing resistor Rs is connected in series. The sensing resistor Rs is used to sense the size of the load current IL passing through the load loop L.
分压电路3并联连接于该第一连接线L1与该第二连接线L2之间。分压电路3由第一电阻R1、第二电阻R2串联构成。The voltage dividing circuit 3 is connected in parallel between the first connection line L1 and the second connection line L2. The voltage dividing circuit 3 is composed of a first resistor R1 and a second resistor R2 connected in series.
电流控制电路4连接于该第二功率元件M2的栅极与感测电阻Rs。电流控制电路4依据负载电流IL大小与电流控制信号Vs而产生一功率元件控制信号S1至该第二功率元件M2的栅极。电流控制信号Vs与感测电阻Rs决定了通过该第一功率元件M1、第二功率元件M2、感测电阻Rs的负载电流IL的大小。The current control circuit 4 is connected to the gate of the second power element M2 and the sensing resistor Rs. The current control circuit 4 generates a power element control signal S1 to the gate of the second power element M2 based on the load current IL and the current control signal Vs. The current control signal Vs and the sensing resistor Rs determine the magnitude of the load current IL passing through the first power element M1, the second power element M2, and the sensing resistor Rs.
较佳实施例中,电流控制电路4中包括有一电流控制信号Vs、一放大器AMP。放大器AMP的一输入端连接于电流控制信号Vs,另一输入端连接于感测电阻Rs与第二功率元件M2之间,其输出端连接于该第二功率元件M2的栅极。放大器AMP依据负载电流IL流过感测电阻Rs时在感测电阻Rs所产生的感测电压V2与电流控制信号Vs而产生功率元件控制信号S1至该第二功率元件M2的栅极。In the preferred embodiment, the current control circuit 4 includes a current control signal Vs and an amplifier AMP. One input terminal of the amplifier AMP is connected to the current control signal Vs, the other input terminal is connected between the sensing resistor Rs and the second power element M2, and its output terminal is connected to the gate of the second power element M2. The amplifier AMP generates the power element control signal S1 to the gate of the second power element M2 based on the sensing voltage V2 generated by the sensing resistor Rs and the current control signal Vs when the load current IL flows through the sensing resistor Rs.
在前述的电路架构中,第一电阻R1、第二电阻R2一般设定为待测电压值V1的一半作为分压电压Vd,因此第一功率元件M1及第二功率元件M2各承受1/2Vd的电压。In the aforementioned circuit structure, the first resistor R1 and the second resistor R2 are generally set to half of the voltage value V1 to be measured as the divided voltage Vd. Therefore, the first power element M1 and the second power element M2 each bear 1/2Vd. voltage.
由第二功率元件M2、放大器AMP及感测电阻Rs组成的电路,其负载电流与流过第一功率元件M1的负载电流IL相等。故负载电流IL若由电流控制信号Vs所控制,而输入电压可达第一功率元件M1或第二功率元件M2额定电压的2倍。The load current of the circuit composed of the second power element M2, the amplifier AMP and the sensing resistor Rs is equal to the load current IL flowing through the first power element M1. Therefore, if the load current IL is controlled by the current control signal Vs, the input voltage can reach twice the rated voltage of the first power element M1 or the second power element M2.
本发明在分压电路3和第一功率元件M1之间包括电压缓冲电路5(Voltagebuffer)。电压缓冲电路5中包括一第三功率元件M3。第三功率元件M3以MOSFET为例,其栅极连接于第一电阻R1、第二电阻R2的分压连接点,漏极连接到第一功率元件M1的漏极,源极连接到第一功率元件M1的栅极。The present invention includes a voltage buffer circuit 5 (Voltagebuffer) between the voltage dividing circuit 3 and the first power element M1. The voltage buffer circuit 5 includes a third power component M3. The third power element M3 takes a MOSFET as an example. Its gate is connected to the voltage dividing connection point of the first resistor R1 and the second resistor R2, its drain is connected to the drain of the first power element M1, and its source is connected to the first power Gate of element M1.
分压电路3的第一电阻R1与第二电阻R2的分压连接点依据待测电源2的待测电压值V1的大小而产生一分压电压Vd至第三功率元件M3的栅极。分压电压Vd约为待测电压值V1的1/2。由于待测电压值V1的电压高,为避免造成高压电子负载的负载效应,分压电路3中的第一电阻R1、第二电阻R2采用高电阻值(例如数MΩ以上)的电阻元件。The voltage dividing connection point of the first resistor R1 and the second resistor R2 of the voltage dividing circuit 3 generates a divided voltage Vd to the gate of the third power element M3 according to the magnitude of the voltage value V1 to be measured of the power supply 2 to be measured. The divided voltage Vd is approximately 1/2 of the voltage value to be measured V1. Since the voltage value V1 to be measured is high, in order to avoid the load effect of the high-voltage electronic load, the first resistor R1 and the second resistor R2 in the voltage dividing circuit 3 use resistive elements with high resistance values (for example, several MΩ or more).
第一功率元件M1以MOSFET为例,其栅极连接到电压缓冲电路5中的第三功率元件M3的源极。电压缓冲电路5相对于该分压电路3的该第二电阻R2具有高输入阻抗,可避免对分压电路3的第一电阻R1与第二电阻R2造成负载效应。例如,第三功率元件M3的输入阻抗约为第二电阻R2的100倍及以上,使得分压电路3的第一电阻R1与第二电阻R2的分压电压Vd连接到第三功率元件M3的栅极时,电压缓冲电路5不会对分压电路3造成负载效应。The first power element M1 takes a MOSFET as an example, and its gate is connected to the source of the third power element M3 in the voltage buffer circuit 5 . The voltage buffer circuit 5 has a high input impedance relative to the second resistor R2 of the voltage dividing circuit 3, which can avoid causing a load effect on the first resistor R1 and the second resistor R2 of the voltage dividing circuit 3. For example, the input impedance of the third power element M3 is approximately 100 times or more than the second resistor R2, so that the divided voltage Vd of the first resistor R1 and the second resistor R2 of the voltage dividing circuit 3 is connected to the third power element M3. When the gate is connected, the voltage buffer circuit 5 will not cause a load effect on the voltage dividing circuit 3 .
第三功率元件M3的源极连接一第三电阻R3到待测电压值V1的负极,以提供第三功率元件M3的直流工作电压。第三功率元件M3的源极电压为栅极电压(Threshold voltage)减第三功率元件M3的阀值电压。第三功率元件M3工作于线性工作区。第三功率元件M3的源极相对于该第一功率元件M1具有低输出阻抗,可驱动第一功率元件M1的栅极。The source of the third power element M3 is connected to a third resistor R3 to the negative electrode of the voltage value V1 to be measured to provide a DC operating voltage of the third power element M3. The source voltage of the third power element M3 is the gate voltage (Threshold voltage) minus the threshold voltage of the third power element M3. The third power element M3 works in the linear operating region. The source of the third power element M3 has a low output impedance relative to the first power element M1 and can drive the gate of the first power element M1.
第一功率元件M1的源极电压为栅极电压减第一功率元件M1的阀值电压,所以第一功率元件M1的漏极到源极电压为分压电压Vd减第三功率元件M3的阀值电压和第一功率元件M1的阀值电压。对2000V的高电压待测电压值V1而言,分压电压Vd约1000V(伏特),第三功率元件M3的阀值电压和第一功率元件M1的阀值电压约3V~4V,所以第一功率元件M1的漏极到源极电压约为待测电压值V1的1/2,而第二功率元件M2的漏极到源极电压亦约为待测电压值V1的1/2。The source voltage of the first power element M1 is the gate voltage minus the threshold voltage of the first power element M1, so the drain-to-source voltage of the first power element M1 is the divided voltage Vd minus the threshold voltage of the third power element M3 value voltage and the threshold voltage of the first power element M1. For the high voltage to be measured voltage value V1 of 2000V, the divided voltage Vd is about 1000V (volt), the threshold voltage of the third power element M3 and the threshold voltage of the first power element M1 are about 3V~4V, so the first The drain-to-source voltage of the power element M1 is approximately 1/2 of the voltage value V1 to be measured, and the drain-to-source voltage of the second power element M2 is also approximately 1/2 of the voltage value V1 to be measured.
电压缓冲电路5中的第三功率元件M3介于电阻分压电路3及第一功率元件M1之间。第三功率元件M3的源极的电压跟随着栅极电压而变化,其源极电压等于其栅极电压减该第三功率元件M3的阀值电压。The third power element M3 in the voltage buffer circuit 5 is between the resistor voltage dividing circuit 3 and the first power element M1. The source voltage of the third power element M3 changes with the gate voltage, and its source voltage is equal to its gate voltage minus the threshold voltage of the third power element M3.
电压缓冲电路5中还可以包括一补偿电容C1,连接于该第三功率元件M3的栅极和第二连接线L2之间,可用以补偿第三功率元件M3的极间电容(即存在功率元件的漏极、栅极、源极任两者之间所存在的寄生电容),可避免在瞬间施加待测电压值V1时,在第三功率元件M3产生大的涌浪电流。The voltage buffer circuit 5 may also include a compensation capacitor C1, which is connected between the gate of the third power element M3 and the second connection line L2, and can be used to compensate for the interelectrode capacitance of the third power element M3 (i.e., if there is a power element The parasitic capacitance existing between any of the drain, gate, and source) can prevent a large surge current from being generated in the third power element M3 when the voltage value V1 to be measured is applied instantaneously.
在实际应用时,当待测试电源瞬间施加至高压电子负载时所产生的瞬间电压变化率(dv/dt)可能导致第一功率元件与第二功率元件的瞬间电压无法为待测试电源约50%的分压。本发明的上述电路可再搭配在电子负载的输入端的缓冲电路来减缓待测电源与电子负载功率元件间的瞬间电压变化率,让电子负载上的电压呈现缓慢上升的电压波形,进一步确保第一功率元件与第二元件的电压分配在瞬间连接时是各为约50%。In actual applications, the instantaneous voltage change rate (dv/dt) generated when the power supply under test is instantaneously applied to a high-voltage electronic load may cause the instantaneous voltage of the first power element and the second power element to be less than about 50% of the power supply under test. of partial pressure. The above circuit of the present invention can be combined with a buffer circuit at the input end of the electronic load to slow down the instantaneous voltage change rate between the power supply under test and the electronic load power element, so that the voltage on the electronic load presents a slowly rising voltage waveform, further ensuring the first The voltage distribution between the power element and the second element is approximately 50% each when connected instantaneously.
由于电压缓冲电路5具有高输入阻抗、低输出阻抗的电特性。输入阻抗高可避免对分压电路3的分压电阻造成负载效应不会受到输入电流的影响。另,由于电压缓冲电路5中的第三功率元件M3的漏极连接到第一功率元件M1的漏极,故不须其它额外的电压。电压缓冲电路5的低输出阻抗特性可有效驱动第一功率元件M1的栅极。The voltage buffer circuit 5 has electrical characteristics of high input impedance and low output impedance. The high input impedance can avoid the load effect on the voltage dividing resistor of the voltage dividing circuit 3 and will not be affected by the input current. In addition, since the drain of the third power element M3 in the voltage buffer circuit 5 is connected to the drain of the first power element M1, no additional voltage is required. The low output impedance characteristic of the voltage buffer circuit 5 can effectively drive the gate of the first power element M1.
因此,电压缓冲电路5确保了第一功率元件M1和第二功率元件M2能够平均分配为待测电压值V1的各约50%电压值,达到第一功率元件M1和第二功率元件M2串联来提高电压额定值能够正常运作的功能。Therefore, the voltage buffer circuit 5 ensures that the first power element M1 and the second power element M2 can evenly distribute approximately 50% of each voltage value of the voltage value V1 to be measured, so that the first power element M1 and the second power element M2 can be connected in series. Increase the voltage rating to enable proper operation of the feature.
图3是本发明第二实施例的系统方块图。如图所示,本实施例的高压电子负载1a与前述第一实施例的电路大致相同,故相同元件乃标示相同的元件编号,以资对应。本实施例和前述第一实施例的差异在于本实施例的高压电子负载1a中采用多组功率晶体管并联以提升功率。Figure 3 is a system block diagram of the second embodiment of the present invention. As shown in the figure, the high-voltage electronic load 1a of this embodiment is substantially the same as the circuit of the first embodiment, so the same components are marked with the same component numbers for correspondence. The difference between this embodiment and the aforementioned first embodiment is that the high-voltage electronic load 1a of this embodiment uses multiple groups of power transistors connected in parallel to increase power.
图2所示的电路图中是使用两个功率元件串接形成一个负载回路L。基于如图2所示的实施例电路图,可使用两个或两个以上的功率元件串接来提升超过单个功率元件2倍或2倍以上的额定电压控制功率元件所流过的电流,便可作为待测电源的负载,检测待测电源的电压、电流、电功率等参数。In the circuit diagram shown in Figure 2, two power components are connected in series to form a load loop L. Based on the circuit diagram of the embodiment shown in Figure 2, two or more power components can be connected in series to increase the rated voltage of a single power component by more than 2 times or more to control the current flowing through the power component. As the load of the power supply under test, it detects the voltage, current, electric power and other parameters of the power supply under test.
对于高功率的电子负载就使用多个具有两个功率元件串接形成的负载回路来提升功率。例如,一个负载回路的负载电功率可以承受100W(瓦特),若使用10个负载回路并联,此时负载电流可以增加为10倍,所以电子负载的电功率可以提升到1000W,若需要更多的负载电功率就依需求采用更多的功率元件。For high-power electronic loads, multiple load loops formed by connecting two power components in series are used to increase the power. For example, the load electric power of a load circuit can withstand 100W (Watt). If 10 load circuits are connected in parallel, the load current can be increased to 10 times, so the electric power of the electronic load can be increased to 1000W. If more load electric power is needed Just use more power components as needed.
图3所示包括两个负载回路La、Lb,而每一个负载回路La、Lb中的第一功率元件M1的栅极均连接至电压缓冲电路5。故本实施例电路中,仅需要一个电压缓冲电路5即可驱动多个负载回路的各个功率元件,而不需要设置多个分压电路以及多个电压缓冲电路。As shown in FIG. 3 , two load loops La and Lb are included, and the gate of the first power element M1 in each load loop La and Lb is connected to the voltage buffer circuit 5 . Therefore, in the circuit of this embodiment, only one voltage buffer circuit 5 is needed to drive each power element of multiple load circuits, and there is no need to provide multiple voltage dividing circuits and multiple voltage buffer circuits.
以上实施例仅为例示性说明本发明的结构设计,而非用于限制本发明。本领域技术人员均可在本发明的结构设计及精神下,对上述实施例进行修改及变化,唯这些改变仍属本发明的精神及以下所界定的专利范围中。因此本发明的权利保护范围应如权利要求书所列。The above embodiments are only illustrative of the structural design of the present invention and are not intended to limit the present invention. Those skilled in the art can modify and change the above embodiments within the structural design and spirit of the present invention, but these changes still fall within the spirit of the present invention and the patent scope defined below. Therefore, the scope of protection of the present invention should be as listed in the claims.
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