CN117318247A - Low-voltage charging circuit and electronic device - Google Patents

Abstract

The application provides a low-voltage charging circuit and an electronic device, wherein the low-voltage charging circuit comprises a first charging and discharging port, a discharging switch tube, a charging switch tube and a battery management chip, the first charging and discharging port is connected with a first electrode of a battery through the discharging switch tube and the charging switch tube, and the first charging and discharging port is used for being connected with an external power supply; the battery management chip comprises a charging control circuit connected between the first charging and discharging port and the control end of the charging switch tube; the charging control circuit is configured to electrically connect the first charging and discharging port with the control end of the charging switch tube under the condition that the voltage of the battery is smaller than the over-discharging protection voltage, so that the parasitic diode of the discharging switch tube is driven by an external power supply to be conducted with the charging switch tube, and the battery is charged. According to the scheme, under the condition that the battery voltage is lower than the over-discharge protection voltage, the parasitic diode of the discharging switch tube is driven by the external power supply to be conducted with the charging switch tube so as to charge the battery, and the service performance of the battery is improved.

Description

Low-voltage charging circuit and electronic device

Technical Field

The present disclosure relates to the field of low-voltage charging circuits, and particularly to a low-voltage charging circuit and an electronic device.

Background

At present, in the use process of the battery, when the battery voltage is smaller than the over-discharge protection voltage, a driving circuit inside the battery management chip stops working, so that a charging switch tube positioned between a first electrode of the battery and a first charging and discharging port is cut off, and the battery cannot be charged.

Disclosure of Invention

The application provides a low-voltage charging circuit and an electronic device, which are used for solving the problem that the battery cannot be charged when the voltage of the battery is smaller than the over-discharge protection voltage in the related technology.

The first aspect of the application provides a low-voltage charging circuit, which comprises a first charge-discharge port, a discharge switch tube, a charge switch tube and a battery management chip, wherein the first charge-discharge port is connected with a first electrode of a battery through the charge switch tube and is used for being connected with an external power supply; the battery management chip includes: the charging control circuit is connected between the first charging and discharging port and the control end of the charging switch tube; the charging control circuit is configured to electrically connect the first charging and discharging port with the control end of the charging switch tube under the condition that the voltage of the battery is smaller than the over-discharging protection voltage, so that the parasitic diode of the discharging switch tube is driven by an external power supply to be conducted with the charging switch tube, and the battery is charged.

In one embodiment, the battery management chip further comprises a mode controller and a voltage detection circuit; the mode controller is used for controlling the voltage detection circuit to operate under the condition that the voltage of the battery is smaller than the over-discharge protection voltage, so that when the voltage detection circuit detects that the voltage of the battery is larger than a first voltage threshold value, a first enabling signal is sent to the charging control circuit, and the charging control circuit is used for electrically connecting the first charging and discharging port with the control end of the charging switch tube; the first voltage threshold is less than the over-discharge protection voltage.

In one embodiment, the voltage detection circuit is further configured to send a second enable signal to the charge control circuit when the voltage of the battery is detected to be less than or equal to the first voltage threshold, so that the charge control circuit disconnects the electrical connection between the first charge port and the control terminal of the charge switching tube and connects the control terminal of the charge switching tube to ground.

In one embodiment, the battery management chip further comprises a driving circuit, a digital logic circuit and a sampling circuit; the driving circuit is used for starting to work when the sampling circuit detects that the battery is charged to a second voltage threshold value, and stopping to work when the sampling circuit detects that the battery is discharged to an over-discharge protection voltage; the second voltage threshold is larger than the over-discharge protection voltage; the digital logic circuit is used for controlling the voltage detection circuit to stop running through the mode controller under the condition that the driving circuit is monitored to be in a working state, so that the charging control circuit breaks the electrical connection between the first charging and discharging port and the control end of the charging switch tube.

In one embodiment, the battery management chip further includes a linear voltage regulator and a power-on reset circuit, the linear voltage regulator is connected between the first electrode of the battery and the power-on reset circuit, the power-on reset circuit is used for transmitting a first reset signal to the driving circuit when the output voltage of the linear voltage regulator is greater than or equal to a voltage stabilizing threshold value, so that the driving circuit starts to work when the first reset signal is received and the battery is detected to be charged to a second voltage threshold value, and the power-on reset circuit is further used for transmitting a second reset signal to the driving circuit when the output voltage of the linear voltage regulator is smaller than the voltage stabilizing threshold value, so that the driving circuit stops working when the second reset signal is received or the battery is detected to be discharged to an over-discharge protection voltage;

the mode controller comprises an enabling signal generating circuit, a trigger circuit and a first logic NOT circuit; the enabling signal generating circuit is used for sending a first sub-enabling signal to the trigger circuit under the condition that the first reset signal is received, so that the trigger circuit triggers the first logic NOT circuit to output a first control signal, and the first control signal is used for controlling the voltage detection circuit to operate; and/or the enabling signal generating circuit is used for sending a second sub-enabling signal to the trigger circuit under the condition of receiving the second reset signal, so that the trigger circuit triggers the logic NOT circuit to output a second control signal under the control of the digital logic circuit, and the second control signal is used for controlling the voltage detection circuit to stop running.

In one embodiment, the charge control circuit includes a first switching tube, a second switching tube, a first drive tube, a second drive tube, and a bias circuit; the first pole of the first switching tube is connected with the first charge-discharge port, the second pole of the first switching tube is connected with the second pole of the second switching tube, the first pole of the second switching tube is connected with the control end of the charging switching tube, and the control end of the first switching tube and the control end of the second switching tube are grounded through a first driving tube and a second driving tube;

the bias circuit is provided with a first input end, a second input end and an output end, wherein the first input end is connected with the first charge and discharge port, the second input end is connected with the first electrode of the battery, and the output end is connected with the control end of the first driving tube so as to provide bias voltage for the first driving tube;

the second driving tube is configured to be conducted under the condition that the control end is connected with a first enabling signal so as to drive the first switching tube and the second switching tube to be conducted; the second driving tube is configured to be cut off under the condition that the control end is connected with a second enabling signal so as to drive the first switching tube and the second switching tube to be cut off.

In one embodiment, the charge control circuit further comprises a third drive transistor, a fourth drive transistor, and a logic AND gate circuit; the control end of the charging switch tube is grounded through a third driving tube and a fourth driving tube, the control end of the third driving tube is connected with the output end of the bias circuit to enable the third driving tube to be conducted, and the control end of the fourth driving tube is connected with the output end of the logic AND gate circuit;

The logic AND gate circuit is configured to cut off the fourth driving tube under the condition that the first enabling signal is received; and/or the logic AND gate circuit is configured to conduct the fourth driving tube under the condition of receiving the second enabling signal and the first control signal, wherein the first control signal is generated by the mode controller when the voltage of the battery is smaller than the first voltage threshold value.

In one embodiment, the charge control circuit further includes: the third switching tube is connected between a connection point of the second pole of the first switching tube and the second pole of the second switching tube and a connection point of the control end of the first switching tube and the control end of the second switching tube; the third switching tube is configured to be turned off when the control end is connected with the first enabling signal and turned on when the control end is connected with the second enabling signal.

In one embodiment, the battery management chip further comprises at least one of:

the first voltage dividing resistor is connected between the first electrode of the battery and the first input end of the bias circuit;

the second voltage dividing resistor is connected between the first charge and discharge port and the second input end of the bias circuit;

and the third voltage dividing resistor is connected between the control end of the charging switch tube and the first pole of the second switch tube.

A second aspect of the present application provides an electronic device comprising a low voltage charging circuit of any one of the embodiments described above.

The advantages or beneficial effects in the technical scheme at least comprise: the charging control circuit is arranged in the battery management chip and connected between the first charging and discharging port and the control end of the charging switch tube, and the charging control circuit is configured to electrically connect the first charging and discharging port with the control end of the charging switch tube under the condition that the voltage of the battery is smaller than the over-discharging protection voltage, so that when the first charging and discharging port is connected with an external power supply, the external power supply can drive the parasitic diode of the discharging switch tube and the charging switch tube to be conducted, and then the external power supply can charge the battery through the parasitic diode of the discharging switch tube and the charging switch tube. Therefore, under the condition that the battery voltage is lower than the over-discharge protection voltage, the charging control circuit can charge the battery by using an external power supply, so that the battery can be conveniently used under the condition that the battery voltage is lower than the over-discharge protection voltage, the single-use duration of the battery can be prolonged, and the service performance of the battery can be improved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. Furthermore, these drawings and the written description are not intended to limit the scope of the inventive concepts in any way, but rather to illustrate the inventive concepts to those skilled in the art by reference to specific embodiments.

Fig. 1 is a block diagram showing a structure of a charging circuit of the related art.

Fig. 2 is a block diagram of a low-voltage charging circuit according to an embodiment of the present application.

Fig. 3 is a schematic diagram showing the connection of the mode controller, the voltage detection circuit and the charge control circuit in fig. 2.

Fig. 4 is a schematic circuit diagram of the mode controller in fig. 2.

Fig. 5 is a schematic circuit diagram of a charge control circuit.

Detailed Description

Hereinafter, only certain exemplary embodiments are briefly described. As will be recognized by those of skill in the pertinent art, the described embodiments may be modified in various different ways without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.

Fig. 1 is a block diagram showing a structure of a charging circuit of the related art.

As shown in fig. 1, the related art charging circuit 100 includes a first charge-discharge port 100A, a second charge-discharge port 100B, a battery management chip 10, a discharge switching tube M11, and a charge switching tube M12. The battery management chip 10 has a first electrode terminal BAT, a second electrode terminal VSS, a first power supply terminal VDD, a discharge driving terminal DSG, and a charge driving terminal CHG, and a linear voltage regulator 11, a power-on reset circuit 12, and a driving circuit 13 are integrated inside the battery management chip 10.

The first charge/discharge port 100A is connected to the first pole of the battery 20 through the discharge switching tube M11 and the charge switching tube M12, and the second charge/discharge port 100B is connected to the second pole of the battery 20 through the first resistor R1, wherein parasitic diodes are connected between the first pole and the second pole of the discharge switching tube M11 and between the first pole and the second pole of the charge switching tube M12. A second resistor R2 is connected between the first charge/discharge port 100A and the second power supply end PACK, and a third resistor R3 is also connected between the first charge/discharge port 100A and the control end of the discharge switch tube M11. The first electrode terminal BAT and the first power terminal VDD of the battery management chip 10 are both connected to the first electrode of the battery 20, and the second electrode terminal VSS is connected to the second electrode of the battery 20. The first power supply terminal VDD is connected to the driving circuit 13 through the linear voltage stabilizer 11 and the power-on reset circuit 12, and the driving circuit 13 is connected to the control terminal of the discharging switching tube M11 through the discharging driving terminal DSG and to the control terminal of the charging switching tube M12 through the charging driving terminal CHG.

The linear regulator 11 is used to step down the voltage output from the first electrode of the battery 20 to achieve a stable output. The power-on reset circuit 12 is configured to detect the voltage of the battery 20 by detecting the output voltage VREG of the linear voltage regulator 11, so as to control the driving circuit 13 to operate or stop operating according to the detection result. For example, when the voltage of the first electrode of the battery 20 is normal, for example, equal to or greater than the over-discharge protection voltage, the output voltage VREG of the linear voltage regulator 11 is stable, the power-on reset circuit 12 generates the first reset signal vregpro 1, so that the driving circuit 13 can normally operate, and the driving circuit 13 can drive the discharge switching tube M11 and the charge switching tube M12. When the voltage of the first electrode of the battery 20 is too small, for example, smaller than the over-discharge protection voltage, the output voltage VREG of the linear voltage regulator 11 is smaller than the voltage-stabilizing threshold, and the power-on reset circuit 12 generates the second reset signal vregpro 2 to stop the driving circuit 13, and the discharge switching tube M11 and the charge switching tube M12 are both in the off state. At this time, if an external power supply is connected through the first charge and discharge port 100A, the parasitic diode of the discharge switching tube M11 is turned on, and the external power supply may be applied to the first pole of the charge switching tube M12 through the parasitic diode of the discharge switching tube M11, but since the driving circuit 13 cannot drive the charge switching tube M12 so that the charge switching tube M12 is in an off state, the charge and discharge loop between the first charge and discharge port 100A and the first electrode of the battery 20 is still in an off state, and thus the battery 20 cannot be charged. This discharge protection mode prevents the battery 20 from being used under the condition that the voltage of the battery 20 is lower than the over-discharge protection voltage, degrading the use performance of the battery 20.

Fig. 2 is a block diagram of a low-voltage charging circuit according to an embodiment of the present application.

As shown in fig. 2, the low-voltage charging circuit 200 includes a first charge-discharge port 100A, a discharge switching tube M11, a charge switching tube M12, and a battery management chip 10. The first charge/discharge port 100A is connected to a first electrode of the battery 20 through a discharge switching tube M11 and a charge switching tube M12. The first charge and discharge port 100A is used to connect an external power source.

Illustratively, the first charge-discharge port 100A is connected to a second pole of the discharge switching tube M11, a first pole of the discharge switching tube M11 is connected to a first pole of the charge switching tube M12, and a second pole of the charge switching tube M12 is connected to a first electrode of the battery 20. The positive electrode of the parasitic diode of the discharge switch tube M11 is connected with the second electrode of the discharge switch tube M11, and the negative electrode of the parasitic diode of the discharge switch tube M11 is connected with the first electrode of the discharge switch tube M11; the positive electrode of the parasitic diode of the charging switch tube M12 is connected with the second electrode of the charging switch tube M12, and the negative electrode of the parasitic diode of the charging switch tube M12 is connected with the first electrode of the charging switch tube M12. The first electrode of the battery 20 may be a positive electrode, the second electrode of the battery 20 may be a negative electrode, and the second electrode of the battery 20 may be connected to the second charge/discharge port 100B through the first resistor R1. The discharging switch tube M11 and the charging switch tube M12 can be NMOS tubes, wherein the first electrode is a drain electrode, the second electrode is a source electrode, and the control end is a grid electrode; the discharging switch tube M11 and the charging switch tube M12 can also be PMOS tubes according to actual needs.

The battery management chip 10 includes a charge control circuit 14, and the charge control circuit 14 is connected between the first charge/discharge port 100A and the control terminal of the charge switch tube M12. The charge control circuit 14 is configured to electrically connect the first charge/discharge port 100A with the control terminal of the charge switching tube M12 in a case where the voltage of the battery 20 is smaller than the over-discharge protection voltage, so that the parasitic diode of the external power supply driving the discharge switching tube M11 and the charge switching tube M12 are both turned on to charge the battery 20 through the parasitic diode of the discharge switching tube M11 and the charge switching tube M12.

The battery 20 may be a lithium battery, and the over-discharge protection voltage may be set to 2.1V, or may be set according to actual needs. In practical applications, when the voltage of the battery 20 is less than the over-discharge protection voltage, the driving circuit 13 inside the battery management chip 10 stops working, and the charging switch tube M12 cannot be driven. At this time, the charge control circuit 14 inside the battery management chip 10 may electrically connect the first charge/discharge port 100A outside the battery management chip 10 with the control terminal of the charge switching tube M12, such that when the first charge/discharge port 100A is connected to the external power source, the parasitic diode of the discharge switching tube M11 is turned on, and the voltage of the external power source is applied to the control terminal of the charge switching tube M12, so that the charge switching tube M12 is turned on, and thus the external power source may charge the battery 20 through the parasitic diode of the discharge switching tube M11 and the charge switching tube M12.

In the above-mentioned scheme, by providing the charge control circuit 14 inside the battery management chip 10 and connecting the charge control circuit 14 between the first charge/discharge port 100A and the control terminal of the charge switch tube M12, and configuring the charge control circuit 14 to electrically connect the first charge/discharge port 100A and the control terminal of the charge switch tube M12 when the voltage of the battery 20 is less than the over-discharge protection voltage, when the first charge/discharge port 100A is connected to an external power source, the external power source can drive the parasitic diode of the discharge switch tube M11 and the charge switch tube M12 to be both turned on, and then the external power source can charge the battery 20 through the parasitic diode of the discharge switch tube M11 and the charge switch tube M12. In this way, when the voltage of the battery 20 is lower than the over-discharge protection voltage, the charging control circuit 14 can charge the battery 20 by using an external power supply, so that the battery 20 can be conveniently used under the condition that the voltage of the battery 20 is lower than the over-discharge protection voltage, and the single-use duration of the battery 20 can be prolonged, thereby improving the service performance of the battery 20.

Further, in one example, as shown in fig. 2, the battery management chip 10 has a second power supply terminal PACK and a charge driving terminal CHG, the charge control circuit 14 is connected to the first charge-discharge port 100A through the second power supply terminal PACK and the second resistor R2, and the charge control circuit 14 is also connected to the control terminal of the charge switching tube M12 through the charge driving terminal CHG. When the voltage of the battery 20 is smaller than the over-discharge protection voltage, the charging control circuit 14 electrically connects the second power supply terminal PACK with the charging driving terminal CHG, so as to realize the electrical connection between the first charging/discharging port 100A and the control terminal of the charging switch tube M12.

In one embodiment, as shown in fig. 2 and 3, the battery management chip 10 further includes a mode controller 15 and a voltage detection circuit 16. The mode controller 15 is configured to control the voltage detection circuit 16 to operate when the voltage of the battery 20 is less than the over-discharge protection voltage, so that when the voltage detection circuit 16 detects that the voltage of the battery 20 is greater than the first voltage threshold Vref, a first enable signal EN1 is sent to the charge control circuit 14 to cause the charge control circuit 14 to electrically connect the first charge/discharge port 100A with the control terminal of the charge switch tube M12; the first voltage threshold Vref is less than the over-discharge protection voltage.

The mode controller 15 is for outputting the first control signal DR1 in the case where the voltage of the battery 20 is smaller than the over-discharge protection voltage, for example. The voltage detection circuit 16 may be a hysteresis comparator, the voltage detection circuit 16 having a first input, a second input, a control, and an output. The first input terminal of the voltage detection circuit 16 is connected to the first electrode of the battery 20 to access the voltage Vbat of the battery 20, the second input terminal is used for receiving a first voltage threshold Vref provided inside the battery management chip 10, the first voltage threshold Vref may be provided by a reference voltage circuit 17 inside the battery management chip 10, and the output terminal is connected to the charge control circuit 14. The control terminal of the voltage detection circuit 16 is connected to the mode controller 15 to operate the voltage detection circuit 16 when the first control signal DR1 is received, so that the voltage detection circuit 16 compares the voltage Vbat of the battery 20 with the first voltage threshold Vref, and sends the first enable signal EN1 to the charge control circuit 14 through the output terminal when the voltage Vbat of the battery 20 is compared to be greater than the first voltage threshold Vref. The over-discharge protection voltage may be 2.1V, and the first voltage threshold Vref may be 1V.

In the above-described scheme, when the voltage Vbat of the battery 20 is smaller than the over-discharge protection voltage by the mode controller 15, the voltage detection circuit 16 is controlled to operate such that, when the voltage detection circuit 16 detects that the voltage Vbat of the battery 20 is larger than the first voltage threshold Vref, the charging control circuit 14 electrically connects the first charging/discharging port 100A to the control terminal of the charging switch tube M12 by transmitting the first enable signal EN1 to the charging control circuit 14. In this way, when the voltage of the battery 20 is between the first voltage threshold Vref and the over-discharge protection voltage, the charging switch M12 can be turned on and the battery 20 can be charged by using the external power supply.

In one embodiment, as shown in fig. 2 and 3, the voltage detection circuit 16 is further configured to send the second enable signal EN2 to the charge control circuit 14 when detecting that the voltage Vbat of the battery 20 is less than or equal to the first voltage threshold Vref, so that the charge control circuit 14 breaks the electrical connection between the first charge/discharge port 100A and the control terminal of the charge switching tube M12, and connects the control terminal of the charge switching tube M12 to ground.

For example, the voltage detection circuit 16 may be a voltage comparator, and the structure thereof is referred to the above embodiment. When the voltage detection circuit 16 compares the voltage Vbat of the battery 20 to be equal to or less than the first voltage threshold Vref, the second enable signal EN2 is output through the output terminal. Referring to fig. 5, the charge control circuit 14 disconnects the electrical connection between the first charge/discharge port 100A and the charge driving end CHG according to the second enable signal EN2, so as to disconnect the electrical connection between the control ends of the charge switching tube M12, and the charge switching tube M12 is turned off, so that the external power source is disconnected from the battery 20, and the battery 20 is stopped from being charged by the external power source; the charge control circuit 14 also connects the charge driving terminal CHG to ground, and connects the control terminal of the charge switching tube M12 to ground, so that the connection between the first charge/discharge port 100A and the control terminal of the charge switching tube M12 can be completely disconnected, and the charge switching tube M12 is prevented from being turned on due to an abnormality of the external power supply, thereby protecting the battery 20 and the battery management chip 10.

In one embodiment, as shown in fig. 2, the battery management chip 10 further includes a driving circuit 13, a digital logic circuit 18, and a sampling circuit 19. The driving circuit 13 is configured to start operation if the sampling circuit 19 detects that the battery 20 is charged to the second voltage threshold, and stop operation if the sampling circuit 19 detects that the battery 20 is discharged to the over-discharge protection voltage; the second voltage threshold is greater than the over-discharge protection voltage. Illustratively, the over-discharge protection voltage may be 2.1V and the second voltage threshold may be 2.4V. By setting the second voltage threshold to be greater than the over-discharge protection voltage, the driving circuit 13 is still in operation when the voltage of the battery 20 decreases from the second voltage threshold to the over-discharge protection voltage.

The digital logic circuit 18 is configured to control the voltage detection circuit 16 to stop operating through the mode controller 15 when the driving circuit 13 is detected to be in an operating state, so that the charging control circuit 14 disconnects the electrical connection between the first charging/discharging port 100A and the control terminal of the charging switch tube M12. For example, when the digital logic circuit 18 monitors that the driving circuit 13 is in an operating state, a driving signal DA is sent to the mode controller 15, so that the mode controller 15 sends a second control signal DR2 to the voltage detection circuit 16 according to the driving signal DA, so that the voltage detection circuit 16 stops operating, and the charging control circuit 14 is driven to disconnect the electrical connection between the first charging/discharging port 100A and the control terminal of the charging switch tube M12. At this time, the driving circuit 13 can normally drive the charge switch tube M12.

In the above scheme, when the driving circuit 13 is in the working state, the driving circuit 13 can normally drive the charging switch tube M12, and the digital logic circuit 18 controls the voltage detection circuit 16 to stop running through the mode controller 15, so that the charging control circuit 14 disconnects the electrical connection between the first charging and discharging port 100A and the control end of the charging switch tube M12, avoiding repeated driving of the charging switch tube M12, and being more conducive to saving electric energy.

In one embodiment, as shown in fig. 2 to 4, the battery management chip 10 further includes a linear regulator 11 and a power-on reset circuit 12. The linear voltage regulator 11 is connected between the first electrode of the battery 20 and the power-on reset circuit 12, and the power-on reset circuit 12 is configured to send a first reset signal VREGPOR1 to the driving circuit 13 when the output voltage VREG of the linear voltage regulator 11 is equal to or greater than a voltage regulation threshold value, so that the driving circuit 13 starts to operate when the first reset signal VREGPOR1 is received and the battery 20 is detected to be charged to a second voltage threshold value. The power-on reset circuit 12 is further configured to send a second reset signal VREGPOR2 to the driving circuit 13 when the output voltage VREG of the linear voltage regulator 11 is less than the voltage regulation threshold, so that the driving circuit 13 stops working when receiving the second reset signal VREGPOR2 or detecting that the battery 20 is dropped to the over-discharge protection voltage. Wherein the first reset signal VREGPOR1 may be a high level and the second reset signal VREGPOR2 may be a low level. The linear regulator 11 linearly steps down the voltage of the battery 20 and outputs a stabilized voltage, and thus it is possible to detect whether the voltage of the battery 20 is stabilized by detecting the output voltage VREG of the linear regulator 11. For example, when the voltage of the battery 20 is charged to 2.4V, the linear regulator 11 steps down the voltage of the battery 20 and outputs 1.65V, and when the sampling circuit 19 detects that the voltage of the battery 20 is 2.4V and the output voltage VREG of the linear regulator 11 is 1.65V, the power-on reset circuit 12 indicates that the voltage of the battery 20 is high and the output is stable, and then sends the first reset signal vregpro 1 to the driving circuit 13 to start the driving circuit 13. When the voltage of the battery 20 is discharged to 2.1V or the output voltage VREG of the linear regulator 11 is less than 1.65V, which means that the voltage of the battery 20 is low or the output is unstable, the second reset signal VREGPOR2 is supplied to the driving circuit 13 to stop the driving circuit 13. In this way, the operating state of the drive circuit 13 can be controlled according to the operating state of the battery 20.

The mode controller 15 includes an enable signal generation circuit 151, a trigger circuit 152, and a first logical not gate circuit N1. The enable signal generating circuit 151 is configured to send a first sub-enable signal to the trigger circuit 152 when receiving the first reset signal VREGPOR1, so that the trigger circuit 152 triggers the first logic not gate circuit N1 to output the first control signal DR1; the first control signal DR1 is used to control the operation of the voltage detection circuit 16. And/or, the enable signal generating circuit 151 is configured to send a second sub-enable signal to the trigger circuit 152 when receiving the second reset signal VREGPOR2, so that the trigger circuit 152 triggers the first logic not gate circuit N1 to output the second control signal DR2 under the control of the digital logic circuit 18; the second control signal DR2 is used to control the voltage detection circuit 16 to stop operation.

The enable signal generating circuit 151 includes, for example, a first flip-flop S1, a fourth resistor R4, a first capacitor C1, an enable switching tube M21, a second logical not gate N2, and a third logical not gate N3. The first trigger S1 has an input end, an output end and a power end, the input end of the first trigger S1 is connected to the second power end PACK through the fourth resistor R4, the power end of the first trigger S1 is connected to the second power end PACK, the first capacitor C1 is connected in parallel with the fourth resistor R4, the first pole of the enable switch tube M21 is connected to the input end of the first trigger S1, the second pole of the enable switch tube M21 is grounded, and the control end of the enable switch tube M21 is connected to the power-on reset circuit 12 to receive the first reset signal vregpro 1 and the second reset signal vregpro 2 output by the power-on reset circuit 12. The output end of the first flip-flop S1 is connected to the input end of the second logic not gate circuit N2, the output end of the second logic not gate circuit N2 is connected to the input end of the third logic not gate circuit N3, and the output end of the third logic not gate circuit N3 constitutes the output end of the enable signal generating circuit 151. It can be understood that the above example is described taking the enabling switch tube M21 as an NMOS tube as an example, the first electrode of the enabling switch tube M21 is a drain electrode, the second electrode is a source electrode, and the control end is a gate electrode; the enabling switch tube M21 can be replaced by a PMOS tube according to actual needs.

The flip-flop 152 includes a fourth logical not gate N4 and a second flip-flop S2. The second flip-flop S2 includes an input terminal IN, a RESET terminal RESET, a first power supply terminal, a second power supply terminal, and an output terminal. The input end of the fourth logic NOT circuit N4 is connected with the digital logic circuit 18, the output end of the fourth logic NOT circuit N4 is connected with the input end IN of the second trigger S2, the RESET end RESET of the second trigger S2 is connected with the output end of the third logic NOT circuit N3, the first power supply end is connected with the linear voltage stabilizer 11, the linear voltage stabilizer 11 is further used for providing an internal power supply VREG for the first power supply end, the second power supply end is connected with the second power supply end PACK to be connected with an external power supply, and the output end of the second trigger S2 is connected with the input end of the first logic NOT circuit N1.

The operation of the enable signal generation circuit 151 includes: when the second reset signal vregpro 2 accessed by the control end of the enabling switch tube M21 is accessed, namely, a low level is accessed, the enabling switch tube M21 is cut off, the first trigger S1 outputs a low level, and the low level is transmitted to the output end of the third logic NOT circuit N3 through the second logic NOT circuit N2 and the third logic NOT circuit N3 to form a first sub-enabling signal; when the control end of the enabling switch tube M21 is connected to the first reset signal vregpro 1, i.e. connected to a high level, the enabling switch tube M21 is turned on, the input end of the first trigger S1 is grounded, so that the input end of the first trigger S1 is pulled down, the output end of the first trigger S1 outputs a high level, and the high level is transmitted to the output end of the third logic not gate N3 through the second logic not gate N2 and the third logic not gate N3, so as to form a second sub-enabling signal.

The operation of the trigger circuit 152 and the first logic not gate N1 includes: when the RESET end RESET of the second trigger S2 receives the first sub-enable signal, the RESET end RESET of the second trigger S2 is pulled down, and the output end of the second trigger S2 outputs a low level, so that the first logic not gate N1 outputs a high level as a first control signal DR1; when the RESET terminal RESET of the second flip-flop S2 receives the second sub-enable signal, the RESET terminal RESET of the second flip-flop S2 is set high, and at this time, the digital logic circuit 18 sends a high level to the input terminal IN of the second flip-flop S2 according to the driving circuit 13 being IN an operating state, so that the second flip-flop S2 outputs a high level, and the first logic not gate N1 outputs a low level as the second control signal DR2.

Based on this, the mode controller 15 may automatically control the operation of the voltage detection circuit 16 by sending the first control signal DR1 to the voltage detection circuit 16 according to the driving circuit 13 being in the inactive state, and send the second control signal DR2 to the voltage detection circuit 16 according to the driving circuit 13 being in the active state, so as to control the inactive operation of the voltage detection circuit 16, thereby realizing the control of the voltage detection circuit 16.

In one embodiment, as shown in fig. 5, the charge control circuit 14 includes a first switching tube M31, a second switching tube M32, a first driving tube M41, a second driving tube M42, and a bias circuit 141.

The first pole of the first switching tube M31 is connected with the first charge-discharge port 100A through the second power end PACK, the second pole of the first switching tube M31 is connected with the second pole of the second switching tube M32, the first pole of the second switching tube M32 is connected with the control end of the charging switching tube M12 through the charging driving end CHG, and the control end of the first switching tube M31 and the control end of the second switching tube M32 are grounded through the first driving tube M41 and the second driving tube M42. Illustratively, the control terminal of the first switching tube M31 and the control terminal of the second switching tube M32 are both connected to the first pole of the first driving tube M41, the second pole of the first driving tube M41 is connected to the first pole of the second driving tube M42, and the second pole of the second driving tube M42 is grounded.

The bias circuit 141 has a first input terminal 141A, a second input terminal 141B, and an output terminal 141C, the first input terminal 141A is connected to the first charge/discharge port 100A through the second power supply terminal PACK, the second input terminal 141B is connected to the first electrode of the battery 20 through the first power supply terminal VDD, and the output terminal 141C is connected to the control terminal of the first driving tube M41 to supply a bias voltage to the first driving tube M41 through the battery 20 or an external power supply, so that the first driving tube M41 is in a conductive state.

The second driving transistor M42 is configured to be turned on when the control terminal is connected to the first enable signal EN1, so as to drive the first switching transistor M31 and the second switching transistor M32 to be turned on. And/or, the second driving tube M42 is configured to be turned off when the control terminal is connected to the second enable signal EN2, so as to drive the first switching tube M31 and the second switching tube M32 to be turned off.

Illustratively, the first switching transistor M31 and the second switching transistor M32 may be PMOS transistors, the first driving transistor M41 and the second driving transistor M42 may be NMOS transistors, the first enable signal EN1 is at a high level, and the second enable signal EN2 is at a low level. When the control end of the second driving tube M42 is connected to the first enable signal EN1, the second driving tube M42 is turned on, and the control ends of the first switching tube M31 and the second switching tube M32 are grounded, so that the first switching tube M31 and the second switching tube M32 are turned on, and the electrical connection between the first charge/discharge port 100A and the control end of the charge switching tube M12 is realized. When the control end of the second driving tube M42 is connected to the second enable signal EN2, the second driving tube M42 is turned off, so that the first switching tube M31 and the second switching tube M32 are turned off, and the electrical connection between the first charge/discharge port 100A and the control end of the charge switching tube M12 is disconnected. The first electrode is a drain electrode, the second electrode is a source electrode, and the control end is a grid electrode.

Alternatively, the first enable signal EN1 and the second enable signal EN2 may be connected to the control terminal of the second driving transistor M42 through the fifth logic not gate N5 and the sixth logic not gate N6.

Based on this, the charge control circuit 14 may automatically electrically connect the first charge and discharge port 100A with the control terminal of the charge switching tube M12 according to the first enable signal EN1, and automatically disconnect the electrical connection between the first charge and discharge port 100A and the control terminal of the charge switching tube M12 according to the second enable signal EN 2.

In one embodiment, as shown in fig. 5, the charge control circuit 14 further includes a third driving transistor M43, a fourth driving transistor M44, and a logic and gate circuit A1.

The control end of the charge switch tube M12 is grounded through a third driving tube M43 and a fourth driving tube M44. For example, a first pole of the third driving tube M43 is connected to the control terminal of the charge switching tube M12, a second pole of the third driving tube M43 is connected to a first pole of the fourth driving tube M44, and a second pole of the fourth driving tube M44 is grounded.

The control terminal of the third driving tube M43 is connected to the output terminal 141C of the bias circuit 141, and the third driving tube M43 is turned on. The control end of the fourth driving tube M44 is connected to the output end of the logic and gate circuit A1.

The logic and circuit A1 is configured to turn off the fourth driving transistor M44 upon receiving the first enable signal EN 1. And/or, the logic and gate circuit A1 is configured to turn on the fourth driving tube M44 upon receiving the second enable signal EN2 and the first control signal DR 1; the first control signal DR1 is generated by the mode controller 15 when the voltage of the battery 20 is less than the first voltage threshold Vref.

Illustratively, the third driving transistor M43 and the fourth driving transistor M44 may be NMOS transistors, the first enable signal EN1 is at a high level, the second enable signal EN2 is at a low level, and the first control signal DR1 is at a high level. The first enable signal EN1 and the second enable signal EN2 may be connected to the logic and gate circuit A1 through the fifth logic not gate circuit N5. Thus, when the first enable signal EN1 is connected to the logic and gate circuit A1, the logic and gate circuit A1 outputs a low level, and the fourth driving transistor M44 is turned off, so that the control terminal of the charge switch transistor M12 is electrically connected to the first charge/discharge port 100A. When the second enable signal EN2 and the first control signal DR1 are connected to the logic and gate circuit A1, the logic and gate circuit A1 outputs a high level to turn on the fourth driving transistor M44 and to ground the control terminal of the charge switch transistor M12. The first electrode of the third driving tube M43 and the fourth driving tube M44 is a drain electrode, the second electrode is a source electrode, and the control end is a gate electrode. It is understood that the third driving tube M43 and the fourth driving tube M44 may be PMOS transistors according to actual needs.

In one embodiment, as shown in fig. 5, the charge control circuit 14 further includes a third switching transistor M33. The third switching tube M33 is connected between a connection point a of the second pole of the first switching tube M31 and the second pole of the second switching tube M32 and a connection point B of the control end of the first switching tube M31 and the control end of the second switching tube M32. The third switching transistor M33 is configured to be turned off in the case that the control terminal is connected to the first enable signal EN1 and turned on in the case that the control terminal is connected to the second enable signal EN 2.

Illustratively, a connection point a of the second pole of the first switching tube M31 and the second pole of the second switching tube M32 is connected to the first pole of the third switching tube M33, and a connection point B of the control end of the first switching tube M31 and the control end of the second switching tube M32 is connected to the second pole of the third switching tube M33. When the control terminal of the third switching tube M33 is connected to the first enable signal EN1, the third switching tube M33 is turned off, and the connection between the second pole of the first switching tube M31 and the control terminal is disconnected, and the connection between the second pole of the second switching tube M32 and the control terminal is disconnected, so that the first switching tube M31 and the second switching tube M32 can be driven by the first driving tube M41 and the second driving tube M42. When the control end of the third switching tube M33 is connected to the second enable signal EN2, the third switching tube M33 is turned on to short the second pole of the first switching tube M31 to the control end and short the second pole of the second switching tube M32 to the control end, so as to completely turn off the first switching tube M31 and the second switching tube M32. The third switch tube M33 is a PMOS tube, and the first electrode thereof is a drain electrode, the second electrode thereof is a source electrode, and the control end thereof is a gate electrode.

In one embodiment, as shown in fig. 5, the battery management chip 10 further includes at least one of a first voltage dividing resistor RD1, a second voltage dividing resistor RD2, and a third voltage dividing resistor RD 3. The first voltage dividing resistor RD1 is connected between the first electrode of the battery 20 and the first input terminal 141A of the bias circuit 141 through the first power terminal VDD to divide the voltage of the battery 20 accessing the bias circuit 141. The second voltage dividing resistor RD2 is connected between the first charge/discharge port 100A and the second input terminal 141B of the bias circuit 141 through the second power supply terminal PACK to divide the voltage of the external power source connected to the bias circuit 141 through the first charge/discharge port 100A. The third voltage dividing resistor RD3 is connected between the control terminal of the charge switching tube M12 and the first pole of the second switching tube M32 through the charge driving terminal CHG to divide the voltage that is input into the charge control circuit 14 through the control terminal of the charge switching tube M12.

In the above-described configuration, by providing any one of the first voltage dividing resistor RD1, the second voltage dividing resistor RD2, and the third voltage dividing resistor RD3, the voltage to be supplied to the charge control circuit 14 can be divided, and the current flowing into the charge control circuit 14 from the first input terminal 141A, the second input terminal 141B, and the control terminal of the charge switching transistor M12 of the bias circuit 141 can be reduced, thereby protecting the battery management chip 10.

Illustratively, the bias circuit 141 includes a first transistor M51, a second transistor M52, and a third transistor M53, wherein a first pole of the first transistor M51 is connected to the first electrode of the battery 20 through a first voltage dividing resistor RD1 and a first power supply terminal VDD, and a control terminal, a second pole, and a substrate terminal of the first transistor M51 are all connected to a first pole of the third transistor M53. The first pole of the second transistor M52 is connected to the first charge/discharge port 100A through the second voltage dividing resistor RD2 and the second power supply terminal PACK, and the control terminal, the second pole, and the substrate terminal of the second transistor M52 are all connected to the first pole of the third transistor M53. The control terminal, the second pole and the substrate terminal of the third transistor M53 are all grounded. Since the control terminals, the second pole and the substrate terminals of the first transistor M51, the second transistor M52 and the third transistor M53 are all connected to the same point, the first transistor M51, the second transistor M52 and the third transistor M53 can be used as voltage dividing resistors, and the first transistor M51, the second transistor M52 and the third transistor M53 occupy smaller area compared with the conventional resistors, which is beneficial to reducing the area of the bias circuit 141.

The first transistor M51 and the second transistor M52 may be PMOS transistors, the third transistor M53 may be an NMOS transistor, the first electrode is a drain, the second electrode is a source, and the control terminal is a gate.

The embodiment also provides an electronic device, which includes the low-voltage charging circuit 200 of any one of the above embodiments. Because the electronic device adopts all the technical schemes of all the embodiments, the electronic device at least has all the beneficial effects brought by the technical schemes of the embodiments, and the description is omitted herein. The electronic device includes, but is not limited to, an electronic cigarette, a mobile terminal, a smart wearable device, and the like, in which the battery 20 can be provided.

In addition, in the present application, unless explicitly stated and limited otherwise, the terms "connected," "stacked," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of various changes or substitutions within the technical scope of the present application, and these should be covered in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. The low-voltage charging circuit is characterized by comprising a first charging and discharging port, a discharging switch tube, a charging switch tube and a battery management chip, wherein the first charging and discharging port is connected with a first electrode of a battery through the discharging switch tube and the charging switch tube and is used for being connected with an external power supply; the battery management chip includes:

The charging control circuit is connected between the first charging and discharging port and the control end of the charging switch tube;

the charging control circuit is configured to electrically connect the first charging and discharging port with the control end of the charging switch tube under the condition that the voltage of the battery is smaller than the over-discharging protection voltage, so that the external power supply drives the parasitic diode of the discharging switch tube and the charging switch tube to be conducted so as to charge the battery.

2. The low voltage charging circuit of claim 1, wherein the battery management chip further comprises a mode controller and a voltage detection circuit;

the mode controller is used for controlling the voltage detection circuit to operate under the condition that the voltage of the battery is smaller than the over-discharge protection voltage, so that when the voltage detection circuit detects that the voltage of the battery is larger than a first voltage threshold value, a first enabling signal is sent to the charging control circuit, and the charging control circuit is used for electrically connecting the first charging and discharging port with the control end of the charging switch tube; the first voltage threshold is less than the over-discharge protection voltage.

3. The low voltage charging circuit of claim 2, wherein the voltage detection circuit is further configured to send a second enable signal to the charging control circuit to cause the charging control circuit to disconnect the electrical connection between the first charging port and the control terminal of the charging switch tube and to ground the control terminal of the charging switch tube if the voltage of the battery is detected to be less than or equal to the first voltage threshold.

4. The low voltage charging circuit of claim 2, wherein the battery management chip further comprises a drive circuit, a digital logic circuit, and a sampling circuit;

the driving circuit is used for starting operation when the sampling circuit detects that the battery is charged to a second voltage threshold value, and stopping operation when the sampling circuit detects that the battery is discharged to the over-discharge protection voltage; the second voltage threshold is greater than the over-discharge protection voltage;

and the digital logic circuit is used for controlling the voltage detection circuit to stop running through the mode controller under the condition that the driving circuit is in a working state, so that the charging control circuit breaks the electric connection between the first charging and discharging port and the control end of the charging switch tube.

5. The low voltage charging circuit of claim 4, wherein the battery management chip further comprises a linear voltage regulator and a power-on reset circuit, the linear voltage regulator being connected between the first electrode of the battery and the power-on reset circuit; the power-on reset circuit is used for transmitting a first reset signal to the driving circuit under the condition that the output voltage of the linear voltage stabilizer is larger than or equal to a voltage stabilizing threshold value, so that the driving circuit starts working under the condition that the first reset signal is received and the battery is detected to be charged to a second voltage threshold value, and is also used for transmitting a second reset signal to the driving circuit under the condition that the output voltage of the linear voltage stabilizer is smaller than the voltage stabilizing threshold value, so that the driving circuit stops working under the condition that the second reset signal is received or the battery is detected to be discharged to the over-discharge protection voltage; the voltage stabilizing threshold value is smaller than the over-discharge protection voltage;

The mode controller comprises an enabling signal generating circuit, a trigger circuit and a first logic NOT circuit;

the enabling signal generating circuit is used for sending a first sub-enabling signal to the trigger circuit under the condition that the first reset signal is received, so that the trigger circuit triggers the first logic NOT circuit to output a first control signal, and the first control signal is used for controlling the voltage detection circuit to operate; and/or the enabling signal generating circuit is used for sending a second sub-enabling signal to the trigger circuit under the condition that the second reset signal is received, so that the trigger circuit triggers the logic NOT gate circuit to output a second control signal under the control of the digital logic circuit, and the second control signal is used for controlling the voltage detection circuit to stop running.

6. The low voltage charging circuit of claim 3, wherein the charging control circuit comprises a first switching tube, a second switching tube, a first drive tube, a second drive tube, and a bias circuit;

the first pole of the first switching tube is connected with the first charge-discharge port, the second pole of the first switching tube is connected with the second pole of the second switching tube, the first pole of the second switching tube is connected with the control end of the charging switching tube, and the control end of the first switching tube and the control end of the second switching tube are grounded through the first driving tube and the second driving tube;

The bias circuit is provided with a first input end, a second input end and an output end, wherein the first input end is connected with the first charge and discharge port, the second input end is connected with a first electrode of the battery, and the output end is connected with a control end of the first driving tube so as to provide bias voltage for the first driving tube;

the second driving tube is configured to be conducted under the condition that the control end is connected with the first enabling signal so as to drive the first switching tube and the second switching tube to be conducted;

the second driving tube is configured to be cut off under the condition that the control end is connected with the second enabling signal so as to drive the first switching tube and the second switching tube to be cut off.

7. The low voltage charging circuit of claim 6, wherein the charging control circuit further comprises a third drive transistor, a fourth drive transistor, and a logic and gate circuit;

the control end of the charging switch tube is grounded through the third driving tube and the fourth driving tube, the control end of the third driving tube is connected with the output end of the bias circuit to conduct the third driving tube, and the control end of the fourth driving tube is connected with the output end of the logic AND gate circuit;

The logic AND gate circuit is configured to cut off the fourth driving tube under the condition that the first enabling signal is received; and/or the logic AND circuit is configured to conduct the fourth driving tube under the condition that the second enabling signal and a first control signal are received, wherein the first control signal is generated when the voltage of the battery is smaller than the first voltage threshold value for the mode controller.

8. The low voltage charging circuit of claim 6, wherein the charging control circuit further comprises:

the third switching tube is connected between a connection point of the second pole of the first switching tube and the second pole of the second switching tube and a connection point of the control end of the first switching tube and the control end of the second switching tube;

the third switching tube is configured to be turned off when the control terminal is connected with the first enabling signal and turned on when the control terminal is connected with the second enabling signal.

9. The low voltage charging circuit of claim 6, wherein the battery management chip further comprises at least one of:

the first voltage dividing resistor is connected between the first electrode of the battery and the first input end of the bias circuit;

The second voltage dividing resistor is connected between the first charge and discharge port and the second input end of the bias circuit;

and the third voltage dividing resistor is connected between the control end of the charging switch tube and the first pole of the second switch tube.

10. An electronic device comprising the low voltage charging circuit of any one of claims 1 to 9.