CN117312198A - Solid state disk control method, device, equipment and storage medium - Google Patents

Solid state disk control method, device, equipment and storage medium Download PDF

Info

Publication number
CN117312198A
CN117312198A CN202311279413.3A CN202311279413A CN117312198A CN 117312198 A CN117312198 A CN 117312198A CN 202311279413 A CN202311279413 A CN 202311279413A CN 117312198 A CN117312198 A CN 117312198A
Authority
CN
China
Prior art keywords
transmission rate
current scene
rate
target transmission
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311279413.3A
Other languages
Chinese (zh)
Inventor
李华桥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lenovo Beijing Ltd
Original Assignee
Lenovo Beijing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lenovo Beijing Ltd filed Critical Lenovo Beijing Ltd
Priority to CN202311279413.3A priority Critical patent/CN117312198A/en
Publication of CN117312198A publication Critical patent/CN117312198A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

The disclosure provides a solid state disk control method, a device, equipment and a storage medium, and relates to the technical field of computers. The solid state disk control method comprises the following steps: acquiring a current scene tag of the electronic equipment; if the current scene label changes, determining a target transmission rate corresponding to the current scene label; generating a rate switching instruction according to the target transmission rate; and switching the current transmission rate of the bus to a target transmission rate based on the rate switching instruction, so that the bus carries out transmission processing on data in the electronic equipment based on the target transmission rate.

Description

Solid state disk control method, device, equipment and storage medium
Technical Field
The disclosure relates to the technical field of computers, and in particular relates to a method, a device, equipment and a storage medium for controlling a solid state disk.
Background
At present, a solid state disk (SSD, solid State Drive) generally maintains a fixed rate during a use process, for example, a solid state disk of PCIE Gen4 always maintains a highest transmission rate that can be achieved, but the solid state disk always operates at the highest transmission rate, which results in higher system power consumption.
Disclosure of Invention
The present disclosure provides a method, an apparatus, a device, and a storage medium for controlling a solid state disk, so as to at least solve the above technical problems in the prior art.
According to a first aspect of the present disclosure, there is provided a solid state disk control method, the method including: acquiring a current scene tag of the electronic equipment; if the current scene label changes, determining a target transmission rate corresponding to the current scene label; generating a rate switching instruction according to the target transmission rate; and switching the current transmission rate of the bus into the target transmission rate based on the rate switching instruction, so that the bus carries out transmission processing on data in the electronic equipment based on the target transmission rate.
In an embodiment, the obtaining the current scene tag of the electronic device includes: the method comprises the steps of determining a current scene tag of the electronic device based on a current application program of the electronic device and/or an operation state of the electronic device.
In an embodiment, the determining the target transmission rate corresponding to the current scene tag includes: determining the priority of the current scene tag according to the response demand degree corresponding to the current scene tag; determining a target transmission rate corresponding to the current scene tag according to the priority; the higher the response demand degree corresponding to the current scene tag is, the higher the priority of the current scene tag is; the higher the priority of the current scene tag is, the larger the target transmission rate corresponding to the current scene tag is.
In an embodiment, the determining the target transmission rate corresponding to the current scene tag includes: determining a plurality of transmission rates corresponding to the current scene tag; acquiring a first read-write rate of a first component, and determining a matched target transmission rate from a plurality of transmission rates corresponding to the current scene tag based on the first read-write rate; or, acquiring a first read-write rate of the first component and a second read-write rate of the second component, and determining a matched target transmission rate from a plurality of transmission rates corresponding to the current scene tag based on the first read-write rate and the second read-write rate; wherein data transfer between the first component and the second component is performed based on the bus.
In an embodiment, the method for controlling a solid state disk further includes: if the current scene tag is unchanged and the read-write rate of the first component and/or the second component is changed, determining the target transmission rate based on the read-write rate of the first component and/or the second component; wherein data transfer between the first component and the second component is performed based on the bus.
In one embodiment, switching the current transmission rate of the bus to the target transmission rate includes: acquiring the current transmission rate of the bus; and switching the current bus standard corresponding to the bus into the target bus standard corresponding to the target transmission rate based on the target transmission rate contained in the rate switching instruction.
In an embodiment, the method for controlling a solid state disk further includes: and controlling the bus to transmit current execution data of the electronic device between the first component and the second component based on the target transmission rate.
According to a second aspect of the present disclosure, there is provided a solid state disk control apparatus, the apparatus including: the acquisition module is used for acquiring the current scene tag of the electronic equipment; the determining module is used for determining a target transmission rate corresponding to the current scene tag if the current scene tag changes; the generation module is used for generating a rate switching instruction according to the target transmission rate; and the switching module is used for switching the current transmission rate of the bus into the target transmission rate based on the rate switching instruction so as to enable the bus to carry out transmission processing on the data in the electronic equipment based on the target transmission rate.
According to a third aspect of the present disclosure, there is provided an electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the methods described in the present disclosure.
According to a fourth aspect of the present disclosure, there is provided a non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the method of the present disclosure.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the disclosure, nor is it intended to be used to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following specification.
Drawings
The above, as well as additional purposes, features, and advantages of exemplary embodiments of the present disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings, in which:
in the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
Fig. 1 shows a schematic flow chart of a method for controlling a solid state disk according to an embodiment of the disclosure;
fig. 2 illustrates a schematic view of a scenario of a solid state disk control method according to an embodiment of the disclosure;
fig. 3 shows a second flowchart of a solid state disk control method according to an embodiment of the disclosure;
fig. 4 illustrates a third flowchart of a solid state disk control method according to an embodiment of the disclosure;
fig. 5 shows a schematic structural diagram of a solid state disk control device according to an embodiment of the disclosure;
fig. 6 shows a schematic diagram of a composition structure of an electronic device according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, features and advantages of the present disclosure more comprehensible, the technical solutions in the embodiments of the present disclosure will be clearly described in conjunction with the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are only some embodiments of the present disclosure, but not all embodiments. Based on the embodiments in this disclosure, all other embodiments that a person skilled in the art would obtain without making any inventive effort are within the scope of protection of this disclosure.
Fig. 1 shows a schematic flow chart of a solid state disk control method according to an embodiment of the present disclosure, as shown in fig. 1, a solid state disk control method includes:
step S101, acquiring a current scene tag of the electronic device.
In this embodiment, the current scene tag represents a current application scene of the electronic device, and the current scene tag may include a graphical user interface (GUI, graphics User Interface) tag, a sleep tag, an audio/video tag, a game tag, and a file transfer tag, where the GUI tag represents that the electronic device is currently in a scene of operating the GUI, the sleep tag represents that the electronic device is currently sleeping, the audio/video tag represents that the electronic device is currently playing audio and/or video, the game tag represents that the electronic device is currently in a game scene, and the file transfer tag represents that the electronic device is currently performing file transfer.
In one embodiment, the current scene tag of the electronic device may be determined based on the current application of the electronic device, and/or the operating state of the electronic device. Fig. 2 is a schematic view of a scenario of a solid state disk control method according to an embodiment of the present disclosure, as shown in fig. 2, an application programming interface (API, application programming interface) of an electronic device may disassemble a current application of the electronic device and/or an operation state of the electronic device into threads, each thread has a corresponding current scenario tag, and then a processor may obtain the current scenario tag of each thread, where the processor may be a central processing unit (CPU, central Processing Unit), a microcontroller (MCU, microcontroller Unit), and the like.
Step S102, if the current scene tag changes, determining a target transmission rate corresponding to the current scene tag.
In this embodiment, if the current scene tag changes with respect to the current scene tag (history scene tag) acquired last time, the target transmission rate corresponding to the current scene tag is determined. Specifically, the priority of the current scene tag can be determined according to the response demand degree corresponding to the current scene tag, and then the target transmission rate corresponding to the current scene tag is determined according to the priority, wherein the response demand degree characterizes the response time demand of data transmission under the current scene tag, and the shorter the response time required by the data transmission under the current scene tag is, the higher the response demand degree is, and further the priority of the current scene tag is, the higher the target transmission rate corresponding to the current scene tag is naturally. For example, for the GUI tag, a shorter response time is not required for data transmission in the scenario of operating the GUI, so that the response demand of the GUI tag is lower, and further, the lower the priority thereof is, the smaller the corresponding target transmission rate is; for the game tag, a shorter response time is required for data transmission in a game scene, so that the response requirement of the game tag is higher, and the higher the priority is, the larger the corresponding target transmission rate is.
Step S103, generating a rate switching instruction according to the target transmission rate.
Step S104, based on the rate switching instruction, the current transmission rate of the bus is switched to the target transmission rate.
In this embodiment, when the target transmission rate corresponding to the current scene tag is different from the current transmission rate of the bus, a rate switching instruction is generated according to the target transmission rate, and then the current transmission rate of the bus is switched to the target transmission rate based on the rate switching instruction, so that the bus performs transmission processing on data in the electronic device based on the target transmission rate. As shown in fig. 2, the bus is used for data transmission between the memory and the solid state disk, and the bus may be a SATA bus, a PCIE bus, or the like, and after the current transmission rate of the bus is switched to the target transmission rate, the bus may perform data transmission between the memory and the solid state disk based on the target transmission rate corresponding to the current scene tag, so as to meet the requirement of the data transmission rate of the current scene tag.
For the present disclosure, if the current scene tag of the electronic device changes, determining a target transmission rate corresponding to the current scene tag, if the target transmission rate is different from the current transmission rate of the bus, generating a rate switching instruction according to the target transmission rate, and switching the current transmission rate of the bus to the target transmission rate based on the rate switching instruction, so that data transmission can be performed between the solid state disk and the memory at different transmission rates in different application scenes, and compared with data transmission performed at the highest transmission rate all the time, system power consumption can be greatly reduced.
Fig. 3 shows a second flowchart of a solid state disk control method according to an embodiment of the present disclosure, where, as shown in fig. 3, the solid state disk control method includes:
step S201, a current scene tag of the electronic device is obtained.
The specific implementation process of step S201 is similar to that of step S101, and will not be described here again.
Sequentially performing the following steps in the case of the current scene tag change:
step S202, determining a plurality of transmission rates corresponding to the current scene tag.
Step S203, based on the first read-write rate, determining a matched target transmission rate from a plurality of transmission rates corresponding to the current scene tag; or,
step S204, determining a matched target transmission rate from the plurality of transmission rates corresponding to the current scene tag based on the first and second read/write rates.
In this embodiment, the electronic device may be in multiple application scenarios at the same time, for example, the electronic device may perform video playing while performing file transmission, that is, the electronic device may have multiple current scene tags, so it is necessary to execute step S202 to determine multiple transmission rates corresponding to the multiple current scene tags, and the specific implementation process of step S202 is similar to step S102, which is not repeated here.
In this embodiment, after determining a plurality of transmission rates corresponding to a plurality of current scene tags, a first read-write rate of the first component may be obtained, as shown in fig. 2, where the first component may be a solid state disk or a memory, and the first read-write rate may be a rate of performing data read-write in the solid state disk or a rate of performing data read-write in the memory, and then step S203 is performed to determine, based on the first read-write rate, a matched target transmission rate from the plurality of transmission rates corresponding to the current scene tags, that is, determine, as the target transmission rate, a transmission rate equal to or closest to the first read-write rate in the plurality of transmission rates, thereby avoiding the problem that the system power consumption is greater due to the smaller first read-write rate but the larger target transmission rate, and avoiding the problem that the system response performance is poor due to the larger first read-write rate but the smaller target transmission rate.
In this embodiment, after determining the plurality of transmission rates corresponding to the plurality of current scene tags, the first read-write rate of the first component and the second read-write rate of the second component may also be obtained, as shown in fig. 2, where the first component may be a memory, the first read-write rate may be a rate of performing data read-write in the memory, the second component may be a solid state disk, the second read-write rate may be a rate of performing data read-write in the solid state disk, data transmission between the first component and the second component may be performed based on a bus, and then step S204 is performed to determine, based on the first read-write rate and the second read-write rate, a matched target transmission rate from the plurality of transmission rates corresponding to the current scene tags, that is, calculate an average value of the first read-write rate and the second read-write rate, and determine a transmission rate closest to the average value in the plurality of transmission rates as the target transmission rate, thereby, a problem that the system power consumption is greater due to the fact that the first read-write rate and the second read-write rate are smaller but the target transmission rate is greater can be avoided, and a problem that the system power consumption is greater due to the system response performance is poorer can be avoided, and a problem that the system response performance is lower due to the system response is guaranteed.
In the case that the current scene tag does not change and the read/write rate of the first component and/or the second component changes, step S205 is executed to determine the target transmission rate based on the read/write rate of the first component and/or the second component.
In this embodiment, if the current scene tag does not change, but the read/write rate of the first component and/or the second component changes, the first read/write rate of the first component may be determined as the target transmission rate, the second read/write rate of the second component may be determined as the target transmission rate, or an average value of the first read/write rate and the second read/write rate may be determined as the target transmission rate. As shown in fig. 2, the first component may be a memory, the second component may be a solid state disk, or the first component may be a solid state disk, the second component may be a memory, and data transmission between the first component and the second component may be performed based on a bus. Thus, a suitable target transmission rate can be determined based on the read-write rate of the first component and/or the second component without a change in the current scene tag.
And under the condition that the current scene tag is not changed and the read-write rate of the first component and/or the second component is not changed, executing step S206, and controlling the bus to transmit the data in the electronic equipment based on the current transmission rate.
In this embodiment, if the current scene tag does not change and the read-write rate of the first component and/or the second component does not change, the bus still performs transmission processing on the data in the electronic device based on the current transmission rate, and it is not necessary to determine the target transmission rate.
After determining the target transmission rate in step S203, step S204, and step S205, the following steps may be sequentially performed:
step S207, a rate switching instruction is generated according to the target transmission rate.
Step S208, based on the rate switching instruction, the current transmission rate of the bus is switched to the target transmission rate.
The specific implementation process of step S207 and step S208 is similar to that of step S103 and step S104, and will not be repeated here.
Fig. 4 shows a third flowchart of a solid state disk control method according to an embodiment of the present disclosure, where, as shown in fig. 4, the solid state disk control method includes:
step S301, acquiring a current scene tag of the electronic device.
Step S302, if the current scene tag changes, determining a target transmission rate corresponding to the current scene tag.
Step S303, generating a rate switching instruction according to the target transmission rate.
The specific implementation process of step S301 to step S303 is similar to that of step S201 to step S207, and will not be repeated here.
Step S304, the current transmission rate of the bus is obtained.
In step S305, the current bus standard corresponding to the bus is switched to the target bus standard corresponding to the target transmission rate based on the target transmission rate included in the rate switching command.
In this embodiment, after the rate switching instruction is generated, the current transmission rate of the bus is obtained, and then the current bus standard corresponding to the bus is switched to the target bus standard corresponding to the target transmission rate based on the target transmission rate included in the rate switching instruction, where if the bus is a SATA bus, the bus standard may be SATA1.0, SATA2.0, SATA3.0, and the like, and if the bus is a PCIE bus, the bus standard may be PCIE Gen1, PCIE Gen2, PCIE Gen3, PCIE Gen4, and the like. The different bus standards have corresponding transmission rates, taking a PCIE bus as an example, the transmission rate corresponding to the PCIE Gen1 is 2.5Gb/s, the transmission rate corresponding to the PCIE Gen2 is 5Gb/s, the transmission rate corresponding to the PCIE Gen3 is 8Gb/s, the transmission rate corresponding to the PCIE Gen4 is 16Gb/s, and if the current transmission rate of the bus is 5Gb/s and the target transmission rate is 16Gb/s, the PCIE Gen2 bus standard corresponding to the current transmission rate is switched to the PCIE Gen4 bus standard corresponding to the target transmission rate, so that the current transmission rate of the bus is switched to the target transmission rate.
In an embodiment, as shown in fig. 2, a processor may generate a rate switching instruction according to a target transmission rate, write the rate switching instruction into a memory, and the solid state disk may read the rate switching instruction from the memory, and switch the current transmission rate of the bus to the target transmission rate based on the rate switching instruction, that is, switch the current bus standard between the solid state disk and the memory to a target bus standard corresponding to the target transmission rate.
In step S306, the control bus transfers current execution data of the electronic device between the first component and the second component based on the target transfer rate.
In this embodiment, after the current transmission rate of the bus is switched to the target transmission rate, the bus may be controlled to transmit the current execution data of the electronic device between the first component and the second component based on the target transmission rate. Taking fig. 2 as an example, after executing the thread with the current scene tag, the processor obtains execution data, and writes the execution data into the memory, where the solid state disk may obtain the execution data from the memory based on the target transmission rate of the bus.
Fig. 5 shows a schematic structural diagram of a solid state disk control device according to an embodiment of the present disclosure, where, as shown in fig. 5, the solid state disk control device includes:
an acquiring module 10, configured to acquire a current scene tag of an electronic device; a determining module 11, configured to determine a target transmission rate corresponding to the current scene tag if the current scene tag changes; a generating module 12, configured to generate a rate switching instruction according to the target transmission rate; the switching module 13 is configured to switch, based on the rate switching instruction, the current transmission rate of the bus to a target transmission rate, so that the bus performs transmission processing on data in the electronic device based on the target transmission rate.
In one embodiment, the acquisition module 10 is further configured to: the current scene tag of the electronic device is determined based on the current application of the electronic device, and/or the operating state of the electronic device.
In an embodiment, the determining module 11 is further configured to: determining the priority of the current scene label according to the response demand corresponding to the current scene label; determining a target transmission rate corresponding to the current scene tag according to the priority; the higher the response demand corresponding to the current scene tag is, the higher the priority of the current scene tag is; the higher the priority of the current scene tag, the greater the target transmission rate corresponding to the current scene tag.
In an embodiment, the determining module 11 is further configured to: determining a plurality of transmission rates corresponding to the current scene tag; acquiring a first read-write rate of a first component, and determining a matched target transmission rate from a plurality of transmission rates corresponding to a current scene tag based on the first read-write rate; or, acquiring a first read-write rate of the first component and a second read-write rate of the second component, and determining a matched target transmission rate from a plurality of transmission rates corresponding to the current scene tag based on the first read-write rate and the second read-write rate; wherein data transfer between the first component and the second component is performed based on the bus.
In an embodiment, a solid state disk control device further includes: the second determining module is used for determining a target transmission rate based on the read-write rate of the first component and/or the second component if the current scene tag is unchanged and the read-write rate of the first component and/or the second component is changed; wherein data transfer between the first component and the second component is performed based on the bus.
In an embodiment, the switching module 13 is further configured to: acquiring the current transmission rate of a bus; and switching the current bus standard corresponding to the bus into the target bus standard corresponding to the target transmission rate based on the target transmission rate contained in the rate switching instruction.
In an embodiment, a solid state disk control device further includes: and the control module is used for controlling the bus to transmit the current execution data of the electronic device between the first component and the second component based on the target transmission rate.
According to embodiments of the present disclosure, the present disclosure also provides an electronic device and a readable storage medium.
Fig. 6 shows a schematic block diagram of an example electronic device 800 that may be used to implement embodiments of the present disclosure. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the disclosure described and/or claimed herein.
As shown in fig. 6, the apparatus 800 includes a computing unit 801 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 802 or a computer program loaded from a storage unit 808 into a Random Access Memory (RAM) 803. In the RAM 803, various programs and data required for the operation of the device 800 can also be stored. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other by a bus 804. An input/output (I/O) interface 805 is also connected to the bus 804.
Various components in device 800 are connected to I/O interface 805, including: an input unit 806 such as a keyboard, mouse, etc.; an output unit 807 such as various types of displays, speakers, and the like; a storage unit 808, such as a magnetic disk, optical disk, etc.; and a communication unit 809, such as a network card, modem, wireless communication transceiver, or the like. The communication unit 809 allows the device 800 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.
The computing unit 801 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of computing unit 801 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 801 performs the various methods and processes described above, such as a solid state disk control method. For example, in some embodiments, a solid state disk control method may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as storage unit 808. In some embodiments, part or all of the computer program may be loaded and/or installed onto device 800 via ROM 802 and/or communication unit 809. When a computer program is loaded into RAM 803 and executed by computing unit 801, one or more steps of one solid state disk control method described above may be performed. Alternatively, in other embodiments, the computing unit 801 may be configured to perform a solid state disk control method by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the internet.
The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server incorporating a blockchain.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps recited in the present disclosure may be performed in parallel or sequentially or in a different order, provided that the desired results of the technical solutions of the present disclosure are achieved, and are not limited herein.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it is intended to cover the scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims (10)

1. The solid state disk control method is characterized by comprising the following steps of:
acquiring a current scene tag of the electronic equipment;
if the current scene label changes, determining a target transmission rate corresponding to the current scene label;
generating a rate switching instruction according to the target transmission rate;
and switching the current transmission rate of the bus into the target transmission rate based on the rate switching instruction, so that the bus carries out transmission processing on data in the electronic equipment based on the target transmission rate.
2. The method of claim 1, wherein the obtaining the current scene tag of the electronic device comprises:
the method comprises the steps of determining a current scene tag of the electronic device based on a current application program of the electronic device and/or an operation state of the electronic device.
3. The method of claim 1, wherein the determining the target transmission rate corresponding to the current scene tag comprises:
determining the priority of the current scene tag according to the response demand degree corresponding to the current scene tag;
determining a target transmission rate corresponding to the current scene tag according to the priority;
the higher the response demand degree corresponding to the current scene tag is, the higher the priority of the current scene tag is; the higher the priority of the current scene tag is, the larger the target transmission rate corresponding to the current scene tag is.
4. The method of claim 1, wherein the determining the target transmission rate corresponding to the current scene tag comprises:
determining a plurality of transmission rates corresponding to the current scene tag;
acquiring a first read-write rate of a first component, and determining a matched target transmission rate from a plurality of transmission rates corresponding to the current scene tag based on the first read-write rate;
or,
acquiring a first read-write rate of a first component and a second read-write rate of a second component, and determining a matched target transmission rate from a plurality of transmission rates corresponding to the current scene tag based on the first read-write rate and the second read-write rate;
wherein data transfer between the first component and the second component is performed based on the bus.
5. The method as recited in claim 1, further comprising:
if the current scene tag is unchanged and the read-write rate of the first component and/or the second component is changed, determining the target transmission rate based on the read-write rate of the first component and/or the second component;
wherein data transfer between the first component and the second component is performed based on the bus.
6. The method of claim 1, wherein switching the current transmission rate of the bus to the target transmission rate comprises:
acquiring the current transmission rate of the bus;
and switching the current bus standard corresponding to the bus into the target bus standard corresponding to the target transmission rate based on the target transmission rate contained in the rate switching instruction.
7. The method according to any one of claims 1 to 6, further comprising:
and controlling the bus to transmit current execution data of the electronic device between the first component and the second component based on the target transmission rate.
8. A solid state disk control device, the device comprising:
the acquisition module is used for acquiring the current scene tag of the electronic equipment;
the determining module is used for determining a target transmission rate corresponding to the current scene tag if the current scene tag changes;
the generation module is used for generating a rate switching instruction according to the target transmission rate;
and the switching module is used for switching the current transmission rate of the bus into the target transmission rate based on the rate switching instruction so as to enable the bus to carry out transmission processing on the data in the electronic equipment based on the target transmission rate.
9. An electronic device, comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-7.
10. A non-transitory computer readable storage medium storing computer instructions for causing a computer to perform the method of any one of claims 1-7.
CN202311279413.3A 2023-09-28 2023-09-28 Solid state disk control method, device, equipment and storage medium Pending CN117312198A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311279413.3A CN117312198A (en) 2023-09-28 2023-09-28 Solid state disk control method, device, equipment and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311279413.3A CN117312198A (en) 2023-09-28 2023-09-28 Solid state disk control method, device, equipment and storage medium

Publications (1)

Publication Number Publication Date
CN117312198A true CN117312198A (en) 2023-12-29

Family

ID=89236786

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311279413.3A Pending CN117312198A (en) 2023-09-28 2023-09-28 Solid state disk control method, device, equipment and storage medium

Country Status (1)

Country Link
CN (1) CN117312198A (en)

Similar Documents

Publication Publication Date Title
CN112667403B (en) Scheduling method and device of server and electronic equipment
CN112488060B (en) Target detection method, device, equipment and medium
CN113127382A (en) Data reading method, device, equipment and medium for additional writing
CN113468021B (en) Method, device, equipment and storage medium for monitoring performance data
CN116467235B (en) DMA-based data processing method and device, electronic equipment and medium
CN116594563A (en) Distributed storage capacity expansion method and device, electronic equipment and storage medium
CN117236236A (en) Chip design data management method and device, electronic equipment and storage medium
CN114125324B (en) Video stitching method and device, electronic equipment and storage medium
CN117312198A (en) Solid state disk control method, device, equipment and storage medium
CN116860693A (en) Control method and device and electronic equipment
CN113377295B (en) Data storage and reading method, device and equipment for multi-producer single-consumer
CN113361575B (en) Model training method and device and electronic equipment
CN112988105A (en) Playing state control method and device, electronic equipment and storage medium
CN114386577A (en) Method, apparatus, and storage medium for executing deep learning model
CN112965836B (en) Service control method, device, electronic equipment and readable storage medium
CN114816536A (en) Branch prediction processing method, device, equipment and storage medium
CN114501084A (en) Play starting method, device, equipment and medium of player
CN114419403A (en) Method and apparatus for inspecting a model
CN113556575A (en) Method, apparatus, device, medium and product for compressing data
CN115599307B (en) Data access method, device, electronic equipment and storage medium
CN114217872B (en) Application program starting method and device, electronic equipment and storage medium
CN113961263B (en) Applet distribution method, device, apparatus and storage medium
CN113490044B (en) Video playing method and device, electronic equipment and storage medium
CN118193102A (en) Remote access method, device and system, electronic equipment and storage medium
CN114428646B (en) Data processing method and device, electronic equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination