CN117310427B - Fault detection method and high-voltage capacitor group unit on-line monitoring system - Google Patents

Fault detection method and high-voltage capacitor group unit on-line monitoring system Download PDF

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Publication number
CN117310427B
CN117310427B CN202311261412.6A CN202311261412A CN117310427B CN 117310427 B CN117310427 B CN 117310427B CN 202311261412 A CN202311261412 A CN 202311261412A CN 117310427 B CN117310427 B CN 117310427B
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charging
curve
capacitor
test
unit
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CN117310427A (en
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谢东宾
杨俊川
龚建龙
韩喜亮
李旭淘
张存川
吴立强
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Shijiazhuang Xuhao Power Equipment Technology Co ltd
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Shijiazhuang Xuhao Power Equipment Technology Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor
    • G01R31/2603Apparatus or methods therefor for curve tracing of semiconductor characteristics, e.g. on oscilloscope

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

The application relates to a fault detection method and a high-voltage capacitor group unit on-line monitoring system, wherein the method comprises the steps of responding to an acquired test signal, and dividing a capacitor in a control range into a test group and a non-test group; charging the capacitors in the non-test group; charging a capacitor in the test set using the non-test set, the capacitor being denoted as a test capacitor; recording a charging voltage curve, a charging temperature curve and a charging noise curve group of the test capacitor; and analyzing the charging voltage curve, the charging temperature curve and the charging noise curve group to obtain a judging result, and sending out an alarm signal when the judging result is unqualified. According to the fault detection method and the high-voltage capacitor bank unit on-line monitoring system, self-checking is achieved by means of the capacitor bank in the capacitor cabinet, and on the premise that operation of the capacitor cabinet is not affected, the health condition of the capacitor in the capacitor cabinet can be analyzed and a judgment result can be given.

Description

Fault detection method and high-voltage capacitor group unit on-line monitoring system
Technical Field
The application relates to the technical field of data processing, in particular to a fault detection method and an online monitoring system for a high-voltage capacitor group unit.
Background
The capacitor group is a working group formed by a plurality of capacitors, and has two forms of series connection and parallel connection. The capacitor bank has the characteristics of large capacity, multiple unit numbers, high voltage level and the like. In a 500KV ultra-high voltage power system, the application of the high-voltage parallel capacitor is very wide, and the high-voltage parallel capacitor is a main form for improving the power factor of a power grid, improving the voltage quality of the power grid and compensating the reactive power of the power grid, so that the running condition of the high-voltage parallel capacitor is very important.
When the power capacitor device operates in a power grid, if insulation defects caused by manufacturing defects, aging and external force damage exist in the power capacitor device, insulation accidents which affect the safe operation of the device and the power grid can occur. The current practice is to periodically power off to perform preventive tests and overhauls so as to timely detect the insulation defects inside the equipment and prevent insulation accidents, but the mode can not timely find the internal faults of a single capacitor. And the power failure detection mode can cause the breakdown of the inside of the capacitor in operation to reach the action value of a protection fixed value, so that the unit capacitor operates with diseases, potential safety hazards of the power system are caused, and even safety accidents are developed.
Disclosure of Invention
The application provides a fault detection method and a high-voltage capacitor bank unit on-line monitoring system, self-checking is realized by means of a capacitor bank in a capacitor cabinet, and the health condition of a capacitor in the capacitor cabinet can be analyzed and a judgment result can be given on the premise that the operation of the capacitor cabinet is not influenced.
The above object of the present application is achieved by the following technical solutions:
in a first aspect, the present application provides a method for analyzing a state, including:
dividing the capacitors in the control range into two groups including a test group and a non-test group in response to the acquired test signals;
charging the capacitors in the non-test group until each capacitor in the non-test group is in a full state;
charging a capacitor in the test set using the non-test set, the capacitor being denoted as a test capacitor;
recording a charging voltage curve, a charging temperature curve and a charging noise curve group of the test capacitor;
analyzing the charging voltage curve, the charging temperature curve and the charging noise curve group to obtain a judging result, wherein the judging result comprises qualification and disqualification; and
when the judgment result is unqualified, an alarm signal is sent out, and the alarm signal also comprises the serial number of the test capacitor;
the capacitors in the test group sequentially complete the charging and analysis process;
when the capacitors in the test set are charged, the capacitors in the non-test set are disconnected from the grid.
In one possible implementation manner of the first aspect, the charging temperature profile includes a positive electrode column temperature profile and a negative electrode column temperature profile.
In one possible implementation manner of the first aspect, analyzing the charging voltage curve and the charging temperature curve includes:
placing the charging voltage curve and the charging temperature curve into the same coordinate system;
taking a plurality of analysis data points on a horizontal axis;
calculating a difference between the charging voltage curve and the charging temperature curve at each analysis data point;
moving the difference distribution to the charging voltage curve and the charging temperature curve at each analysis data point according to the difference distribution, wherein the difference distribution tends to be uniform; and
and sending out an alarm signal when the difference distribution of the charging voltage curve and the charging temperature curve at the presence analysis data point cannot be uniform.
In a possible implementation manner of the first aspect, the analysis data points where the difference distribution of the charging voltage curve and the charging temperature curve at the analysis data points cannot be toward uniformity are recorded as abnormal data points;
calculating the total appearance time length of the abnormal data points; and
and sending out an alarm signal when the ratio of the total appearance time length to the charging time length of the abnormal data point exceeds a first preset value.
In one possible implementation of the first aspect, the length of time of a single outlier data point is one third to one half of the length of time between the outlier data point and an adjacent one or two analysis data points;
the time length of the plurality of outlier data points is the sum of the time lengths of the outlier data points over the sequential sequence.
In one possible implementation manner of the first aspect, the analysis of the charging noise curve set includes:
analyzing the charging noise curve group to obtain a plurality of charging noise curves;
dividing the charging noise curve into a basic charging noise curve and a special charging noise curve according to the frequency and the amplitude;
when a special charging noise curve exists in the charging noise curve, determining an occurrence time period of the special charging noise curve;
determining whether an outlier data point exists within the occurrence time period; and
and sending out an alarm signal when abnormal data points exist in the occurrence time period.
In a possible implementation manner of the first aspect, an alarm signal is sent when it is determined whether an abnormal data point exists in the occurrence time period and a ratio of a time length of the abnormal data point to an occurrence time period of the special charging noise curve exceeds a second preset value.
In a second aspect, the present application provides a state analysis device, comprising:
the first grouping unit is used for responding to the acquired test signals and dividing the capacitors in the control range into two groups, including a test group and a non-test group;
the first charging unit is used for charging the capacitors in the non-test group until each capacitor in the non-test group is in a full-power state;
a second charging unit for charging one capacitor in the test group using the non-test group, the capacitor being denoted as a test capacitor;
the acquisition unit is used for recording a charging voltage curve, a charging temperature curve and a charging noise curve group of the test capacitor;
the analysis unit is used for analyzing the charging voltage curve, the charging temperature curve and the charging noise curve group to obtain a judging result, wherein the judging result comprises qualification and disqualification; and
the communication unit is used for sending out an alarm signal when the judging result is unqualified, and the alarm signal also comprises a test capacitor number;
the capacitors in the test group sequentially complete the charging and analysis process;
when the capacitors in the test set are charged, the capacitors in the non-test set are disconnected from the grid.
In a third aspect, the present application provides an online monitoring system for a high voltage capacitor bank unit, the system comprising:
one or more memories for storing instructions; and
one or more processors configured to invoke and execute the instructions from the memory, to perform the method as described in the first aspect and any possible implementation of the first aspect.
In a fourth aspect, the present application provides a computer-readable storage medium comprising:
a program which, when executed by a processor, performs a method as described in the first aspect and any possible implementation of the first aspect.
In a fifth aspect, the present application provides a computer program product comprising program instructions which, when executed by a computing device, perform a method as described in the first aspect and any possible implementation manner of the first aspect.
In a sixth aspect, the present application provides a chip system comprising a processor for implementing the functions involved in the above aspects, e.g. generating, receiving, transmitting, or processing data and/or information involved in the above methods.
The chip system can be composed of chips, and can also comprise chips and other discrete devices.
In one possible design, the system on a chip also includes memory to hold the necessary program instructions and data. The processor and the memory may be decoupled, provided on different devices, respectively, connected by wire or wirelessly, or the processor and the memory may be coupled on the same device.
Drawings
Fig. 1 is a schematic block diagram of a state analysis method provided in the present application.
Fig. 2 is a schematic diagram of a grouping of capacitors provided herein.
Fig. 3 is a schematic diagram of a change process of the temperature of the positive electrode column, the temperature of the negative electrode column and the charging voltage provided by the application.
Fig. 4 is a schematic flow chart of a step of analyzing a charging voltage curve and a charging temperature curve provided in the present application.
Fig. 5 is a schematic diagram of a process for obtaining a difference provided in the present application.
Fig. 6 is a schematic diagram illustrating a charging voltage curve and a charging temperature curve according to the present application.
Fig. 7 is a schematic diagram of the process of changing the charge temperature curve and the charge voltage curve after the movement given in fig. 6.
Fig. 8 is a schematic diagram of a time-length obtaining process provided in the present application.
Fig. 9 is a schematic diagram of another time length obtaining process provided in the present application.
Fig. 10 is a schematic block diagram illustrating a process flow of analyzing a charging noise curve set provided in the present application.
Detailed Description
For a clearer understanding of the technical solutions in the present application, related technologies will be first described.
Reactive power refers to the absorption of energy from a power supply during a portion of the period, and the release of energy during another portion of the period, in an ac circuit with reactance, with the average power being zero throughout the period, but the energy being constantly exchanged between the power supply and the reactive element (capacitance, inductance). The maximum value of the exchange rate is the reactive power.
Connecting a device with a capacitive load and an inductive load in parallel in the same circuit, the inductive load absorbing energy when the capacitive load releases energy; while the inductive load releases energy, the capacitive load absorbs energy, and the energy is exchanged between the two loads. In this way the reactive power absorbed by the inductive load can be compensated for by the reactive power output by the capacitive load.
In an electrical network, reactive power has an effect, but the ratio of the total power thereof needs to be controlled, because when the ratio of the reactive power is too large, the operation efficiency of the electrical network is reduced. The effect of the capacitor box temporarily stores the reactive power, which is then output back to the grid when needed, so that the reactive power is only transferred between the terminal and the capacitor box.
The capacitor in the capacitor box can store electric energy, and in the long-time operation process, the capacitor can have faults such as aging, leakage and breakdown. According to the state analysis method disclosed by the application, the state analysis is performed on the capacitor in the capacitor cabinet, so that potential problems of the capacitor can be found, an alarm can be given out at the initial stage of the occurrence of the problems, and the negative influence of the problems can be controlled in a smaller range.
The technical solutions in the present application are described in further detail below with reference to the accompanying drawings.
Referring to fig. 1, a state analysis method disclosed in the present application includes the following steps:
s101, responding to an acquired test signal, and dividing the capacitors in a control range into two groups, wherein the two groups comprise a test group and a non-test group;
s102, charging capacitors in the non-test group until each capacitor in the non-test group is in a full-power state;
s103, charging one capacitor in the test group by using the non-test group, wherein the capacitor is marked as a test capacitor;
s104, recording a charging voltage curve, a charging temperature curve and a charging noise curve group of the test capacitor;
s105, analyzing the charging voltage curve, the charging temperature curve and the charging noise curve group to obtain a judging result, wherein the judging result comprises qualification and disqualification; and
s106, when the judgment result is unqualified, an alarm signal is sent out, and the alarm signal also comprises a test capacitor number;
the capacitors in the test group sequentially complete the charging and analysis process;
when the capacitors in the test set are charged, the capacitors in the non-test set are disconnected from the grid.
Specifically, in step S101, the controller in the capacitor box receives the test signal sent by the host computer, and in response to the received test signal, the controller first divides the capacitors in the control range into two groups, including a test group and a non-test group, as shown in fig. 2.
After the grouping is completed, step S102 is performed, in which the capacitors in the non-test group are charged until each capacitor in the non-test group is in a full state, and after the charging is completed, step S103 is performed.
In step S103, one capacitor in the test set, which is denoted as a test capacitor, is charged using the non-test set. During the charging process, the capacitors in the test group are sequentially charged and analyzed (steps S104 to S106), and the capacitors in the non-test group are disconnected from the power grid while the capacitors in the test group are charged.
It should be understood that the connection state of the capacitor in the capacitor box and the power grid is controlled by the controller, the controller collects relevant parameters in the power grid, analyzes reactive power and the duty ratio of the reactive power in the power grid, and when the duty ratio of the reactive power in the power grid exceeds the requirement, the controller drives the relevant circuit to be connected with the power grid so as to store the reactive power in the capacitor box.
In this application, this is used to charge the capacitors in the non-test set.
After the capacitors in the non-test group are charged, the capacitors are used as power sources to charge one capacitor in the test group, and the charging mode can be used for providing a stable charging environment, because if reactive power in a power grid is directly used for charging the capacitors in the test group, instability of parameters in the charging process is caused, the core reason is that the reactive power in the power grid dynamically changes, and the capacitors in the capacitor boxes need to react quickly to absorb the reactive power.
Such variable conditions may cause subsequent analysis to fail or result in erroneous results.
In step S104, a set of a charging voltage curve, a charging temperature curve and a charging noise curve of the test capacitor is recorded, and after the set of the charging voltage curve, the charging temperature curve and the charging noise curve is analyzed, a determination result is obtained, and the determination result has two types of pass and fail, that is, the content in step S105. When the result is not qualified, step S106 is executed, in which the controller sends out an alarm signal, and the alarm signal further includes the test capacitor number.
The charging voltage curve here represents a change in charging voltage, and the charging temperature also represents a change in temperature of the capacitor.
After the upper computer or the cloud receives the alarm signal, the upper computer or the cloud informs a worker to check the test capacitor and repair or replace the test capacitor.
When the charging temperature curve of the test capacitor is recorded, the charging temperature curve comprises a positive pole temperature curve and a negative pole temperature curve, and the positive pole temperature and the negative pole temperature can more accurately reflect the working state of the test capacitor.
Referring to fig. 3, it should be understood that heat is generated during the charging process of the test capacitor, and the heat is distributed in the inner core area, the positive electrode post area and the negative electrode post area of the test capacitor, so that the temperature of the inner core area cannot be collected, and the positive electrode post and the negative electrode post of the capacitor are exposed outside the capacitor, so that the positive electrode post temperature and the negative electrode post temperature are collected simultaneously in the present application.
Taking the normal temperature rising process as an example, the positive electrode post and the negative electrode post of the capacitor can be regarded as a resistor, when current passes through the capacitor, a part of electric energy can be converted into heat energy, so that the temperature of the positive electrode post and the negative electrode post rises. When the capacitor is in a normal state, the temperature change curves of the positive electrode column and the negative electrode column tend to be consistent.
Of course, the situation that the temperature of the negative electrode column is slightly higher may occur, but the temperature change curve of the negative electrode column is moved in the coordinate system, so that the temperature change curve of the positive electrode column can be matched or mostly matched. If only one of the positive electrode column temperature and the negative electrode column temperature is abnormal, the capacitor may have defects.
Referring to fig. 4 and 5, the analysis of the charging voltage curve and the charging temperature curve includes the following steps:
s201, placing a charging voltage curve and a charging temperature curve into the same coordinate system;
s202, taking a plurality of analysis data points on a horizontal axis;
s203, calculating the difference value of the charging voltage curve and the charging temperature curve at each analysis data point;
s204, moving the difference distribution to the difference distribution of the charging voltage curve and the charging temperature curve at each analysis data point to be uniform; and
s205, sending out an alarm signal when the difference distribution of the charging voltage curve and the charging temperature curve at the analysis data points cannot be uniform.
In step S201 to step S205, the charging voltage curve and the charging temperature curve are put into the same coordinate system for analysis, which is specifically implemented by taking a plurality of analysis data points on the horizontal axis, calculating the difference value between the charging voltage curve and the charging temperature curve at each analysis data point, and finally giving out the result according to the uniformity of the difference value distribution.
As mentioned above, the present application uses the capacitor of the non-test group to charge the capacitor in the test group, which can realize slow charging of the capacitor in the test group, and this charging mode can make the voltage of the test capacitor slowly rise, and the process is also accompanied by slow rise of the temperature of the positive pole and the temperature of the negative pole of the test capacitor.
When the charging process is performed at a certain speed or interval, the temperature rise of the charging voltage and the charging temperature can be achieved, or the middle section of the charging voltage curve and the middle section of the charging temperature curve can be obtained to be in a relatively stable rising state.
In contrast to fig. 6 and 7, it is of course also necessary to consider that there is a certain hysteresis in the rising of the charging temperature curve, so that in step S204, the difference distribution of the charging voltage curve and the charging temperature curve at each analysis data point is moved to be uniform according to the difference distribution.
When the difference distribution of the charging voltage curve and the charging temperature curve at the analysis data points cannot be uniform, the capacitor is indicated to be damaged, and the controller sends out an alarm signal. Here, in order to determine the accuracy of the alarm signal, a plurality of tests on one test capacitor are required.
At the same time, the test capacitor needs to be subjected to standing treatment for a period of time before testing, so that the temperature of the test capacitor is kept consistent with the ambient temperature. Because the capacitors in the capacitor boxes are connected in parallel, when the test capacitor needs to be subjected to standing treatment, other capacitors or standby capacitors can be put into use, or the controller can appropriately adjust the duty ratio in power factor analysis.
In some examples, the analysis data points at which the difference distribution of the charge voltage curve and the charge temperature curve at the analysis data points cannot be made uniform are noted as outlier data points;
calculating the total appearance time length of the abnormal data points; and
and sending out an alarm signal when the ratio of the total appearance time length to the charging time length of the abnormal data point exceeds a first preset value.
The analysis of the charge voltage curve and the charge temperature curve is further defined herein, and whether to send out an alarm signal is determined by calculating the ratio of the total occurrence time length of the abnormal data points to the charge time length. Here, mainly, it is considered that the charging process may be affected by interference of environmental factors, data acquisition errors, and the like.
Referring to fig. 8, the time length of a single outlier data point is calculated by: the length of time is one third to one half of the length of time between the outlier data point and the adjacent one or two analysis data points.
Referring to fig. 9, the time length of the plurality of abnormal data points is calculated by: the time length is the sum of the time lengths of the outlier data points on the sequential sequence.
Referring to fig. 10, in some examples, the analysis of the set of charging noise curves includes the steps of:
s301, analyzing the charging noise curve group to obtain a plurality of charging noise curves;
s302, dividing a charging noise curve into a basic charging noise curve and a special charging noise curve according to the frequency and the amplitude;
s303, when a special charging noise curve exists in the charging noise curves, determining an occurrence time period of the special charging noise curve;
s304, determining whether abnormal data points exist in the occurrence time period; and
s305, sending out an alarm signal when abnormal data points exist in the occurrence time period.
In steps S301 to S305, the noise generated during the charging process of the capacitor, that is, the charging noise curve set, is analyzed, and the analysis Hu Hui obtains a plurality of charging noise curves, which are sine waves.
The distinguishing technical features of the charging noise curve include frequency, amplitude, start time and end time.
For the charging noise curve, the charging noise curve is first divided into a base charging noise curve and a special charging noise curve according to frequency and amplitude. Here, the basic charging noise curve is normal in appearance, and mainly includes environmental noise, charging noise, and the like. The special charging noise curve mainly occurs when the capacitor is abnormal, and is not predictable, so the charging noise curve is screened out by using a discharging method in the application.
When a special charging noise curve exists in the charging noise curve, firstly determining the occurrence time period of the special charging noise curve, then determining whether abnormal data points exist in the occurrence time period, and sending an alarm signal when the abnormal data points exist in the occurrence time period.
It should be noted that, for the determination of the special charging noise curve, it is necessary to combine the abnormal data points, and the manner of combining the abnormal data points and the determination is to improve the accuracy of the determination, because the probability of the occurrence of the abnormality of the capacitor is higher when the abnormal data points and the special charging noise curve occur simultaneously.
Only special charging noise curves need to be considered when the problems of environmental noise, acquisition precision and the like occur.
Further, whether abnormal data points exist in the occurrence time period or not is determined, and an alarm signal is sent out when the ratio of the time length of the abnormal data points to the occurrence time period of the special charging noise curve exceeds a second preset value.
The application also provides a state analysis device, comprising:
the first grouping unit is used for responding to the acquired test signals and dividing the capacitors in the control range into two groups, including a test group and a non-test group;
the first charging unit is used for charging the capacitors in the non-test group until each capacitor in the non-test group is in a full-power state;
a second charging unit for charging one capacitor in the test group using the non-test group, the capacitor being denoted as a test capacitor;
the acquisition unit is used for recording a charging voltage curve, a charging temperature curve and a charging noise curve group of the test capacitor;
the analysis unit is used for analyzing the charging voltage curve, the charging temperature curve and the charging noise curve group to obtain a judging result, wherein the judging result comprises qualification and disqualification; and
the communication unit is used for sending out an alarm signal when the judging result is unqualified, and the alarm signal also comprises a test capacitor number;
the capacitors in the test group sequentially complete the charging and analysis process;
when the capacitors in the test set are charged, the capacitors in the non-test set are disconnected from the grid.
Further, the charging temperature profile includes a positive electrode column temperature profile and a negative electrode column temperature profile.
Further, the method further comprises the following steps:
the first processing unit is used for placing the charging voltage curve and the charging temperature curve into the same coordinate system;
a selecting unit for taking a plurality of analysis data points on a horizontal axis;
a first calculation unit for calculating a difference between the charging voltage curve and the charging temperature curve at each analysis data point;
the mobile unit is used for moving the difference distribution to the charging voltage curve and the charging temperature curve at each analysis data point according to the difference distribution so that the difference distribution tends to be uniform; and
and the first alarm unit is used for sending an alarm signal when the difference distribution of the charging voltage curve and the charging temperature curve at the analysis data points cannot be uniform.
Further, the method further comprises the following steps:
the recording unit is used for recording the analysis data points, at which the difference distribution of the charging voltage curve and the charging temperature curve at the analysis data points cannot be uniform, as abnormal data points;
the second calculation unit is used for calculating the total appearance time length of the abnormal data points; and
and the second alarm unit is used for sending an alarm signal when the ratio of the total appearance time length of the abnormal data points to the charging time length exceeds a first preset value.
Further, the length of time of a single outlier data point is one third to one half of the length of time between the outlier data point and an adjacent one or two analysis data points;
the time length of the plurality of outlier data points is the sum of the time lengths of the outlier data points over the sequential sequence.
Further, the method further comprises the following steps:
the analysis unit is used for analyzing the charging noise curve group to obtain a plurality of charging noise curves;
the second grouping unit is used for dividing the charging noise curve into a basic charging noise curve and a special charging noise curve according to the frequency and the amplitude;
a first determining unit configured to determine an occurrence period of a special charging noise curve when the special charging noise curve exists in the charging noise curves;
a second determining unit, configured to determine whether an abnormal data point exists in the occurrence time period; and
and the third alarm unit is used for sending an alarm signal when abnormal data points exist in the occurrence time period.
Further, whether abnormal data points exist in the occurrence time period or not is determined, and an alarm signal is sent out when the ratio of the time length of the abnormal data points to the occurrence time period of the special charging noise curve exceeds a second preset value.
In one example, the unit in any of the above apparatuses may be one or more integrated circuits configured to implement the above methods, for example: one or more application specific integrated circuits (application specific integratedcircuit, ASIC), or one or more digital signal processors (digital signal processor, DSP), or one or more field programmable gate arrays (field programmable gate array, FPGA), or a combination of at least two of these integrated circuit forms.
For another example, when the units in the apparatus may be implemented in the form of a scheduler of processing elements, the processing elements may be general-purpose processors, such as a central processing unit (central processing unit, CPU) or other processor that may invoke the program. For another example, the units may be integrated together and implemented in the form of a system-on-a-chip (SOC).
Various objects such as various messages/information/devices/network elements/systems/devices/actions/operations/processes/concepts may be named in the present application, and it should be understood that these specific names do not constitute limitations on related objects, and that the named names may be changed according to the scenario, context, or usage habit, etc., and understanding of technical meaning of technical terms in the present application should be mainly determined from functions and technical effects that are embodied/performed in the technical solution.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It should also be understood that in various embodiments of the present application, first, second, etc. are merely intended to represent that multiple objects are different. For example, the first time window and the second time window are only intended to represent different time windows. Without any effect on the time window itself, the first, second, etc. mentioned above should not impose any limitation on the embodiments of the present application.
It is also to be understood that in the various embodiments of the application, terms and/or descriptions of the various embodiments are consistent and may be referenced to one another in the absence of a particular explanation or logic conflict, and that the features of the various embodiments may be combined to form new embodiments in accordance with their inherent logic relationships.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a computer-readable storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned computer-readable storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The present application also provides a computer program product comprising instructions that, when executed, cause the on-line monitoring system to perform operations of the on-line monitoring system corresponding to the above-described method.
The application also provides an online monitoring system of the high-voltage capacitor bank unit, which comprises:
one or more memories for storing instructions; and
one or more processors configured to invoke and execute the instructions from the memory to perform the method as described above.
The present application also provides a chip system comprising a processor for implementing the functions involved in the above, e.g. generating, receiving, transmitting, or processing data and/or information involved in the above method.
The chip system can be composed of chips, and can also comprise chips and other discrete devices.
The processor referred to in any of the foregoing may be a CPU, microprocessor, ASIC, or integrated circuit that performs one or more of the procedures for controlling the transmission of feedback information described above.
In one possible design, the system on a chip also includes memory to hold the necessary program instructions and data. The processor and the memory may be decoupled, and disposed on different devices, respectively, and connected by wired or wireless means, so as to support the chip system to implement the various functions in the foregoing embodiments. In the alternative, the processor and the memory may be coupled to the same device.
Optionally, the computer instructions are stored in a memory.
Alternatively, the memory may be a storage unit in the chip, such as a register, a cache, etc., and the memory may also be a storage unit in the terminal located outside the chip, such as a ROM or other type of static storage device, a RAM, etc., that may store static information and instructions.
It is to be understood that the memory in this application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory.
The nonvolatile memory may be a ROM, a Programmable ROM (PROM), an Erasable Programmable ROM (EPROM), an electrically erasable programmable EPROM (EEPROM), or a flash memory.
The volatile memory may be RAM, which acts as external cache. There are many different types of RAM, such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (enhancedSDRAM, ESDRAM), synchronous Link DRAM (SLDRAM), and direct memory bus RAM.
The embodiments of the present invention are all preferred embodiments of the present application, and are not intended to limit the scope of the present application in this way, therefore: all equivalent changes in structure, shape and principle of this application should be covered in the protection scope of this application.

Claims (8)

1. A fault detection method, comprising:
dividing the capacitors in the control range into two groups including a test group and a non-test group in response to the acquired test signals;
charging the capacitors in the non-test group until each capacitor in the non-test group is in a full state, wherein the capacitors in the non-test group are charged by using reactive power in the power grid;
charging a capacitor in the test set using the non-test set, the capacitor being denoted as a test capacitor;
recording a charging voltage curve, a charging temperature curve and a charging noise curve group of the test capacitor;
analyzing the charging voltage curve, the charging temperature curve and the charging noise curve group to obtain a judging result, wherein the judging result comprises qualification and disqualification; and
when the judgment result is unqualified, an alarm signal is sent out, and the alarm signal also comprises the serial number of the test capacitor;
the capacitors in the test group sequentially complete the charging and analysis process;
when the capacitors in the test groups are charged, the capacitors in the non-test groups are disconnected with the power grid;
analyzing the charge voltage curve and the charge temperature curve includes:
placing the charging voltage curve and the charging temperature curve into the same coordinate system;
taking a plurality of analysis data points on a horizontal axis;
calculating a difference between the charging voltage curve and the charging temperature curve at each analysis data point;
moving the difference distribution of the charging voltage curve and the charging temperature curve at each analysis data point according to the difference distribution to be uniform; and
when the difference distribution of the charging voltage curve and the charging temperature curve at the analytic data points cannot be uniform, an alarm signal is sent out;
analysis of the set of charging noise curves includes:
analyzing the charging noise curve group to obtain a plurality of charging noise curves;
dividing the charging noise curve into a basic charging noise curve and a special charging noise curve according to the frequency and the amplitude;
when a special charging noise curve exists in the charging noise curve, determining an occurrence time period of the special charging noise curve;
determining whether an outlier data point exists within the occurrence time period; and
and sending out an alarm signal when abnormal data points exist in the occurrence time period.
2. The fault detection method of claim 1, wherein the charging temperature profile comprises a positive pole temperature profile and a negative pole temperature profile.
3. The fault detection method according to claim 1, wherein the analysis data point at which the difference distribution of the charging voltage curve and the charging temperature curve at the analysis data point cannot be made uniform is recorded as an abnormal data point;
calculating the total appearance time length of the abnormal data points; and
and sending out an alarm signal when the ratio of the total appearance time length to the charging time length of the abnormal data point exceeds a first preset value.
4. A fault detection method according to claim 3, wherein the time length of a single outlier data point is one third to one half of the time length between the outlier data point and an adjacent one or two analysis data points;
the time length of the plurality of outlier data points is the sum of the time lengths of the outlier data points over the sequential sequence.
5. The fault detection method according to claim 1, wherein an alarm signal is issued when it is determined whether or not an abnormal data point exists in the occurrence period and a ratio of a time length of the abnormal data point to an occurrence period of the special charging noise curve exceeds a second preset value.
6. A fault detection device, comprising:
the first grouping unit is used for responding to the acquired test signals and dividing the capacitors in the control range into two groups, including a test group and a non-test group;
the first charging unit is used for charging the capacitors in the non-test group until each capacitor in the non-test group is in a full-power state, and the capacitors in the non-test group are charged by using reactive power in the power grid;
a second charging unit for charging one capacitor in the test group using the non-test group, the capacitor being denoted as a test capacitor;
the acquisition unit is used for recording a charging voltage curve, a charging temperature curve and a charging noise curve group of the test capacitor;
the analysis unit is used for analyzing the charging voltage curve, the charging temperature curve and the charging noise curve group to obtain a judging result, wherein the judging result comprises qualification and disqualification; and
the communication unit is used for sending out an alarm signal when the judging result is unqualified, and the alarm signal also comprises a test capacitor number;
the capacitors in the test group sequentially complete the charging and analysis process;
when the capacitors in the test groups are charged, the capacitors in the non-test groups are disconnected with the power grid;
the first processing unit is used for placing the charging voltage curve and the charging temperature curve into the same coordinate system;
a selecting unit for taking a plurality of analysis data points on a horizontal axis;
a first calculation unit for calculating a difference between the charging voltage curve and the charging temperature curve at each analysis data point;
the mobile unit is used for moving the difference distribution of the charging voltage curve and the charging temperature curve at each analysis data point to be uniform according to the difference distribution;
the first alarm unit is used for sending an alarm signal when the difference distribution of the charging voltage curve and the charging temperature curve at the analysis data points cannot be uniform;
the analysis unit is used for analyzing the charging noise curve group to obtain a plurality of charging noise curves;
the second grouping unit is used for dividing the charging noise curve into a basic charging noise curve and a special charging noise curve according to the frequency and the amplitude;
a first determining unit configured to determine an occurrence period of a special charging noise curve when the special charging noise curve exists in the charging noise curves;
a second determining unit, configured to determine whether an abnormal data point exists in the occurrence time period; and
and the third alarm unit is used for sending an alarm signal when abnormal data points exist in the occurrence time period.
7. An on-line monitoring system for a high voltage capacitor bank unit, the system comprising:
one or more memories for storing instructions; and
one or more processors to invoke and execute the instructions from the memory to perform the method of any of claims 1 to 5.
8. A computer-readable storage medium, the computer-readable storage medium comprising:
program which, when executed by a processor, performs the method according to any one of claims 1 to 5.
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