CN117294311B - Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation - Google Patents

Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation Download PDF

Info

Publication number
CN117294311B
CN117294311B CN202311579617.9A CN202311579617A CN117294311B CN 117294311 B CN117294311 B CN 117294311B CN 202311579617 A CN202311579617 A CN 202311579617A CN 117294311 B CN117294311 B CN 117294311B
Authority
CN
China
Prior art keywords
interpolation filter
sampling
filter bank
downsampling
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202311579617.9A
Other languages
Chinese (zh)
Other versions
CN117294311A (en
Inventor
姚文轩
唐思豪
张雷鹏
郑瑶
邱伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hunan University
Original Assignee
Hunan University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hunan University filed Critical Hunan University
Priority to CN202311579617.9A priority Critical patent/CN117294311B/en
Publication of CN117294311A publication Critical patent/CN117294311A/en
Application granted granted Critical
Publication of CN117294311B publication Critical patent/CN117294311B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/124Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245Details of sampling arrangements or methods
    • H03M1/1255Synchronisation of the sampling frequency or phase to the input frequency or phase
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H21/00Adaptive networks
    • H03H21/0012Digital adaptive filters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40Arrangements for reducing harmonics

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Complex Calculations (AREA)

Abstract

The invention discloses an interpolation filter bank synchronous sampling method and system based on a lost-guaranty image approximation, wherein the interpolation filter bank synchronous sampling method based on the lost-guaranty image approximation comprises the following steps: estimating an actual sampling interval by a counter triggered by a time sequence reference pulse; determining a downsampling multiple L and an upsampling multiple K of the interpolation filter set through a lost-image approximation by combining an actual sampling interval; designing coefficients of an interpolation filter bank by combining the downsampling multiple L and the upsampling multiple K; and sampling the original grid synchronous signal by using an interpolation filter bank. The invention aims to realize that the influence of sampling time errors can be effectively reduced only by using time sequence reference pulses and not needing other additional auxiliary equipment or involving a complicated hardware control process, and the accuracy of synchronous sampling of a power grid is improved.

Description

Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation
Technical Field
The invention relates to the technical field of sampling of power grid synchronous signals, in particular to a synchronous sampling method and system of an interpolation filter bank based on a Dipsilon graph approximation.
Background
Accurate synchronous sampling is critical to grid monitoring equipment, but its accuracy is greatly affected by sampling time errors caused by oscillator frequency drift. The Chinese patent application publication No. CN113377009A discloses a pulsar signal-based adaptive synchronous sampling control method, which comprises the following steps: extracting a synchronous signal from pulsar observation data; calculating an accumulated time error based on the synchronous signal, and adaptively adjusting a sampling control parameter according to the accumulated time error; and dynamically setting a sampling counter threshold based on the sampling control parameter, and triggering to execute a designated data sampling task if the sampling counter threshold reaches a preset sampling counting threshold. However, methods that include the above-described mitigation of sampling time errors typically rely on additional auxiliary equipment such as pulsar data acquisition and processing or involve complex hardware control processes.
Disclosure of Invention
The invention aims to solve the technical problems: aiming at the problems in the prior art, the invention provides a synchronous sampling method and a synchronous sampling system of an interpolation filter bank based on a lost motion graph approximation, which aim to realize that the influence of sampling time errors can be effectively reduced and the accuracy of synchronous sampling of a power grid can be improved only by using time sequence reference pulses and other additional auxiliary equipment or involving a complicated hardware control process.
In order to solve the technical problems, the invention adopts the following technical scheme:
an interpolation filter bank synchronous sampling method based on a lost-guaranty image approximation comprises the following steps:
estimating an actual sampling interval by a counter triggered by a time sequence reference pulse;
determining a downsampling multiple L and an upsampling multiple K of the interpolation filter set through a lost-image approximation by combining an actual sampling interval;
designing coefficients of an interpolation filter bank by combining the downsampling multiple L and the upsampling multiple K;
and sampling the original grid synchronous signal by using an interpolation filter bank.
Optionally, the functional expression of the counter estimation actual sampling interval triggered by the timing reference pulse is:
in the above-mentioned method, the step of,T a representing the actual sampling interval of the sample,Dthe frequency division multiple of the frequency divider employed to generate the sampling clock signal for synchronizing the measurement device to the system clock signal,Vas a result of the threshold value being set,Cthe number of counter overflows triggered for the timing reference pulse,H 1 andH 2 the initial value and the remaining value of the counter, respectively.
Optionally, determining the downsampling multiple of the interpolation filter set by a missing-figure approximationLAnd up-sampling multipleKComprising the following steps:
s101, ideal sampling intervalT i Actual sampling intervalT a Ratio of (2)T i /T a Expanded into the form of a continuous score represented by the formula:
in the above-mentioned method, the step of,D 0 andD n intermediate variables for the initial and nth iterations respectively,L n is the downsampling multiple of the interpolation filter of the nth iteration,K n up-sampling multiples of the interpolation filter bank for the nth iteration, wherein:
in the above-mentioned method, the step of,representing rounding the input number;
s102, according to the ratio of the form of the continuous scoreT i /T a Determining downsampling multiple of interpolation filter bankLAnd up-sampling multipleKIs a recursive formula of (a):
in the above-mentioned method, the step of,L n is the downsampling multiple of the interpolation filter of the nth iteration,K n up-sampling multiple of interpolation filter bank for nth iteration;L n-1 is the downsampling multiple of the interpolation filter of the n-1 th iteration,K n-1 upsampling multiples of the interpolation filter bank for the n-1 th iteration;L n-2 is the downsampling multiple of the interpolation filter for the n-2 th iteration,K n-2 upsampling multiples of the interpolation filter bank for the n-2 th iteration;
s103, aiming at downsampling multipleLAnd up-sampling multipleKFrom initial intermediate variablesD 0 Starting recursion until a preset stopping condition is met, and finally obtaining an up-sampling multiple of an interpolation filter bank of the nth iterationK n Final up-sampling multiple as interpolation filterK
Alternatively, the function expression of the stop condition preset in step S103 is:
in the above-mentioned method, the step of,for a given error threshold, and the resulting downsampled multiple of the interpolation filter for the nth iterationL n Final downsampling multiple as interpolation filterLUpsampling multiple of interpolation filter set of nth iterationK n Final up-sampling multiple as interpolation filterK
Optionally, the combined downsampling multipleLAnd up-sampling multipleKDesigning coefficients of an interpolation filter bank includes combining downsampling multiplesLAnd up-sampling multipleKDesign of cut-off frequency of interpolation filter bank
In the above-mentioned method, the step of,for the circumference ratio, max represents the maximum value.
Optionally, the combined downsampling multipleLAnd up-sampling multipleKDesign interpolation filterAfter the coefficients of the wave filter group, the function expression of the obtained interpolation filter group is as follows:
in the above-mentioned method, the step of,functional expression representing interpolation filter bank, < ->Is->Order filter->Order of filter for cutting infinite order, +.>Is of circumference rate>Order filter->The functional expression of (2) is:
in the above-mentioned method, the step of,in the frequency domain form of an interpolation filter +.>Is a natural constant, j is an imaginary unit, < ->For frequency +.>Hanning window (Hanning)>For the cut-off frequency of the interpolation filter bank, +.>Is a group delay of an interpolation filter bank, andso that the interpolation filter bank is a linear phase filter.
Optionally, the sampling the original grid synchronization signal with the interpolation filter bank includes:
s201, zero padding the original power grid synchronous signal containing sampling time error to obtain a pseudo up-sampling sequence
S202, pseudo up-sampling sequenceConvolving with an interpolation filter bank to obtain an up-sampling sequence +.>
Optionally, in step S201, the original grid-synchronization signal containing the sampling time error is zero-padded to obtain a pseudo-up-sampling sequenceThe functional expression of (2) is:
in the above-mentioned method, the step of,is->The signal, m is the letterThe number of the number,Lis the number of 0 elements inserted.
Optionally, step S202 is followed by upsampling the sequence according to the following formulaProceeding withKExtracting the multiple:
in the above-mentioned method, the step of,is thatKSignal obtained after the multiplication, < > and->For upsampling sequence +.>The first of (3)Up-sampling signal, K is the multiple parameter of the decimated signal,>is an integer parameter.
In addition, the invention also provides an interpolation filter bank synchronous sampling system based on the Dipsilon map approximation, which comprises a microprocessor and a memory which are connected with each other, wherein the microprocessor is programmed or configured to execute the interpolation filter bank synchronous sampling method based on the Dipsilon map approximation.
Furthermore, the present invention provides a computer readable storage medium having stored therein a computer program for programming or configuring by a microprocessor to perform the interpolation filter bank synchronous sampling method based on the loss-in-a-map approximation.
Compared with the prior art, the invention has the following advantages: accurate synchronous sampling is critical to grid monitoring equipment, but its accuracy is greatly affected by sampling time errors caused by oscillator frequency drift. Aiming at the problems that the existing method for relieving the sampling time error generally depends on additional auxiliary equipment or involves a complex hardware control process, the method comprises the steps of estimating an actual sampling interval through a time sequence reference pulse triggered counter, determining a downsampling multiple L and an upsampling multiple K of an interpolation filter set through a lost image approximation in combination with the actual sampling interval, designing coefficients of the interpolation filter set by combining the downsampling multiple L and the upsampling multiple K, and sampling an original power grid synchronous signal by utilizing the interpolation filter set to correct sampling data polluted by the sampling time error. Compared with the traditional synchronous sampling method, the method does not need to operate the analog-to-digital conversion module ADC to adjust each sampling interval, can be suitable for various analog-to-digital conversion modules ADC of SAR type, sigma-delta type and the like, and does not need the help of an external phase-locked loop module, so that the method becomes an economic and efficient synchronous sampling solution.
Drawings
FIG. 1 is a schematic diagram of a basic flow of a method according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of synchronous sampling principle in an embodiment of the present invention.
FIG. 3 is a detailed flow chart of the method according to the embodiment of the invention.
Fig. 4 is a comparison of the phase measurement results of the method of the embodiment of the present invention and the prior art method.
Fig. 5 is a comparison of frequency measurements of the method of the present invention and the prior art method.
Detailed Description
As shown in fig. 1, the interpolation filter bank synchronous sampling method based on the cartographic approximation of the present embodiment includes:
estimating an actual sampling interval by a counter triggered by a time sequence reference pulse;
determining a downsampling multiple L and an upsampling multiple K of the interpolation filter set through a lost-image approximation by combining an actual sampling interval;
designing coefficients of an interpolation filter bank by combining the downsampling multiple L and the upsampling multiple K;
and sampling the original grid synchronous signal by using an interpolation filter bank.
Referring to fig. 3, the functional expression for estimating the actual sampling interval by the counter triggered by the timing reference pulse is:
in the above-mentioned method, the step of,T a representing the actual sampling interval of the sample,Dthe frequency division multiple of the frequency divider employed to generate the sampling clock signal for synchronizing the measurement device to the system clock signal,Vas a result of the threshold value being set,Cthe number of counter overflows triggered for the timing reference pulse,H 1 andH 2 the initial value and the remaining value of the counter, respectively. Synchronous measurement devices are typically obtained by using integersDThe multiple divider divides a system clock signal to generate a sampling clock signal. Then, the ideal sampling interval is noted asThen it can be expressed as:
in the above-mentioned method, the step of,T i representing the ideal sampling interval of the sample,Dthe frequency division multiple of the frequency divider employed to generate the sampling clock signal for synchronizing the measurement device to the system clock signal,the frequency at which the system clock signal is generated is commonly referred to as the system operating frequency. However, there is always a certain deviation +.>In generalFor the purposes of deviation->In the range of 10 ppm to 50 ppm, which leads to a corresponding change in the actual sampling interval, can be used +.>The expression is as follows:
in the above-mentioned method, the step of,F sys for a nominal system operating frequency,is the deviation. If the sample is uniform within 1 second, the +.>Ideal sampling point and->Sampling time error between the actual sampling points +.>The method comprises the following steps:
in the above-mentioned method, the step of,is the sampling point sequence number. Synchronous sampling in the grid is a technique for collecting data from multiple locations with a common time index. The synchronous sampling technology of the power grid is important for power grid situation awareness, fault positioning, oscillation monitoring and vibration monitoring. To achieve synchronous sampling, the sampling clock of the analog-to-digital converter must be synchronized to a common time reference, such as a timing reference pulse from a GPS or a beidou satellite, to ensure that each device collects data simultaneously. Specifically, when a rising edge of the pulse-per-second signal is detectedThe analog-to-digital converter starts sampling, i.e. "timing reference pulse trigger sampling instant" in fig. 2. Limited by the 1 second time resolution of the timing reference pulse signal, a local oscillator driven timer is required to determine the sampling interval between two adjacent timing reference pulses, such as the "actual sampling instant" in fig. 2. Since the timing reference pulse signal and the local oscillator are in different clock domains, the actual sampling interval T a From ideal sampling interval T i A deviation between them, called a sampling time error STE, inevitably occurs. The sampling time error STE may accumulate over time and eventually degrade the performance of the application that relies on the synchronous sampling data. The existing method for mainly reducing sampling time errors is mostly based on phase-locked loops or clocks with higher precision, and cost price is high, so that the method is not beneficial to the application of a miniature synchronous phasor measurement unit PMU in a power distribution network. Or a method for realizing variable sampling intervals by controlling sampling time of the analog-to-digital converter. However, this method is complex to operate and is not compatible with sigma-delta analog-to-digital converters ADC, not a common synchronous sampling approach. In order to eliminate the influence of sampling time errors on subsequent measurement, an interpolation filter bank synchronous sampling method based on the loss-of-graph approximation is provided in the embodiment, wherein the actual sampling interval is estimated for a counter triggered by time sequence reference pulses, then the sampling interval conversion ratio is determined through the loss-of-graph approximation, finally the coefficient of the interpolation filter bank is designed, and the sampling time errors in sampling data are corrected by using the designed interpolation filter bank. Compared with the traditional synchronous sampling method, the interpolation filter bank synchronous sampling method based on the lost figure approximation does not need to operate the analog-to-digital conversion module ADC to adjust each sampling interval, can be suitable for various analog-to-digital conversion modules ADC of SAR type, sigma-delta type and the like, does not need the help of an external phase-locked loop module, and becomes an economic and efficient synchronous sampling solution. When the actual sampling interval is estimated by a time-sequential reference pulse triggered counter, the counting duration is +.>Actual sampling interval +.>The estimation can be performed using the following expression:
in the above-mentioned method, the step of,T a representing the actual sampling interval of the sample,Dthe frequency division multiple of the frequency divider employed to generate the sampling clock signal for synchronizing the measurement device to the system clock signal,F sys for a nominal system operating frequency,Vas a result of the threshold value being set,Cthe number of counter overflows triggered for the timing reference pulse,H 1 andH 2 the initial value and the remaining value of the counter, respectively.
Downsampling multiple of interpolation filter bankLAnd up-sampling multipleKNot only is the sampling interval ratio of the input and output sequences of the interpolation filter determined, but the operating efficiency of the structure is also affected. Ideal forShould be able to make +.>Approximation +.>Is the minimum number of (2). The Dimensional graph approximation (Diophantine approximation) aims at approximating a number class with a specific number (such as approximating a real number or algebraic number with a rational number) as a number theory branch of a main subject. Determining downsampling multiple of interpolation Filter Bank by Dipsing map approximation in this embodimentLAnd up-sampling multipleKThereby enabling +.>Approximation with preset precisionIs the minimum number of (2). Referring to fig. 3, the downsampling multiple of the interpolation filter bank is determined by the missing-figure approximation in the present embodimentLAnd up-sampling multipleKComprising the following steps:
s101, ideal sampling intervalT i Actual sampling intervalT a Ratio of (2)T i /T a Expanded into the form of a continuous score represented by the formula:
in the above-mentioned method, the step of,D 0 andD n intermediate variables for the initial and nth iterations respectively,L n is the downsampling multiple of the interpolation filter of the nth iteration,K n up-sampling multiples of the interpolation filter bank for the nth iteration, wherein:
in the above-mentioned method, the step of,representing rounding of the input number, < >>Intermediate variable for the n-1 th iteration;
s102, according to the ratio of the form of the continuous scoreT i /T a Determining downsampling multiple of interpolation filter bankLAnd up-sampling multipleKIs a recursive formula of (a):
in the above-mentioned method, the step of,L n is the downsampling multiple of the interpolation filter of the nth iteration,K n up-sampling multiple of interpolation filter bank for nth iteration;L n-1 is the downsampling multiple of the interpolation filter of the n-1 th iteration,K n-1 upsampling multiples of the interpolation filter bank for the n-1 th iteration;L n-2 for the n-2 th iterationIs a downsampling multiple of an interpolation filter of (c),K n-2 upsampling multiples of the interpolation filter bank for the n-2 th iteration;
s103, aiming at downsampling multipleLAnd up-sampling multipleKFrom initial intermediate variablesD 0 Starting recursion until a preset stopping condition is met, and finally obtaining an up-sampling multiple of an interpolation filter bank of the nth iterationK n Final up-sampling multiple as interpolation filterK. The function expression of the stop condition preset in step S103 in this embodiment is:
in the above-mentioned method, the step of,for a given error threshold, and the resulting downsampled multiple of the interpolation filter for the nth iterationL n Final downsampling multiple as interpolation filterLUpsampling multiple of interpolation filter set of nth iterationK n Final up-sampling multiple as interpolation filterK
In this embodiment, the downsampling factor is combinedLAnd up-sampling multipleKDesigning coefficients of an interpolation filter bank includes combining downsampling multiplesLAnd up-sampling multipleKDesign of cut-off frequency of interpolation filter bank
In the above-mentioned method, the step of,for the circumference ratio, max represents the maximum value.
In this embodiment, the downsampling factor is combinedLAnd up-sampling multipleKAfter the coefficient of the interpolation filter bank is designed, the function expression of the obtained interpolation filter bank is as follows:
in the above-mentioned method, the step of,functional expression representing interpolation filter bank, < ->Is->Order filter->Order of filter for cutting infinite order, +.>Is of circumference rate>Order filter->The functional expression of (2) is:
in the above-mentioned method, the step of,in the frequency domain form of an interpolation filter +.>Is a natural constant, j is an imaginary unit, < ->For frequency +.>Hanning window (Hanning)>For the cut-off frequency of the interpolation filter bank, +.>Is a group delay of an interpolation filter bank, andso that the interpolation filter bank is a linear phase filter. Frequency domain form of interpolation filter>Performing inverse Fourier transform to obtain +.>Order filter->When n is relatively large, filter +.>A practical filter can be obtained by cutting N, which corresponds to a filter of infinite order>
In this embodiment, sampling the original grid synchronization signal using the interpolation filter bank includes:
s201, zero padding the original power grid synchronous signal containing sampling time error to obtain a pseudo up-sampling sequence
S202, pseudo up-sampling sequenceConvolving with an interpolation filter bank to obtain an up-sampling sequence +.>
In step S201 of this embodiment, the original grid synchronization signal containing the sampling time error is zero-padded to obtain a pseudo-up-sampling sequenceThe functional expression of (2) is:
in the above-mentioned method, the step of,is->The number of signals, m, is the sequence number of the signal,Lis the number of 0 elements inserted.
The step S202 of the present embodiment further comprises upsampling the sequence according to the following formulaProceeding withKExtracting the multiple:
in the above-mentioned method, the step of,is thatKSignal obtained after the multiplication, < > and->For upsampling sequence +.>The first of (3)Up-sampling signal, K is the multiple parameter of the decimated signal,>is an integer parameter.
In order to verify the interpolation filter bank synchronous sampling method based on the Dipsilon map approximation in the embodiment, a set of synchronous measurement equipment is developed in the embodiment to verify the practicability and the effectiveness of the method. The synchronous measurement device comprises a conditioning circuit, a data acquisition and data processing module and a time sequence reference pulse, wherein the conditioning circuit, the data acquisition and the data processing module are sequentially connected, and the time sequence reference pulse input interface is connected with the data processing module. The conditioning circuit consists of a transformer (TV 1013-1 and TA 1015-2) and a band-pass filter, and is used for converting the amplitude of the power grid signal into a proper range (+ -5V) suitable for the input of an analog-to-digital conversion module ADC and filtering out-of-band interference (less than or equal to 10 Hz and more than or equal to 100 Hz); the data acquisition is used for data acquisition, and the AD7608 with 18-bit resolution is selected. The data processing module adopts a TMS320C6748 DSP chip with a clock frequency of 228 MHz and a STM32H743 chip, and the TMS320C6748 DSP chip is used for controlling the ADC to collect sampling data and executing the interpolation filter bank synchronous sampling method based on the Dipsilon map approximation in the embodiment every second and other comparison methods. To relieve the TMS320C6748 DSP chip of the burden, the STM32H743 chip is used to handle data communications, time stamping, exception handling, and other tasks. In addition, an arbitrary function generator AFG1022 is employed for generating a sine wave of 50 Hz. The arbitrary function generator AFG1062 is configured to operate in burst mode with infinite burst count, with the trigger source set to a constant temperature oscillator specified by an external timing reference pulse. This ensures that the waveform output of the arbitrary function generator AFG1022 is synchronized with the timing reference pulse and is highly accurate and stable. The power signal source ATG2081 is used to amplify the output of the arbitrary function generator AFG1022 to 100 Vpp. The phase angle and frequency of the amplified signal are measured by a synchronous measuring device and the result is uploaded to a database established by Influxdb. Visualization tools Grafana are utilized to query Influxdb and present data charts on web pages. In the test process, the working frequency of the system is continuously modified, and the frequency drift phenomenon of the crystal oscillator is simulated. Similar to the simulation experiment, all frequency and phase angle results were calculated using a real discrete fourier transform RDFT. Finally, measureAs shown in fig. 4 and 5, referring to fig. 4 and 5, the offset operating frequency of the system is in the range 1314 Hz to 1807 Hz. Under this condition, the interpolation filter bank synchronous sampling method based on the Dipsilon graph approximation keeps the frequency error within 1 mHz, and shows excellent performance. The phase angle measurement result shows that the interpolation filter bank synchronous sampling method based on the Dipsilon graph approximation can keep the measurement error within +/-0.3 multiplied by 10 -4 Within rad, the average and maximum errors are smaller than the existing "Real Time B spline interpolation" (Real Time B-Spline Interpolation, RT-BSI) (see Peter M. Synchronizing IEC 61850-9-2 with legacy Real-Time embedded systems [ D)]Wien, 2021. And Unser M, aldroubi A, eden M, fast B-spline transforms for continuous image representation and interpolation [ J ]]IEEE Transactions on pattern analysis and machine intelligence, 1991, 13 (3): 277-285.) and "variable sample interval method of crystal frequency monitoring" (Variable Sampling Interval Control with Operating Frequency Monitoring, VSI-OFM) (see Yao W, zhan L, liu Y, et al A novel method for phasor measurement unit sampling time error compensation [ J ]]IEEE Transactions on Smart Grid, 2016, 9 (2): 1063-1072.). In addition, graphs of crystal oscillator frequency fluctuations are provided in fig. 4 and 5 as references to the methods of the present embodiment and the prior art.
In addition, the embodiment also provides an interpolation filter set synchronous sampling system based on the lost figure approximation, which comprises a microprocessor and a memory which are connected with each other, wherein the microprocessor is programmed or configured to execute the interpolation filter set synchronous sampling method based on the lost figure approximation. The present embodiment also provides a computer readable storage medium having stored therein a computer program for programming or configuring by a microprocessor to perform the interpolation filter bank synchronous sampling method based on the loss map approximation.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein. The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the present invention may occur to one skilled in the art without departing from the principles of the present invention and are intended to be within the scope of the present invention.

Claims (6)

1. An interpolation filter bank synchronous sampling method based on a lost-guaranty image approximation is characterized by comprising the following steps:
estimating an actual sampling interval by a counter triggered by a time sequence reference pulse;
determining a downsampling multiple L and an upsampling multiple K of the interpolation filter set through a lost-image approximation by combining an actual sampling interval;
designing coefficients of an interpolation filter bank by combining the downsampling multiple L and the upsampling multiple K;
sampling an original power grid synchronous signal by using an interpolation filter bank;
the downsampling multiple of the interpolation filter bank is determined through the Dipsing graph approximationLAnd up-sampling multipleKComprising the following steps:
s101, ideal sampling intervalT i Actual sampling intervalT a Ratio of (2)T i /T a Expanded into the form of a continuous score represented by the formula:
in the above-mentioned method, the step of,D 0 andD n intermediate variables for the initial and nth iterations respectively,L n is the downsampling multiple of the interpolation filter of the nth iteration,K n up-sampling multiples of the interpolation filter bank for the nth iteration, wherein:
in the above-mentioned method, the step of,representing rounding the input number;
s102, according to the ratio of the form of the continuous scoreT i /T a Determining downsampling multiple of interpolation filter bankLAnd up-sampling multipleKIs a recursive formula of (a):
in the above-mentioned method, the step of,L n is the downsampling multiple of the interpolation filter of the nth iteration,K n up-sampling multiple of interpolation filter bank for nth iteration;L n-1 is the downsampling multiple of the interpolation filter of the n-1 th iteration,K n-1 upsampling multiples of the interpolation filter bank for the n-1 th iteration;L n-2 is the downsampling multiple of the interpolation filter for the n-2 th iteration,K n-2 upsampling multiples of the interpolation filter bank for the n-2 th iteration;
s103, aiming at downsampling multipleLAnd up-sampling multipleKFrom initial intermediate variablesD 0 Starting recursion until a preset stopping condition is met, and finally obtaining an up-sampling multiple of an interpolation filter bank of the nth iterationK n Final up-sampling multiple as interpolation filterKThe method comprises the steps of carrying out a first treatment on the surface of the The function expression of the preset stopping condition is as follows:
in the above-mentioned method, the step of,for a given error threshold, and the resulting downsampled multiple of the interpolation filter for the nth iterationL n Final downsampling multiple as interpolation filterLUpsampling multiple of interpolation filter set of nth iterationK n Final up-sampling multiple as interpolation filterK
The combined downsamplingMultiple timesLAnd up-sampling multipleKDesigning coefficients of an interpolation filter bank includes combining downsampling multiplesLAnd up-sampling multipleKDesign of cut-off frequency of interpolation filter bank
In the above-mentioned method, the step of,for the circumference ratio, max represents the maximum value;
the combined downsampling multipleLAnd up-sampling multipleKAfter the coefficient of the interpolation filter bank is designed, the function expression of the obtained interpolation filter bank is as follows:
in the above-mentioned method, the step of,functional expression representing interpolation filter bank, < ->Is->Order filter->Order of filter for cutting infinite order, +.>Is of circumference rate>Order filter->The functional expression of (2) is:
in the above-mentioned method, the step of,in the frequency domain form of an interpolation filter +.>Is a natural constant, j is an imaginary unit, < ->For frequency +.>Hanning window (Hanning)>For the cut-off frequency of the interpolation filter bank, +.>Is the group delay of the interpolation filter bank, and +.>So that the interpolation filter bank is a linear phase filter.
2. The interpolation filter bank synchronous sampling method based on the missing figure approximation according to claim 1, wherein the functional expression of the counter estimation actual sampling interval triggered by the time sequence reference pulse is:
in the above-mentioned method, the step of,T a representing the actual sampling interval of the sample,Dthe frequency division multiple of the frequency divider employed to generate the sampling clock signal for synchronizing the measurement device to the system clock signal,Vas a result of the threshold value being set,Cthe number of counter overflows triggered for the timing reference pulse,H 1 andH 2 the initial value and the remaining value of the counter respectively,for counting duration.
3. The method for synchronous sampling of interpolation filter bank based on the missing figure approximation according to claim 1, wherein the sampling of the original grid synchronous signal by the interpolation filter bank comprises:
s201, zero padding the original power grid synchronous signal containing sampling time errors according to the following formula to obtain a pseudo up-sampling sequence
In the above-mentioned method, the step of,is->The number of signals, m, is the sequence number of the signal,Lnumber 0 elements inserted;
s202, pseudo up-sampling sequenceConvolving with an interpolation filter bank to obtain an up-sampling sequence +.>
4. The method of claim 3, further comprising the step of upsampling the sequence according to the following formula after step S202Proceeding withKExtracting the multiple:
in the above-mentioned method, the step of,is thatKSignal obtained after the multiplication, < > and->For upsampling sequence +.>The%>Up-sampling signal, K is the multiple parameter of the decimated signal,>is an integer parameter.
5. An interpolation filter bank synchronous sampling system based on a lost motion map approximation, comprising a microprocessor and a memory connected to each other, wherein the microprocessor is programmed or configured to perform the interpolation filter bank synchronous sampling method based on a lost motion map approximation as set forth in any one of claims 1 to 4.
6. A computer readable storage medium having a computer program stored therein, wherein the computer program is for programming or configuring by a microprocessor to perform the interpolation filter bank synchronous sampling method based on the cartographic approximation of any one of claims 1 to 4.
CN202311579617.9A 2023-11-24 2023-11-24 Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation Active CN117294311B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311579617.9A CN117294311B (en) 2023-11-24 2023-11-24 Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311579617.9A CN117294311B (en) 2023-11-24 2023-11-24 Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation

Publications (2)

Publication Number Publication Date
CN117294311A CN117294311A (en) 2023-12-26
CN117294311B true CN117294311B (en) 2024-02-02

Family

ID=89241141

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311579617.9A Active CN117294311B (en) 2023-11-24 2023-11-24 Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation

Country Status (1)

Country Link
CN (1) CN117294311B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1089507A2 (en) * 1999-09-28 2001-04-04 Siemens Information and Communication Networks S.p.A. Method for the calculation of the coefficients of a polyphase FIR filter
US6766338B1 (en) * 1999-12-22 2004-07-20 Texas Instruments Incorporated High order lagrange sample rate conversion using tables for improved efficiency
GB201609509D0 (en) * 2016-05-31 2016-07-13 Octo Telematics Spa Signal processing
CN107819544A (en) * 2016-09-13 2018-03-20 张贻和 A kind of method for reducing channel bit error rate
CN114124034A (en) * 2021-11-17 2022-03-01 成都理工大学 High-speed parallel interpolation filter design based on FPGA

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8520971B2 (en) * 2010-09-30 2013-08-27 Apple Inc. Digital image resampling

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1089507A2 (en) * 1999-09-28 2001-04-04 Siemens Information and Communication Networks S.p.A. Method for the calculation of the coefficients of a polyphase FIR filter
US6766338B1 (en) * 1999-12-22 2004-07-20 Texas Instruments Incorporated High order lagrange sample rate conversion using tables for improved efficiency
GB201609509D0 (en) * 2016-05-31 2016-07-13 Octo Telematics Spa Signal processing
CN107819544A (en) * 2016-09-13 2018-03-20 张贻和 A kind of method for reducing channel bit error rate
CN114124034A (en) * 2021-11-17 2022-03-01 成都理工大学 High-speed parallel interpolation filter design based on FPGA

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Research on QAR Outliers Processing Based on Kalman Filtering and Newton Interpolation Algorithms;Lixin Wang;《2020 IEEE 2nd International Conference on Civil Aviation Safety and Information Technology 》;1-4 *
WiMAX系统中CIC滤波器的补偿设计;冯春燕;《广东通信技术》;62-65 *

Also Published As

Publication number Publication date
CN117294311A (en) 2023-12-26

Similar Documents

Publication Publication Date Title
Romano et al. Enhanced interpolated-DFT for synchrophasor estimation in FPGAs: Theory, implementation, and validation of a PMU prototype
CN105224811B (en) PMU dynamic data processing method based on feedback iterative frequency tracking
CN102236048B (en) Method for measuring phasor frequency of electric system
CN113064021B (en) Measurement and control device and method for realizing power electronic power grid higher harmonic suppression
CN105102992A (en) Methods and devices for determining root mean square of a delta-sigma modulated signal
CN106645919A (en) Power grid full spectrum power oscillation phasor synchronization measurement method based on three-phase instantaneous power
Borkowski et al. Improvement of accuracy of power system spectral analysis by coherent resampling
EP3466004B1 (en) Method and apparatus for sampling rate conversion of a stream of samples
CN117294311B (en) Interpolation filter bank synchronous sampling method and system based on Dipsilon map approximation
CN103969508A (en) Real-time high-precision power harmonic analysis method and device
Roscoe et al. Frequency and fundamental signal measurement algorithms for distributed control and protection applications
CN104111373A (en) Metering method used for digital electric energy of intelligent substation
CN103543331A (en) Method for calculating harmonics and inter-harmonics of electric signal
CN113377009B (en) Adaptive synchronous sampling control method and system based on pulsar signals
AbdelRaheem et al. A lightweight sampling time error correction technique for micro phasor measurement units
Serov et al. Method to reduce the measurement error of the spectrum by the demodulation technique
CN116930610A (en) PCAL signal phase amplitude estimation method based on coherent accumulation
WO2017143425A1 (en) Methods and devices for time synchronized power measurement
CN105205319A (en) Improved amplitude-undamped linear interpolation method for synchronization of sampled data
CN113672863A (en) Simplified phasor calculation method and system for generator startup protection
Kušljević Adaptive resonator-based method for power system harmonic analysis
US20230400488A1 (en) Pmu algorithm
US10530339B2 (en) Fixed latency configurable tap digital filter
CN116145146A (en) Clock synchronous measurement method, device, equipment and storage medium of negative-protection potentiometer
Kaufmann et al. Fast power system frequency estimation by shape class approximation for synthetic inertia provision by battery energy storage systems

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant