CN117290258A - Storage space processing method, device, equipment and storage medium - Google Patents

Storage space processing method, device, equipment and storage medium Download PDF

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Publication number
CN117290258A
CN117290258A CN202311160356.7A CN202311160356A CN117290258A CN 117290258 A CN117290258 A CN 117290258A CN 202311160356 A CN202311160356 A CN 202311160356A CN 117290258 A CN117290258 A CN 117290258A
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China
Prior art keywords
block
memory block
data
memory
extended
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CN202311160356.7A
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Chinese (zh)
Inventor
张睿轩
秦民
韩涛
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China Automotive Innovation Co Ltd
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China Automotive Innovation Co Ltd
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Priority to CN202311160356.7A priority Critical patent/CN117290258A/en
Publication of CN117290258A publication Critical patent/CN117290258A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615Address space extension
    • G06F12/0623Address space extension for memory modules
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention discloses a storage space processing method, a device, equipment and a storage medium, wherein the method comprises the following steps: responding to an allocation request for a target memory block; determining a target memory block from the free storage space of the memory based on the block length and the block starting address corresponding to the target memory block; performing block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block; the extended memory block is connected with the address of the target memory block, and the block length of the extended memory block is consistent with the block length of the target memory block; and determining a storage space allocation result corresponding to the allocation request based on the target memory block and the extended memory block. The invention obtains a plurality of corresponding extended memory blocks by performing block extension on the target memory block, and performs operations such as reading and writing on the plurality of memory blocks, thereby increasing the space utilization rate of the memory, balancing the load and further prolonging the service life of the memory.

Description

Storage space processing method, device, equipment and storage medium
Technical Field
The invention relates to the technical field of computers, in particular to a storage space processing method, a storage space processing device, storage space processing equipment and a storage medium.
Background
In the Autosar architecture (Automotive Open System Architecture, automobile open system architecture), the software standard layer has a memory-related protocol stack-memory protocol stack, including NvM modules (NVRAM Manager, nonvolatile random access memory management module), EA modules (EEPROM Abstraction, live erasable programmable read only memory abstraction module), and other modules.
For writing nonvolatile data to EEPROM, the prior art requires that the EA module abstract the addressing scheme in EEPROM into blocks that can be mapped to NvM modules for management by the NvM modules. The block configuration in the EA module corresponds to the block configuration of the NvM module one by one, and when the NvM module is configured with fewer blocks, the EA module only utilizes a small part of the total capacity of the EEPROM, so that the EEPROM is unbalanced in load and the service life is wasted.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, the technical problem to be solved by the present invention is how to improve the space utilization of EEPROM.
In order to solve at least one technical problem set forth above, the invention discloses a storage space processing method, a storage space processing device, storage space processing equipment and a storage medium.
According to an aspect of the present disclosure, there is provided a storage space processing method, including:
responding to an allocation request for a target memory block; the allocation request comprises a block length corresponding to the target memory block and a block starting address;
determining the target memory block from the free storage space of the memory based on the block length and the block starting address corresponding to the target memory block;
performing block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block; the extended memory block is connected with the address of the target memory block, and the block length of the extended memory block is consistent with the block length of the target memory block;
and determining a storage space allocation result corresponding to the allocation request based on the target memory block and the extended memory block.
In some possible embodiments, the performing block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block includes:
Determining a block start address of the extended memory block based on a block length corresponding to the target memory block and the block start address of the target memory block when the number of the extended memory blocks is one;
and obtaining the extended memory block corresponding to the target memory block based on the block starting address of the extended memory block and the block length corresponding to the extended memory block.
In some possible embodiments, the performing block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block includes:
determining that the block ending address of the extended memory block is added with 1 as the block starting address of the next extended memory block under the condition that the number of the extended memory blocks is a plurality of;
obtaining the next extended memory block based on the block start address of the next extended memory block and the block length of the extended memory block;
repeating the steps: determining a block termination address of the extended memory block to obtain the next extended memory block;
and obtaining a plurality of extended memory blocks corresponding to the target memory block under the condition that the next extended memory block is the last extended memory block corresponding to the target memory block.
In some possible embodiments, each memory block includes block management data therein; the block management data comprises a flag value and a count value; the flag value is used for representing state information of the memory block; the count value is used for representing the number of times the memory block is written with data;
the method further comprises the steps of:
determining state information of the memory block based on the flag value; the status information includes block valid and block invalid;
and under the condition that the state information of the memory block is effective, carrying out data updating on the count value to obtain an updated count value.
In some possible embodiments, the block management data includes header management data and trailer management data; the header management data and the trailer management data each include the standard value and the count value;
the method comprises the following steps:
acquiring the head management data and the tail management data;
and under the condition that the head management data is equal to the tail management data, confirming that the memory block is already written with data after the allocation is completed.
In some possible embodiments, after the determining the storage space allocation result corresponding to the allocation request, the method includes:
Responding to the data operation request;
determining a memory block to be operated from the target memory block and the extended memory block corresponding to the target memory block based on the data operation request; the memory block to be operated is the memory block of the last time of writing data;
and executing the data operation request based on the memory block to be operated.
In some possible embodiments, the determining, based on the data operation request, a memory block to be operated from the target memory block and the extended memory block corresponding to the target memory block includes:
acquiring a counting value set; the count value set comprises count values of the target memory blocks and count values of the extended memory blocks corresponding to the target memory blocks;
determining a maximum count value from the set of count values;
and under the condition that the number of the maximum count values is one, determining the memory block corresponding to the maximum count value as the memory block to be operated.
In some possible embodiments, the method further comprises:
acquiring a plurality of block starting addresses under the condition that the number of the maximum count values is a plurality of; the block start addresses comprise block start addresses of memory blocks corresponding to each maximum count value;
Determining the last block starting address in the block starting addresses as the block starting address of the memory block to be operated;
and determining the memory block to be operated based on the block starting address of the memory block to be operated.
In some possible embodiments, the data operation request includes a data write request and a data read request;
the executing the data operation request based on the memory block to be operated includes:
reading data from the memory block to be operated under the condition that the data operation request is the data reading request;
determining an extended memory block corresponding to a next block address connected with the block address of the memory block to be operated as a memory block to be written in under the condition that the data operation request is the data writing request;
and writing data into the memory block to be written.
According to a second aspect of the present disclosure, there is provided a storage space processing apparatus, the apparatus comprising:
the request response module is used for responding to the allocation request aiming at the target memory block; the allocation request comprises a block length corresponding to the target memory block and a block starting address;
The block determining module is used for determining the target memory block from the idle storage space of the memory based on the block length and the block starting address corresponding to the target memory block;
the block expansion module is used for carrying out block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block; the extended memory block is connected with the address of the target memory block, and the block length of the extended memory block is consistent with that of the target memory block;
and the result determining module is used for determining a storage space allocation result corresponding to the allocation request based on the target memory block and the extended memory block.
According to a third aspect of the present disclosure, there is provided an electronic device comprising a processor and a memory having stored therein at least one instruction and at least one program, the at least one instruction and the at least one program being loaded and executed by the processor to implement a memory space processing method as described above.
According to a fourth aspect of the present disclosure, there is provided a computer storage medium having stored therein at least one instruction and at least one program, the at least one instruction and the at least one program being loaded and executed by a processor to implement a storage space processing method as described above.
The implementation of the invention has the following beneficial effects:
in the invention, after receiving the allocation request of the target memory block, the target memory block is determined from the idle storage space of the memory according to the block starting address and the block length of the target memory block, so that the accuracy and the efficiency of determining the target memory block can be improved; performing block expansion processing on the target memory block to obtain at least one expanded memory block corresponding to the target memory block, wherein the memory blocks in the memory are changed from one to a plurality of original memory blocks, so that the memory space of the memory can be effectively utilized, and the space utilization rate of the memory is improved; in addition, as the memory space of the memory is enlarged, the load of the memory can be balanced, thereby prolonging the service life of the memory.
Drawings
In order to more clearly illustrate the technical solutions of the present invention, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow diagram corresponding to a storage space processing method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating an internal structure corresponding to a block expansion process according to an embodiment of the present invention;
fig. 3 is a flow chart corresponding to a block expansion method according to an embodiment of the present invention;
fig. 4 is a flow chart corresponding to another block expansion method according to an embodiment of the present invention;
FIG. 5 is a flow chart of a corresponding count value determination according to an embodiment of the present invention;
FIG. 6 is a flow chart corresponding to a response data operation request according to an embodiment of the present invention;
fig. 7 is a flow chart corresponding to a block determining method according to an embodiment of the present invention;
fig. 8 is a flow chart corresponding to another block determining method according to an embodiment of the present invention;
FIG. 9 is a flow chart corresponding to a data writing mode according to an embodiment of the present invention;
fig. 10 is a flowchart illustrating a block determination process according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a storage space processing device according to an embodiment of the present invention.
Detailed Description
The technical solutions of the embodiments of the present specification will be clearly and completely described below with reference to the drawings in the embodiments of the present specification, and it is apparent that the described embodiments are only some embodiments of the present specification, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are intended to be within the scope of the present invention based on the embodiments herein.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or server that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or apparatus, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
The term "and/or" is herein merely an association relationship describing an associated object, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the term "at least one" herein means any one of a plurality or any combination of at least two of a plurality, for example, including at least one of A, B, C, and may mean including any one or more elements selected from the group consisting of A, B and C.
Furthermore, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
Fig. 1 shows a flow diagram corresponding to a storage space processing method according to an embodiment of the present invention; the execution body may include a body control unit based on an Autosar architecture, such as an ECU (Electronic Control Unit, electronic controller unit), MCU (micro controller Unit), etc., and the storage space processing method may be applied to a memory protocol stack in the automobile electronic Autosar architecture; referring to fig. 1, a storage space processing method includes:
Step S101: responding to an allocation request for a target memory block; the allocation request comprises a block length corresponding to the target memory block and a block starting address;
in one possible embodiment, there are memory spaces in the memory with different address segments, and for allocation of memory blocks, it is necessary to determine the block length of the memory block and the block start address according to the allocation request. Specifically, the target memory block includes a management data space and a data operation space, so that the block length can be divided into two parts, namely, a management space occupation length and an operation space occupation length, the management data space is used for storing management data, and the occupation length is fixed to be 2 bytes.
Step S102: determining the target memory block from the free storage space of the memory based on the block length and the block starting address corresponding to the target memory block;
in one particular embodiment, the allocation request includes a block length and a block start address, and the block end address may be determined based on the block length and the block start address; the target memory block may be determined from the memory based on the block start address, the block length, and the block end address.
Step S103: performing block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block; the extended memory block is connected with the address of the target memory block, and the block length of the extended memory block is consistent with the block length of the target memory block;
in a specific embodiment, according to a block start address and a block length of a target memory block, performing block expansion processing on the target memory block, thereby obtaining an expanded memory block corresponding to the target memory block, wherein the expanded memory block comprises a management data space and a data operation space; the number of the expansion memory blocks can be one or a plurality of, and in the block expansion processing, the target memory blocks are expanded according to the preset expansion number, wherein the preset expansion number can be set according to actual requirements; the block memory address of the extended memory block is connected with the block memory address of the target memory block, and the block length of the extended memory block is the same as the block length of the target memory block.
Step S104: and determining a storage space allocation result corresponding to the allocation request based on the target memory block and the extended memory block.
In a specific embodiment, the target memory block and the extended memory block are memory blocks corresponding to memory spaces allocated from the memory based on the allocation request; the target memory block and the extended memory block are used for writing data and reading data.
The memory blocks are allocated in groups based on allocation requests, wherein a group of memory blocks comprises a target memory block and at least one extended memory block, and memory addresses of a plurality of memory blocks included in each group of memory blocks are connected; the memory addresses between each group of memory blocks may or may not be contiguous, and are specifically determined based on the starting address of the target memory block in each allocation request.
Fig. 2 is a schematic diagram illustrating an internal structure corresponding to a block expansion process according to an embodiment of the present invention; in a specific embodiment, as shown in fig. 2, the block start address of the target memory block is determined to be AD, where AD may be 0x000000, the operation space occupation length of the block is L bytes, where L may be 20 bytes, the target memory block is expanded into n expanded memory blocks, and n+1 memory blocks are allocated in the memory; the block start address of the target memory block is 0x000000, the block memory addresses 0x000001-0x000014 are 20 bytes of data operation space, the block end address is 0x000015, wherein the block start address and the block end address are used for storing block management data, the block memory addresses 0x000001-0x000014 are used for storing block operation data, and the block operation data comprise data written into the block based on the data operation request; determining the block termination address +1 of the target memory block as the block start address of the extended memory block 1, namely, the block start address corresponding to the extended memory block 1 is 0x000016, the data operation space of the extended memory block 1 is 20 bytes of 0x000017-0x00002a, and the block termination address of the extended memory block 1 is 0x00002b; the next address (0 x00002 c) of the block ending address of the extended memory block 1 is the block starting address of the next extended memory block (i.e. extended memory block 2), and so on, the starting address of the nth extended memory block is: 0x000000+n (20+2); for any extended block corresponding to a memory block, the block starting address is: block start address of memory block +n (operation space occupation length of memory block +2).
In the embodiment of the invention, after receiving the allocation request of the target memory block, the target memory block is determined from the idle memory space of the memory according to the block starting address and the block length of the target memory block, so that the accuracy and the efficiency of determining the target memory block can be improved; performing block expansion processing on the target memory block to obtain at least one expanded memory block corresponding to the target memory block, wherein the memory blocks in the memory are changed from one to a plurality of original memory blocks, so that the memory space of the memory can be effectively utilized, and the space utilization rate of the memory is improved; in addition, as the memory space of the memory is enlarged, the load of the memory can be balanced, thereby prolonging the service life of the memory.
Fig. 3 is a flow chart corresponding to a block expansion method according to an embodiment of the present invention; as shown in the figure 3 of the drawings,
step S301: determining a block start address of the extended memory block based on a block length corresponding to the target memory block and the block start address of the target memory block when the number of the extended memory blocks is one;
in a specific embodiment, since the preset expansion number in the block expansion process can be set according to the actual requirement, the number of the expanded memory blocks can be one or more. Under the condition that the number of the extended memory blocks is one, firstly determining a block termination address of the target memory block according to the block length corresponding to the target memory block and the block start address; since the extended memory block is connected to the address of the target memory block, the next address of the block termination address of the target memory block (i.e., block termination address+1 of the target memory block) is the block start address of the extended memory block.
Step S302: and obtaining the extended memory block corresponding to the target memory block based on the block starting address of the extended memory block and the block length corresponding to the extended memory block.
In one embodiment, since the block length of the extended memory block is consistent with the block length of the target memory block, the block length of the extended memory block may be determined according to the block length of the target memory block; further, according to the block starting address and the block length of the extended memory block, a corresponding memory space is selected from the memory, allocated to the extended memory block, and block allocation is completed, so that a target memory block and a corresponding extended memory block are obtained.
In the embodiment of the invention, the target memory blocks are subjected to block expansion processing to obtain the expanded memory blocks corresponding to the target memory blocks, and the target memory blocks in the memory are changed from one to a plurality of original memory blocks, so that the memory space of the memory can be effectively utilized, and the space utilization rate of the memory is improved; the preset expansion quantity is set according to actual requirements, and the storage space processing method can be applied to different scenes, so that the applicability of the storage space processing method is improved.
Fig. 4 is a schematic flow diagram corresponding to another block expansion method according to an embodiment of the present invention; as shown in figure 4 of the drawings,
step S401: determining that the block ending address of the extended memory block is added with 1 as the block starting address of the next extended memory block under the condition that the number of the extended memory blocks is a plurality of;
in a specific embodiment, when the number of the extended memory blocks is plural, the target memory block is adjacent to the first extended memory block, and after determining the first extended memory block according to step S301 and step S302, the block start address corresponding to each remaining extended memory block is sequentially determined, so as to determine the corresponding extended memory block based on the block start address. Specifically, since the block address of each memory block is connected in one memory allocation process, the block termination address +1 of the first extended memory block is the block start address of the next extended memory block.
Step S402: obtaining the next extended memory block based on the block start address of the next extended memory block and the block length of the extended memory block;
in one embodiment, since the block length of the extended memory block is consistent with the block length of the target memory block, the block length of the extended memory block may be determined according to the block length of the target memory block; further, the block length of each extended memory block is consistent, so that the memory space is selected from the memory according to the block start address and the block length of the second extended memory block, and is allocated to the extended memory block, wherein the block length may be the block length of the target memory block or the block length of any extended memory block corresponding to the target memory block.
Step S403: judging whether the next extended memory block is the last extended memory block corresponding to the target memory block;
in one embodiment, whether the extended memory block is the last extended memory block may be determined according to a predetermined number of extensions.
Step S404: if yes, obtaining a plurality of extended memory blocks corresponding to the target memory block;
if not, repeating steps S401-S402.
In a specific embodiment, if the memory allocation request is the last extended memory block, determining that the memory space allocation based on the current allocation request is completed, and obtaining a target memory block and a plurality of corresponding extended memory blocks; if not, go to step S401-S402 to allocate new extended memory block.
In the embodiment of the invention, the target memory blocks are subjected to block expansion processing to obtain the expanded memory blocks corresponding to the target memory blocks, and the target memory blocks in the memory are changed from one to a plurality of original memory blocks, so that the memory space of the memory can be effectively utilized, and the space utilization rate of the memory is improved; by judging whether the extended memory block is the last extended memory block or not and circularly realizing the allocation of the extended memory block, the occurrence of the loss in the memory space allocation process can be avoided, thereby improving the accuracy of the memory block allocation.
Each memory block comprises block management data; the block management data comprises a flag value and a count value; the flag value is used for representing state information of the memory block; the count value is used to characterize the number of times the memory block is written with data.
Fig. 5 is a schematic flow chart of count value determination according to an embodiment of the present invention; as shown in fig. 5, the method further includes:
step S501: determining state information of the memory block based on the flag value; the status information includes block valid and block invalid;
in one embodiment, the block management data includes header management data and trailer management data, the header management data is one byte in length and stored at the block start address, and the trailer management data is one byte in length and stored at the block end address; wherein the header management data includes an x-bit flag value and a y-bit count value, and the trailer management data includes an x-bit flag value and a y-bit count value, wherein the sum of x and y is 8 (i.e., 8 bits, one byte), e.g., in one embodiment, x and y may both be 4; the memory block is written with head management data equal to tail management data, and the memory block comprises a target memory block and an extended memory block corresponding to the target memory block.
The state information of the memory block is effective, and the corresponding flag value in the head management data and the corresponding flag value in the tail management data are both 0; the state information of the memory block is block invalid, and the corresponding flag value in the head management data and the corresponding flag value in the tail management data are both F.
Step S502: and under the condition that the state information of the memory block is effective, carrying out data updating on the count value to obtain an updated count value.
In one embodiment, the state information of the memory block is block valid, indicating that the memory block is written with data; when the data is written, the counting value needs to be updated, the minimum value of the counting value is 0, and the maximum value of the counting value is F. Specifically, after the block allocation is completed, the count value is 0, when the memory block is written with data for the first time, the current count value=count value+1, i.e., 1, and when the memory block is written with data for the second time, the current count value is=current count value+1, i.e., 2. That is, for the count value, each time the memory block is written with data, the count value in the corresponding header management data and the count value in the trailer management data are increased by 1.
Further, the block effectively determines that the memory block is written with data, and for the number of times the memory block is written with data, data writing detection is required, and when the data writing detection result indicates that the memory block is written with data, the count value is updated, and the count value is required to be updated every time the memory block is written with data.
In the embodiment of the invention, the head management data and the tail management data which comprise the mark value and the count value are set, and the state information of the memory block can be judged according to the mark value, so that the convenience and intuitiveness of judging the state information of the memory block are improved; the writing times are determined according to the counting values, so that the convenience of counting the writing times of the memory block can be improved.
Further, the block management data includes header management data and trailer management data; the header management data and the trailer management data each include the standard value and the count value;
the method comprises the following steps:
acquiring the head management data and the tail management data;
in a specific embodiment, the memory space corresponding to the first memory address of each memory block is used for storing head management data, the memory space corresponding to the last memory address is used for storing tail management data, and the head management data and the tail management data both comprise a flag value and a count value.
Specifically, the memory may be an EEPROM, which typically uses a fixed memory area to store specific data; in EEPROM, stored data is arranged in succession according to addresses, and the data stored in EEPROM is modified, and also the data of a section of continuous addresses is modified. In order to confirm whether the data stored in the memory block is valid, the head management data and the tail management data of the data can be read.
And under the condition that the head management data is equal to the tail management data, confirming that the memory block is already written with data after the allocation is completed.
In a specific embodiment, in order to determine the validity of data corresponding to a piece of data stored in a memory block, it is necessary to confirm whether the piece of data is consistent with data when writing, if so, the data is valid, and if not, the data is invalid. And reading the head management data and the tail management data of the data section, judging whether the head management data and the tail management data are equal, and confirming whether the head management data and the tail management data of the data section are valid or not. In the case that the head management data and the tail management data are consistent, the head management data and the tail management data are indicated to be valid, namely, the head management data and the tail management data are not modified; correspondingly, since the data stored in the EEPROM is modified, and the data of a section of continuous addresses is also modified, in the case that the head management data and the tail management data are not modified, it can be determined whether the section of data is not modified, that is, whether the section of data is consistent with the data in writing, and the data is valid.
In the embodiment of the invention, the head management data and the tail management data are arranged at two ends of the memory block, the block operation data is arranged in the middle of the block management data, and the data validity of the block operation data is further determined by judging whether the head management data and the tail management data are consistent or not, so that the data validity management of the data stored in the memory block can be realized, and the convenience of the data management is improved.
Fig. 6 is a schematic flow chart corresponding to a response data operation request according to an embodiment of the present invention; as shown in figure 6 of the drawings,
step S601: responding to the data operation request;
in one embodiment, after the memory space allocation is completed, a data operation is performed on the memory block according to the data operation request.
Step S602: determining a memory block to be operated from the target memory block and the extended memory block corresponding to the target memory block based on the data operation request; the memory block to be operated is the memory block of the last time of writing data;
in a specific embodiment, since writing data into the memory blocks is performed in turn based on the block addresses, the data operation request needs to be performed on the memory blocks storing the latest data, i.e. the last written data, and thus the memory blocks to be operated, i.e. the memory blocks to be operated, of the last written data need to be determined from the target memory blocks and the extended memory blocks corresponding to the target memory blocks in response to the data operation request.
Step S603: and executing the data operation request based on the memory block to be operated.
In one embodiment, the data operation request includes a data read request and a data write request, and the data operation request is performed based on the memory block to be operated.
In the embodiment of the invention, the data are written into each memory block in turn, and the data can be written into or read from each memory block, so that the load of the internal space of the memory can be balanced, and the service life of the memory is prolonged.
Fig. 7 is a schematic flow diagram corresponding to a block determining method according to an embodiment of the present invention; as shown in figure 7 of the drawings,
step S701: acquiring a counting value set; the count value set comprises count values of the target memory blocks and count values of the extended memory blocks corresponding to the target memory blocks;
in one embodiment, since the memory block to be operated is the memory block to which data is written last time, and the count value needs to be updated every time data is written to the memory block, the memory block to be operated can be determined by the count value.
Step S702: determining a maximum count value from the set of count values;
In a specific embodiment, writing data into the memory blocks is sequentially and alternately written based on block addresses, and the count value needs to be updated every time the data is written into the memory blocks, so that the memory blocks with larger count values can be determined, and the number of times of writing the data is increased; it is therefore necessary to determine the maximum count value from the set of count values.
Step S703: and under the condition that the number of the maximum count values is one, determining the memory block corresponding to the maximum count value as the memory block to be operated.
In a specific embodiment, when the number of the maximum count values is one, it may be determined that the memory block corresponding to the maximum count data is the memory block of the last write data, i.e. the memory block to be operated.
In the embodiment of the invention, the memory block to be operated is determined according to the count value, so that the convenience and the efficiency of determining the memory block to be operated can be improved, and the efficiency of writing and reading data is further improved.
Fig. 8 is a flow chart corresponding to another block determining method according to an embodiment of the present invention; as shown in figure 8 of the drawings,
step S801: acquiring a plurality of block starting addresses under the condition that the number of the maximum count values is a plurality of; the block start addresses comprise block start addresses of memory blocks corresponding to each maximum count value;
In a specific embodiment, the number of the maximum count values may be multiple, where the multiple maximum count values correspond to two different situations, and one of the maximum count values is that the target memory block and the extended memory block corresponding to the target memory block are written in turn for multiple times respectively; since the writing of data into the memory blocks is sequentially performed in turn based on the block addresses, it is necessary to obtain a plurality of block start addresses with the largest count values, and determine the memory blocks to be operated according to the block start addresses.
Step S802: determining the last block starting address in the block starting addresses as the block starting address of the memory block to be operated;
in a specific embodiment, after a plurality of block start addresses are obtained, since writing data into the memory blocks is sequentially written in turn based on the block addresses, the last block start address can be confirmed as the memory address of the last data writing, i.e. the block start address of the memory block to be operated.
Step S803: and determining the memory block to be operated based on the block starting address of the memory block to be operated.
In a specific embodiment, the corresponding block to be operated is determined according to the block start address of the memory block to be operated.
In another specific embodiment, the other case corresponding to the plurality of maximum count values is that after the memory blocks are allocated, no operation is performed, that is, no data is written into each memory block, where the memory blocks include a target memory block and an extended memory block corresponding to the target memory block; at this time, each count value in the count value set is 0, and the corresponding maximum count values are also 0, and then the target memory block is determined to be the memory block to be operated, and data is written into the memory block to be operated.
In the embodiment of the invention, the memory block to be operated is determined according to the count value, so that the convenience and the efficiency of determining the memory block to be operated can be improved, and the efficiency of writing and reading data is further improved.
Further, the data operation request includes a data write request and a data read request; after determining the memory block to be operated, the executing the data operation request based on the memory block to be operated includes:
reading data from the memory block to be operated under the condition that the data operation request is the data reading request;
in one embodiment, when processing a data read request, the memory block to which data was last written needs to be read, i.e., the data is read from the memory block to be operated.
For example, a memory block a, a memory block b and a memory block c are allocated in the memory, wherein the memory block a is a target memory block, the memory block b is a first extended memory block, and the memory block c is a second extended memory block; if the memory block b is the memory block to be operated, reading the data in the memory block b.
Determining an extended memory block corresponding to a next block address connected with the block address of the memory block to be operated as a memory block to be written in under the condition that the data operation request is the data writing request;
in a specific embodiment, when processing a data writing request, writing is sequentially performed on the target memory block and each extended memory block in turn, and the count value is updated independently; when the data operation request is a data writing request, writing is required to the next memory block of the memory block which is written with data last time, so that the extended memory block corresponding to the next block address connected with the block address of the memory block to be operated is determined as the memory block to be written. And when the memory block to be operated is the last extended memory block, determining the target memory block as the block to be written.
For example, a memory block a, a memory block b and a memory block c are allocated in the memory, wherein the memory block a is a target memory block, the memory block b is a first extended memory block, and the memory block c is a second extended memory block; if the memory block b is the memory block to be operated, the memory block c is the memory block to be written, and data is written into the memory block c; if the memory block c is the memory block to be operated, the memory block a is the memory block to be written, and the data is written into the memory block a.
And writing data into the memory block to be written.
In a specific embodiment, after determining a memory block to be written based on a memory block to be operated, writing data into the memory block to be written; after the memory block to be written is written with data, updating the block management data of the memory block to be written, namely, counting the number value +1 in the head management data of the memory block to be written and counting the number value +1 in the tail management data.
In the embodiment of the invention, the data are written into each memory block in turn, and the data can be written into or read from each memory block, so that the load of the internal space of the memory can be balanced, and the service life of the memory is prolonged.
As shown in fig. 9, the memory blocks include a target memory block and three extended memory blocks corresponding to the target memory block. Before writing data, the block management data of each memory block is 00; when data is written for the first time, writing the data 1 into a target memory block, wherein the count value of the target memory block becomes 01, and the block management data of other memory blocks are unchanged; when data is written for the second time, writing the data 2 into the extended memory block 1, wherein the count value of the extended memory block 1 becomes 01, and the block management data of other memory blocks is unchanged; when writing data for the third time, writing the data 3 into the extended memory block 2, wherein the count value of the extended memory block 2 becomes 01, and the block management data of other memory blocks are unchanged; when writing data for the fourth time, writing the data 4 into the extended memory block 3, wherein the count value of the extended memory block 3 becomes 01, and the block management data of other memory blocks is unchanged; when the data is written for the fifth time, since the memory block is traversed, the data is written from the beginning again, namely, the data 5 is written into the target memory block, the previous data 1 is covered, the count value of the target memory block becomes 02, and the block management data of other memory blocks are unchanged.
In a specific embodiment, an application scenario corresponding to the storage space processing method of the present invention may be: a memory protocol stack in an automobile electronic Autosar architecture; in the AUTOSAR architecture, the standard software layer has a memory related protocol stack-memory protocol stack, and comprises a plurality of modules such as an NvM module, an EA module and the like. Wherein the NvM module provides asynchronous access management and maintenance services to the data, such as periodic storage of critical data, power-on data reading, power-down data storage, etc., with the underlying layers interfacing with the EA module. To store data in EEPROM (non-volatile storage), the EA module is required to abstract the addressing scheme in EEPROM into blocks that can be mapped to NvM modules for management by the NvM modules.
During the configuration process of the EA module in the AUTOSAR architecture, only a small amount of blocks may be configured for storing data according to the requirement of the upper layer NvM module, and most of EEPROM space is in an idle state. For this scenario, the original target memory block is expanded into a plurality of expanded memory blocks, and when a write request is processed, each expanded memory block is written in turn, and the number of cycles is calculated separately; when processing the read request, the extended memory block storing the latest data is searched first, and then the read operation is performed on the extended memory block storing the latest data. The number of extended memory blocks for a particular partition is user defined. By expanding the target memory block, the space utilization rate of the storage chip is improved, the load balancing is carried out on the parts of different address sections in the storage chip, and the service life of the storage chip is directly prolonged.
The EA module is provided with a structure body array for storing the latest memory block, cycle count, block management data, whether the block information is managed by the EA and the like in the target memory block and the extended memory block corresponding to the target memory block; the latest memory block is the memory block to be operated, and the cycle count is the count value, and whether the latest memory block is managed by the EA module or not is the data written. And when the EA module receives the request of the NvM module, the latest memory block is found through the internal processing flow. However, after the MUC is powered down, the data in the array is cleared, so that the latest memory block, i.e., the memory block to be operated, needs to be redetermined, as shown in FIG. 10, another method for determining the block to be operated may include:
step 1: initializing a structure body array for storing block information of the first memory block and the second memory block; the first memory block is the memory block of the current latest read block information, and the second memory block is the memory block of the last read block information.
Step 2: reading block management data of the first memory block and storing the block management data into a structure body array corresponding to the first memory block; wherein the block management data includes header management data and trailer management data;
Step 3: if the structure body array of the second memory block is empty, determining that the last memory block of the first memory block is the first memory block, wherein the first memory block is the second memory block; reading block management data of the redetermined first memory block;
step 4: if the structure array of the second memory block is not empty, determining whether the first memory block is managed by the EA module, and if not, determining that the second memory block is a memory block to be operated.
Step 5: if the first memory block is managed by the EA module, comparing the cycle count of the first memory block with the cycle count of the second memory block; if the cycle count of the first memory block is smaller than the cycle count of the second memory block, the second memory block is confirmed to be the memory block to be operated.
Step 6: if the cycle count of the first memory block is not less than the cycle count of the second memory block, determining that the last memory block of the first memory block is the first memory block, wherein the first memory block is the second memory block; reading block management data of the redetermined first memory block; repeating the steps 2-5 until the first memory block is the last memory block, and determining the first memory block as the memory block to be operated.
The embodiment of the invention also provides a storage space processing device, as shown in fig. 11, which comprises:
a request response module 1110, configured to respond to an allocation request for a target memory block; the allocation request comprises a block length corresponding to the target memory block and a block starting address;
a block determining module 1120, configured to determine the target memory block from the free storage space of the memory based on the block length and the block start address corresponding to the target memory block;
the block expansion module 1130 is configured to perform block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block; the extended memory block is connected with the address of the target memory block, and the block length of the extended memory block is consistent with that of the target memory block;
the result determining module 1140 is configured to determine a storage space allocation result corresponding to the allocation request based on the target memory block and the extended memory block.
In other embodiments, the block expansion module 1130 further includes:
the first starting address determining module is used for determining the block starting address of the extended memory block based on the block length corresponding to the target memory block and the block starting address of the target memory block under the condition that the number of the extended memory blocks is one;
And the first extended block determining module is used for obtaining the extended memory block corresponding to the target memory block based on the block starting address of the extended memory block and the block length corresponding to the extended memory block.
In other embodiments, the block expansion module 1130 further includes:
the second initial address determining module is used for determining that the block end address of the extended memory block is added with 1 to be the block initial address of the next extended memory block under the condition that the number of the extended memory blocks is a plurality of;
the second extended block determining module is used for obtaining the next extended memory block based on the block starting address of the next extended memory block and the block length of the extended memory block;
a loop module for repeating: determining a block termination address of the extended memory block to obtain the next extended memory block;
and the third extended block determining module is used for obtaining a plurality of extended memory blocks corresponding to the target memory block when the next extended memory block is the last extended memory block corresponding to the target memory block.
In other embodiments, the apparatus further comprises:
the state information determining module is used for determining the state information of the memory block based on the sign value; the status information includes block valid and block invalid;
and the data updating module is used for carrying out data updating on the count value under the condition that the state information of the memory block is effective, so as to obtain an updated count value.
In other embodiments, the apparatus further comprises:
the management data acquisition module is used for acquiring the head management data and the tail management data;
and the data writing determining module is used for confirming that the memory block is written with data after the distribution is completed under the condition that the head management data is equal to the tail management data.
In other embodiments, the apparatus further comprises:
the operation request acquisition module is used for responding to the data operation request;
the to-be-written block determining module is used for determining a to-be-operated memory block from the target memory block and the extended memory block corresponding to the target memory block based on the data operation request; the memory block to be operated is the memory block of the last time of writing data;
And the operation request execution module is used for executing the data operation request based on the memory block to be operated.
In other embodiments, the block to be written determination module further includes:
the numerical value set acquisition module is used for acquiring a counting numerical value set; the count value set comprises count values of the target memory blocks and count values of the extended memory blocks corresponding to the target memory blocks;
the extremum determining module is used for determining the maximum counting value from the counting value set;
and the first to-be-operated block determining module is used for determining the memory block corresponding to the maximum counting value as the to-be-operated memory block under the condition that the number of the maximum counting value is one.
In other embodiments, the apparatus further comprises:
the third initial address acquisition module is used for acquiring a plurality of block initial addresses under the condition that the number of the maximum count values is a plurality of; the block start addresses comprise block start addresses of memory blocks corresponding to each maximum count value;
a third start address determining module, configured to determine a last block start address of the plurality of block start addresses as a block start address of the memory block to be operated;
The second to-be-operated block determining module is used for determining the to-be-operated memory block based on the block starting address of the to-be-operated memory block.
In other embodiments, the operation request execution module further includes:
the data reading module is used for reading data from the memory block to be operated under the condition that the data operation request is the data reading request;
the to-be-written block determining module is used for determining that an extended memory block corresponding to a next block address connected with a block address of the to-be-operated memory block is a to-be-written memory block under the condition that the data operation request is the data writing request;
and the data writing module is used for writing data into the memory block to be written.
The device and method embodiments in the device embodiments are based on the same inventive concept, and are used for implementing the storage space processing method.
The embodiment of the invention also provides a storage space processing device, which comprises: a processor and a memory having stored therein at least one instruction, at least one program, code set or instruction set loaded and executed by the processor to implement a memory space processing method as in any of the method embodiments.
Embodiments of the present invention also provide a storage medium that may be disposed in a server to hold at least one instruction, at least one program, a set of codes, or a set of instructions for implementing a storage space processing method in a method embodiment, where the at least one instruction, the at least one program, the set of codes, or the set of instructions are loaded and executed by the processor to implement a storage space processing method according to any one of the method embodiments.
Alternatively, in an embodiment of the present invention, the storage medium may be located on at least one network server of a plurality of network servers of a computer network. Alternatively, in an embodiment of the present invention, the storage medium may include, but is not limited to: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
As can be seen from the above embodiments of the present invention, in the present invention, after receiving a request for allocating a target memory block, the target memory block is determined from the free memory space of the memory according to the block start address and the block length of the target memory block, so that the accuracy and efficiency of determining the target memory block can be improved; performing block expansion processing on the target memory block to obtain at least one expanded memory block corresponding to the target memory block, wherein the memory blocks in the memory are changed from one to a plurality of original memory blocks, so that the memory space of the memory can be effectively utilized, and the space utilization rate of the memory is improved; in addition, as the memory space of the memory is enlarged, the load of the memory can be balanced, thereby prolonging the service life of the memory.
It should be noted that: the foregoing description of various embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the various embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvement in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (12)

1. A storage space processing method, comprising:
responding to an allocation request for a target memory block; the allocation request comprises a block length corresponding to the target memory block and a block starting address;
determining the target memory block from the free storage space of the memory based on the block length and the block starting address corresponding to the target memory block;
performing block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block; the extended memory block is connected with the address of the target memory block, and the block length of the extended memory block is consistent with the block length of the target memory block;
And determining a storage space allocation result corresponding to the allocation request based on the target memory block and the extended memory block.
2. The method of claim 1, wherein performing block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block comprises:
determining a block start address of the extended memory block based on a block length corresponding to the target memory block and the block start address of the target memory block when the number of the extended memory blocks is one;
and obtaining the extended memory block corresponding to the target memory block based on the block starting address of the extended memory block and the block length corresponding to the extended memory block.
3. The method as claimed in claim 2, wherein said performing a block expansion process on said target memory block to obtain an expanded memory block corresponding to said target memory block comprises:
determining that the block ending address of the extended memory block is added with 1 as the block starting address of the next extended memory block under the condition that the number of the extended memory blocks is a plurality of;
Obtaining the next extended memory block based on the block start address of the next extended memory block and the block length of the extended memory block;
repeating the steps: determining a block termination address of the extended memory block to obtain the next extended memory block;
and obtaining a plurality of extended memory blocks corresponding to the target memory block under the condition that the next extended memory block is the last extended memory block corresponding to the target memory block.
4. The method of claim 1, wherein each memory block includes block management data; the block management data comprises a flag value and a count value; the flag value is used for representing state information of the memory block; the count value is used for representing the number of times the memory block is written with data;
the method further comprises the steps of:
determining state information of the memory block based on the flag value; the status information includes block valid and block invalid;
and under the condition that the state information of the memory block is effective, carrying out data updating on the count value to obtain an updated count value.
5. A method according to claim 4, wherein the block management data comprises header management data and trailer management data; the header management data and the trailer management data each include the standard value and the count value;
the method comprises the following steps:
acquiring the head management data and the tail management data;
and under the condition that the head management data is equal to the tail management data, confirming that the memory block is already written with data after the allocation is completed.
6. The storage space processing method according to claim 1, wherein after said determining a storage space allocation result corresponding to said allocation request, said method comprises:
responding to the data operation request;
determining a memory block to be operated from the target memory block and the extended memory block corresponding to the target memory block based on the data operation request; the memory block to be operated is the memory block of the last time of writing data;
and executing the data operation request based on the memory block to be operated.
7. The method of claim 6, wherein determining, based on the data operation request, a memory block to be operated from the target memory block and the extended memory block corresponding to the target memory block comprises:
Acquiring a counting value set; the count value set comprises count values of the target memory blocks and count values of the extended memory blocks corresponding to the target memory blocks;
determining a maximum count value from the set of count values;
and under the condition that the number of the maximum count values is one, determining the memory block corresponding to the maximum count value as the memory block to be operated.
8. The memory space processing method of claim 7, further comprising:
acquiring a plurality of block starting addresses under the condition that the number of the maximum count values is a plurality of; the block start addresses comprise block start addresses of memory blocks corresponding to each maximum count value;
determining the last block starting address in the block starting addresses as the block starting address of the memory block to be operated;
and determining the memory block to be operated based on the block starting address of the memory block to be operated.
9. The memory space processing method according to claim 8, wherein the data operation request includes a data write request and a data read request;
The executing the data operation request based on the memory block to be operated includes:
reading data from the memory block to be operated under the condition that the data operation request is the data reading request;
determining an extended memory block corresponding to a next block address connected with the block address of the memory block to be operated as a memory block to be written in under the condition that the data operation request is the data writing request;
and writing data into the memory block to be written.
10. A storage space processing apparatus, the apparatus comprising:
the request response module is used for responding to the allocation request aiming at the target memory block; the allocation request comprises a block length corresponding to the target memory block and a block starting address;
the block determining module is used for determining the target memory block from the idle storage space of the memory based on the block length and the block starting address corresponding to the target memory block;
the block expansion module is used for carrying out block expansion processing on the target memory block to obtain an expanded memory block corresponding to the target memory block; the extended memory block is connected with the address of the target memory block, and the block length of the extended memory block is consistent with that of the target memory block;
And the result determining module is used for determining a storage space allocation result corresponding to the allocation request based on the target memory block and the extended memory block.
11. An electronic device comprising a processor and a memory having stored therein at least one instruction and at least one program, the at least one instruction and the at least one program being loaded and executed by the processor to implement the memory-based processing method of any of claims 1-9.
12. A computer storage medium having at least one instruction and at least one program stored therein, the at least one instruction and the at least one program loaded and executed by a processor to implement the storage space-based processing method of any one of claims 1-9.
CN202311160356.7A 2023-09-08 2023-09-08 Storage space processing method, device, equipment and storage medium Pending CN117290258A (en)

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