CN117290002A

CN117290002A - Operating system deployment method based on isomorphic multi-core chip and isomorphic multi-core chip

Info

Publication number: CN117290002A
Application number: CN202311267948.9A
Authority: CN
Inventors: 段昌林; 屠一伟
Original assignee: Shanghai Shangtai Automobile Information System Co ltd
Current assignee: Shanghai Shangtai Automobile Information System Co ltd
Priority date: 2023-09-27
Filing date: 2023-09-27
Publication date: 2023-12-26

Abstract

An operating system deployment method based on isomorphic multi-core chips and the isomorphic multi-core chips, wherein the isomorphic multi-core chips comprise a plurality of isomorphic cores, common storage spaces are arranged outside the cores, and each core is provided with one-to-one corresponding independent storage space; the method comprises the following steps: determining an image file of an operating system to be deployed, wherein the image file comprises variable data and non-variable data; storing variable data in an independent storage space of each core, and storing non-variable data in a common storage space; starting each kernel and initializing variable data of an independent storage space of each kernel; for each kernel, the target tasks of the operating system are created and run independently by accessing the variable data of its independent storage space and the non-variable data of the common storage space. The scheme is beneficial to conveniently and efficiently deploying the operating system on a plurality of isomorphic kernels, reduces code redundancy and storage space occupation, and reduces system updating and maintenance cost.

Description

Operating system deployment method based on isomorphic multi-core chip and isomorphic multi-core chip

Technical Field

The invention relates to the technical field of computers, in particular to an operating system deployment method based on isomorphic multi-core chips and the isomorphic multi-core chips.

Background

Due to the rapid development of the chip manufacturing process, central processing units (Central Processing Unit, abbreviated as CPUs) have become smaller and smaller, the number of integrated cores is larger and larger, the cost is lower and lower, the popularization of the application of the multi-core processor is promoted, the hardware integration level is improved, and the original multi-processor equipment is gradually replaced by the multi-core processor. The following problem is how to rapidly and efficiently deploy or migrate the single-core operating system into the multi-core processor, so as to fully exert the performance advantage of the multi-core processor.

In the prior art, a common way to deploy a single-core operating system to a multi-core processor is a deployment scheme for each core independent engineering. Specifically, by copying multiple copies of the original single-core operating system image file, and adaptively modifying or updating the multiple copies of the operating system image file according to the respective characteristics, functions and the like of each kernel, an operating system image file adapted to each kernel is obtained (i.e., a single operating system image file is converted into multiple independent and different operating system image files), and then each kernel runs the respective operating system.

However, the disadvantages of the above deployment schemes are: (1) The repeated and redundant code segments and read-only data segments exist among the operating system image files which are independently arranged in each kernel, so that the occupation of the storage space is greatly increased, and the defects are particularly remarkable in the scene of limited storage space such as embedded equipment; (2) The multiple operating system image files are required to be independently maintained and upgraded respectively, so that the updating and maintaining cost is high, and the workload is high; (3) The system boot time is slow because each kernel typically needs to load the respective code from an external memory space (e.g., flash).

Another existing deployment scheme is to dynamically allocate tasks of an operating system to each kernel according to an operation load rate of each kernel, so that multiple kernels run tasks of the same operating system in parallel. However, the deployment scheme is generally applied to a large-scale operating system, the bottom code of the operating system needs to be studied, modified and updated carefully in the multi-core deployment process, the deployment cost and the operation complexity are very high, and the deployment scheme is not friendly enough for multi-core deployment of an embedded system of a common enterprise.

Disclosure of Invention

One of the purposes realized by the embodiment of the invention is to provide a method for conveniently and efficiently deploying an operating system on a plurality of isomorphic kernels, thereby reducing code redundancy, storage space occupation and system updating and maintenance cost.

In order to achieve the above object, an embodiment of the present invention provides an operating system deployment method based on an isomorphic multi-core chip, where the isomorphic multi-core chip includes a CPU, the CPU includes a plurality of isomorphic cores, where a common storage space is provided outside the plurality of isomorphic cores, and each core has an independent storage space corresponding to each other one by one, where the independent storage space can be accessed by the corresponding core, and the common storage space can be accessed by the cores of the plurality of isomorphic cores respectively; the method comprises the following steps: determining an image file of an operating system to be deployed, wherein the image file of the operating system comprises variable data and non-variable data; storing the variable data in an independent storage space corresponding to each kernel, and storing the non-variable data in the common storage space; starting the multiple isomorphic cores, and initializing variable data of independent storage spaces of each core; for each kernel, the target tasks of the operating system are created and run independently by accessing the variable data of its independent storage space and the non-variable data of the common storage space.

Optionally, the variable data includes a variable of the operating system, and the non-variable data includes a target task creation function of the operating system, where each kernel has a respective target task creation function to be executed; the creating and running the target task of the operating system independently for each kernel by accessing the variable data of its independent storage space and the non-variable data of the common storage space includes: for each kernel, executing a target task creation function to be executed of the common storage space; and operating the variable of the independent storage space of the kernel based on the execution result to create and run the target task of the kernel in the common storage space.

Optionally, each kernel has a kernel identifier, where the kernel identifier is used to indicate a main function of a target task creation function to be executed by the kernel; for each kernel, executing a target task creation function to be executed of the common storage space, including: for each kernel, determining a main function of a target task creation function to be executed by the kernel in the public storage space according to the kernel identification; executing the main function and the calling function of the main function.

Optionally, the plurality of isomorphic cores includes a master core and at least one slave core; starting the plurality of isomorphic kernels, comprising: the master kernel is started first, and then the master kernel starts the at least one slave kernel.

Optionally, after starting the plurality of homogenous kernels and before each kernel independently creates and runs the target task of the operating system, the method further comprises: each core is respectively allocated with a respective timer.

Optionally, the starting storage address of the variable data in the independent storage space of each core is the same.

Optionally, the independent storage space of each kernel is a memory disposed inside the kernel.

Optionally, the common storage space is selected from: random access memory within the chip and external to the plurality of homogenous cores; and the nonvolatile memory is externally connected with the chip.

Optionally, the operating system is an embedded operating system.

The embodiment of the invention also provides an isomorphic multi-core chip, which comprises a CPU, wherein the CPU comprises a plurality of isomorphic cores, a public storage space is arranged outside the isomorphic cores, each core is provided with an independent storage space corresponding to each other, the independent storage space can be accessed by the corresponding core, and the public storage space can be accessed by the isomorphic cores respectively; the CPU is used for executing the operating system deployment method.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:

in a multi-core deployment scenario of a single-core operating system, the invariable data accessed by each of multiple cores often has a larger portion of the same invariable data (mainly including code or functions). Further, a larger portion of the target task creation function to be executed by each of the plurality of cores is the same. For heterogeneous multi-core chips, because each core often contains different instruction sets, different cores access the same code or function, and may obtain completely different parsing results. For example, two heterogeneous cores a and B access the same function f, the analysis result obtained by the core a accessing the function f is a "read" operation, and the analysis result obtained by the core B accessing the function f may be an "assign" operation. Therefore, in order to implement the operating system that the heterogeneous cores operate independently of each other based on the heterogeneous multi-core operating system deployment scheme, whether the codes or functions accessed by the cores are the same or not, it is necessary to divide an independent storage space for each core to store the codes/functions to be accessed or executed by the core, otherwise, system operation errors may be caused.

Different from the deployment scheme of the heterogeneous multi-core operating system, the deployment scheme of the operating system provided by the embodiment of the invention is realized based on a plurality of isomorphic cores, and specifically, the plurality of isomorphic cores contain the same instruction set, and the same analysis result can be obtained by accessing the same code. In a multi-core deployment scenario of a single-core operating system, as previously described, a larger portion of the non-variable data accessed by each core is often the same. Therefore, by utilizing the isomorphic characteristics of the multiple cores, independent operation of the single-core operating system on the multiple cores can be realized without adopting an independent storage space for each core to store the same invariable data and adopting a common storage space for storage. For the variable data which can be dynamically changed, in order to ensure the independence and the safety of the operation system of each kernel, the independent storage space of each kernel can be adopted for storage.

Thus, in the embodiment of the present invention, each kernel independently creates and runs the target task of the operating system by accessing the variable data of the independent storage space and the non-variable data of the common storage space, which is equivalent to that each kernel can independently run a set of operating systems. Compared with the existing deployment scheme of multi-core independent engineering, which divides independent storage space for each core to store invariable data and variable data, the embodiment stores the invariable data which occupies a large storage space in a common storage space. Because only one set of image files is actually provided, the space occupation of the same or repeated codes is reduced, and only a single operating system image file is required to be updated and modified in the system maintenance and upgrading process, so that the updating maintenance cost and workload are reduced, and the method has strong convenience and universality.

Furthermore, compared with the prior art that each kernel needs to load respective codes (corresponding to the immutable data) from the external storage space, the embodiment can realize that a plurality of kernels independently run the operating system by only loading the immutable data once from the common storage space, thereby shortening the system starting time.

Further, in the embodiment of the present invention, the core identifier is used to indicate the main function of the target task creation function to be executed corresponding to the kernel, which is equivalent to indicating the execution path (similar to the index number function) of the target task creation program based on the core identifier, where the main function includes one or more layers of called functions (or called sub functions), and the automatic execution of each called function can be automatically triggered by the main function. In this way, by establishing the correspondence between the kernel identifier and the main function, on the one hand, the complexity can be effectively reduced compared with the correspondence between the kernel and all the target task creation functions to be executed by the kernel; on the other hand, the method can realize that each kernel quickly and accurately executes the target task creation function to be executed, so that each kernel independently, efficiently and accurately runs the respective operating system.

Drawings

FIG. 1 is a flow chart of an operating system deployment method based on isomorphic multi-core chips in an embodiment of the invention;

FIG. 2 is a schematic diagram of a homogeneous multi-core chip according to an embodiment of the present invention;

fig. 3 is a flowchart of an embodiment of step S14 in fig. 1.

Detailed Description

In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

Referring to fig. 1, fig. 1 is a flowchart of an operating system deployment method based on a homogeneous multi-core chip in an embodiment of the present invention.

Specifically, the isomorphic multi-core chip comprises a CPU, wherein the CPU comprises a plurality of isomorphic cores, a public storage space is arranged outside the isomorphic cores, each core is provided with an independent storage space in one-to-one correspondence, the independent storage spaces can be accessed by the corresponding cores, and the public storage spaces can be accessed by the isomorphic cores respectively;

the method may include steps S11 to S14:

step S11, determining an image file of an operating system to be deployed, wherein the image file of the operating system comprises variable data and non-variable data.

Step S12, storing the variable data in the independent storage space corresponding to each kernel, and storing the non-variable data in the common storage space.

Step S13, starting the cores with the same structure, and initializing variable data of independent storage space of each core.

Step S14, for each kernel, independently creating and running the target task of the operating system by accessing the variable data of the independent storage space and the non-variable data of the common storage space.

The operating system deployment method illustrated in fig. 1 is described in detail below in conjunction with fig. 2. FIG. 2 is a schematic diagram of a homogeneous multi-core chip in an embodiment of the invention.

As a non-limiting example, the homogeneous multi-core chip may contain 6 homogeneous cores, each of which may be, for example, R5F cores, as shown in FIG. 2. Each Core may use Core SF (including two cores), core SX0, core SX1, core SP0, core SP1 as its Core identification, respectively.

Specifically, the Core SF may be composed of 2 cores with fixed lockstep, and the other 4 cores may be lockstep or independent; alternatively, all cores may be provided as separate (i.e., non-lockstep) cores. The system can continuously check the correctness of program operation, can detect processor errors, establishes a fault suppression area and prevents fault spreading.

Specifically, the independent storage space of each kernel may be an independent storage space (or referred to as a memory) with a read-write function, which is disposed inside the kernel. The independent storage space within each core may be, without limitation, tightly coupled memory (Tightly Coupled Memory, TCM). As shown in fig. 2, the Core SF is internally provided with 128K TCM, and the Core SX0, core SX1, core SP0, core SP1 are internally provided with 64K TCM, respectively.

The common storage space arranged outside the cores with the same structure can be a memory which is arranged inside the multi-core chip with the same structure and is positioned outside the cores with the same structure, for example, a random access memory (Random Access Memory, RAM) or an internal integrated random access memory (Internal Random Access Memory, IRAM), as shown by a rectangle box in the middle of FIG. 2, and the storage space of the IRAM is 4M; alternatively, the common storage space may be a memory that is externally connected to the homogeneous multi-core chip, for example, a nonvolatile memory, mainly including a Flash memory (Flash) or a high-speed Flash (Hyper Flash), etc., as shown by a dashed large rectangular box in fig. 2.

In some non-limiting embodiments, the RAM may be selected from, for example, but not limited to: static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (doubledata rate SDRAM, DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous DRAM (SLDRAM), and direct memory bus RAM (direct rambus RAM, DR RAM).

Furthermore, each core contains a separate memory, and a storage space with a cache function, for example, an ICache for caching instructions and a DCache for caching data, can be set according to actual scene requirements.

It should be noted that the size of each storage space in the isomorphic core chip may be set according to actual requirements, and the embodiment of the invention is not limited.

In a specific implementation of step S11, an image file of an operating system to be deployed is determined, where the image file of the operating system includes variable data and non-variable data.

Wherein the variable data may comprise variables of an operating system to be deployed, and the non-variable data may comprise code and read-only data of the operating system. The variables, namely data which can be dynamically changed in the running process of the operating system, specifically can comprise read-write data (for example, files with suffix of. Data) and uninitialized data (for example, files with suffix of. Bss); the immutable data, i.e., code and/or data that is fixed during the operation of the operating system, may specifically include code or programs of the operating system (e.g., files with a suffix of. Text) and read-only data (e.g., files with a suffix of. ROdata), where the code typically includes implementation code of multiple target task creation functions (or referred to as target task creation code/target task creation program).

In the implementation of step S12, the variable data is stored in an independent storage space corresponding to each kernel, and the non-variable data is stored in the common storage space.

Specifically, the image file of the operating system to be deployed may be pre-stored in a nonvolatile memory (for example, flash) externally connected to the isomorphic multi-core chip, and after the chip is powered on, variable data in the image file is respectively loaded from the externally connected nonvolatile memory to independent storage spaces (for example, TCM) inside each core; after the subsequent kernel is started, initializing operation is carried out on variable data which is loaded into the independent storage space inside the kernel.

In practical application, for the immutable data in the image file, at least any one of the following two modes of implementation is adopted for storage or loading in combination with specific scene requirements.

Mode one: after chip power-up, the immutable data in the image file is loaded from the external non-volatile memory to a random access memory (e.g., IRAM) integrated within the isomorphic multi-core chip and located outside of the multiple isomorphic cores. Each subsequent kernel independently creates and runs a respective target task by accessing variable data in the respective TCM and accessing non-variable data in the random access memory.

Mode two: after the chip is powered up, for the immutable data in the image file, no additional loading operation is required, that is, the immutable data is not required to be loaded from the external nonvolatile memory to other memories (e.g., IRAM). Each subsequent kernel independently creates and runs a respective target task by accessing variable data in the respective TCM and directly accessing non-variable data in the external non-volatile memory.

In the implementation of step S13, the multiple homogeneous cores are started, and variable data in the independent storage space of each core is initialized.

In particular, before initialization, the variable data in the independent storage space of each kernel may be in the form of multiple independent parameters to be assigned, and/or one or more linked lists, arrays, etc. to be assigned. After initialization, the state of the variable data stored in the respective cores may be consistent. The variable data of the independent memory space of each core may be assigned different parameter values during subsequent creation and execution of the respective target task by the respective core.

Further, the variable data has the same starting memory address in the independent memory space of each core.

It will be appreciated that if the starting memory addresses (or access addresses) of the variable data in the separate memory spaces of the different cores are different, a set of corresponding data access programs needs to be written for each of the different cores. In contrast, in the embodiment of the present invention, the starting storage addresses of the variable data in the independent storage spaces of each core are set to be the same, so that the same data access program can be adopted for different cores, thereby reducing the complexity of the program and the cost of program creation and maintenance.

Further, the plurality of isomorphic cores includes a master core and at least one slave core; starting the plurality of isomorphic kernels, comprising: the master kernel is started first, and then the master kernel starts the at least one slave kernel.

In connection with the cores shown in fig. 2, the Core SF may be a master Core, and the remaining cores are slave cores. In a specific implementation, after the chip is powered on, the Core SF may be started first, and then the Core SF starts the Core SX0, the Core SX1, the Core SP0 and the Core SP1. For the specific starting scheme of the master kernel and the slave kernel, refer to the conventional master-slave kernel sequential starting mode, and are not repeated here.

Still further, after launching the plurality of homogenous kernels and before each kernel independently creates and runs a target task of the operating system, the method further comprises: each core is respectively allocated with a respective timer.

The timer may be, for example, a general purpose timer (General Purpose Timer, abbreviated as GPT), and has basic functions of sending serial data periodically, counting events, measuring external input signals, generating periodic interrupts as a general purpose timer, and outputting periodic signals, so as to support each kernel to run its own operating system safely and independently.

In a specific implementation of step S14, for each kernel, the target task of the operating system is created and executed independently by accessing the variable data of its independent storage space and the non-variable data of the common storage space.

It should be noted that in the multi-core deployment scenario of a single-core operating system, the invariable data accessed by each of multiple cores often has a larger portion of the same invariable data (mainly including codes or functions). Further, a larger portion of the target task creation function to be executed by each of the plurality of cores is identical.

For heterogeneous multi-core chips, because each core often contains different instruction sets, different cores access the same code or function, and may obtain completely different parsing results. For example, two heterogeneous cores a and B access the same function f, the parsing result obtained by the core a accessing the function f is a "read" operation, and the parsing result obtained by the core B accessing the function f may be an "assign" operation or a "modify" operation. Therefore, in order to implement the operating system that the heterogeneous cores operate independently of each other based on the heterogeneous multi-core operating system deployment scheme, whether the codes or functions accessed by the cores are the same or not, it is necessary to divide an independent storage space for each core to store the codes/functions to be accessed or executed by the core, otherwise, system operation errors may be caused.

In contrast, in the embodiment of the present invention, the deployment scheme of the operating system is implemented based on multiple isomorphic kernels, and specifically, the multiple isomorphic kernels contain the same instruction set, and access to the same code can obtain the same analysis result. In a multi-core deployment scenario of a single-core operating system, as previously described, a larger portion of the non-variable data accessed by each core is often the same. Therefore, by utilizing the isomorphic characteristics of the multiple cores, independent operation of the single-core operating system on the multiple cores can be realized without adopting an independent storage space for each core to store the same invariable data and adopting a common storage space for storage. For the variable data which can be dynamically changed, in order to ensure the independence and the safety of the operation system of each kernel, the independent storage space of each kernel can be adopted for storage.

Fig. 3 is a flowchart of an embodiment of step S14 in fig. 1. Specifically, the variable data includes variables of the operating system, and the non-variable data includes target task creation functions of the operating system, wherein each kernel has a respective target task creation function to be executed; the step S14 may specifically include steps S31 to S32.

In step S31, for each kernel, a target task creation function to be executed of the common storage space is executed.

The target task creation function to be executed corresponding to each kernel may be partially the same, and may be specifically specified in combination with the actual scene requirement, which is not limited herein.

In step S32, the variables of the independent storage space of the kernel are operated based on the execution result to create and run the target task of the kernel in the common storage space.

In particular implementations, the operations performed on the variables of the independent memory space of the kernel may be selected from, but are not limited to: variable assignment operation, variable deletion operation, variable addition operation, variable reading operation.

For example, for the variable assignment operation, the execution result includes the values of some or all variables obtained after the execution of the target task creation function corresponding to the kernel.

In the embodiment of the invention, because the independent storage space (such as TCM inside the kernel) of each kernel is usually smaller, the independent storage space is used for storing variable data occupying smaller part in the image file of the operating system; the common storage space is usually a random access memory or a flash memory with larger capacity, which is arranged outside the kernel, and is used for storing the invariable data with larger occupied space and for running the target task. Therefore, the target task that each kernel independently runs the operating system can be realized, and the running stability of the operating system can be ensured.

Further, with continued reference to fig. 2, each Core has a Core identifier (Core id), which is a main function of a target task creation function to be executed by the Core, and is Core SF, core SX0, core SX1, core SP0, core SP1, respectively; for each kernel, executing a target task creation function to be executed of the common storage space, including: for each kernel, determining a main function of a target task creation function to be executed by the kernel in the public storage space according to the kernel identification (as shown in fig. 2, if conditional sentences can be adopted to perform kernel identification judgment, and corresponding main functions TaskCreatMain (xx) are executed); the main function and a calling function (not shown) of the main function are executed.

In the embodiment of the invention, the core identifier is adopted to indicate the main function of the target task creation function to be executed corresponding to the core, which is equivalent to indicating the execution path (similar to the index number function) of the target task creation program based on the core identifier, and the main function comprises one or more layers of called functions (or called sub functions), so that the automatic execution of each called function can be automatically triggered through the main function. Therefore, by establishing the corresponding relation between the kernel identifier and the main function, on one hand, compared with the corresponding relation between the kernel and all target task creation functions to be executed by the kernel, the complexity of the program can be effectively reduced; on the other hand, the method can realize that each kernel quickly and accurately executes the target task creation function to be executed, so that each kernel independently, efficiently and accurately runs the respective operating system.

Further, the operating system to be deployed is an embedded operating system. The embedded operating system may be selected from, but is not limited to FreeRTOS, RTThread, uCOS and the like.

In the embodiment of the present invention, since the capacity of the independent storage space (e.g., TCM) of each kernel is generally smaller, the amount of data that can be stored is limited, and compared with other middle-large operating systems, the embedded operating system has simpler functions and occupies smaller space, and the total amount of variable data contained in the embedded operating system is correspondingly smaller, so that the present embodiment is particularly suitable for the embedded operating system.

It should be noted that, the operating system deployment method based on the isomorphic multi-core chip provided by the embodiment of the invention does not limit the number of cores, and only needs to have isomorphic characteristics among the cores.

For more details of the homogeneous multi-core chip, reference is made to the related descriptions of the embodiments shown in fig. 1 to 3, and the detailed descriptions are omitted here.

Specifically, in the embodiment of the present invention, the processor may be a central processing unit (central processing unit, abbreviated as CPU), and the processor may also be other general purpose processors, digital signal processors (digital signal processor, abbreviated as DSP), application specific integrated circuits (application specific integrated circuit, abbreviated as ASIC), off-the-shelf programmable gate arrays (field programmable gate array, abbreviated as FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, and so on. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It should be understood that the term "and/or" is merely an association relationship describing the associated object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In this context, the character "/" indicates that the front and rear associated objects are an "or" relationship.

The term "plurality" as used in the embodiments herein refers to two or more.

It should be noted that the serial numbers of the steps in the present embodiment do not represent a limitation on the execution sequence of the steps.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims

1. The operating system deployment method based on the isomorphic multi-core chip is characterized in that the isomorphic multi-core chip comprises a CPU (Central processing Unit) and a plurality of isomorphic cores, wherein a public storage space is arranged outside the isomorphic cores, each core is provided with an independent storage space corresponding to each other, the independent storage space can be accessed by the corresponding core, and the public storage space can be accessed by the isomorphic cores respectively;

the method comprises the following steps:

determining an image file of an operating system to be deployed, wherein the image file of the operating system comprises variable data and non-variable data;

storing the variable data in an independent storage space corresponding to each kernel, and storing the non-variable data in the common storage space;

starting the multiple isomorphic cores, and initializing variable data of independent storage spaces of each core;

for each kernel, the target tasks of the operating system are created and run independently by accessing the variable data of its independent storage space and the non-variable data of the common storage space.

2. The method of claim 1, wherein the variable data comprises variables of the operating system and the non-variable data comprises target task creation functions of the operating system, wherein each kernel has a respective target task creation function to be executed;

the creating and running the target task of the operating system independently for each kernel by accessing the variable data of its independent storage space and the non-variable data of the common storage space includes:

for each kernel, executing a target task creation function to be executed of the common storage space;

and operating the variable of the independent storage space of the kernel based on the execution result to create and run the target task of the kernel in the common storage space.

3. The method of claim 2, wherein each kernel has a kernel identification indicating a master function of a target task creation function to be executed by the kernel;

for each kernel, executing a target task creation function to be executed of the common storage space, including:

for each kernel, determining a main function of a target task creation function to be executed by the kernel in the public storage space according to the kernel identification;

executing the main function and the calling function of the main function.

4. The method of claim 1, wherein the plurality of homogeneous cores comprises one master core and at least one slave core;

starting the plurality of isomorphic kernels, comprising:

the master kernel is started first, and then the master kernel starts the at least one slave kernel.

5. The method of claim 1 or 4, wherein after launching the plurality of homogenous kernels and before each kernel independently creates and runs a target task of the operating system, the method further comprises:

each core is respectively allocated with a respective timer.

6. The method of claim 1, wherein the variable data has the same starting memory address in the respective independent memory space of each core.

7. The method of claim 1 or 6, wherein the independent storage space of each core is a memory disposed inside the core.

8. The method of claim 1, wherein the common storage space is selected from the group consisting of:

random access memory within the chip and external to the plurality of homogenous cores;

and the nonvolatile memory is externally connected with the chip.

9. The method of claim 1, wherein the operating system is an embedded operating system.

10. The isomorphic multi-core chip is characterized by comprising a CPU, wherein the CPU comprises a plurality of isomorphic cores, a public storage space is arranged outside the isomorphic cores, each core is provided with a one-to-one corresponding independent storage space, the independent storage spaces can be accessed by the corresponding cores, and the public storage spaces can be accessed by the isomorphic cores respectively;

the CPU is configured to execute the operating system deployment method according to any one of claims 1 to 9.