CN117276292B - Array substrate and display panel - Google Patents

Array substrate and display panel Download PDF

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Publication number
CN117276292B
CN117276292B CN202311550178.9A CN202311550178A CN117276292B CN 117276292 B CN117276292 B CN 117276292B CN 202311550178 A CN202311550178 A CN 202311550178A CN 117276292 B CN117276292 B CN 117276292B
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deformation
array substrate
line
goa signal
wires
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CN117276292A (en
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张建英
袁海江
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HKC Co Ltd
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HKC Co Ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application provides an array substrate and a display panel, and relates to the technical field of display, wherein the array substrate comprises a non-display area, and the non-display area comprises a plurality of GOA signal lines and insulating layers, wherein the GOA signal lines are arranged at intervals along a first direction, and the insulating layers are covered above the GOA signal lines; deformation wires are arranged between adjacent GOA signal wires, the deformation wires and the GOA signal wires are arranged on the same layer and have the same extending direction, and insulating layers above the adjacent GOA signal wires are connected through the deformation wires; the deformation line can expand in the second direction under the condition that the deformation condition is met; the second direction is perpendicular to the array substrate. The technical scheme provided by the application can improve the use reliability of the display panel.

Description

Array substrate and display panel
Technical Field
The application relates to the technical field of display, in particular to an array substrate and a display panel.
Background
Currently, GOA technology is widely used in thin film transistor Liquid crystal display devices (Thin Film Transistor-Liquid CRYSTAL DISPLAY, TFT-LCD). The gate driving circuit can be integrated on the array substrate of the display panel by the GOA technology, thereby reducing the cost.
In the use process of the display device, the voltage value of the GOA signal is very large, so that when the short circuit condition occurs in the array substrate, the GOA signal current can be increased, the temperature of the short circuit position on the display panel is overhigh, and even a melting screen is caused. In order to reduce the loss caused by the short circuit phenomenon, in the conventional design, an instantaneous value detection technology is generally adopted to detect the magnitude of the GOA signal current value at a certain time point or in a certain time period, and power-off protection is performed after the magnitude of the GOA signal current value reaches a trigger condition.
However, the instantaneous value detection technology is affected by the coupling effect between the data line and the gate line to generate false triggering, which affects the normal use of the display device. In addition, after the display panel generates the actual GOA signal line short circuit to trigger the power-off protection, the power-off protection can be triggered after the display panel is started because the signal line short circuit still exists, so that the display panel cannot be normally used.
Disclosure of Invention
In view of the above, the present application provides an array substrate and a display panel for improving the reliability of the display panel.
In order to achieve the above object, in a first aspect, an embodiment of the present application provides an array substrate, including: a non-display region including a plurality of GOA signal lines arranged at intervals along a first direction and an insulating layer covering over each of the GOA signal lines;
Deformation wires are arranged between adjacent GOA signal wires, the deformation wires and the GOA signal wires are arranged on the same layer and have the same extending direction, and insulating layers above the adjacent GOA signal wires are connected through the deformation wires;
The deformation line can expand in a second direction under the condition that the deformation condition is met; the second direction is perpendicular to the array substrate.
In a possible implementation manner of the first aspect, a thickness of the deformation line in the second direction is the same as a thickness of the insulating layer.
In a possible implementation manner of the first aspect, a plurality of the deformation lines are arranged at intervals between adjacent GOA signal lines.
In a possible implementation manner of the first aspect, each strip-shaped transformation line includes a plurality of strip-shaped transformation line segments arranged at intervals along a third direction, deformation line segments of two adjacent transformation lines are staggered in the third direction, and the third direction is an extending direction of the transformation line and the GOA signal line.
In a possible implementation manner of the first aspect, projections of two adjacent deformation lines on a first plane are connected to form a connection line, and the first plane is parallel to the third direction and perpendicular to the array substrate.
In a possible implementation manner of the first aspect, the array substrate further includes an insulating film, where the insulating film is at least disposed on an upper surface of the deformation line.
In a possible implementation manner of the first aspect, the material of the deformation line includes a shape memory material, and the deformation line is capable of contracting in the first direction and expanding in the second direction when the target temperature is met.
In one possible implementation of the first aspect, the shape memory material includes one or more of titanium-nickel-copper alloy, titanium-nickel-iron alloy, titanium-nickel-chromium alloy, nickel-aluminum alloy, iron-manganese-silicon alloy, and copper-zinc alloy.
In a possible implementation manner of the first aspect, the deformation line is capable of expanding in the second direction in case of exceeding a target current.
In a second aspect, an embodiment of the present application provides a display panel including: the array substrate of the first aspect or any implementation manner of the first aspect, an opposite substrate disposed opposite to the array substrate, and a display medium layer located between the array substrate and the opposite substrate.
In the technical scheme provided by the embodiment of the application, the array substrate comprises a non-display area, wherein the non-display area comprises a plurality of GOA signal lines which are arranged at intervals along a first direction and an insulating layer which covers the upper parts of the GOA signal lines; deformation wires are arranged between adjacent GOA signal wires, the deformation wires and the GOA signal wires are arranged on the same layer and have the same extending direction, and insulating layers above the adjacent GOA signal wires are connected through the deformation wires; the deformation line can expand in the second direction under the condition that the deformation condition is met; the second direction is perpendicular to the array substrate. Therefore, the occurrence of short circuit of adjacent GOA signal lines can be reduced, and the use reliability of the display panel is improved.
Drawings
FIG. 1 is a schematic cross-sectional view of a non-display area of a first array substrate according to an embodiment of the present application;
FIG. 2 is a top view of the array substrate shown in FIG. 1;
Fig. 3 is a schematic diagram of a preparation process for preparing a GOA signal line according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a short circuit of the GOA signal line in FIG. 1;
FIG. 5 is a schematic cross-sectional view of a non-display area of a second array substrate according to an embodiment of the present application;
FIG. 6 is a schematic diagram of an embodiment of the present application when a deformation line is expanded;
FIG. 7 is a schematic diagram of another embodiment of the present application when the deformation line is expanded;
FIG. 8 is a schematic cross-sectional view of a non-display area of a third array substrate according to an embodiment of the present application;
FIG. 9 is a top view of the array substrate shown in FIG. 8;
FIG. 10 is a top view of a non-display area of a fourth array substrate according to an embodiment of the present application;
Fig. 11 is a schematic structural diagram of a display panel according to an embodiment of the application.
Reference numerals illustrate:
10-an array substrate; 11-a substrate base; 12-GOA signal line; 13-an insulating layer; 14-deformation lines; 15-an insulating film; 20-an opposing substrate; 30-display medium layer.
Detailed Description
Embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. The terminology used in the description of the embodiments of the application is for the purpose of describing particular embodiments of the application only and is not intended to be limiting of the application. The following embodiments may be combined with each other, and some embodiments may not be repeated for the same or similar concepts or processes.
In the display panel, the number and arrangement of the GOA signal lines on the substrate are large, and the risk of short circuit between the GOA signal lines is high under the influence of metal foreign matters or external impact. When the GOA signal lines are short-circuited, the voltage difference and the current between the adjacent signal lines are increased, and the power of the short-circuited part (or called short-circuited part) is very high, so that the display panel is overhigh in temperature, and even a screen melting phenomenon occurs when the display panel is severe, so that the display panel cannot be normally used.
In view of the above, the embodiment of the application provides an array substrate, which can expand the deformation line in the direction perpendicular to the array substrate when the GOA signal line is shorted, so as to disconnect the shorted position, thereby improving the reliability of the display panel and further prolonging the service life of the display panel.
The application is further described below with reference to the drawings and embodiments.
The array substrate may include a display region and a non-display region located at an outer periphery of the display region. The display area may include a circuit structure such as a display driving circuit and a fingerprint recognition circuit for performing picture display. The non-display region, for example, the GOA routing region may include a plurality of GOA signal lines arranged at intervals along the first direction and an insulating layer covering over each GOA signal line. The GOA signal lines may be disposed on opposite sides of the display area, and used for transmitting control signals to structures such as a display driving circuit. The GOA signal lines may include a clock signal line, a high level signal line, a low level signal line, a reset signal line, and the like.
Take an example in which the array substrate includes a layer of GOA signal lines. Fig. 1 is a schematic cross-sectional view of a non-display area of a first array substrate according to an embodiment of the present application. Fig. 2 is a top view of the array substrate shown in fig. 1. As shown in fig. 1 and 2, the array substrate may include a substrate 11, and the goa signal lines 12 may be disposed on the substrate 11. The insulating layer 13 may cover the GOA signal lines 12 to reduce occurrence of short circuits between the GOA signal lines 12, and the thickness of the insulating layer 13 may be selected according to actual needs, which is not particularly limited in the embodiment of the present application.
Considering that the insulating layer 13 is damaged or aged and cracked, which may cause a short circuit, the embodiment of the present application may be provided with a deformation line 14 between adjacent GOA signal lines 12.
It will be appreciated that the deformation line 14 may also be provided only between adjacent GOA signal lines 12 in the area where short circuits are likely to occur in the non-display area, so that manufacturing costs may be reduced.
When the GOA signal line 12 and the deformation line 14 are prepared, the deformation line 14 may be formed in the same layer as the GOA signal line 12, and the extending direction may be the same as that of the GOA signal line 12, so that the reliability of use of the deformation line 14 may be improved. The insulating layers 13 above adjacent GOA signal lines 12 may also be connected by deformation lines 14, thus reducing the resistance of the deformation lines 14 when they expand.
Specifically, referring to fig. 3, in preparing the GOA signal line 12, a deformation material layer may be formed on the substrate 11, and laser etching may be performed on the deformation material layer to form the deformation line 14. After forming the deformation line 14, a conductive metal layer and a photoresist layer (not shown) may be sequentially formed on the substrate base plate 11 and on the deformation line 14, and the photoresist may be subjected to a patterning process using a reticle, leaving the photoresist forming the GOA signal line region, wherein the patterning process includes, but is not limited to, baking, exposure and development. Then, wet etching is performed using the photoresist as a mask, and the conductive metal layer in the region not covered by the photoresist is removed, thereby forming the GOA signal line 12. Then, insulating materials and photoresist (not shown in the figure) are coated on the GOA signal lines 12, the deformation lines 14 and the exposed substrate 11, the photoresist is subjected to patterning treatment to remove the photoresist above the deformation lines 14, the insulating materials below the deformation lines 14 are exposed, and after the insulating materials above the deformation lines 14 are removed, the photoresist in other areas is removed to form the insulating layer 13.
When preparing the GOA signal line 12, the GOA signal line 12 may be formed first, the GOA signal line 12 and the substrate 11 may be covered with an insulating material and a photoresist in sequence, then the photoresist in the area where the deformation line 14 is to be formed may be removed, the insulating material to be exposed is etched, the thickness of the exposed insulating material is reduced, and then the deformation line 14 may be formed above the insulating material to be exposed again, thereby reducing the use of the deformation material and reducing the production cost.
Of course, the GOA signal line 12 may also include multiple layers. In the case where the GOA signal lines 12 include multiple layers, the deformation line 14 may be disposed between adjacent GOA signal lines 12 of the uppermost layer, which is not described herein.
Fig. 4 is a schematic short circuit diagram of the GOA signal line in fig. 1, referring to fig. 1 and 4, when the GOA signal line 12 is shorted, a large current and a high temperature are generated at the shorted position, and the material of the deformation line 14 can expand in a second direction (a direction perpendicular to the array substrate) under the condition that the deformation condition (current intensity or target temperature) is satisfied, for example, for the short circuit caused by a metal foreign matter, the expansion of the deformation line 14 can change the position of the metal foreign matter, thereby forcing the shorted position to be disconnected, ensuring that the display panel can continue to be used normally, and reducing damage to the display panel caused by the short circuit. The second direction may be perpendicular to the array substrate.
In the first direction, the spacing between the deformation line 14 and the GOA signal lines 12 on both sides may be set to at least 1um, which may enable the insulating layer 13 to better cover the GOA signal lines 12.
As an alternative implementation manner, in order to improve the reliability of the deformation line 14, after forming the deformation line 14, a layer of insulating film may be disposed on the surface of the deformation line 14, and then the GOA signal line 12 and the insulating layer 13 may be prepared. The insulating film has the flexible characteristic, can be when deformation line 14 takes place to expand in the second direction in order to break off the short circuit department, and the insulating film covers on deformation line 14 all the time, like this can also utilize the insulating film's insulating characteristic to make the short circuit department break off to further improve the disconnection effect of deformation line 14.
In some embodiments, as shown in fig. 5, the insulating film 15 may be provided only on the upper surface of the deformation line 14, so that the cost may be reduced. In the second direction, the sum of the thickness of the deformed wire 14 and the thickness of the insulating film 15 may be the same as the insulating layers 13 on both sides of the deformed wire 14, so that not only the surface flatness of the array substrate may be improved, but also the material use of the deformed wire 14 may be reduced, and the production cost may be reduced. The material of the insulating film 15 may be selected according to actual needs, and the present application is not particularly limited thereto.
As another alternative implementation manner, the thickness of the deformation line 14 may be the same as the thickness of the insulating layer 13 in the second direction, so that when the deformation line 14 expands, the deformation line 14 may have a higher expansion height in the second direction, thereby improving the breaking capability of the deformation line 14 to the short circuit, and further improving the short circuit resistance and the use reliability of the display panel.
The thickness of the deformed line 14 shown in fig. 1 is the same as that of the insulating layer 13, and will be described as an example.
The deformation condition of the deformation line 14 is related to the material of the deformation line 14. In one possible implementation, the material of the deformation line 14 may be selected such that upon reaching the target temperature, expansion deformation may occur in the second direction. Illustratively, the material of the deformation wire 14 may be a shape memory material. The shape memory material may comprise one or more of titanium nickel copper alloy, titanium nickel iron alloy, titanium nickel chromium alloy, nickel aluminum alloy, iron manganese silicon alloy, and copper zinc alloy as the main component.
Fig. 6 is a schematic diagram of an embodiment of the present application when a deformation line is expanded, where, as shown in fig. 6, the deformation line 14 made of a shape memory material can shrink in a first direction and expand in a second direction when a target temperature is met.
By adopting the shape memory material to prepare the deformation wire, the characteristic that the short circuit of the GOA signal wire 12 generates high temperature (usually more than 100 ℃) can be directly utilized to expand the deformation wire 14 in the second direction, and no additional technical means is needed to trigger the deformation wire 14 to deform.
In the embodiment of the application, the deformation material can be prepared by adopting the following method: the method comprises the steps of firstly placing a shape memory material in a high-temperature furnace with the temperature higher than 1000 ℃ to be melted into a liquid state, then pouring the liquid into a rectangular groove mold with the width of L0 and the height of H0, rapidly placing the mold in ice water with the temperature of 0 ℃, and rapidly converting the mold into a rectangular groove mold with the width of L1 and the height of H1, wherein L0 is smaller than L1, L1 is the width of a deformation material and can be 1-10 um; h0> H1, H1 is the thickness of the insulating layer, and can be 0.5-2.5 um. Through rapid cooling and shaping, the deformation block with shape memory can be prepared. After the deformation block is prepared into the deformation line 14 by the preparation method, when the display panel works normally (the temperature is-20 ℃ to 80 ℃), the deformation line 14 presents a thin and wide rectangle; when the deformation line 14 is heated to the target temperature by the high temperature at the short circuit, it can be restored to a thick and narrow rectangle, i.e., the deformation line is contracted and deformed in the first direction and expanded in the second direction.
It will be appreciated that the width and height of the deformable material may be set as desired. The target temperature at which the deformation line 14 made of the shape memory material expands (the temperature at which deformation occurs) may be changed by adding other materials, and the specific materials may be selected according to actual needs, which is not particularly limited in the present application.
In another possible implementation, the deformation line may also be selected from a material that is capable of expanding in the second direction in the event that the target current is exceeded. Illustratively, the material of the deformation line 14 may be a piezoelectric material. The principal components of the piezoelectric material may include one or more of polyvinylidene fluoride, lead metaniobate, lithium gallate, lithium germanate, titanium germanate, lithium iron transistor niobate, and lithium iron transistor tantalate.
Fig. 7 is a schematic diagram of another embodiment of the present application when the deformed wire is expanded, as shown in fig. 7, where the deformed wire 14 made of the piezoelectric material may be expanded in the second direction when the short-circuit current exceeds the target current. Specifically, the GOA signal line 12 has a large current intensity when short-circuited, the piezoelectric material is affected by a large current to generate an inverse piezoelectric effect, and the volume begins to expand (the width is unchanged and the thickness is increased) in the second direction, so that the short-circuit is forced to be disconnected, and the display panel can continue to work normally.
By adopting the piezoelectric material to prepare the deformation line 14, the characteristic that the current intensity at the short circuit position becomes large when the GOA signal line 12 is short-circuited can be directly utilized, so that the deformation line 14 expands in the second direction, and no additional technical means is required to trigger the deformation line 14 to deform.
It will be appreciated that the current intensity of the expansion of the deformation line 14 made of the piezoelectric material may be changed by adding other materials, and the specific materials may be selected according to actual needs, which is not particularly limited in the present application.
After the deformation line 14 made of the shape memory material and the piezoelectric material is expanded, the shape before expansion can be recovered after the target temperature or the current strength does not meet the deformation condition, so that the deformation line 14 can be reused, and the service life of the deformation line 14 is prolonged.
In fig. 1-7, a deformation line is illustrated as being disposed between adjacent GOA signal lines 12, and in a possible implementation, a plurality of deformation lines 14 disposed at intervals may also be included between adjacent GOA signal lines 12.
Fig. 8 is a schematic cross-sectional view of a non-display area of a third array substrate according to an embodiment of the present application. Fig. 9 is a top view of the array substrate shown in fig. 8. As shown in fig. 8 and 9, the number of the deformation lines 14 is 3, and the deformation lines 14 can be arranged at equal intervals, so that the reliability of the deformation line at the position of breaking short circuit can be further improved. In addition, the plurality of deformed wires 14 may divide the insulating layer 13 between adjacent GOA signal wires 12 into a plurality of insulating wires, so that when the insulating layer 13 above the GOA signal wires 12 is broken, the risk of short-circuiting may be reduced by the plurality of spaced insulating wires.
Further, fig. 10 is a top view of a non-display area of a fourth array substrate according to an embodiment of the present application. As shown in fig. 10, each of the transformation lines 14 may be further configured as a plurality of transformation line segments arranged at intervals along a third direction, wherein the third direction is an extending direction of the transformation line 14 and the GOA signal line 12. Therefore, the deformed line segments only at the short circuit position expand, and the deformed line segments in other areas remain unchanged, so that the deformation times of the deformed line segments at the non-short circuit position can be reduced, the fatigue life of the deformed line 14 can be prolonged, and the use reliability of the deformed line 14 can be improved.
The deformed line segments of the two adjacent deformed lines 14 may be arranged in a non-staggered arrangement in the third direction, or may be arranged in a non-staggered arrangement. For example, taking the case that the deformed line segments of two adjacent deformed lines 14 are arranged in a staggered manner in the third direction, the projections of the two adjacent deformed lines 14 on the first plane may be connected to form a connecting line, and the first plane may be parallel to the third direction and perpendicular to the array substrate, so as to improve the disconnection effect of the deformed line segments on the short circuit in the third direction. In addition, this may reduce the material cost of the deformation line 14.
In the first direction, the width of each deformed line segment can be set to be 1-5 um, the distance between adjacent deformed line segments can be set to be 1-2 um, each deformed line 14 can be distributed at equal intervals, and in order to improve the disconnection effect on the short circuit position, the width of each deformed line 14 can be larger than the distance between the adjacent deformed lines 14. In the third direction, the length of each deformed line segment may be set to 1-10 um, and the interval between adjacent deformed lines 14 may be set to 1-2 um. Illustratively, the deformed line segments may be arranged at equal intervals, and the length of each deformed line segment may be greater than the distance between adjacent deformed line segments, so that the disconnection effect of the deformed line 14 on the short-circuit point may be further improved.
Through the above embodiment, not only the insulation layers between the adjacent GOA signal lines 12 can be continuous, and the protection effect of the insulation layers 13 on the GOA signal lines 12 is ensured, but also when a short circuit occurs, a plurality of expanded deformation line segments can form a plane-like surface, so that the disconnection effect of the deformation line 14 on the short circuit position can be improved.
According to the array substrate provided by the embodiment of the application, the non-display area comprises a plurality of GOA signal lines which are arranged at intervals along the first direction, and the insulating layer covers the upper parts of the GOA signal lines, so that short circuits among GOA signals are reduced. All set up the deformation line between adjacent GOA signal line, deformation line and GOA signal line set up with the layer and extending direction is the same, and the insulating layer of adjacent GOA signal line top passes through the deformation line to be connected, can make the deformation line can take place the inflation in the second direction under the condition that satisfies deformation condition like this, and the second direction perpendicular to array substrate can make the deformation line break off the short circuit department of GOA signal line after the inflation like this, guarantees the normal use of display surface, prolongs display panel's life.
Based on the same inventive concept, the present application also provides a display panel, as shown in fig. 11, which includes the array substrate 10 described in the above embodiment, the opposite substrate 20 disposed opposite to the array substrate 10, and the display medium layer 30 between the array substrate 10 and the opposite substrate 20.
Since the display panel in this embodiment includes the array substrate in the foregoing embodiment, that is, the display panel in this embodiment has all the technical features and technical effects of the foregoing embodiment of the array substrate, reference is specifically made to the foregoing embodiment, and details are not repeated herein.
It should be understood that in the description of the application and the claims that follow, the terms "comprising," "including," "having," and any variations thereof are intended to cover a non-exclusive inclusion, which is meant to be "including but not limited to," unless otherwise specifically emphasized.
In the description of the present application, unless otherwise indicated, "/" means that the objects associated in tandem are in a "or" relationship, e.g., A/B may represent A or B; in the present application, "and/or" describing the association relationship of the association object, it means that there may be three relationships, for example, a and/or B may mean: a alone, a and B together, and B alone, wherein A, B may be singular or plural.
Also, in the description of the present application, unless otherwise indicated, "a plurality" means two or more than two. "at least one of the following" or similar expressions thereof, means any combination of these items, including any combination of single or plural items.
In addition, in the description of the present application, it should be understood that the terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "vertical", "top", "bottom", "inner", "outer", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the present application, unless specifically stated and limited otherwise, the terms "connected," "coupled," and the like are to be construed broadly and may be, for example, mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, unless otherwise specifically defined, the meaning of the terms in this disclosure is to be understood by those of ordinary skill in the art.
Furthermore, in the description of the present specification and the appended claims, the terms "first," "second," and the like are used to distinguish between similar objects, and are not necessarily used to describe a particular order or sequence, nor are they to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. It is to be understood that the data so used may be interchanged where appropriate, such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described herein; features defining "first", "second" may include at least one such feature, either explicitly or implicitly.
In embodiments of the application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.

Claims (8)

1. An array substrate, characterized by comprising: a non-display region including a plurality of GOA signal lines arranged at intervals along a first direction and an insulating layer covering over each of the GOA signal lines;
Deformation wires are arranged between adjacent GOA signal wires, the deformation wires are mutually spaced from the GOA signal wires and are not in contact with the GOA signal wires, the deformation wires and the GOA signal wires are arranged on the same layer and have the same extending direction, and insulating layers above the adjacent GOA signal wires are connected through the deformation wires;
The deformation line can expand in a second direction under the condition that the deformation condition is met; wherein the second direction is perpendicular to the array substrate;
The material of the deformation line is a shape memory material, the deformation line can shrink in the first direction and expand in the second direction under the condition of meeting the target temperature, or the material of the deformation line is a piezoelectric material, and the deformation line can expand in the second direction under the condition of exceeding the target current.
2. The array substrate of claim 1, wherein a thickness of the deformation line in the second direction is the same as a thickness of the insulating layer.
3. The array substrate of claim 1, wherein adjacent GOA signal lines include a plurality of deformation lines disposed at intervals therebetween.
4. The array substrate of claim 3, wherein each deformation line comprises a plurality of deformation line segments arranged at intervals along a third direction, the deformation line segments of two adjacent deformation lines are arranged in a staggered manner in the third direction, and the third direction is an extending direction of the deformation line and the GOA signal line.
5. The array substrate of claim 4, wherein projections of two adjacent deformation lines on a first plane are connected to form a connection line, and the first plane is parallel to the third direction and perpendicular to the array substrate.
6. The array substrate according to claim 1, further comprising an insulating film provided at least on an upper surface of the deformed line.
7. The array substrate of claim 1, wherein the shape memory material comprises one or more of titanium-nickel-copper alloy, titanium-nickel-iron alloy, titanium-nickel-chromium alloy, nickel-aluminum alloy, iron-manganese-silicon alloy, and copper-zinc alloy.
8. A display panel, comprising: the array substrate according to any one of claims 1 to 7, an opposite substrate disposed opposite to the array substrate, and a display medium layer between the array substrate and the opposite substrate.
CN202311550178.9A 2023-11-21 2023-11-21 Array substrate and display panel Active CN117276292B (en)

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CN104240631A (en) * 2014-08-18 2014-12-24 京东方科技集团股份有限公司 GOA circuit, driving method for GOA circuit and display device for GOA circuit
CN110730981A (en) * 2017-06-27 2020-01-24 株式会社日本显示器 Display device
CN111180468A (en) * 2020-01-06 2020-05-19 昆山国显光电有限公司 Display panel, display device and preparation method of display panel
CN113724911A (en) * 2021-08-19 2021-11-30 深圳市华星光电半导体显示技术有限公司 Conductive paste, manufacturing method of conductive routing, display panel and spliced screen
CN115623814A (en) * 2019-10-21 2023-01-17 京东方科技集团股份有限公司 Display panel, manufacturing method thereof and display device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101510016A (en) * 2009-04-03 2009-08-19 友达光电股份有限公司 Flat display panel, optoelectronic device and bright point repairing method thereof
CN104240631A (en) * 2014-08-18 2014-12-24 京东方科技集团股份有限公司 GOA circuit, driving method for GOA circuit and display device for GOA circuit
CN110730981A (en) * 2017-06-27 2020-01-24 株式会社日本显示器 Display device
CN115623814A (en) * 2019-10-21 2023-01-17 京东方科技集团股份有限公司 Display panel, manufacturing method thereof and display device
CN111180468A (en) * 2020-01-06 2020-05-19 昆山国显光电有限公司 Display panel, display device and preparation method of display panel
CN113724911A (en) * 2021-08-19 2021-11-30 深圳市华星光电半导体显示技术有限公司 Conductive paste, manufacturing method of conductive routing, display panel and spliced screen

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